diff options
44 files changed, 1081 insertions, 1199 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index a875868e8a..72c2e6089e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -383,6 +383,8 @@ F: target/s390x/kvm-stub.c F: target/s390x/ioinst.[ch] F: target/s390x/machine.c F: target/s390x/sigp.c +F: target/s390x/cpu_features*.[ch] +F: target/s390x/cpu_models.[ch] F: hw/intc/s390_flic.c F: hw/intc/s390_flic_kvm.c F: include/hw/s390x/s390_flic.h @@ -408,7 +410,7 @@ M: Paul Durrant <paul.durrant@citrix.com> L: xen-devel@lists.xenproject.org S: Supported F: */xen* -F: hw/9pfs/xen-9p-backend.c +F: hw/9pfs/xen-9p* F: hw/char/xen_console.c F: hw/display/xenfb.c F: hw/net/xen_nic.c @@ -1506,6 +1508,7 @@ virtio-9p M: Greg Kurz <groug@kaod.org> S: Supported F: hw/9pfs/ +X: hw/9pfs/xen-9p* F: fsdev/ F: tests/virtio-9p-test.c T: git https://github.com/gkurz/qemu.git 9p-next diff --git a/Makefile b/Makefile index cfb18f1525..b1c93ac027 100644 --- a/Makefile +++ b/Makefile @@ -1,5 +1,9 @@ # Makefile for QEMU. +ifneq ($(words $(subst :, ,$(CURDIR))), 1) + $(error main directory cannot contain spaces nor colons) +endif + # Always point to the root of the build tree (needs GNU make). BUILD_DIR=$(CURDIR) @@ -875,19 +879,19 @@ ifneq ($(DESCS),) done endif for s in $(ICON_SIZES); do \ - mkdir -p "$(DESTDIR)/$(qemu_icondir)/hicolor/$${s}/apps"; \ + mkdir -p "$(DESTDIR)$(qemu_icondir)/hicolor/$${s}/apps"; \ $(INSTALL_DATA) $(SRC_PATH)/ui/icons/qemu_$${s}.png \ - "$(DESTDIR)/$(qemu_icondir)/hicolor/$${s}/apps/qemu.png"; \ + "$(DESTDIR)$(qemu_icondir)/hicolor/$${s}/apps/qemu.png"; \ done; \ - mkdir -p "$(DESTDIR)/$(qemu_icondir)/hicolor/32x32/apps"; \ + mkdir -p "$(DESTDIR)$(qemu_icondir)/hicolor/32x32/apps"; \ $(INSTALL_DATA) $(SRC_PATH)/ui/icons/qemu_32x32.bmp \ - "$(DESTDIR)/$(qemu_icondir)/hicolor/32x32/apps/qemu.bmp"; \ - mkdir -p "$(DESTDIR)/$(qemu_icondir)/hicolor/scalable/apps"; \ + "$(DESTDIR)$(qemu_icondir)/hicolor/32x32/apps/qemu.bmp"; \ + mkdir -p "$(DESTDIR)$(qemu_icondir)/hicolor/scalable/apps"; \ $(INSTALL_DATA) $(SRC_PATH)/ui/icons/qemu.svg \ - "$(DESTDIR)/$(qemu_icondir)/hicolor/scalable/apps/qemu.svg" - mkdir -p "$(DESTDIR)/$(qemu_desktopdir)" + "$(DESTDIR)$(qemu_icondir)/hicolor/scalable/apps/qemu.svg" + mkdir -p "$(DESTDIR)$(qemu_desktopdir)" $(INSTALL_DATA) $(SRC_PATH)/ui/qemu.desktop \ - "$(DESTDIR)/$(qemu_desktopdir)/qemu.desktop" + "$(DESTDIR)$(qemu_desktopdir)/qemu.desktop" ifdef CONFIG_GTK $(MAKE) -C po $@ endif diff --git a/configure b/configure index 5c7914570e..f2cb9f3c66 100755 --- a/configure +++ b/configure @@ -276,10 +276,15 @@ ld_has() { $ld --help 2>/dev/null | grep ".$1" >/dev/null 2>&1 } -# default parameters -source_path=$(dirname "$0") # make source path absolute -source_path=$(cd "$source_path"; pwd) +source_path=$(cd "$(dirname -- "$0")"; pwd) + +if printf %s\\n "$source_path" "$PWD" | grep -q "[[:space:]:]"; +then + error_exit "main directory cannot contain spaces nor colons" +fi + +# default parameters cpu="" iasl="iasl" interp_prefix="/usr/gnemul/qemu-%M" @@ -5130,7 +5135,7 @@ fi sem_timedwait=no cat > $TMPC << EOF #include <semaphore.h> -int main(void) { return sem_timedwait(0, 0); } +int main(void) { sem_t s; struct timespec t = {0}; return sem_timedwait(&s, &t); } EOF if compile_prog "" "" ; then sem_timedwait=yes diff --git a/hw/display/Kconfig b/hw/display/Kconfig index 910dccb2f7..cbdf7b1a67 100644 --- a/hw/display/Kconfig +++ b/hw/display/Kconfig @@ -130,3 +130,5 @@ config ATI_VGA default y if PCI_DEVICES depends on PCI select VGA + select BITBANG_I2C + select DDC diff --git a/hw/display/ati.c b/hw/display/ati.c index 76595d9511..0cb1173848 100644 --- a/hw/display/ati.c +++ b/hw/display/ati.c @@ -26,6 +26,7 @@ #include "qapi/error.h" #include "hw/hw.h" #include "ui/console.h" +#include "hw/display/i2c-ddc.h" #include "trace.h" #define ATI_DEBUG_HW_CURSOR 0 @@ -215,6 +216,24 @@ static void ati_cursor_draw_line(VGACommonState *vga, uint8_t *d, int scr_y) } } +static uint64_t ati_i2c(bitbang_i2c_interface *i2c, uint64_t data, int base) +{ + bool c = (data & BIT(base + 17) ? !!(data & BIT(base + 1)) : 1); + bool d = (data & BIT(base + 16) ? !!(data & BIT(base)) : 1); + + bitbang_i2c_set(i2c, BITBANG_I2C_SCL, c); + d = bitbang_i2c_set(i2c, BITBANG_I2C_SDA, d); + + data &= ~0xf00ULL; + if (c) { + data |= BIT(base + 9); + } + if (d) { + data |= BIT(base + 8); + } + return data; +} + static inline uint64_t ati_reg_read_offs(uint32_t reg, int offs, unsigned int size) { @@ -266,7 +285,16 @@ static uint64_t ati_mm_read(void *opaque, hwaddr addr, unsigned int size) case DAC_CNTL: val = s->regs.dac_cntl; break; -/* case GPIO_MONID: FIXME hook up DDC I2C here */ + case GPIO_VGA_DDC: + val = s->regs.gpio_vga_ddc; + break; + case GPIO_DVI_DDC: + val = s->regs.gpio_dvi_ddc; + break; + case GPIO_MONID ... GPIO_MONID + 3: + val = ati_reg_read_offs(s->regs.gpio_monid, + addr - GPIO_MONID, size); + break; case PALETTE_INDEX: /* FIXME unaligned access */ val = vga_ioport_read(&s->vga, VGA_PEL_IR) << 16; @@ -391,9 +419,15 @@ static uint64_t ati_mm_read(void *opaque, hwaddr addr, unsigned int size) break; case DEFAULT_OFFSET: val = s->regs.default_offset; + if (s->dev_id != PCI_DEVICE_ID_ATI_RAGE128_PF) { + val >>= 10; + val |= s->regs.default_pitch << 16; + val |= s->regs.default_tile << 30; + } break; case DEFAULT_PITCH: val = s->regs.default_pitch; + val |= s->regs.default_tile << 16; break; case DEFAULT_SC_BOTTOM_RIGHT: val = s->regs.default_sc_bottom_right; @@ -497,7 +531,33 @@ static void ati_mm_write(void *opaque, hwaddr addr, s->regs.dac_cntl = data & 0xffffe3ff; s->vga.dac_8bit = !!(data & DAC_8BIT_EN); break; -/* case GPIO_MONID: FIXME hook up DDC I2C here */ + case GPIO_VGA_DDC: + if (s->dev_id != PCI_DEVICE_ID_ATI_RAGE128_PF) { + /* FIXME: Maybe add a property to select VGA or DVI port? */ + } + break; + case GPIO_DVI_DDC: + if (s->dev_id != PCI_DEVICE_ID_ATI_RAGE128_PF) { + s->regs.gpio_dvi_ddc = ati_i2c(s->bbi2c, data, 0); + } + break; + case GPIO_MONID ... GPIO_MONID + 3: + /* FIXME What does Radeon have here? */ + if (s->dev_id == PCI_DEVICE_ID_ATI_RAGE128_PF) { + ati_reg_write_offs(&s->regs.gpio_monid, + addr - GPIO_MONID, data, size); + /* + * Rage128p accesses DDC used to get EDID via these bits. + * Only touch i2c when write overlaps 3rd byte because some + * drivers access this reg via multiple partial writes and + * without this spurious bits would be sent. + */ + if ((s->regs.gpio_monid & BIT(25)) && + addr <= GPIO_MONID + 2 && addr + size > GPIO_MONID + 2) { + s->regs.gpio_monid = ati_i2c(s->bbi2c, s->regs.gpio_monid, 1); + } + } + break; case PALETTE_INDEX ... PALETTE_INDEX + 3: if (size == 4) { vga_ioport_write(&s->vga, VGA_PEL_IR, (data >> 16) & 0xff); @@ -628,22 +688,22 @@ static void ati_mm_write(void *opaque, hwaddr addr, break; case SRC_PITCH_OFFSET: if (s->dev_id == PCI_DEVICE_ID_ATI_RAGE128_PF) { - s->regs.src_offset = (data & 0x1fffff) << 5; - s->regs.src_pitch = (data >> 21) & 0x3ff; + s->regs.src_offset = (data & 0x1fffff) << 4; + s->regs.src_pitch = (data & 0x7fe00000) >> 21; s->regs.src_tile = data >> 31; } else { - s->regs.src_offset = (data & 0x3fffff) << 11; + s->regs.src_offset = (data & 0x3fffff) << 10; s->regs.src_pitch = (data & 0x3fc00000) >> 16; s->regs.src_tile = (data >> 30) & 1; } break; case DST_PITCH_OFFSET: if (s->dev_id == PCI_DEVICE_ID_ATI_RAGE128_PF) { - s->regs.dst_offset = (data & 0x1fffff) << 5; - s->regs.dst_pitch = (data >> 21) & 0x3ff; + s->regs.dst_offset = (data & 0x1fffff) << 4; + s->regs.dst_pitch = (data & 0x7fe00000) >> 21; s->regs.dst_tile = data >> 31; } else { - s->regs.dst_offset = (data & 0x3fffff) << 11; + s->regs.dst_offset = (data & 0x3fffff) << 10; s->regs.dst_pitch = (data & 0x3fc00000) >> 16; s->regs.dst_tile = data >> 30; } @@ -723,13 +783,19 @@ static void ati_mm_write(void *opaque, hwaddr addr, s->regs.dp_write_mask = data; break; case DEFAULT_OFFSET: - data &= (s->dev_id == PCI_DEVICE_ID_ATI_RAGE128_PF ? - 0x03fffc00 : 0xfffffc00); - s->regs.default_offset = data; + if (s->dev_id == PCI_DEVICE_ID_ATI_RAGE128_PF) { + s->regs.default_offset = data & 0xfffffff0; + } else { + /* Radeon has DEFAULT_PITCH_OFFSET here like DST_PITCH_OFFSET */ + s->regs.default_offset = (data & 0x3fffff) << 10; + s->regs.default_pitch = (data & 0x3fc00000) >> 16; + s->regs.default_tile = data >> 30; + } break; case DEFAULT_PITCH: if (s->dev_id == PCI_DEVICE_ID_ATI_RAGE128_PF) { - s->regs.default_pitch = data & 0x103ff; + s->regs.default_pitch = data & 0x3fff; + s->regs.default_tile = (data >> 16) & 1; } break; case DEFAULT_SC_BOTTOM_RIGHT: @@ -788,6 +854,12 @@ static void ati_vga_realize(PCIDevice *dev, Error **errp) vga->cursor_draw_line = ati_cursor_draw_line; } + /* ddc, edid */ + I2CBus *i2cbus = i2c_init_bus(DEVICE(s), "ati-vga.ddc"); + s->bbi2c = bitbang_i2c_init(i2cbus); + I2CSlave *i2cddc = I2C_SLAVE(qdev_create(BUS(i2cbus), TYPE_I2CDDC)); + i2c_set_slave_address(i2cddc, 0x50); + /* mmio register space */ memory_region_init_io(&s->mm, OBJECT(s), &ati_mm_ops, s, "ati.mmregs", 0x4000); @@ -813,6 +885,7 @@ static void ati_vga_exit(PCIDevice *dev) ATIVGAState *s = ATI_VGA(dev); graphic_console_close(s->vga.con); + g_free(s->bbi2c); } static Property ati_vga_properties[] = { @@ -837,7 +910,7 @@ static void ati_vga_class_init(ObjectClass *klass, void *data) k->class_id = PCI_CLASS_DISPLAY_VGA; k->vendor_id = PCI_VENDOR_ID_ATI; k->device_id = PCI_DEVICE_ID_ATI_RAGE128_PF; - k->romfile = "vgabios-stdvga.bin"; + k->romfile = "vgabios-ati.bin"; k->realize = ati_vga_realize; k->exit = ati_vga_exit; } diff --git a/hw/display/ati_2d.c b/hw/display/ati_2d.c index d83c29c6d9..2dbf53f039 100644 --- a/hw/display/ati_2d.c +++ b/hw/display/ati_2d.c @@ -51,8 +51,9 @@ void ati_2d_blt(ATIVGAState *s) s->vga.vbe_start_addr, surface_data(ds), surface_stride(ds), surface_bits_per_pixel(ds), (s->regs.dp_mix & GMC_ROP3_MASK) >> 16); - DPRINTF("%d %d, %d %d, (%d,%d) -> (%d,%d) %dx%d\n", s->regs.src_offset, - s->regs.dst_offset, s->regs.src_pitch, s->regs.dst_pitch, + DPRINTF("%d %d %d, %d %d %d, (%d,%d) -> (%d,%d) %dx%d\n", + s->regs.src_offset, s->regs.dst_offset, s->regs.default_offset, + s->regs.src_pitch, s->regs.dst_pitch, s->regs.default_pitch, s->regs.src_x, s->regs.src_y, s->regs.dst_x, s->regs.dst_y, s->regs.dst_width, s->regs.dst_height); switch (s->regs.dp_mix & GMC_ROP3_MASK) { @@ -60,10 +61,16 @@ void ati_2d_blt(ATIVGAState *s) { uint8_t *src_bits, *dst_bits, *end; int src_stride, dst_stride, bpp = ati_bpp_from_datatype(s); - src_bits = s->vga.vram_ptr + s->regs.src_offset; - dst_bits = s->vga.vram_ptr + s->regs.dst_offset; - src_stride = s->regs.src_pitch; - dst_stride = s->regs.dst_pitch; + src_bits = s->vga.vram_ptr + + (s->regs.dp_gui_master_cntl & GMC_SRC_PITCH_OFFSET_CNTL ? + s->regs.src_offset : s->regs.default_offset); + dst_bits = s->vga.vram_ptr + + (s->regs.dp_gui_master_cntl & GMC_DST_PITCH_OFFSET_CNTL ? + s->regs.dst_offset : s->regs.default_offset); + src_stride = (s->regs.dp_gui_master_cntl & GMC_SRC_PITCH_OFFSET_CNTL ? + s->regs.src_pitch : s->regs.default_pitch); + dst_stride = (s->regs.dp_gui_master_cntl & GMC_DST_PITCH_OFFSET_CNTL ? + s->regs.dst_pitch : s->regs.default_pitch); if (s->dev_id == PCI_DEVICE_ID_ATI_RAGE128_PF) { src_bits += s->regs.crtc_offset & 0x07ffffff; @@ -111,8 +118,11 @@ void ati_2d_blt(ATIVGAState *s) uint8_t *dst_bits, *end; int dst_stride, bpp = ati_bpp_from_datatype(s); uint32_t filler = 0; - dst_bits = s->vga.vram_ptr + s->regs.dst_offset; - dst_stride = s->regs.dst_pitch; + dst_bits = s->vga.vram_ptr + + (s->regs.dp_gui_master_cntl & GMC_DST_PITCH_OFFSET_CNTL ? + s->regs.dst_offset : s->regs.default_offset); + dst_stride = (s->regs.dp_gui_master_cntl & GMC_DST_PITCH_OFFSET_CNTL ? + s->regs.dst_pitch : s->regs.default_pitch); if (s->dev_id == PCI_DEVICE_ID_ATI_RAGE128_PF) { dst_bits += s->regs.crtc_offset & 0x07ffffff; diff --git a/hw/display/ati_dbg.c b/hw/display/ati_dbg.c index b045f81d06..88b3a11315 100644 --- a/hw/display/ati_dbg.c +++ b/hw/display/ati_dbg.c @@ -19,6 +19,8 @@ static struct ati_regdesc ati_reg_names[] = { {"CRTC_GEN_CNTL", 0x0050}, {"CRTC_EXT_CNTL", 0x0054}, {"DAC_CNTL", 0x0058}, + {"GPIO_VGA_DDC", 0x0060}, + {"GPIO_DVI_DDC", 0x0064}, {"GPIO_MONID", 0x0068}, {"I2C_CNTL_1", 0x0094}, {"PALETTE_INDEX", 0x00b0}, diff --git a/hw/display/ati_int.h b/hw/display/ati_int.h index 2f426064cf..9b67d0022a 100644 --- a/hw/display/ati_int.h +++ b/hw/display/ati_int.h @@ -10,6 +10,7 @@ #define ATI_INT_H #include "hw/pci/pci.h" +#include "hw/i2c/bitbang_i2c.h" #include "vga_int.h" /*#define DEBUG_ATI*/ @@ -35,6 +36,9 @@ typedef struct ATIVGARegs { uint32_t crtc_gen_cntl; uint32_t crtc_ext_cntl; uint32_t dac_cntl; + uint32_t gpio_vga_ddc; + uint32_t gpio_dvi_ddc; + uint32_t gpio_monid; uint32_t crtc_h_total_disp; uint32_t crtc_h_sync_strt_wid; uint32_t crtc_v_total_disp; @@ -70,6 +74,7 @@ typedef struct ATIVGARegs { uint32_t dp_write_mask; uint32_t default_offset; uint32_t default_pitch; + uint32_t default_tile; uint32_t default_sc_bottom_right; } ATIVGARegs; @@ -83,6 +88,7 @@ typedef struct ATIVGAState { uint16_t cursor_size; uint32_t cursor_offset; QEMUCursor *cursor; + bitbang_i2c_interface *bbi2c; MemoryRegion io; MemoryRegion mm; ATIVGARegs regs; diff --git a/hw/display/ati_regs.h b/hw/display/ati_regs.h index 923bfd33ce..d7155c93d5 100644 --- a/hw/display/ati_regs.h +++ b/hw/display/ati_regs.h @@ -37,6 +37,8 @@ #define CRTC_GEN_CNTL 0x0050 #define CRTC_EXT_CNTL 0x0054 #define DAC_CNTL 0x0058 +#define GPIO_VGA_DDC 0x0060 +#define GPIO_DVI_DDC 0x0064 #define GPIO_MONID 0x0068 #define I2C_CNTL_1 0x0094 #define PALETTE_INDEX 0x00b0 @@ -368,8 +370,8 @@ #define BRUSH_SOLIDCOLOR 0x00000d00 /* DP_GUI_MASTER_CNTL bit constants */ -#define GMC_SRC_PITCH_OFFSET_DEFAULT 0x00000000 -#define GMC_DST_PITCH_OFFSET_DEFAULT 0x00000000 +#define GMC_SRC_PITCH_OFFSET_CNTL 0x00000001 +#define GMC_DST_PITCH_OFFSET_CNTL 0x00000002 #define GMC_SRC_CLIP_DEFAULT 0x00000000 #define GMC_DST_CLIP_DEFAULT 0x00000000 #define GMC_BRUSH_SOLIDCOLOR 0x000000d0 diff --git a/hw/i2c/bitbang_i2c.c b/hw/i2c/bitbang_i2c.c index 5dfc72d9d7..3cb0509b02 100644 --- a/hw/i2c/bitbang_i2c.c +++ b/hw/i2c/bitbang_i2c.c @@ -12,7 +12,7 @@ #include "qemu/osdep.h" #include "hw/hw.h" -#include "bitbang_i2c.h" +#include "hw/i2c/bitbang_i2c.h" #include "hw/sysbus.h" #include "qemu/module.h" diff --git a/hw/i2c/ppc4xx_i2c.c b/hw/i2c/ppc4xx_i2c.c index d606d3dbeb..5fb4f86c38 100644 --- a/hw/i2c/ppc4xx_i2c.c +++ b/hw/i2c/ppc4xx_i2c.c @@ -30,7 +30,6 @@ #include "cpu.h" #include "hw/hw.h" #include "hw/i2c/ppc4xx_i2c.h" -#include "bitbang_i2c.h" #define PPC4xx_I2C_MEM_SIZE 18 diff --git a/hw/i2c/versatile_i2c.c b/hw/i2c/versatile_i2c.c index e07be9890c..24b6e36b6d 100644 --- a/hw/i2c/versatile_i2c.c +++ b/hw/i2c/versatile_i2c.c @@ -23,7 +23,7 @@ #include "qemu/osdep.h" #include "hw/sysbus.h" -#include "bitbang_i2c.h" +#include "hw/i2c/bitbang_i2c.h" #include "qemu/log.h" #include "qemu/module.h" diff --git a/hw/s390x/css.c b/hw/s390x/css.c index ad310b9f94..b92395f165 100644 --- a/hw/s390x/css.c +++ b/hw/s390x/css.c @@ -22,6 +22,7 @@ #include "trace.h" #include "hw/s390x/s390_flic.h" #include "hw/s390x/s390-virtio-ccw.h" +#include "hw/s390x/s390-ccw.h" typedef struct CrwContainer { CRW crw; @@ -1205,6 +1206,26 @@ static void sch_handle_start_func_virtual(SubchDev *sch) } +static void sch_handle_halt_func_passthrough(SubchDev *sch) +{ + int ret; + + ret = s390_ccw_halt(sch); + if (ret == -ENOSYS) { + sch_handle_halt_func(sch); + } +} + +static void sch_handle_clear_func_passthrough(SubchDev *sch) +{ + int ret; + + ret = s390_ccw_clear(sch); + if (ret == -ENOSYS) { + sch_handle_clear_func(sch); + } +} + static IOInstEnding sch_handle_start_func_passthrough(SubchDev *sch) { SCHIB *schib = &sch->curr_status; @@ -1244,11 +1265,9 @@ IOInstEnding do_subchannel_work_passthrough(SubchDev *sch) SCHIB *schib = &sch->curr_status; if (schib->scsw.ctrl & SCSW_FCTL_CLEAR_FUNC) { - /* TODO: Clear handling */ - sch_handle_clear_func(sch); + sch_handle_clear_func_passthrough(sch); } else if (schib->scsw.ctrl & SCSW_FCTL_HALT_FUNC) { - /* TODO: Halt handling */ - sch_handle_halt_func(sch); + sch_handle_halt_func_passthrough(sch); } else if (schib->scsw.ctrl & SCSW_FCTL_START_FUNC) { return sch_handle_start_func_passthrough(sch); } diff --git a/hw/s390x/s390-ccw.c b/hw/s390x/s390-ccw.c index 8403f0e3e9..22c6878b84 100644 --- a/hw/s390x/s390-ccw.c +++ b/hw/s390x/s390-ccw.c @@ -30,6 +30,26 @@ IOInstEnding s390_ccw_cmd_request(SubchDev *sch) return cdc->handle_request(sch); } +int s390_ccw_halt(SubchDev *sch) +{ + S390CCWDeviceClass *cdc = S390_CCW_DEVICE_GET_CLASS(sch->driver_data); + + if (!cdc->handle_halt) { + return -ENOSYS; + } + return cdc->handle_halt(sch); +} + +int s390_ccw_clear(SubchDev *sch) +{ + S390CCWDeviceClass *cdc = S390_CCW_DEVICE_GET_CLASS(sch->driver_data); + + if (!cdc->handle_clear) { + return -ENOSYS; + } + return cdc->handle_clear(sch); +} + static void s390_ccw_get_dev_info(S390CCWDevice *cdev, char *sysfsdev, Error **errp) diff --git a/hw/vfio/ccw.c b/hw/vfio/ccw.c index 03a2becb3e..6d0296fe4d 100644 --- a/hw/vfio/ccw.c +++ b/hw/vfio/ccw.c @@ -2,9 +2,12 @@ * vfio based subchannel assignment support * * Copyright 2017 IBM Corp. + * Copyright 2019 Red Hat, Inc. + * * Author(s): Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com> * Xiao Feng Ren <renxiaof@linux.vnet.ibm.com> * Pierre Morel <pmorel@linux.vnet.ibm.com> + * Cornelia Huck <cohuck@redhat.com> * * This work is licensed under the terms of the GNU GPL, version 2 or (at * your option) any later version. See the COPYING file in the top-level @@ -33,6 +36,9 @@ struct VFIOCCWDevice { uint64_t io_region_size; uint64_t io_region_offset; struct ccw_io_region *io_region; + uint64_t async_cmd_region_size; + uint64_t async_cmd_region_offset; + struct ccw_cmd_region *async_cmd_region; EventNotifier io_notifier; bool force_orb_pfch; bool warned_orb_pfch; @@ -115,6 +121,87 @@ again: } } +static int vfio_ccw_handle_clear(SubchDev *sch) +{ + S390CCWDevice *cdev = sch->driver_data; + VFIOCCWDevice *vcdev = DO_UPCAST(VFIOCCWDevice, cdev, cdev); + struct ccw_cmd_region *region = vcdev->async_cmd_region; + int ret; + + if (!vcdev->async_cmd_region) { + /* Async command region not available, fall back to emulation */ + return -ENOSYS; + } + + memset(region, 0, sizeof(*region)); + region->command = VFIO_CCW_ASYNC_CMD_CSCH; + +again: + ret = pwrite(vcdev->vdev.fd, region, + vcdev->async_cmd_region_size, vcdev->async_cmd_region_offset); + if (ret != vcdev->async_cmd_region_size) { + if (errno == EAGAIN) { + goto again; + } + error_report("vfio-ccw: write cmd region failed with errno=%d", errno); + ret = -errno; + } else { + ret = region->ret_code; + } + switch (ret) { + case 0: + case -ENODEV: + case -EACCES: + return 0; + case -EFAULT: + default: + sch_gen_unit_exception(sch); + css_inject_io_interrupt(sch); + return 0; + } +} + +static int vfio_ccw_handle_halt(SubchDev *sch) +{ + S390CCWDevice *cdev = sch->driver_data; + VFIOCCWDevice *vcdev = DO_UPCAST(VFIOCCWDevice, cdev, cdev); + struct ccw_cmd_region *region = vcdev->async_cmd_region; + int ret; + + if (!vcdev->async_cmd_region) { + /* Async command region not available, fall back to emulation */ + return -ENOSYS; + } + + memset(region, 0, sizeof(*region)); + region->command = VFIO_CCW_ASYNC_CMD_HSCH; + +again: + ret = pwrite(vcdev->vdev.fd, region, + vcdev->async_cmd_region_size, vcdev->async_cmd_region_offset); + if (ret != vcdev->async_cmd_region_size) { + if (errno == EAGAIN) { + goto again; + } + error_report("vfio-ccw: write cmd region failed with errno=%d", errno); + ret = -errno; + } else { + ret = region->ret_code; + } + switch (ret) { + case 0: + case -EBUSY: + case -ENODEV: + case -EACCES: + return 0; + case -EFAULT: + default: + sch_gen_unit_exception(sch); + css_inject_io_interrupt(sch); + return 0; + } +} + static void vfio_ccw_reset(DeviceState *dev) { CcwDevice *ccw_dev = DO_UPCAST(CcwDevice, parent_obj, dev); @@ -198,9 +285,8 @@ static void vfio_ccw_register_io_notifier(VFIOCCWDevice *vcdev, Error **errp) { VFIODevice *vdev = &vcdev->vdev; struct vfio_irq_info *irq_info; - struct vfio_irq_set *irq_set; size_t argsz; - int32_t *pfd; + int fd; if (vdev->num_irqs < VFIO_CCW_IO_IRQ_INDEX + 1) { error_setg(errp, "vfio: unexpected number of io irqs %u", @@ -224,56 +310,32 @@ static void vfio_ccw_register_io_notifier(VFIOCCWDevice *vcdev, Error **errp) goto out_free_info; } - argsz = sizeof(*irq_set) + sizeof(*pfd); - irq_set = g_malloc0(argsz); - irq_set->argsz = argsz; - irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD | - VFIO_IRQ_SET_ACTION_TRIGGER; - irq_set->index = VFIO_CCW_IO_IRQ_INDEX; - irq_set->start = 0; - irq_set->count = 1; - pfd = (int32_t *) &irq_set->data; - - *pfd = event_notifier_get_fd(&vcdev->io_notifier); - qemu_set_fd_handler(*pfd, vfio_ccw_io_notifier_handler, NULL, vcdev); - if (ioctl(vdev->fd, VFIO_DEVICE_SET_IRQS, irq_set)) { - error_setg(errp, "vfio: Failed to set up io notification"); - qemu_set_fd_handler(*pfd, NULL, NULL, vcdev); + fd = event_notifier_get_fd(&vcdev->io_notifier); + qemu_set_fd_handler(fd, vfio_ccw_io_notifier_handler, NULL, vcdev); + + if (vfio_set_irq_signaling(vdev, VFIO_CCW_IO_IRQ_INDEX, 0, + VFIO_IRQ_SET_ACTION_TRIGGER, fd, errp)) { + qemu_set_fd_handler(fd, NULL, NULL, vcdev); event_notifier_cleanup(&vcdev->io_notifier); } - g_free(irq_set); - out_free_info: g_free(irq_info); } static void vfio_ccw_unregister_io_notifier(VFIOCCWDevice *vcdev) { - struct vfio_irq_set *irq_set; - size_t argsz; - int32_t *pfd; - - argsz = sizeof(*irq_set) + sizeof(*pfd); - irq_set = g_malloc0(argsz); - irq_set->argsz = argsz; - irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD | - VFIO_IRQ_SET_ACTION_TRIGGER; - irq_set->index = VFIO_CCW_IO_IRQ_INDEX; - irq_set->start = 0; - irq_set->count = 1; - pfd = (int32_t *) &irq_set->data; - *pfd = -1; + Error *err = NULL; - if (ioctl(vcdev->vdev.fd, VFIO_DEVICE_SET_IRQS, irq_set)) { - error_report("vfio: Failed to de-assign device io fd: %m"); + vfio_set_irq_signaling(&vcdev->vdev, VFIO_CCW_IO_IRQ_INDEX, 0, + VFIO_IRQ_SET_ACTION_TRIGGER, -1, &err); + if (err) { + error_reportf_err(err, VFIO_MSG_PREFIX, vcdev->vdev.name); } qemu_set_fd_handler(event_notifier_get_fd(&vcdev->io_notifier), NULL, NULL, vcdev); event_notifier_cleanup(&vcdev->io_notifier); - - g_free(irq_set); } static void vfio_ccw_get_region(VFIOCCWDevice *vcdev, Error **errp) @@ -288,9 +350,13 @@ static void vfio_ccw_get_region(VFIOCCWDevice *vcdev, Error **errp) return; } + /* + * We always expect at least the I/O region to be present. We also + * may have a variable number of regions governed by capabilities. + */ if (vdev->num_regions < VFIO_CCW_CONFIG_REGION_INDEX + 1) { - error_setg(errp, "vfio: Unexpected number of the I/O region %u", - vdev->num_regions); + error_setg(errp, "vfio: too few regions (%u), expected at least %u", + vdev->num_regions, VFIO_CCW_CONFIG_REGION_INDEX + 1); return; } @@ -310,11 +376,27 @@ static void vfio_ccw_get_region(VFIOCCWDevice *vcdev, Error **errp) vcdev->io_region_offset = info->offset; vcdev->io_region = g_malloc0(info->size); + /* check for the optional async command region */ + ret = vfio_get_dev_region_info(vdev, VFIO_REGION_TYPE_CCW, + VFIO_REGION_SUBTYPE_CCW_ASYNC_CMD, &info); + if (!ret) { + vcdev->async_cmd_region_size = info->size; + if (sizeof(*vcdev->async_cmd_region) != vcdev->async_cmd_region_size) { + error_setg(errp, "vfio: Unexpected size of the async cmd region"); + g_free(vcdev->io_region); + g_free(info); + return; + } + vcdev->async_cmd_region_offset = info->offset; + vcdev->async_cmd_region = g_malloc0(info->size); + } + g_free(info); } static void vfio_ccw_put_region(VFIOCCWDevice *vcdev) { + g_free(vcdev->async_cmd_region); g_free(vcdev->io_region); } @@ -487,6 +569,8 @@ static void vfio_ccw_class_init(ObjectClass *klass, void *data) dc->reset = vfio_ccw_reset; cdc->handle_request = vfio_ccw_handle_request; + cdc->handle_halt = vfio_ccw_handle_halt; + cdc->handle_clear = vfio_ccw_handle_clear; } static const TypeInfo vfio_ccw_info = { diff --git a/hw/i2c/bitbang_i2c.h b/include/hw/i2c/bitbang_i2c.h index 9443021710..3a7126d5de 100644 --- a/hw/i2c/bitbang_i2c.h +++ b/include/hw/i2c/bitbang_i2c.h @@ -3,6 +3,8 @@ #include "hw/i2c/i2c.h" +typedef struct bitbang_i2c_interface bitbang_i2c_interface; + #define BITBANG_I2C_SDA 0 #define BITBANG_I2C_SCL 1 diff --git a/include/hw/i2c/i2c.h b/include/hw/i2c/i2c.h index 8e236f7bb4..75c5bd638b 100644 --- a/include/hw/i2c/i2c.h +++ b/include/hw/i2c/i2c.h @@ -81,8 +81,6 @@ uint8_t i2c_recv(I2CBus *bus); DeviceState *i2c_create_slave(I2CBus *bus, const char *name, uint8_t addr); -typedef struct bitbang_i2c_interface bitbang_i2c_interface; - /* lm832x.c */ void lm832x_key_event(DeviceState *dev, int key, int state); diff --git a/include/hw/i2c/ppc4xx_i2c.h b/include/hw/i2c/ppc4xx_i2c.h index aa2a2bf9de..8437bf070b 100644 --- a/include/hw/i2c/ppc4xx_i2c.h +++ b/include/hw/i2c/ppc4xx_i2c.h @@ -28,7 +28,7 @@ #define PPC4XX_I2C_H #include "hw/sysbus.h" -#include "hw/i2c/i2c.h" +#include "hw/i2c/bitbang_i2c.h" #define TYPE_PPC4xx_I2C "ppc4xx-i2c" #define PPC4xx_I2C(obj) OBJECT_CHECK(PPC4xxI2CState, (obj), TYPE_PPC4xx_I2C) diff --git a/include/hw/s390x/css.h b/include/hw/s390x/css.h index 7cc183ef43..d033387fba 100644 --- a/include/hw/s390x/css.h +++ b/include/hw/s390x/css.h @@ -215,6 +215,9 @@ IOInstEnding s390_ccw_cmd_request(SubchDev *sch); IOInstEnding do_subchannel_work_virtual(SubchDev *sub); IOInstEnding do_subchannel_work_passthrough(SubchDev *sub); +int s390_ccw_halt(SubchDev *sch); +int s390_ccw_clear(SubchDev *sch); + typedef enum { CSS_IO_ADAPTER_VIRTIO = 0, CSS_IO_ADAPTER_PCI = 1, diff --git a/include/hw/s390x/s390-ccw.h b/include/hw/s390x/s390-ccw.h index 901d805d79..fffb54562f 100644 --- a/include/hw/s390x/s390-ccw.h +++ b/include/hw/s390x/s390-ccw.h @@ -35,6 +35,8 @@ typedef struct S390CCWDeviceClass { void (*realize)(S390CCWDevice *dev, char *sysfsdev, Error **errp); void (*unrealize)(S390CCWDevice *dev, Error **errp); IOInstEnding (*handle_request) (SubchDev *sch); + int (*handle_halt) (SubchDev *sch); + int (*handle_clear) (SubchDev *sch); } S390CCWDeviceClass; #endif diff --git a/linux-user/Makefile.objs b/linux-user/Makefile.objs index 285c5dfa17..d2f33beb5e 100644 --- a/linux-user/Makefile.objs +++ b/linux-user/Makefile.objs @@ -8,4 +8,3 @@ obj-$(TARGET_I386) += vm86.o obj-$(TARGET_ARM) += arm/nwfpe/ obj-$(TARGET_ARM) += arm/semihost.o obj-$(TARGET_AARCH64) += arm/semihost.o -obj-$(TARGET_M68K) += m68k-sim.o diff --git a/linux-user/m68k-sim.c b/linux-user/m68k-sim.c deleted file mode 100644 index 9bc6ff3d3a..0000000000 --- a/linux-user/m68k-sim.c +++ /dev/null @@ -1,163 +0,0 @@ -/* - * m68k simulator syscall interface - * - * Copyright (c) 2005 CodeSourcery, LLC. Written by Paul Brook. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see <http://www.gnu.org/licenses/>. - */ - -#include "qemu/osdep.h" - -#include "qemu.h" - -#define SYS_EXIT 1 -#define SYS_READ 3 -#define SYS_WRITE 4 -#define SYS_OPEN 5 -#define SYS_CLOSE 6 -#define SYS_BRK 17 -#define SYS_FSTAT 28 -#define SYS_ISATTY 29 -#define SYS_LSEEK 199 - -struct m68k_sim_stat { - uint16_t sim_st_dev; - uint16_t sim_st_ino; - uint32_t sim_st_mode; - uint16_t sim_st_nlink; - uint16_t sim_st_uid; - uint16_t sim_st_gid; - uint16_t sim_st_rdev; - uint32_t sim_st_size; - uint32_t sim_st_atime; - uint32_t sim_st_mtime; - uint32_t sim_st_ctime; - uint32_t sim_st_blksize; - uint32_t sim_st_blocks; -}; - -static inline uint32_t check_err(CPUM68KState *env, uint32_t code) -{ - env->dregs[0] = code; - if (code == (uint32_t)-1) { - env->dregs[1] = errno; - } else { - env->dregs[1] = 0; - } - return code; -} - -#define SIM_O_APPEND 0x0008 -#define SIM_O_CREAT 0x0200 -#define SIM_O_TRUNC 0x0400 -#define SIM_O_EXCL 0x0800 -#define SIM_O_NONBLOCK 0x4000 -#define SIM_O_NOCTTY 0x8000 -#define SIM_O_SYNC 0x2000 - -static int translate_openflags(int flags) -{ - int hf; - - switch (flags & 3) { - case 0: hf = O_RDONLY; break; - case 1: hf = O_WRONLY; break; - case 2: hf = O_RDWR; break; - default: hf = O_RDWR; break; - } - - if (flags & SIM_O_APPEND) hf |= O_APPEND; - if (flags & SIM_O_CREAT) hf |= O_CREAT; - if (flags & SIM_O_TRUNC) hf |= O_TRUNC; - if (flags & SIM_O_EXCL) hf |= O_EXCL; - if (flags & SIM_O_NONBLOCK) hf |= O_NONBLOCK; - if (flags & SIM_O_NOCTTY) hf |= O_NOCTTY; - if (flags & SIM_O_SYNC) hf |= O_SYNC; - - return hf; -} - -#define ARG(x) tswap32(args[x]) -void do_m68k_simcall(CPUM68KState *env, int nr) -{ - uint32_t *args; - - args = (uint32_t *)(unsigned long)(env->aregs[7] + 4); - switch (nr) { - case SYS_EXIT: - exit(ARG(0)); - case SYS_READ: - check_err(env, read(ARG(0), (void *)(unsigned long)ARG(1), ARG(2))); - break; - case SYS_WRITE: - check_err(env, write(ARG(0), (void *)(unsigned long)ARG(1), ARG(2))); - break; - case SYS_OPEN: - check_err(env, open((char *)(unsigned long)ARG(0), - translate_openflags(ARG(1)), ARG(2))); - break; - case SYS_CLOSE: - { - /* Ignore attempts to close stdin/out/err. */ - int fd = ARG(0); - if (fd > 2) - check_err(env, close(fd)); - else - check_err(env, 0); - break; - } - case SYS_BRK: - { - int32_t ret; - - ret = do_brk((abi_ulong)ARG(0)); - if (ret == -ENOMEM) - ret = -1; - check_err(env, ret); - } - break; - case SYS_FSTAT: - { - struct stat s; - int rc; - struct m68k_sim_stat *p; - rc = check_err(env, fstat(ARG(0), &s)); - if (rc == 0) { - p = (struct m68k_sim_stat *)(unsigned long)ARG(1); - p->sim_st_dev = tswap16(s.st_dev); - p->sim_st_ino = tswap16(s.st_ino); - p->sim_st_mode = tswap32(s.st_mode); - p->sim_st_nlink = tswap16(s.st_nlink); - p->sim_st_uid = tswap16(s.st_uid); - p->sim_st_gid = tswap16(s.st_gid); - p->sim_st_rdev = tswap16(s.st_rdev); - p->sim_st_size = tswap32(s.st_size); - p->sim_st_atime = tswap32(s.st_atime); - p->sim_st_mtime = tswap32(s.st_mtime); - p->sim_st_ctime = tswap32(s.st_ctime); - p->sim_st_blksize = tswap32(s.st_blksize); - p->sim_st_blocks = tswap32(s.st_blocks); - } - } - break; - case SYS_ISATTY: - check_err(env, isatty(ARG(0))); - break; - case SYS_LSEEK: - check_err(env, lseek(ARG(0), (int32_t)ARG(1), ARG(2))); - break; - default: - cpu_abort(env_cpu(env), "Unsupported m68k sim syscall %d\n", nr); - } -} diff --git a/linux-user/m68k/cpu_loop.c b/linux-user/m68k/cpu_loop.c index e8d39d15f3..c7a500b58c 100644 --- a/linux-user/m68k/cpu_loop.c +++ b/linux-user/m68k/cpu_loop.c @@ -28,7 +28,6 @@ void cpu_loop(CPUM68KState *env) int trapnr; unsigned int n; target_siginfo_t info; - TaskState *ts = cs->opaque; for(;;) { cpu_exec_start(cs); @@ -37,26 +36,14 @@ void cpu_loop(CPUM68KState *env) process_queued_cpu_work(cs); switch(trapnr) { - case EXCP_ILLEGAL: - { - if (ts->sim_syscalls) { - uint16_t nr; - get_user_u16(nr, env->pc + 2); - env->pc += 4; - do_m68k_simcall(env, nr); - } else { - goto do_sigill; - } - } - break; case EXCP_HALT_INSN: /* Semihosing syscall. */ env->pc += 4; do_m68k_semihosting(env, env->dregs[0]); break; + case EXCP_ILLEGAL: case EXCP_LINEA: case EXCP_LINEF: - do_sigill: info.si_signo = TARGET_SIGILL; info.si_errno = 0; info.si_code = TARGET_ILL_ILLOPN; @@ -80,7 +67,6 @@ void cpu_loop(CPUM68KState *env) case EXCP_TRAP0: { abi_long ret; - ts->sim_syscalls = 0; n = env->dregs[0]; env->pc += 2; ret = do_syscall(env, @@ -154,7 +140,6 @@ void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs) env->aregs[7] = regs->usp; env->sr = regs->sr; - ts->sim_syscalls = 1; ts->stack_base = info->start_stack; ts->heap_base = info->brk; /* This will be filled in on the first SYS_HEAPINFO call. */ diff --git a/linux-user/m68k/target_syscall.h b/linux-user/m68k/target_syscall.h index 632ee4fcf8..c0366b1c62 100644 --- a/linux-user/m68k/target_syscall.h +++ b/linux-user/m68k/target_syscall.h @@ -26,6 +26,4 @@ struct target_pt_regs { #define TARGET_WANT_OLD_SYS_SELECT -void do_m68k_simcall(CPUM68KState *, int); - #endif /* M68K_TARGET_SYSCALL_H */ diff --git a/linux-user/qemu.h b/linux-user/qemu.h index 82d33d7e93..fab287b7ec 100644 --- a/linux-user/qemu.h +++ b/linux-user/qemu.h @@ -116,7 +116,6 @@ typedef struct TaskState { #endif abi_ulong child_tidptr; #ifdef TARGET_M68K - int sim_syscalls; abi_ulong tp_value; #endif #if defined(TARGET_ARM) || defined(TARGET_M68K) diff --git a/pc-bios/vgabios-ati.bin b/pc-bios/vgabios-ati.bin new file mode 100644 index 0000000000..79644708ff --- /dev/null +++ b/pc-bios/vgabios-ati.bin Binary files differdiff --git a/roms/config.vga-ati b/roms/config.vga-ati new file mode 100644 index 0000000000..12506b6644 --- /dev/null +++ b/roms/config.vga-ati @@ -0,0 +1,4 @@ +CONFIG_QEMU=y +CONFIG_BUILD_VGABIOS=y +CONFIG_VGA_ATI=y +CONFIG_VGA_PCI=y diff --git a/target/m68k/cpu-qom.h b/target/m68k/cpu-qom.h index 9885bba317..0c157251a2 100644 --- a/target/m68k/cpu-qom.h +++ b/target/m68k/cpu-qom.h @@ -31,7 +31,7 @@ #define M68K_CPU_GET_CLASS(obj) \ OBJECT_GET_CLASS(M68kCPUClass, (obj), TYPE_M68K_CPU) -/** +/* * M68kCPUClass: * @parent_realize: The parent class' realize handler. * @parent_reset: The parent class' reset handler. diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index 3d0971d4a2..e6596de29c 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -203,8 +203,10 @@ static void any_cpu_initfn(Object *obj) m68k_set_feature(env, M68K_FEATURE_CF_ISA_APLUSC); m68k_set_feature(env, M68K_FEATURE_BRAL); m68k_set_feature(env, M68K_FEATURE_CF_FPU); - /* MAC and EMAC are mututally exclusive, so pick EMAC. - It's mostly backwards compatible. */ + /* + * MAC and EMAC are mututally exclusive, so pick EMAC. + * It's mostly backwards compatible. + */ m68k_set_feature(env, M68K_FEATURE_CF_EMAC); m68k_set_feature(env, M68K_FEATURE_CF_EMAC_B); m68k_set_feature(env, M68K_FEATURE_USP); diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h index 5ef200a9fb..20de3c379a 100644 --- a/target/m68k/cpu.h +++ b/target/m68k/cpu.h @@ -106,9 +106,11 @@ typedef struct CPUM68KState { float_status fp_status; uint64_t mactmp; - /* EMAC Hardware deals with 48-bit values composed of one 32-bit and - two 8-bit parts. We store a single 64-bit value and - rearrange/extend this when changing modes. */ + /* + * EMAC Hardware deals with 48-bit values composed of one 32-bit and + * two 8-bit parts. We store a single 64-bit value and + * rearrange/extend this when changing modes. + */ uint64_t macc[4]; uint32_t macsr; uint32_t mac_mask; @@ -146,7 +148,7 @@ typedef struct CPUM68KState { uint32_t features; } CPUM68KState; -/** +/* * M68kCPU: * @env: #CPUM68KState * @@ -171,9 +173,11 @@ int m68k_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); void m68k_tcg_init(void); void m68k_cpu_init_gdb(M68kCPU *cpu); -/* you can call this signal handler from your SIGBUS and SIGSEGV - signal handlers to inform the virtual CPU of exceptions. non zero - is returned if the signal was handled by the virtual CPU. */ +/* + * you can call this signal handler from your SIGBUS and SIGSEGV + * signal handlers to inform the virtual CPU of exceptions. non zero + * is returned if the signal was handled by the virtual CPU. + */ int cpu_m68k_signal_handler(int host_signum, void *pinfo, void *puc); uint32_t cpu_m68k_get_ccr(CPUM68KState *env); @@ -182,7 +186,8 @@ void cpu_m68k_set_sr(CPUM68KState *env, uint32_t); void cpu_m68k_set_fpcr(CPUM68KState *env, uint32_t val); -/* Instead of computing the condition codes after each m68k instruction, +/* + * Instead of computing the condition codes after each m68k instruction, * QEMU just stores one operand (called CC_SRC), the result * (called CC_DEST) and the type of operation (called CC_OP). When the * condition codes are needed, the condition codes can be calculated @@ -447,9 +452,11 @@ void m68k_switch_sp(CPUM68KState *env); void do_m68k_semihosting(CPUM68KState *env, int nr); -/* There are 4 ColdFire core ISA revisions: A, A+, B and C. - Each feature covers the subset of instructions common to the - ISA revisions mentioned. */ +/* + * There are 4 ColdFire core ISA revisions: A, A+, B and C. + * Each feature covers the subset of instructions common to the + * ISA revisions mentioned. + */ enum m68k_features { M68K_FEATURE_M68000, diff --git a/target/m68k/fpu_helper.c b/target/m68k/fpu_helper.c index b35489ba4e..9b039c856d 100644 --- a/target/m68k/fpu_helper.c +++ b/target/m68k/fpu_helper.c @@ -25,7 +25,8 @@ #include "exec/cpu_ldst.h" #include "softfloat.h" -/* Undefined offsets may be different on various FPU. +/* + * Undefined offsets may be different on various FPU. * On 68040 they return 0.0 (floatx80_zero) */ @@ -611,7 +612,8 @@ void HELPER(fcos)(CPUM68KState *env, FPReg *res, FPReg *val) void HELPER(fsincos)(CPUM68KState *env, FPReg *res0, FPReg *res1, FPReg *val) { floatx80 a = val->d; - /* If res0 and res1 specify the same floating-point data register, + /* + * If res0 and res1 specify the same floating-point data register, * the sine result is stored in the register, and the cosine * result is discarded. */ diff --git a/target/m68k/gdbstub.c b/target/m68k/gdbstub.c index e6baf0601e..fdc96f57ff 100644 --- a/target/m68k/gdbstub.c +++ b/target/m68k/gdbstub.c @@ -35,13 +35,16 @@ int m68k_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n) } else { switch (n) { case 16: - return gdb_get_reg32(mem_buf, env->sr); + /* SR is made of SR+CCR, CCR is many 1bit flags so uses helper */ + return gdb_get_reg32(mem_buf, env->sr | cpu_m68k_get_ccr(env)); case 17: return gdb_get_reg32(mem_buf, env->pc); } } - /* FP registers not included here because they vary between - ColdFire and m68k. Use XML bits for these. */ + /* + * FP registers not included here because they vary between + * ColdFire and m68k. Use XML bits for these. + */ return 0; } diff --git a/target/m68k/helper.c b/target/m68k/helper.c index 31aacb51c6..ae766a6cb0 100644 --- a/target/m68k/helper.c +++ b/target/m68k/helper.c @@ -965,9 +965,11 @@ void HELPER(set_sr)(CPUM68KState *env, uint32_t val) } /* MAC unit. */ -/* FIXME: The MAC unit implementation is a bit of a mess. Some helpers - take values, others take register numbers and manipulate the contents - in-place. */ +/* + * FIXME: The MAC unit implementation is a bit of a mess. Some helpers + * take values, others take register numbers and manipulate the contents + * in-place. + */ void HELPER(mac_move)(CPUM68KState *env, uint32_t dest, uint32_t src) { uint32_t mask; @@ -1047,9 +1049,11 @@ void HELPER(macsats)(CPUM68KState *env, uint32_t acc) if (env->macsr & MACSR_V) { env->macsr |= MACSR_PAV0 << acc; if (env->macsr & MACSR_OMC) { - /* The result is saturated to 32 bits, despite overflow occurring - at 48 bits. Seems weird, but that's what the hardware docs - say. */ + /* + * The result is saturated to 32 bits, despite overflow occurring + * at 48 bits. Seems weird, but that's what the hardware docs + * say. + */ result = (result >> 63) ^ 0x7fffffff; } } diff --git a/target/m68k/m68k-semi.c b/target/m68k/m68k-semi.c index f97580af83..01627b42c9 100644 --- a/target/m68k/m68k-semi.c +++ b/target/m68k/m68k-semi.c @@ -130,7 +130,8 @@ static void m68k_semi_return_u32(CPUM68KState *env, uint32_t ret, uint32_t err) target_ulong args = env->dregs[1]; if (put_user_u32(ret, args) || put_user_u32(err, args + 4)) { - /* The m68k semihosting ABI does not provide any way to report this + /* + * The m68k semihosting ABI does not provide any way to report this * error to the guest, so the best we can do is log it in qemu. * It is always a guest error not to pass us a valid argument block. */ @@ -159,8 +160,10 @@ static void m68k_semi_cb(CPUState *cs, target_ulong ret, target_ulong err) CPUM68KState *env = &cpu->env; if (m68k_semi_is_fseek) { - /* FIXME: We've already lost the high bits of the fseek - return value. */ + /* + * FIXME: We've already lost the high bits of the fseek + * return value. + */ m68k_semi_return_u64(env, ret, err); m68k_semi_is_fseek = 0; } else { @@ -168,7 +171,8 @@ static void m68k_semi_cb(CPUState *cs, target_ulong ret, target_ulong err) } } -/* Read the input value from the argument block; fail the semihosting +/* + * Read the input value from the argument block; fail the semihosting * call if the memory read fails. */ #define GET_ARG(n) do { \ @@ -440,14 +444,18 @@ void do_m68k_semihosting(CPUM68KState *env, int nr) } ts->heap_limit = base + size; } - /* This call may happen before we have writable memory, so return - values directly in registers. */ + /* + * This call may happen before we have writable memory, so return + * values directly in registers. + */ env->dregs[1] = ts->heap_limit; env->aregs[7] = ts->stack_base; } #else - /* FIXME: This is wrong for boards where RAM does not start at - address zero. */ + /* + * FIXME: This is wrong for boards where RAM does not start at + * address zero. + */ env->dregs[1] = ram_size; env->aregs[7] = ram_size; #endif diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c index ebcfe3dfdd..bc4f845e3f 100644 --- a/target/m68k/op_helper.c +++ b/target/m68k/op_helper.c @@ -494,10 +494,12 @@ bool m68k_cpu_exec_interrupt(CPUState *cs, int interrupt_request) if (interrupt_request & CPU_INTERRUPT_HARD && ((env->sr & SR_I) >> SR_I_SHIFT) < env->pending_level) { - /* Real hardware gets the interrupt vector via an IACK cycle - at this point. Current emulated hardware doesn't rely on - this, so we provide/save the vector when the interrupt is - first signalled. */ + /* + * Real hardware gets the interrupt vector via an IACK cycle + * at this point. Current emulated hardware doesn't rely on + * this, so we provide/save the vector when the interrupt is + * first signalled. + */ cs->exception_index = env->pending_vector; do_interrupt_m68k_hardirq(env); return true; @@ -537,7 +539,8 @@ void HELPER(divuw)(CPUM68KState *env, int destr, uint32_t den) env->cc_c = 0; /* always cleared, even if overflow */ if (quot > 0xffff) { env->cc_v = -1; - /* real 68040 keeps N and unset Z on overflow, + /* + * real 68040 keeps N and unset Z on overflow, * whereas documentation says "undefined" */ env->cc_z = 1; @@ -564,7 +567,8 @@ void HELPER(divsw)(CPUM68KState *env, int destr, int32_t den) if (quot != (int16_t)quot) { env->cc_v = -1; /* nothing else is modified */ - /* real 68040 keeps N and unset Z on overflow, + /* + * real 68040 keeps N and unset Z on overflow, * whereas documentation says "undefined" */ env->cc_z = 1; @@ -647,7 +651,8 @@ void HELPER(divull)(CPUM68KState *env, int numr, int regr, uint32_t den) env->cc_c = 0; /* always cleared, even if overflow */ if (quot > 0xffffffffULL) { env->cc_v = -1; - /* real 68040 keeps N and unset Z on overflow, + /* + * real 68040 keeps N and unset Z on overflow, * whereas documentation says "undefined" */ env->cc_z = 1; @@ -681,7 +686,8 @@ void HELPER(divsll)(CPUM68KState *env, int numr, int regr, int32_t den) env->cc_c = 0; /* always cleared, even if overflow */ if (quot != (int32_t)quot) { env->cc_v = -1; - /* real 68040 keeps N and unset Z on overflow, + /* + * real 68040 keeps N and unset Z on overflow, * whereas documentation says "undefined" */ env->cc_z = 1; @@ -838,14 +844,18 @@ static struct bf_data bf_prep(uint32_t addr, int32_t ofs, uint32_t len) addr -= 1; } - /* Compute the number of bytes required (minus one) to - satisfy the bitfield. */ + /* + * Compute the number of bytes required (minus one) to + * satisfy the bitfield. + */ blen = (bofs + len - 1) / 8; - /* Canonicalize the bit offset for data loaded into a 64-bit big-endian - word. For the cases where BLEN is not a power of 2, adjust ADDR so - that we can use the next power of two sized load without crossing a - page boundary, unless the field itself crosses the boundary. */ + /* + * Canonicalize the bit offset for data loaded into a 64-bit big-endian + * word. For the cases where BLEN is not a power of 2, adjust ADDR so + * that we can use the next power of two sized load without crossing a + * page boundary, unless the field itself crosses the boundary. + */ switch (blen) { case 0: bofs += 56; @@ -937,8 +947,10 @@ uint64_t HELPER(bfextu_mem)(CPUM68KState *env, uint32_t addr, struct bf_data d = bf_prep(addr, ofs, len); uint64_t data = bf_load(env, d.addr, d.blen, ra); - /* Put CC_N at the top of the high word; put the zero-extended value - at the bottom of the low word. */ + /* + * Put CC_N at the top of the high word; put the zero-extended value + * at the bottom of the low word. + */ data <<= d.bofs; data >>= 64 - d.len; data |= data << (64 - d.len); @@ -1016,15 +1028,18 @@ uint64_t HELPER(bfffo_mem)(CPUM68KState *env, uint32_t addr, uint64_t n = (data & mask) << d.bofs; uint32_t ffo = helper_bfffo_reg(n >> 32, ofs, d.len); - /* Return FFO in the low word and N in the high word. - Note that because of MASK and the shift, the low word - is already zero. */ + /* + * Return FFO in the low word and N in the high word. + * Note that because of MASK and the shift, the low word + * is already zero. + */ return n | ffo; } void HELPER(chk)(CPUM68KState *env, int32_t val, int32_t ub) { - /* From the specs: + /* + * From the specs: * X: Not affected, C,V,Z: Undefined, * N: Set if val < 0; cleared if val > ub, undefined otherwise * We implement here values found from a real MC68040: @@ -1054,7 +1069,8 @@ void HELPER(chk)(CPUM68KState *env, int32_t val, int32_t ub) void HELPER(chk2)(CPUM68KState *env, int32_t val, int32_t lb, int32_t ub) { - /* From the specs: + /* + * From the specs: * X: Not affected, N,V: Undefined, * Z: Set if val is equal to lb or ub * C: Set if val < lb or val > ub, cleared otherwise diff --git a/target/m68k/softfloat.c b/target/m68k/softfloat.c index b45a5e8690..591a6f1dce 100644 --- a/target/m68k/softfloat.c +++ b/target/m68k/softfloat.c @@ -14,7 +14,8 @@ * the Softfloat-2a license unless specifically indicated otherwise. */ -/* Portions of this work are licensed under the terms of the GNU GPL, +/* + * Portions of this work are licensed under the terms of the GNU GPL, * version 2 or later. See the COPYING file in the top-level directory. */ @@ -41,10 +42,10 @@ static floatx80 propagateFloatx80NaNOneArg(floatx80 a, float_status *status) return a; } -/*---------------------------------------------------------------------------- - | Returns the modulo remainder of the extended double-precision floating-point - | value `a' with respect to the corresponding value `b'. - *----------------------------------------------------------------------------*/ +/* + * Returns the modulo remainder of the extended double-precision floating-point + * value `a' with respect to the corresponding value `b'. + */ floatx80 floatx80_mod(floatx80 a, floatx80 b, float_status *status) { @@ -124,10 +125,10 @@ floatx80 floatx80_mod(floatx80 a, floatx80 b, float_status *status) 80, zSign, bExp + expDiff, aSig0, aSig1, status); } -/*---------------------------------------------------------------------------- - | Returns the mantissa of the extended double-precision floating-point - | value `a'. - *----------------------------------------------------------------------------*/ +/* + * Returns the mantissa of the extended double-precision floating-point + * value `a'. + */ floatx80 floatx80_getman(floatx80 a, float_status *status) { @@ -158,10 +159,10 @@ floatx80 floatx80_getman(floatx80 a, float_status *status) 0x3FFF, aSig, 0, status); } -/*---------------------------------------------------------------------------- - | Returns the exponent of the extended double-precision floating-point - | value `a' as an extended double-precision value. - *----------------------------------------------------------------------------*/ +/* + * Returns the exponent of the extended double-precision floating-point + * value `a' as an extended double-precision value. + */ floatx80 floatx80_getexp(floatx80 a, float_status *status) { @@ -191,13 +192,13 @@ floatx80 floatx80_getexp(floatx80 a, float_status *status) return int32_to_floatx80(aExp - 0x3FFF, status); } -/*---------------------------------------------------------------------------- - | Scales extended double-precision floating-point value in operand `a' by - | value `b'. The function truncates the value in the second operand 'b' to - | an integral value and adds that value to the exponent of the operand 'a'. - | The operation performed according to the IEC/IEEE Standard for Binary - | Floating-Point Arithmetic. - *----------------------------------------------------------------------------*/ +/* + * Scales extended double-precision floating-point value in operand `a' by + * value `b'. The function truncates the value in the second operand 'b' to + * an integral value and adds that value to the exponent of the operand 'a'. + * The operation performed according to the IEC/IEEE Standard for Binary + * Floating-Point Arithmetic. + */ floatx80 floatx80_scale(floatx80 a, floatx80 b, float_status *status) { @@ -282,26 +283,26 @@ floatx80 floatx80_move(floatx80 a, float_status *status) aExp, aSig, 0, status); } -/*---------------------------------------------------------------------------- -| Algorithms for transcendental functions supported by MC68881 and MC68882 -| mathematical coprocessors. The functions are derived from FPSP library. -*----------------------------------------------------------------------------*/ +/* + * Algorithms for transcendental functions supported by MC68881 and MC68882 + * mathematical coprocessors. The functions are derived from FPSP library. + */ #define one_exp 0x3FFF #define one_sig LIT64(0x8000000000000000) -/*---------------------------------------------------------------------------- - | Function for compactifying extended double-precision floating point values. - *----------------------------------------------------------------------------*/ +/* + * Function for compactifying extended double-precision floating point values. + */ static int32_t floatx80_make_compact(int32_t aExp, uint64_t aSig) { return (aExp << 16) | (aSig >> 48); } -/*---------------------------------------------------------------------------- - | Log base e of x plus 1 - *----------------------------------------------------------------------------*/ +/* + * Log base e of x plus 1 + */ floatx80 floatx80_lognp1(floatx80 a, float_status *status) { @@ -498,9 +499,9 @@ floatx80 floatx80_lognp1(floatx80 a, float_status *status) } } -/*---------------------------------------------------------------------------- - | Log base e - *----------------------------------------------------------------------------*/ +/* + * Log base e + */ floatx80 floatx80_logn(floatx80 a, float_status *status) { @@ -666,9 +667,9 @@ floatx80 floatx80_logn(floatx80 a, float_status *status) } } -/*---------------------------------------------------------------------------- - | Log base 10 - *----------------------------------------------------------------------------*/ +/* + * Log base 10 + */ floatx80 floatx80_log10(floatx80 a, float_status *status) { @@ -723,9 +724,9 @@ floatx80 floatx80_log10(floatx80 a, float_status *status) return a; } -/*---------------------------------------------------------------------------- - | Log base 2 - *----------------------------------------------------------------------------*/ +/* + * Log base 2 + */ floatx80 floatx80_log2(floatx80 a, float_status *status) { @@ -790,9 +791,9 @@ floatx80 floatx80_log2(floatx80 a, float_status *status) return a; } -/*---------------------------------------------------------------------------- - | e to x - *----------------------------------------------------------------------------*/ +/* + * e to x + */ floatx80 floatx80_etox(floatx80 a, float_status *status) { @@ -848,7 +849,8 @@ floatx80 floatx80_etox(floatx80 a, float_status *status) j = n & 0x3F; /* J = N mod 64 */ m = n / 64; /* NOTE: this is really arithmetic right shift by 6 */ if (n < 0 && j) { - /* arithmetic right shift is division and + /* + * arithmetic right shift is division and * round towards minus infinity */ m--; @@ -973,9 +975,9 @@ floatx80 floatx80_etox(floatx80 a, float_status *status) } } -/*---------------------------------------------------------------------------- - | 2 to x - *----------------------------------------------------------------------------*/ +/* + * 2 to x + */ floatx80 floatx80_twotox(floatx80 a, float_status *status) { @@ -1051,14 +1053,16 @@ floatx80 floatx80_twotox(floatx80 a, float_status *status) j = n & 0x3F; l = n / 64; /* NOTE: this is really arithmetic right shift by 6 */ if (n < 0 && j) { - /* arithmetic right shift is division and + /* + * arithmetic right shift is division and * round towards minus infinity */ l--; } m = l / 2; /* NOTE: this is really arithmetic right shift by 1 */ if (l < 0 && (l & 1)) { - /* arithmetic right shift is division and + /* + * arithmetic right shift is division and * round towards minus infinity */ m--; @@ -1121,9 +1125,9 @@ floatx80 floatx80_twotox(floatx80 a, float_status *status) } } -/*---------------------------------------------------------------------------- - | 10 to x - *----------------------------------------------------------------------------*/ +/* + * 10 to x + */ floatx80 floatx80_tentox(floatx80 a, float_status *status) { @@ -1200,14 +1204,16 @@ floatx80 floatx80_tentox(floatx80 a, float_status *status) j = n & 0x3F; l = n / 64; /* NOTE: this is really arithmetic right shift by 6 */ if (n < 0 && j) { - /* arithmetic right shift is division and + /* + * arithmetic right shift is division and * round towards minus infinity */ l--; } m = l / 2; /* NOTE: this is really arithmetic right shift by 1 */ if (l < 0 && (l & 1)) { - /* arithmetic right shift is division and + /* + * arithmetic right shift is division and * round towards minus infinity */ m--; @@ -1274,9 +1280,9 @@ floatx80 floatx80_tentox(floatx80 a, float_status *status) } } -/*---------------------------------------------------------------------------- - | Tangent - *----------------------------------------------------------------------------*/ +/* + * Tangent + */ floatx80 floatx80_tan(floatx80 a, float_status *status) { @@ -1484,9 +1490,9 @@ floatx80 floatx80_tan(floatx80 a, float_status *status) } } -/*---------------------------------------------------------------------------- - | Sine - *----------------------------------------------------------------------------*/ +/* + * Sine + */ floatx80 floatx80_sin(floatx80 a, float_status *status) { @@ -1723,9 +1729,9 @@ floatx80 floatx80_sin(floatx80 a, float_status *status) } } -/*---------------------------------------------------------------------------- - | Cosine - *----------------------------------------------------------------------------*/ +/* + * Cosine + */ floatx80 floatx80_cos(floatx80 a, float_status *status) { @@ -1960,9 +1966,9 @@ floatx80 floatx80_cos(floatx80 a, float_status *status) } } -/*---------------------------------------------------------------------------- - | Arc tangent - *----------------------------------------------------------------------------*/ +/* + * Arc tangent + */ floatx80 floatx80_atan(floatx80 a, float_status *status) { @@ -2157,9 +2163,9 @@ floatx80 floatx80_atan(floatx80 a, float_status *status) } } -/*---------------------------------------------------------------------------- - | Arc sine - *----------------------------------------------------------------------------*/ +/* + * Arc sine + */ floatx80 floatx80_asin(floatx80 a, float_status *status) { @@ -2222,9 +2228,9 @@ floatx80 floatx80_asin(floatx80 a, float_status *status) return a; } -/*---------------------------------------------------------------------------- - | Arc cosine - *----------------------------------------------------------------------------*/ +/* + * Arc cosine + */ floatx80 floatx80_acos(floatx80 a, float_status *status) { @@ -2291,9 +2297,9 @@ floatx80 floatx80_acos(floatx80 a, float_status *status) return a; } -/*---------------------------------------------------------------------------- - | Hyperbolic arc tangent - *----------------------------------------------------------------------------*/ +/* + * Hyperbolic arc tangent + */ floatx80 floatx80_atanh(floatx80 a, float_status *status) { @@ -2356,9 +2362,9 @@ floatx80 floatx80_atanh(floatx80 a, float_status *status) return a; } -/*---------------------------------------------------------------------------- - | e to x minus 1 - *----------------------------------------------------------------------------*/ +/* + * e to x minus 1 + */ floatx80 floatx80_etoxm1(floatx80 a, float_status *status) { @@ -2410,7 +2416,8 @@ floatx80 floatx80_etoxm1(floatx80 a, float_status *status) j = n & 0x3F; /* J = N mod 64 */ m = n / 64; /* NOTE: this is really arithmetic right shift by 6 */ if (n < 0 && j) { - /* arithmetic right shift is division and + /* + * arithmetic right shift is division and * round towards minus infinity */ m--; @@ -2607,9 +2614,9 @@ floatx80 floatx80_etoxm1(floatx80 a, float_status *status) } } -/*---------------------------------------------------------------------------- - | Hyperbolic tangent - *----------------------------------------------------------------------------*/ +/* + * Hyperbolic tangent + */ floatx80 floatx80_tanh(floatx80 a, float_status *status) { @@ -2722,9 +2729,9 @@ floatx80 floatx80_tanh(floatx80 a, float_status *status) } } -/*---------------------------------------------------------------------------- - | Hyperbolic sine - *----------------------------------------------------------------------------*/ +/* + * Hyperbolic sine + */ floatx80 floatx80_sinh(floatx80 a, float_status *status) { @@ -2811,9 +2818,9 @@ floatx80 floatx80_sinh(floatx80 a, float_status *status) } } -/*---------------------------------------------------------------------------- - | Hyperbolic cosine - *----------------------------------------------------------------------------*/ +/* + * Hyperbolic cosine + */ floatx80 floatx80_cosh(floatx80 a, float_status *status) { diff --git a/target/m68k/softfloat.h b/target/m68k/softfloat.h index 602661d5a8..365ef6ac7a 100644 --- a/target/m68k/softfloat.h +++ b/target/m68k/softfloat.h @@ -14,7 +14,8 @@ * the Softfloat-2a license unless specifically indicated otherwise. */ -/* Portions of this work are licensed under the terms of the GNU GPL, +/* + * Portions of this work are licensed under the terms of the GNU GPL, * version 2 or later. See the COPYING file in the top-level directory. */ diff --git a/target/m68k/softfloat_fpsp_tables.h b/target/m68k/softfloat_fpsp_tables.h index 3f1419ee6e..2ccd9e8bc3 100644 --- a/target/m68k/softfloat_fpsp_tables.h +++ b/target/m68k/softfloat_fpsp_tables.h @@ -14,7 +14,8 @@ * the Softfloat-2a license unless specifically indicated otherwise. */ -/* Portions of this work are licensed under the terms of the GNU GPL, +/* + * Portions of this work are licensed under the terms of the GNU GPL, * version 2 or later. See the COPYING file in the top-level directory. */ diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 2ae537461f..60bcfb7bd0 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -248,8 +248,10 @@ static void set_cc_op(DisasContext *s, CCOp op) s->cc_op = op; s->cc_op_synced = 0; - /* Discard CC computation that will no longer be used. - Note that X and N are never dead. */ + /* + * Discard CC computation that will no longer be used. + * Note that X and N are never dead. + */ dead = cc_op_live[old_op] & ~cc_op_live[op]; if (dead & CCF_C) { tcg_gen_discard_i32(QREG_CC_C); @@ -306,8 +308,10 @@ static inline void gen_addr_fault(DisasContext *s) gen_exception(s, s->base.pc_next, EXCP_ADDRESS); } -/* Generate a load from the specified address. Narrow values are - sign extended to full register width. */ +/* + * Generate a load from the specified address. Narrow values are + * sign extended to full register width. + */ static inline TCGv gen_load(DisasContext *s, int opsize, TCGv addr, int sign, int index) { @@ -360,8 +364,10 @@ typedef enum { EA_LOADS } ea_what; -/* Generate an unsigned load if VAL is 0 a signed load if val is -1, - otherwise generate a store. */ +/* + * Generate an unsigned load if VAL is 0 a signed load if val is -1, + * otherwise generate a store. + */ static TCGv gen_ldst(DisasContext *s, int opsize, TCGv addr, TCGv val, ea_what what, int index) { @@ -426,8 +432,10 @@ static TCGv gen_addr_index(DisasContext *s, uint16_t ext, TCGv tmp) return add; } -/* Handle a base + index + displacement effective addresss. - A NULL_QREG base means pc-relative. */ +/* + * Handle a base + index + displacement effective addresss. + * A NULL_QREG base means pc-relative. + */ static TCGv gen_lea_indexed(CPUM68KState *env, DisasContext *s, TCGv base) { uint32_t offset; @@ -714,8 +722,10 @@ static inline int ext_opsize(int ext, int pos) } } -/* Assign value to a register. If the width is less than the register width - only the low part of the register is set. */ +/* + * Assign value to a register. If the width is less than the register width + * only the low part of the register is set. + */ static void gen_partset_reg(int opsize, TCGv reg, TCGv val) { TCGv tmp; @@ -743,8 +753,10 @@ static void gen_partset_reg(int opsize, TCGv reg, TCGv val) } } -/* Generate code for an "effective address". Does not adjust the base - register for autoincrement addressing modes. */ +/* + * Generate code for an "effective address". Does not adjust the base + * register for autoincrement addressing modes. + */ static TCGv gen_lea_mode(CPUM68KState *env, DisasContext *s, int mode, int reg0, int opsize) { @@ -817,9 +829,11 @@ static TCGv gen_lea(CPUM68KState *env, DisasContext *s, uint16_t insn, return gen_lea_mode(env, s, mode, reg0, opsize); } -/* Generate code to load/store a value from/into an EA. If WHAT > 0 this is - a write otherwise it is a read (0 == sign extend, -1 == zero extend). - ADDRP is non-null for readwrite operands. */ +/* + * Generate code to load/store a value from/into an EA. If WHAT > 0 this is + * a write otherwise it is a read (0 == sign extend, -1 == zero extend). + * ADDRP is non-null for readwrite operands. + */ static TCGv gen_ea_mode(CPUM68KState *env, DisasContext *s, int mode, int reg0, int opsize, TCGv val, TCGv *addrp, ea_what what, int index) @@ -1012,7 +1026,8 @@ static void gen_load_fp(DisasContext *s, int opsize, TCGv addr, TCGv_ptr fp, tcg_gen_st_i64(t64, fp, offsetof(FPReg, l.lower)); break; case OS_PACKED: - /* unimplemented data type on 68040/ColdFire + /* + * unimplemented data type on 68040/ColdFire * FIXME if needed for another FPU */ gen_exception(s, s->base.pc_next, EXCP_FP_UNIMP); @@ -1066,7 +1081,8 @@ static void gen_store_fp(DisasContext *s, int opsize, TCGv addr, TCGv_ptr fp, tcg_gen_qemu_st64(t64, tmp, index); break; case OS_PACKED: - /* unimplemented data type on 68040/ColdFire + /* + * unimplemented data type on 68040/ColdFire * FIXME if needed for another FPU */ gen_exception(s, s->base.pc_next, EXCP_FP_UNIMP); @@ -1212,7 +1228,8 @@ static int gen_ea_mode_fp(CPUM68KState *env, DisasContext *s, int mode, tcg_temp_free_i64(t64); break; case OS_PACKED: - /* unimplemented data type on 68040/ColdFire + /* + * unimplemented data type on 68040/ColdFire * FIXME if needed for another FPU */ gen_exception(s, s->base.pc_next, EXCP_FP_UNIMP); @@ -1299,9 +1316,11 @@ static void gen_cc_cond(DisasCompare *c, DisasContext *s, int cond) goto done; case 14: /* GT (!(Z || (N ^ V))) */ case 15: /* LE (Z || (N ^ V)) */ - /* Logic operations clear V, which simplifies LE to (Z || N), - and since Z and N are co-located, this becomes a normal - comparison vs N. */ + /* + * Logic operations clear V, which simplifies LE to (Z || N), + * and since Z and N are co-located, this becomes a normal + * comparison vs N. + */ if (op == CC_OP_LOGIC) { c->v1 = QREG_CC_N; tcond = TCG_COND_LE; @@ -1549,9 +1568,11 @@ DISAS_INSN(undef_fpu) DISAS_INSN(undef) { - /* ??? This is both instructions that are as yet unimplemented - for the 680x0 series, as well as those that are implemented - but actually illegal for CPU32 or pre-68020. */ + /* + * ??? This is both instructions that are as yet unimplemented + * for the 680x0 series, as well as those that are implemented + * but actually illegal for CPU32 or pre-68020. + */ qemu_log_mask(LOG_UNIMP, "Illegal instruction: %04x @ %08x\n", insn, s->base.pc_next); gen_exception(s, s->base.pc_next, EXCP_ILLEGAL); @@ -1655,7 +1676,8 @@ static void bcd_add(TCGv dest, TCGv src) { TCGv t0, t1; - /* dest10 = dest10 + src10 + X + /* + * dest10 = dest10 + src10 + X * * t1 = src * t2 = t1 + 0x066 @@ -1667,7 +1689,8 @@ static void bcd_add(TCGv dest, TCGv src) * return t3 - t7 */ - /* t1 = (src + 0x066) + dest + X + /* + * t1 = (src + 0x066) + dest + X * = result with some possible exceding 0x6 */ @@ -1680,20 +1703,23 @@ static void bcd_add(TCGv dest, TCGv src) /* we will remove exceding 0x6 where there is no carry */ - /* t0 = (src + 0x0066) ^ dest + /* + * t0 = (src + 0x0066) ^ dest * = t1 without carries */ tcg_gen_xor_i32(t0, t0, dest); - /* extract the carries + /* + * extract the carries * t0 = t0 ^ t1 * = only the carries */ tcg_gen_xor_i32(t0, t0, t1); - /* generate 0x1 where there is no carry + /* + * generate 0x1 where there is no carry * and for each 0x10, generate a 0x6 */ @@ -1704,7 +1730,8 @@ static void bcd_add(TCGv dest, TCGv src) tcg_gen_add_i32(dest, dest, t0); tcg_temp_free(t0); - /* remove the exceding 0x6 + /* + * remove the exceding 0x6 * for digits that have not generated a carry */ @@ -1716,7 +1743,8 @@ static void bcd_sub(TCGv dest, TCGv src) { TCGv t0, t1, t2; - /* dest10 = dest10 - src10 - X + /* + * dest10 = dest10 - src10 - X * = bcd_add(dest + 1 - X, 0x199 - src) */ @@ -1741,7 +1769,8 @@ static void bcd_sub(TCGv dest, TCGv src) tcg_gen_xor_i32(t0, t1, t2); - /* t2 = ~t0 & 0x110 + /* + * t2 = ~t0 & 0x110 * t0 = (t2 >> 2) | (t2 >> 3) * * to fit on 8bit operands, changed in: @@ -2029,8 +2058,10 @@ DISAS_INSN(movem) /* pre-decrement is not allowed */ goto do_addr_fault; } - /* We want a bare copy of the address reg, without any pre-decrement - adjustment, as gen_lea would provide. */ + /* + * We want a bare copy of the address reg, without any pre-decrement + * adjustment, as gen_lea would provide. + */ break; default: @@ -2072,7 +2103,8 @@ DISAS_INSN(movem) tcg_gen_sub_i32(addr, addr, incr); if (reg0 + 8 == i && m68k_feature(s->env, M68K_FEATURE_EXT_FULL)) { - /* M68020+: if the addressing register is the + /* + * M68020+: if the addressing register is the * register moved to memory, the value written * is the initial value decremented by the size of * the operation, regardless of how many actual @@ -2413,7 +2445,8 @@ DISAS_INSN(cas) cmp = gen_extend(s, DREG(ext, 0), opsize, 1); - /* if <EA> == Dc then + /* + * if <EA> == Dc then * <EA> = Du * Dc = <EA> (because <EA> == Dc) * else @@ -2466,7 +2499,8 @@ DISAS_INSN(cas2w) addr2 = DREG(ext2, 12); } - /* if (R1) == Dc1 && (R2) == Dc2 then + /* + * if (R1) == Dc1 && (R2) == Dc2 then * (R1) = Du1 * (R2) = Du2 * else @@ -2516,7 +2550,8 @@ DISAS_INSN(cas2l) addr2 = DREG(ext2, 12); } - /* if (R1) == Dc1 && (R2) == Dc2 then + /* + * if (R1) == Dc1 && (R2) == Dc2 then * (R1) = Du1 * (R2) = Du2 * else @@ -2597,7 +2632,8 @@ DISAS_INSN(negx) gen_flush_flags(s); /* compute old Z */ - /* Perform substract with borrow. + /* + * Perform substract with borrow. * (X, N) = -(src + X); */ @@ -2609,7 +2645,8 @@ DISAS_INSN(negx) tcg_gen_andi_i32(QREG_CC_X, QREG_CC_X, 1); - /* Compute signed-overflow for negation. The normal formula for + /* + * Compute signed-overflow for negation. The normal formula for * subtraction is (res ^ src) & (src ^ dest), but with dest==0 * this simplies to res & src. */ @@ -2844,8 +2881,10 @@ DISAS_INSN(mull) set_cc_op(s, CC_OP_FLAGS); } else { - /* The upper 32 bits of the product are discarded, so - muls.l and mulu.l are functionally equivalent. */ + /* + * The upper 32 bits of the product are discarded, so + * muls.l and mulu.l are functionally equivalent. + */ tcg_gen_mul_i32(DREG(ext, 12), src1, DREG(ext, 12)); gen_logic_cc(s, DREG(ext, 12), OS_LONG); } @@ -2938,8 +2977,10 @@ DISAS_INSN(jump) { TCGv tmp; - /* Load the target address first to ensure correct exception - behavior. */ + /* + * Load the target address first to ensure correct exception + * behavior. + */ tmp = gen_lea(env, s, insn, OS_LONG); if (IS_NULL_QREG(tmp)) { gen_addr_fault(s); @@ -2976,8 +3017,10 @@ DISAS_INSN(addsubq) dest = tcg_temp_new(); tcg_gen_mov_i32(dest, src); if ((insn & 0x38) == 0x08) { - /* Don't update condition codes if the destination is an - address register. */ + /* + * Don't update condition codes if the destination is an + * address register. + */ if (insn & 0x0100) { tcg_gen_sub_i32(dest, dest, val); } else { @@ -3110,7 +3153,8 @@ static inline void gen_subx(DisasContext *s, TCGv src, TCGv dest, int opsize) gen_flush_flags(s); /* compute old Z */ - /* Perform substract with borrow. + /* + * Perform substract with borrow. * (X, N) = dest - (src + X); */ @@ -3320,7 +3364,8 @@ static inline void gen_addx(DisasContext *s, TCGv src, TCGv dest, int opsize) gen_flush_flags(s); /* compute old Z */ - /* Perform addition with carry. + /* + * Perform addition with carry. * (X, N) = src + dest + X; */ @@ -3404,9 +3449,11 @@ static inline void shift_im(DisasContext *s, uint16_t insn, int opsize) tcg_gen_shri_i32(QREG_CC_C, reg, bits - count); tcg_gen_shli_i32(QREG_CC_N, reg, count); - /* Note that ColdFire always clears V (done above), - while M68000 sets if the most significant bit is changed at - any time during the shift operation */ + /* + * Note that ColdFire always clears V (done above), + * while M68000 sets if the most significant bit is changed at + * any time during the shift operation. + */ if (!logical && m68k_feature(s->env, M68K_FEATURE_M68000)) { /* if shift count >= bits, V is (reg != 0) */ if (count >= bits) { @@ -3451,9 +3498,11 @@ static inline void shift_reg(DisasContext *s, uint16_t insn, int opsize) s64 = tcg_temp_new_i64(); s32 = tcg_temp_new(); - /* Note that m68k truncates the shift count modulo 64, not 32. - In addition, a 64-bit shift makes it easy to find "the last - bit shifted out", for the carry flag. */ + /* + * Note that m68k truncates the shift count modulo 64, not 32. + * In addition, a 64-bit shift makes it easy to find "the last + * bit shifted out", for the carry flag. + */ tcg_gen_andi_i32(s32, DREG(insn, 9), 63); tcg_gen_extu_i32_i64(s64, s32); tcg_gen_extu_i32_i64(t64, reg); @@ -3480,7 +3529,8 @@ static inline void shift_reg(DisasContext *s, uint16_t insn, int opsize) tcg_gen_movcond_i32(TCG_COND_NE, QREG_CC_X, s32, QREG_CC_V, QREG_CC_C, QREG_CC_X); - /* M68000 sets V if the most significant bit is changed at + /* + * M68000 sets V if the most significant bit is changed at * any time during the shift operation. Do this via creating * an extension of the sign bit, comparing, and discarding * the bits below the sign bit. I.e. @@ -3576,9 +3626,11 @@ DISAS_INSN(shift_mem) tcg_gen_shri_i32(QREG_CC_C, src, 15); tcg_gen_shli_i32(QREG_CC_N, src, 1); - /* Note that ColdFire always clears V, - while M68000 sets if the most significant bit is changed at - any time during the shift operation */ + /* + * Note that ColdFire always clears V, + * while M68000 sets if the most significant bit is changed at + * any time during the shift operation + */ if (!logical && m68k_feature(s->env, M68K_FEATURE_M68000)) { src = gen_extend(s, src, OS_WORD, 1); tcg_gen_xor_i32(QREG_CC_V, QREG_CC_N, src); @@ -3996,9 +4048,11 @@ DISAS_INSN(bfext_reg) TCGv tmp = tcg_temp_new(); TCGv shift; - /* In general, we're going to rotate the field so that it's at the - top of the word and then right-shift by the complement of the - width to extend the field. */ + /* + * In general, we're going to rotate the field so that it's at the + * top of the word and then right-shift by the complement of the + * width to extend the field. + */ if (ext & 0x20) { /* Variable width. */ if (ext & 0x800) { @@ -4028,8 +4082,10 @@ DISAS_INSN(bfext_reg) src = tmp; pos = 32 - len; } else { - /* Immediate offset. If the field doesn't wrap around the - end of the word, rely on (s)extract completely. */ + /* + * Immediate offset. If the field doesn't wrap around the + * end of the word, rely on (s)extract completely. + */ if (pos < 0) { tcg_gen_rotli_i32(tmp, src, ofs); src = tmp; @@ -4888,7 +4944,8 @@ static void gen_op_fmove_fcr(CPUM68KState *env, DisasContext *s, addr = tcg_temp_new(); tcg_gen_mov_i32(addr, tmp); - /* mask: + /* + * mask: * * 0b100 Floating-Point Control Register * 0b010 Floating-Point Status Register @@ -4956,7 +5013,8 @@ static void gen_op_fmovem(CPUM68KState *env, DisasContext *s, } if (!is_load && (mode & 2) == 0) { - /* predecrement addressing mode + /* + * predecrement addressing mode * only available to store register to memory */ if (opsize == OS_EXTENDED) { @@ -4986,8 +5044,10 @@ static void gen_op_fmovem(CPUM68KState *env, DisasContext *s, tcg_temp_free(tmp); } -/* ??? FP exceptions are not implemented. Most exceptions are deferred until - immediately before the next FP instruction is executed. */ +/* + * ??? FP exceptions are not implemented. Most exceptions are deferred until + * immediately before the next FP instruction is executed. + */ DISAS_INSN(fpu) { uint16_t ext; @@ -5511,8 +5571,10 @@ DISAS_INSN(mac) tmp = gen_lea(env, s, insn, OS_LONG); addr = tcg_temp_new(); tcg_gen_and_i32(addr, tmp, QREG_MAC_MASK); - /* Load the value now to ensure correct exception behavior. - Perform writeback after reading the MAC inputs. */ + /* + * Load the value now to ensure correct exception behavior. + * Perform writeback after reading the MAC inputs. + */ loadval = gen_load(s, OS_LONG, addr, 0, IS_USER(s)); acc ^= 1; @@ -5633,8 +5695,10 @@ DISAS_INSN(mac) TCGv rw; rw = (insn & 0x40) ? AREG(insn, 9) : DREG(insn, 9); tcg_gen_mov_i32(rw, loadval); - /* FIXME: Should address writeback happen with the masked or - unmasked value? */ + /* + * FIXME: Should address writeback happen with the masked or + * unmasked value? + */ switch ((insn >> 3) & 7) { case 3: /* Post-increment. */ tcg_gen_addi_i32(AREG(insn, 0), addr, 4); @@ -5784,8 +5848,10 @@ register_opcode (disas_proc proc, uint16_t opcode, uint16_t mask) opcode, mask); abort(); } - /* This could probably be cleverer. For now just optimize the case where - the top bits are known. */ + /* + * This could probably be cleverer. For now just optimize the case where + * the top bits are known. + */ /* Find the first zero bit in the mask. */ i = 0x8000; while ((i & mask) != 0) @@ -5803,17 +5869,22 @@ register_opcode (disas_proc proc, uint16_t opcode, uint16_t mask) } } -/* Register m68k opcode handlers. Order is important. - Later insn override earlier ones. */ +/* + * Register m68k opcode handlers. Order is important. + * Later insn override earlier ones. + */ void register_m68k_insns (CPUM68KState *env) { - /* Build the opcode table only once to avoid - multithreading issues. */ + /* + * Build the opcode table only once to avoid + * multithreading issues. + */ if (opcode_table[0] != NULL) { return; } - /* use BASE() for instruction available + /* + * use BASE() for instruction available * for CF_ISA_A and M68000. */ #define BASE(name, opcode, mask) \ @@ -6077,10 +6148,12 @@ static bool m68k_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *cpu, DisasContext *dc = container_of(dcbase, DisasContext, base); gen_exception(dc, dc->base.pc_next, EXCP_DEBUG); - /* The address covered by the breakpoint must be included in - [tb->pc, tb->pc + tb->size) in order to for it to be - properly cleared -- thus we increment the PC here so that - the logic setting tb->size below does the right thing. */ + /* + * The address covered by the breakpoint must be included in + * [tb->pc, tb->pc + tb->size) in order to for it to be + * properly cleared -- thus we increment the PC here so that + * the logic setting tb->size below does the right thing. + */ dc->base.pc_next += 2; return true; @@ -6099,7 +6172,8 @@ static void m68k_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu) dc->base.pc_next = dc->pc; if (dc->base.is_jmp == DISAS_NEXT) { - /* Stop translation when the next insn might touch a new page. + /* + * Stop translation when the next insn might touch a new page. * This ensures that prefetch aborts at the right place. * * We cannot determine the size of the next insn without @@ -6142,8 +6216,10 @@ static void m68k_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu) tcg_gen_lookup_and_goto_ptr(); break; case DISAS_EXIT: - /* We updated CC_OP and PC in gen_exit_tb, but also modified - other state that may require returning to the main loop. */ + /* + * We updated CC_OP and PC in gen_exit_tb, but also modified + * other state that may require returning to the main loop. + */ tcg_gen_exit_tb(NULL, 0); break; default: diff --git a/target/s390x/cpu_features.c b/target/s390x/cpu_features.c index f64f581c86..9f817e3cfa 100644 --- a/target/s390x/cpu_features.c +++ b/target/s390x/cpu_features.c @@ -2,8 +2,9 @@ * CPU features/facilities for s390x * * Copyright IBM Corp. 2016, 2018 + * Copyright Red Hat, Inc. 2019 * - * Author(s): David Hildenbrand <dahi@linux.vnet.ibm.com> + * Author(s): David Hildenbrand <david@redhat.com> * * This work is licensed under the terms of the GNU GPL, version 2 or (at * your option) any later version. See the COPYING file in the top-level @@ -14,346 +15,17 @@ #include "qemu/module.h" #include "cpu_features.h" -#define FEAT_INIT(_name, _type, _bit, _desc) \ - { \ - .name = _name, \ - .type = _type, \ - .bit = _bit, \ - .desc = _desc, \ - } - -/* S390FeatDef.bit is not applicable as there is no feature block. */ -#define FEAT_INIT_MISC(_name, _desc) \ - FEAT_INIT(_name, S390_FEAT_TYPE_MISC, 0, _desc) - -/* indexed by feature number for easy lookup */ -static const S390FeatDef s390_features[] = { - FEAT_INIT("esan3", S390_FEAT_TYPE_STFL, 0, "Instructions marked as n3"), - FEAT_INIT("zarch", S390_FEAT_TYPE_STFL, 1, "z/Architecture architectural mode"), - FEAT_INIT("dateh", S390_FEAT_TYPE_STFL, 3, "DAT-enhancement facility"), - FEAT_INIT("idtes", S390_FEAT_TYPE_STFL, 4, "IDTE selective TLB segment-table clearing"), - FEAT_INIT("idter", S390_FEAT_TYPE_STFL, 5, "IDTE selective TLB region-table clearing"), - FEAT_INIT("asnlxr", S390_FEAT_TYPE_STFL, 6, "ASN-and-LX reuse facility"), - FEAT_INIT("stfle", S390_FEAT_TYPE_STFL, 7, "Store-facility-list-extended facility"), - FEAT_INIT("edat", S390_FEAT_TYPE_STFL, 8, "Enhanced-DAT facility"), - FEAT_INIT("srs", S390_FEAT_TYPE_STFL, 9, "Sense-running-status facility"), - FEAT_INIT("csske", S390_FEAT_TYPE_STFL, 10, "Conditional-SSKE facility"), - FEAT_INIT("ctop", S390_FEAT_TYPE_STFL, 11, "Configuration-topology facility"), - FEAT_INIT("apqci", S390_FEAT_TYPE_STFL, 12, "Query AP Configuration Information facility"), - FEAT_INIT("ipter", S390_FEAT_TYPE_STFL, 13, "IPTE-range facility"), - FEAT_INIT("nonqks", S390_FEAT_TYPE_STFL, 14, "Nonquiescing key-setting facility"), - FEAT_INIT("apft", S390_FEAT_TYPE_STFL, 15, "AP Facilities Test facility"), - FEAT_INIT("etf2", S390_FEAT_TYPE_STFL, 16, "Extended-translation facility 2"), - FEAT_INIT("msa-base", S390_FEAT_TYPE_STFL, 17, "Message-security-assist facility (excluding subfunctions)"), - FEAT_INIT("ldisp", S390_FEAT_TYPE_STFL, 18, "Long-displacement facility"), - FEAT_INIT("ldisphp", S390_FEAT_TYPE_STFL, 19, "Long-displacement facility has high performance"), - FEAT_INIT("hfpm", S390_FEAT_TYPE_STFL, 20, "HFP-multiply-add/subtract facility"), - FEAT_INIT("eimm", S390_FEAT_TYPE_STFL, 21, "Extended-immediate facility"), - FEAT_INIT("etf3", S390_FEAT_TYPE_STFL, 22, "Extended-translation facility 3"), - FEAT_INIT("hfpue", S390_FEAT_TYPE_STFL, 23, "HFP-unnormalized-extension facility"), - FEAT_INIT("etf2eh", S390_FEAT_TYPE_STFL, 24, "ETF2-enhancement facility"), - FEAT_INIT("stckf", S390_FEAT_TYPE_STFL, 25, "Store-clock-fast facility"), - FEAT_INIT("parseh", S390_FEAT_TYPE_STFL, 26, "Parsing-enhancement facility"), - FEAT_INIT("mvcos", S390_FEAT_TYPE_STFL, 27, "Move-with-optional-specification facility"), - FEAT_INIT("tods-base", S390_FEAT_TYPE_STFL, 28, "TOD-clock-steering facility (excluding subfunctions)"), - FEAT_INIT("etf3eh", S390_FEAT_TYPE_STFL, 30, "ETF3-enhancement facility"), - FEAT_INIT("ectg", S390_FEAT_TYPE_STFL, 31, "Extract-CPU-time facility"), - FEAT_INIT("csst", S390_FEAT_TYPE_STFL, 32, "Compare-and-swap-and-store facility"), - FEAT_INIT("csst2", S390_FEAT_TYPE_STFL, 33, "Compare-and-swap-and-store facility 2"), - FEAT_INIT("ginste", S390_FEAT_TYPE_STFL, 34, "General-instructions-extension facility"), - FEAT_INIT("exrl", S390_FEAT_TYPE_STFL, 35, "Execute-extensions facility"), - FEAT_INIT("emon", S390_FEAT_TYPE_STFL, 36, "Enhanced-monitor facility"), - FEAT_INIT("fpe", S390_FEAT_TYPE_STFL, 37, "Floating-point extension facility"), - FEAT_INIT("opc", S390_FEAT_TYPE_STFL, 38, "Order Preserving Compression facility"), - FEAT_INIT("sprogp", S390_FEAT_TYPE_STFL, 40, "Set-program-parameters facility"), - FEAT_INIT("fpseh", S390_FEAT_TYPE_STFL, 41, "Floating-point-support-enhancement facilities"), - FEAT_INIT("dfp", S390_FEAT_TYPE_STFL, 42, "DFP (decimal-floating-point) facility"), - FEAT_INIT("dfphp", S390_FEAT_TYPE_STFL, 43, "DFP (decimal-floating-point) facility has high performance"), - FEAT_INIT("pfpo", S390_FEAT_TYPE_STFL, 44, "PFPO instruction"), - FEAT_INIT("stfle45", S390_FEAT_TYPE_STFL, 45, "Various facilities introduced with z196"), - FEAT_INIT("cmpsceh", S390_FEAT_TYPE_STFL, 47, "CMPSC-enhancement facility"), - FEAT_INIT("dfpzc", S390_FEAT_TYPE_STFL, 48, "Decimal-floating-point zoned-conversion facility"), - FEAT_INIT("stfle49", S390_FEAT_TYPE_STFL, 49, "Various facilities introduced with zEC12"), - FEAT_INIT("cte", S390_FEAT_TYPE_STFL, 50, "Constrained transactional-execution facility"), - FEAT_INIT("ltlbc", S390_FEAT_TYPE_STFL, 51, "Local-TLB-clearing facility"), - FEAT_INIT("iacc2", S390_FEAT_TYPE_STFL, 52, "Interlocked-access facility 2"), - FEAT_INIT("stfle53", S390_FEAT_TYPE_STFL, 53, "Various facilities introduced with z13"), - FEAT_INIT("eec", S390_FEAT_TYPE_STFL, 54, "Entropy encoding compression facility"), - FEAT_INIT("msa5-base", S390_FEAT_TYPE_STFL, 57, "Message-security-assist-extension-5 facility (excluding subfunctions)"), - FEAT_INIT("minste2", S390_FEAT_TYPE_STFL, 58, "Miscellaneous-instruction-extensions facility 2"), - FEAT_INIT("sema", S390_FEAT_TYPE_STFL, 59, "Semaphore-assist facility"), - FEAT_INIT("tsi", S390_FEAT_TYPE_STFL, 60, "Time-slice Instrumentation facility"), - FEAT_INIT("minste3", S390_FEAT_TYPE_STFL, 61, "Miscellaneous-Instruction-Extensions Facility 3"), - FEAT_INIT("ri", S390_FEAT_TYPE_STFL, 64, "CPU runtime-instrumentation facility"), - FEAT_INIT("zpci", S390_FEAT_TYPE_STFL, 69, "z/PCI facility"), - FEAT_INIT("aen", S390_FEAT_TYPE_STFL, 71, "General-purpose-adapter-event-notification facility"), - FEAT_INIT("ais", S390_FEAT_TYPE_STFL, 72, "General-purpose-adapter-interruption-suppression facility"), - FEAT_INIT("te", S390_FEAT_TYPE_STFL, 73, "Transactional-execution facility"), - FEAT_INIT("sthyi", S390_FEAT_TYPE_STFL, 74, "Store-hypervisor-information facility"), - FEAT_INIT("aefsi", S390_FEAT_TYPE_STFL, 75, "Access-exception-fetch/store-indication facility"), - FEAT_INIT("msa3-base", S390_FEAT_TYPE_STFL, 76, "Message-security-assist-extension-3 facility (excluding subfunctions)"), - FEAT_INIT("msa4-base", S390_FEAT_TYPE_STFL, 77, "Message-security-assist-extension-4 facility (excluding subfunctions)"), - FEAT_INIT("edat2", S390_FEAT_TYPE_STFL, 78, "Enhanced-DAT facility 2"), - FEAT_INIT("dfppc", S390_FEAT_TYPE_STFL, 80, "Decimal-floating-point packed-conversion facility"), - FEAT_INIT("ppa15", S390_FEAT_TYPE_STFL, 81, "PPA15 is installed"), - FEAT_INIT("bpb", S390_FEAT_TYPE_STFL, 82, "Branch prediction blocking"), - FEAT_INIT("vx", S390_FEAT_TYPE_STFL, 129, "Vector facility"), - FEAT_INIT("iep", S390_FEAT_TYPE_STFL, 130, "Instruction-execution-protection facility"), - FEAT_INIT("sea_esop2", S390_FEAT_TYPE_STFL, 131, "Side-effect-access facility and Enhanced-suppression-on-protection facility 2"), - FEAT_INIT("gs", S390_FEAT_TYPE_STFL, 133, "Guarded-storage facility"), - FEAT_INIT("vxpd", S390_FEAT_TYPE_STFL, 134, "Vector packed decimal facility"), - FEAT_INIT("vxeh", S390_FEAT_TYPE_STFL, 135, "Vector enhancements facility"), - FEAT_INIT("mepoch", S390_FEAT_TYPE_STFL, 139, "Multiple-epoch facility"), - FEAT_INIT("tpei", S390_FEAT_TYPE_STFL, 144, "Test-pending-external-interruption facility"), - FEAT_INIT("irbm", S390_FEAT_TYPE_STFL, 145, "Insert-reference-bits-multiple facility"), - FEAT_INIT("msa8-base", S390_FEAT_TYPE_STFL, 146, "Message-security-assist-extension-8 facility (excluding subfunctions)"), - FEAT_INIT("cmmnt", S390_FEAT_TYPE_STFL, 147, "CMM: ESSA-enhancement (no translate) facility"), - FEAT_INIT("vxeh2", S390_FEAT_TYPE_STFL, 148, "Vector Enhancements facility 2"), - FEAT_INIT("esort-base", S390_FEAT_TYPE_STFL, 150, "Enhanced-sort facility (excluding subfunctions)"), - FEAT_INIT("deflate-base", S390_FEAT_TYPE_STFL, 151, "Deflate-conversion facility (excluding subfunctions)"), - FEAT_INIT("vxbeh", S390_FEAT_TYPE_STFL, 152, "Vector BCD enhancements facility 1"), - FEAT_INIT("msa9-base", S390_FEAT_TYPE_STFL, 155, "Message-security-assist-extension-9 facility (excluding subfunctions)"), - FEAT_INIT("etoken", S390_FEAT_TYPE_STFL, 156, "Etoken facility"), - - /* SCLP SCCB Byte 80 - 98 (bit numbers relative to byte-80) */ - FEAT_INIT("gsls", S390_FEAT_TYPE_SCLP_CONF_CHAR, 40, "SIE: Guest-storage-limit-suppression facility"), - FEAT_INIT("esop", S390_FEAT_TYPE_SCLP_CONF_CHAR, 46, "Enhanced-suppression-on-protection facility"), - FEAT_INIT("hpma2", S390_FEAT_TYPE_SCLP_CONF_CHAR, 90, "Host page management assist 2 Facility"), /* 91-2 */ - FEAT_INIT("kss", S390_FEAT_TYPE_SCLP_CONF_CHAR, 151, "SIE: Keyless-subset facility"), /* 98-7 */ - - /* SCLP SCCB Byte 116 - 119 (bit numbers relative to byte-116) */ - FEAT_INIT("64bscao", S390_FEAT_TYPE_SCLP_CONF_CHAR_EXT, 0, "SIE: 64-bit-SCAO facility"), - FEAT_INIT("cmma", S390_FEAT_TYPE_SCLP_CONF_CHAR_EXT, 1, "SIE: Collaborative-memory-management assist"), - FEAT_INIT("pfmfi", S390_FEAT_TYPE_SCLP_CONF_CHAR_EXT, 9, "SIE: PFMF interpretation facility"), - FEAT_INIT("ibs", S390_FEAT_TYPE_SCLP_CONF_CHAR_EXT, 10, "SIE: Interlock-and-broadcast-suppression facility"), - - FEAT_INIT("sief2", S390_FEAT_TYPE_SCLP_CPU, 4, "SIE: interception format 2 (Virtual SIE)"), - FEAT_INIT("skey", S390_FEAT_TYPE_SCLP_CPU, 5, "SIE: Storage-key facility"), - FEAT_INIT("gpereh", S390_FEAT_TYPE_SCLP_CPU, 10, "SIE: Guest-PER enhancement facility"), - FEAT_INIT("siif", S390_FEAT_TYPE_SCLP_CPU, 11, "SIE: Shared IPTE-interlock facility"), - FEAT_INIT("sigpif", S390_FEAT_TYPE_SCLP_CPU, 12, "SIE: SIGP interpretation facility"), - FEAT_INIT("ib", S390_FEAT_TYPE_SCLP_CPU, 42, "SIE: Intervention bypass facility"), - FEAT_INIT("cei", S390_FEAT_TYPE_SCLP_CPU, 43, "SIE: Conditional-external-interception facility"), - - FEAT_INIT_MISC("dateh2", "DAT-enhancement facility 2"), - FEAT_INIT_MISC("cmm", "Collaborative-memory-management facility"), - FEAT_INIT_MISC("ap", "AP instructions installed"), - - FEAT_INIT("plo-cl", S390_FEAT_TYPE_PLO, 0, "PLO Compare and load (32 bit in general registers)"), - FEAT_INIT("plo-clg", S390_FEAT_TYPE_PLO, 1, "PLO Compare and load (64 bit in parameter list)"), - FEAT_INIT("plo-clgr", S390_FEAT_TYPE_PLO, 2, "PLO Compare and load (32 bit in general registers)"), - FEAT_INIT("plo-clx", S390_FEAT_TYPE_PLO, 3, "PLO Compare and load (128 bit in parameter list)"), - FEAT_INIT("plo-cs", S390_FEAT_TYPE_PLO, 4, "PLO Compare and swap (32 bit in general registers)"), - FEAT_INIT("plo-csg", S390_FEAT_TYPE_PLO, 5, "PLO Compare and swap (64 bit in parameter list)"), - FEAT_INIT("plo-csgr", S390_FEAT_TYPE_PLO, 6, "PLO Compare and swap (32 bit in general registers)"), - FEAT_INIT("plo-csx", S390_FEAT_TYPE_PLO, 7, "PLO Compare and swap (128 bit in parameter list)"), - FEAT_INIT("plo-dcs", S390_FEAT_TYPE_PLO, 8, "PLO Double compare and swap (32 bit in general registers)"), - FEAT_INIT("plo-dcsg", S390_FEAT_TYPE_PLO, 9, "PLO Double compare and swap (64 bit in parameter list)"), - FEAT_INIT("plo-dcsgr", S390_FEAT_TYPE_PLO, 10, "PLO Double compare and swap (32 bit in general registers)"), - FEAT_INIT("plo-dcsx", S390_FEAT_TYPE_PLO, 11, "PLO Double compare and swap (128 bit in parameter list)"), - FEAT_INIT("plo-csst", S390_FEAT_TYPE_PLO, 12, "PLO Compare and swap and store (32 bit in general registers)"), - FEAT_INIT("plo-csstg", S390_FEAT_TYPE_PLO, 13, "PLO Compare and swap and store (64 bit in parameter list)"), - FEAT_INIT("plo-csstgr", S390_FEAT_TYPE_PLO, 14, "PLO Compare and swap and store (32 bit in general registers)"), - FEAT_INIT("plo-csstx", S390_FEAT_TYPE_PLO, 15, "PLO Compare and swap and store (128 bit in parameter list)"), - FEAT_INIT("plo-csdst", S390_FEAT_TYPE_PLO, 16, "PLO Compare and swap and double store (32 bit in general registers)"), - FEAT_INIT("plo-csdstg", S390_FEAT_TYPE_PLO, 17, "PLO Compare and swap and double store (64 bit in parameter list)"), - FEAT_INIT("plo-csdstgr", S390_FEAT_TYPE_PLO, 18, "PLO Compare and swap and double store (32 bit in general registers)"), - FEAT_INIT("plo-csdstx", S390_FEAT_TYPE_PLO, 19, "PLO Compare and swap and double store (128 bit in parameter list)"), - FEAT_INIT("plo-cstst", S390_FEAT_TYPE_PLO, 20, "PLO Compare and swap and triple store (32 bit in general registers)"), - FEAT_INIT("plo-cststg", S390_FEAT_TYPE_PLO, 21, "PLO Compare and swap and triple store (64 bit in parameter list)"), - FEAT_INIT("plo-cststgr", S390_FEAT_TYPE_PLO, 22, "PLO Compare and swap and triple store (32 bit in general registers)"), - FEAT_INIT("plo-cststx", S390_FEAT_TYPE_PLO, 23, "PLO Compare and swap and triple store (128 bit in parameter list)"), - - FEAT_INIT("ptff-qto", S390_FEAT_TYPE_PTFF, 1, "PTFF Query TOD Offset"), - FEAT_INIT("ptff-qsi", S390_FEAT_TYPE_PTFF, 2, "PTFF Query Steering Information"), - FEAT_INIT("ptff-qpc", S390_FEAT_TYPE_PTFF, 3, "PTFF Query Physical Clock"), - FEAT_INIT("ptff-qui", S390_FEAT_TYPE_PTFF, 4, "PTFF Query UTC Information"), - FEAT_INIT("ptff-qtou", S390_FEAT_TYPE_PTFF, 5, "PTFF Query TOD Offset User"), - FEAT_INIT("ptff-qsie", S390_FEAT_TYPE_PTFF, 10, "PTFF Query Steering Information Extended"), - FEAT_INIT("ptff-qtoue", S390_FEAT_TYPE_PTFF, 13, "PTFF Query TOD Offset User Extended"), - FEAT_INIT("ptff-sto", S390_FEAT_TYPE_PTFF, 65, "PTFF Set TOD Offset"), - FEAT_INIT("ptff-stou", S390_FEAT_TYPE_PTFF, 69, "PTFF Set TOD Offset User"), - FEAT_INIT("ptff-stoe", S390_FEAT_TYPE_PTFF, 73, "PTFF Set TOD Offset Extended"), - FEAT_INIT("ptff-stoue", S390_FEAT_TYPE_PTFF, 77, "PTFF Set TOD Offset User Extended"), - - FEAT_INIT("kmac-dea", S390_FEAT_TYPE_KMAC, 1, "KMAC DEA"), - FEAT_INIT("kmac-tdea-128", S390_FEAT_TYPE_KMAC, 2, "KMAC TDEA-128"), - FEAT_INIT("kmac-tdea-192", S390_FEAT_TYPE_KMAC, 3, "KMAC TDEA-192"), - FEAT_INIT("kmac-edea", S390_FEAT_TYPE_KMAC, 9, "KMAC Encrypted-DEA"), - FEAT_INIT("kmac-etdea-128", S390_FEAT_TYPE_KMAC, 10, "KMAC Encrypted-TDEA-128"), - FEAT_INIT("kmac-etdea-192", S390_FEAT_TYPE_KMAC, 11, "KMAC Encrypted-TDEA-192"), - FEAT_INIT("kmac-aes-128", S390_FEAT_TYPE_KMAC, 18, "KMAC AES-128"), - FEAT_INIT("kmac-aes-192", S390_FEAT_TYPE_KMAC, 19, "KMAC AES-192"), - FEAT_INIT("kmac-aes-256", S390_FEAT_TYPE_KMAC, 20, "KMAC AES-256"), - FEAT_INIT("kmac-eaes-128", S390_FEAT_TYPE_KMAC, 26, "KMAC Encrypted-AES-128"), - FEAT_INIT("kmac-eaes-192", S390_FEAT_TYPE_KMAC, 27, "KMAC Encrypted-AES-192"), - FEAT_INIT("kmac-eaes-256", S390_FEAT_TYPE_KMAC, 28, "KMAC Encrypted-AES-256"), - - FEAT_INIT("kmc-dea", S390_FEAT_TYPE_KMC, 1, "KMC DEA"), - FEAT_INIT("kmc-tdea-128", S390_FEAT_TYPE_KMC, 2, "KMC TDEA-128"), - FEAT_INIT("kmc-tdea-192", S390_FEAT_TYPE_KMC, 3, "KMC TDEA-192"), - FEAT_INIT("kmc-edea", S390_FEAT_TYPE_KMC, 9, "KMC Encrypted-DEA"), - FEAT_INIT("kmc-etdea-128", S390_FEAT_TYPE_KMC, 10, "KMC Encrypted-TDEA-128"), - FEAT_INIT("kmc-etdea-192", S390_FEAT_TYPE_KMC, 11, "KMC Encrypted-TDEA-192"), - FEAT_INIT("kmc-aes-128", S390_FEAT_TYPE_KMC, 18, "KMC AES-128"), - FEAT_INIT("kmc-aes-192", S390_FEAT_TYPE_KMC, 19, "KMC AES-192"), - FEAT_INIT("kmc-aes-256", S390_FEAT_TYPE_KMC, 20, "KMC AES-256"), - FEAT_INIT("kmc-eaes-128", S390_FEAT_TYPE_KMC, 26, "KMC Encrypted-AES-128"), - FEAT_INIT("kmc-eaes-192", S390_FEAT_TYPE_KMC, 27, "KMC Encrypted-AES-192"), - FEAT_INIT("kmc-eaes-256", S390_FEAT_TYPE_KMC, 28, "KMC Encrypted-AES-256"), - FEAT_INIT("kmc-prng", S390_FEAT_TYPE_KMC, 67, "KMC PRNG"), - - FEAT_INIT("km-dea", S390_FEAT_TYPE_KM, 1, "KM DEA"), - FEAT_INIT("km-tdea-128", S390_FEAT_TYPE_KM, 2, "KM TDEA-128"), - FEAT_INIT("km-tdea-192", S390_FEAT_TYPE_KM, 3, "KM TDEA-192"), - FEAT_INIT("km-edea", S390_FEAT_TYPE_KM, 9, "KM Encrypted-DEA"), - FEAT_INIT("km-etdea-128", S390_FEAT_TYPE_KM, 10, "KM Encrypted-TDEA-128"), - FEAT_INIT("km-etdea-192", S390_FEAT_TYPE_KM, 11, "KM Encrypted-TDEA-192"), - FEAT_INIT("km-aes-128", S390_FEAT_TYPE_KM, 18, "KM AES-128"), - FEAT_INIT("km-aes-192", S390_FEAT_TYPE_KM, 19, "KM AES-192"), - FEAT_INIT("km-aes-256", S390_FEAT_TYPE_KM, 20, "KM AES-256"), - FEAT_INIT("km-eaes-128", S390_FEAT_TYPE_KM, 26, "KM Encrypted-AES-128"), - FEAT_INIT("km-eaes-192", S390_FEAT_TYPE_KM, 27, "KM Encrypted-AES-192"), - FEAT_INIT("km-eaes-256", S390_FEAT_TYPE_KM, 28, "KM Encrypted-AES-256"), - FEAT_INIT("km-xts-aes-128", S390_FEAT_TYPE_KM, 50, "KM XTS-AES-128"), - FEAT_INIT("km-xts-aes-256", S390_FEAT_TYPE_KM, 52, "KM XTS-AES-256"), - FEAT_INIT("km-xts-eaes-128", S390_FEAT_TYPE_KM, 58, "KM XTS-Encrypted-AES-128"), - FEAT_INIT("km-xts-eaes-256", S390_FEAT_TYPE_KM, 60, "KM XTS-Encrypted-AES-256"), - - FEAT_INIT("kimd-sha-1", S390_FEAT_TYPE_KIMD, 1, "KIMD SHA-1"), - FEAT_INIT("kimd-sha-256", S390_FEAT_TYPE_KIMD, 2, "KIMD SHA-256"), - FEAT_INIT("kimd-sha-512", S390_FEAT_TYPE_KIMD, 3, "KIMD SHA-512"), - FEAT_INIT("kimd-sha3-224", S390_FEAT_TYPE_KIMD, 32, "KIMD SHA3-224"), - FEAT_INIT("kimd-sha3-256", S390_FEAT_TYPE_KIMD, 33, "KIMD SHA3-256"), - FEAT_INIT("kimd-sha3-384", S390_FEAT_TYPE_KIMD, 34, "KIMD SHA3-384"), - FEAT_INIT("kimd-sha3-512", S390_FEAT_TYPE_KIMD, 35, "KIMD SHA3-512"), - FEAT_INIT("kimd-shake-128", S390_FEAT_TYPE_KIMD, 36, "KIMD SHAKE-128"), - FEAT_INIT("kimd-shake-256", S390_FEAT_TYPE_KIMD, 37, "KIMD SHAKE-256"), - FEAT_INIT("kimd-ghash", S390_FEAT_TYPE_KIMD, 65, "KIMD GHASH"), - - FEAT_INIT("klmd-sha-1", S390_FEAT_TYPE_KLMD, 1, "KLMD SHA-1"), - FEAT_INIT("klmd-sha-256", S390_FEAT_TYPE_KLMD, 2, "KLMD SHA-256"), - FEAT_INIT("klmd-sha-512", S390_FEAT_TYPE_KLMD, 3, "KLMD SHA-512"), - FEAT_INIT("klmd-sha3-224", S390_FEAT_TYPE_KLMD, 32, "KLMD SHA3-224"), - FEAT_INIT("klmd-sha3-256", S390_FEAT_TYPE_KLMD, 33, "KLMD SHA3-256"), - FEAT_INIT("klmd-sha3-384", S390_FEAT_TYPE_KLMD, 34, "KLMD SHA3-384"), - FEAT_INIT("klmd-sha3-512", S390_FEAT_TYPE_KLMD, 35, "KLMD SHA3-512"), - FEAT_INIT("klmd-shake-128", S390_FEAT_TYPE_KLMD, 36, "KLMD SHAKE-128"), - FEAT_INIT("klmd-shake-256", S390_FEAT_TYPE_KLMD, 37, "KLMD SHAKE-256"), - - FEAT_INIT("pckmo-edea", S390_FEAT_TYPE_PCKMO, 1, "PCKMO Encrypted-DEA-Key"), - FEAT_INIT("pckmo-etdea-128", S390_FEAT_TYPE_PCKMO, 2, "PCKMO Encrypted-TDEA-128-Key"), - FEAT_INIT("pckmo-etdea-192", S390_FEAT_TYPE_PCKMO, 3, "PCKMO Encrypted-TDEA-192-Key"), - FEAT_INIT("pckmo-aes-128", S390_FEAT_TYPE_PCKMO, 18, "PCKMO Encrypted-AES-128-Key"), - FEAT_INIT("pckmo-aes-192", S390_FEAT_TYPE_PCKMO, 19, "PCKMO Encrypted-AES-192-Key"), - FEAT_INIT("pckmo-aes-256", S390_FEAT_TYPE_PCKMO, 20, "PCKMO Encrypted-AES-256-Key"), - FEAT_INIT("pckmo-ecc-p256", S390_FEAT_TYPE_PCKMO, 32, "PCKMO Encrypt-ECC-P256-Key"), - FEAT_INIT("pckmo-ecc-p384", S390_FEAT_TYPE_PCKMO, 33, "PCKMO Encrypt-ECC-P384-Key"), - FEAT_INIT("pckmo-ecc-p521", S390_FEAT_TYPE_PCKMO, 34, "PCKMO Encrypt-ECC-P521-Key"), - FEAT_INIT("pckmo-ecc-ed25519", S390_FEAT_TYPE_PCKMO, 40 , "PCKMO Encrypt-ECC-Ed25519-Key"), - FEAT_INIT("pckmo-ecc-ed448", S390_FEAT_TYPE_PCKMO, 41 , "PCKMO Encrypt-ECC-Ed448-Key"), - - FEAT_INIT("kmctr-dea", S390_FEAT_TYPE_KMCTR, 1, "KMCTR DEA"), - FEAT_INIT("kmctr-tdea-128", S390_FEAT_TYPE_KMCTR, 2, "KMCTR TDEA-128"), - FEAT_INIT("kmctr-tdea-192", S390_FEAT_TYPE_KMCTR, 3, "KMCTR TDEA-192"), - FEAT_INIT("kmctr-edea", S390_FEAT_TYPE_KMCTR, 9, "KMCTR Encrypted-DEA"), - FEAT_INIT("kmctr-etdea-128", S390_FEAT_TYPE_KMCTR, 10, "KMCTR Encrypted-TDEA-128"), - FEAT_INIT("kmctr-etdea-192", S390_FEAT_TYPE_KMCTR, 11, "KMCTR Encrypted-TDEA-192"), - FEAT_INIT("kmctr-aes-128", S390_FEAT_TYPE_KMCTR, 18, "KMCTR AES-128"), - FEAT_INIT("kmctr-aes-192", S390_FEAT_TYPE_KMCTR, 19, "KMCTR AES-192"), - FEAT_INIT("kmctr-aes-256", S390_FEAT_TYPE_KMCTR, 20, "KMCTR AES-256"), - FEAT_INIT("kmctr-eaes-128", S390_FEAT_TYPE_KMCTR, 26, "KMCTR Encrypted-AES-128"), - FEAT_INIT("kmctr-eaes-192", S390_FEAT_TYPE_KMCTR, 27, "KMCTR Encrypted-AES-192"), - FEAT_INIT("kmctr-eaes-256", S390_FEAT_TYPE_KMCTR, 28, "KMCTR Encrypted-AES-256"), - - FEAT_INIT("kmf-dea", S390_FEAT_TYPE_KMF, 1, "KMF DEA"), - FEAT_INIT("kmf-tdea-128", S390_FEAT_TYPE_KMF, 2, "KMF TDEA-128"), - FEAT_INIT("kmf-tdea-192", S390_FEAT_TYPE_KMF, 3, "KMF TDEA-192"), - FEAT_INIT("kmf-edea", S390_FEAT_TYPE_KMF, 9, "KMF Encrypted-DEA"), - FEAT_INIT("kmf-etdea-128", S390_FEAT_TYPE_KMF, 10, "KMF Encrypted-TDEA-128"), - FEAT_INIT("kmf-etdea-192", S390_FEAT_TYPE_KMF, 11, "KMF Encrypted-TDEA-192"), - FEAT_INIT("kmf-aes-128", S390_FEAT_TYPE_KMF, 18, "KMF AES-128"), - FEAT_INIT("kmf-aes-192", S390_FEAT_TYPE_KMF, 19, "KMF AES-192"), - FEAT_INIT("kmf-aes-256", S390_FEAT_TYPE_KMF, 20, "KMF AES-256"), - FEAT_INIT("kmf-eaes-128", S390_FEAT_TYPE_KMF, 26, "KMF Encrypted-AES-128"), - FEAT_INIT("kmf-eaes-192", S390_FEAT_TYPE_KMF, 27, "KMF Encrypted-AES-192"), - FEAT_INIT("kmf-eaes-256", S390_FEAT_TYPE_KMF, 28, "KMF Encrypted-AES-256"), - - FEAT_INIT("kmo-dea", S390_FEAT_TYPE_KMO, 1, "KMO DEA"), - FEAT_INIT("kmo-tdea-128", S390_FEAT_TYPE_KMO, 2, "KMO TDEA-128"), - FEAT_INIT("kmo-tdea-192", S390_FEAT_TYPE_KMO, 3, "KMO TDEA-192"), - FEAT_INIT("kmo-edea", S390_FEAT_TYPE_KMO, 9, "KMO Encrypted-DEA"), - FEAT_INIT("kmo-etdea-128", S390_FEAT_TYPE_KMO, 10, "KMO Encrypted-TDEA-128"), - FEAT_INIT("kmo-etdea-192", S390_FEAT_TYPE_KMO, 11, "KMO Encrypted-TDEA-192"), - FEAT_INIT("kmo-aes-128", S390_FEAT_TYPE_KMO, 18, "KMO AES-128"), - FEAT_INIT("kmo-aes-192", S390_FEAT_TYPE_KMO, 19, "KMO AES-192"), - FEAT_INIT("kmo-aes-256", S390_FEAT_TYPE_KMO, 20, "KMO AES-256"), - FEAT_INIT("kmo-eaes-128", S390_FEAT_TYPE_KMO, 26, "KMO Encrypted-AES-128"), - FEAT_INIT("kmo-eaes-192", S390_FEAT_TYPE_KMO, 27, "KMO Encrypted-AES-192"), - FEAT_INIT("kmo-eaes-256", S390_FEAT_TYPE_KMO, 28, "KMO Encrypted-AES-256"), - - FEAT_INIT("pcc-cmac-dea", S390_FEAT_TYPE_PCC, 1, "PCC Compute-Last-Block-CMAC-Using-DEA"), - FEAT_INIT("pcc-cmac-tdea-128", S390_FEAT_TYPE_PCC, 2, "PCC Compute-Last-Block-CMAC-Using-TDEA-128"), - FEAT_INIT("pcc-cmac-tdea-192", S390_FEAT_TYPE_PCC, 3, "PCC Compute-Last-Block-CMAC-Using-TDEA-192"), - FEAT_INIT("pcc-cmac-edea", S390_FEAT_TYPE_PCC, 9, "PCC Compute-Last-Block-CMAC-Using-Encrypted-DEA"), - FEAT_INIT("pcc-cmac-etdea-128", S390_FEAT_TYPE_PCC, 10, "PCC Compute-Last-Block-CMAC-Using-Encrypted-TDEA-128"), - FEAT_INIT("pcc-cmac-etdea-192", S390_FEAT_TYPE_PCC, 11, "PCC Compute-Last-Block-CMAC-Using-EncryptedTDEA-192"), - FEAT_INIT("pcc-cmac-aes-128", S390_FEAT_TYPE_PCC, 18, "PCC Compute-Last-Block-CMAC-Using-AES-128"), - FEAT_INIT("pcc-cmac-aes-192", S390_FEAT_TYPE_PCC, 19, "PCC Compute-Last-Block-CMAC-Using-AES-192"), - FEAT_INIT("pcc-cmac-eaes-256", S390_FEAT_TYPE_PCC, 20, "PCC Compute-Last-Block-CMAC-Using-AES-256"), - FEAT_INIT("pcc-cmac-eaes-128", S390_FEAT_TYPE_PCC, 26, "PCC Compute-Last-Block-CMAC-Using-Encrypted-AES-128"), - FEAT_INIT("pcc-cmac-eaes-192", S390_FEAT_TYPE_PCC, 27, "PCC Compute-Last-Block-CMAC-Using-Encrypted-AES-192"), - FEAT_INIT("pcc-cmac-eaes-256", S390_FEAT_TYPE_PCC, 28, "PCC Compute-Last-Block-CMAC-Using-Encrypted-AES-256"), - FEAT_INIT("pcc-xts-aes-128", S390_FEAT_TYPE_PCC, 50, "PCC Compute-XTS-Parameter-Using-AES-128"), - FEAT_INIT("pcc-xts-aes-256", S390_FEAT_TYPE_PCC, 52, "PCC Compute-XTS-Parameter-Using-AES-256"), - FEAT_INIT("pcc-xts-eaes-128", S390_FEAT_TYPE_PCC, 58, "PCC Compute-XTS-Parameter-Using-Encrypted-AES-128"), - FEAT_INIT("pcc-xts-eaes-256", S390_FEAT_TYPE_PCC, 60, "PCC Compute-XTS-Parameter-Using-Encrypted-AES-256"), - FEAT_INIT("pcc-scalar-mult-p256", S390_FEAT_TYPE_PCC, 64, "PCC Scalar-Multiply-P256"), - FEAT_INIT("pcc-scalar-mult-p384", S390_FEAT_TYPE_PCC, 65, "PCC Scalar-Multiply-P384"), - FEAT_INIT("pcc-scalar-mult-p521", S390_FEAT_TYPE_PCC, 66, "PCC Scalar-Multiply-P521"), - FEAT_INIT("pcc-scalar-mult-ed25519", S390_FEAT_TYPE_PCC, 72, "PCC Scalar-Multiply-Ed25519"), - FEAT_INIT("pcc-scalar-mult-ed448", S390_FEAT_TYPE_PCC, 73, "PCC Scalar-Multiply-Ed448"), - FEAT_INIT("pcc-scalar-mult-x25519", S390_FEAT_TYPE_PCC, 80, "PCC Scalar-Multiply-X25519"), - FEAT_INIT("pcc-scalar-mult-x448", S390_FEAT_TYPE_PCC, 81, "PCC Scalar-Multiply-X448"), - - FEAT_INIT("ppno-sha-512-drng", S390_FEAT_TYPE_PPNO, 3, "PPNO SHA-512-DRNG"), - FEAT_INIT("prno-trng-qrtcr", S390_FEAT_TYPE_PPNO, 112, "PRNO TRNG-Query-Raw-to-Conditioned-Ratio"), - FEAT_INIT("prno-trng", S390_FEAT_TYPE_PPNO, 114, "PRNO TRNG"), - - FEAT_INIT("kma-gcm-aes-128", S390_FEAT_TYPE_KMA, 18, "KMA GCM-AES-128"), - FEAT_INIT("kma-gcm-aes-192", S390_FEAT_TYPE_KMA, 19, "KMA GCM-AES-192"), - FEAT_INIT("kma-gcm-aes-256", S390_FEAT_TYPE_KMA, 20, "KMA GCM-AES-256"), - FEAT_INIT("kma-gcm-eaes-128", S390_FEAT_TYPE_KMA, 26, "KMA GCM-Encrypted-AES-128"), - FEAT_INIT("kma-gcm-eaes-192", S390_FEAT_TYPE_KMA, 27, "KMA GCM-Encrypted-AES-192"), - FEAT_INIT("kma-gcm-eaes-256", S390_FEAT_TYPE_KMA, 28, "KMA GCM-Encrypted-AES-256"), - - FEAT_INIT("kdsa-ecdsa-verify-p256", S390_FEAT_TYPE_KDSA, 1, "KDSA ECDSA-Verify-P256"), - FEAT_INIT("kdsa-ecdsa-verify-p384", S390_FEAT_TYPE_KDSA, 2, "KDSA ECDSA-Verify-P384"), - FEAT_INIT("kdsa-ecdsa-verify-p521", S390_FEAT_TYPE_KDSA, 3, "KDSA ECDSA-Verify-P521"), - FEAT_INIT("kdsa-ecdsa-sign-p256", S390_FEAT_TYPE_KDSA, 9, "KDSA ECDSA-Sign-P256"), - FEAT_INIT("kdsa-ecdsa-sign-p384", S390_FEAT_TYPE_KDSA, 10, "KDSA ECDSA-Sign-P384"), - FEAT_INIT("kdsa-ecdsa-sign-p521", S390_FEAT_TYPE_KDSA, 11, "KDSA ECDSA-Sign-P521"), - FEAT_INIT("kdsa-eecdsa-sign-p256", S390_FEAT_TYPE_KDSA, 17, "KDSA Encrypted-ECDSA-Sign-P256"), - FEAT_INIT("kdsa-eecdsa-sign-p384", S390_FEAT_TYPE_KDSA, 18, "KDSA Encrypted-ECDSA-Sign-P384"), - FEAT_INIT("kdsa-eecdsa-sign-p521", S390_FEAT_TYPE_KDSA, 19, "KDSA Encrypted-ECDSA-Sign-P521"), - FEAT_INIT("kdsa-eddsa-verify-ed25519", S390_FEAT_TYPE_KDSA, 32, "KDSA EdDSA-Verify-Ed25519"), - FEAT_INIT("kdsa-eddsa-verify-ed448", S390_FEAT_TYPE_KDSA, 36, "KDSA EdDSA-Verify-Ed448"), - FEAT_INIT("kdsa-eddsa-sign-ed25519", S390_FEAT_TYPE_KDSA, 40, "KDSA EdDSA-Sign-Ed25519"), - FEAT_INIT("kdsa-eddsa-sign-ed448", S390_FEAT_TYPE_KDSA, 44, "KDSA EdDSA-Sign-Ed448"), - FEAT_INIT("kdsa-eeddsa-sign-ed25519", S390_FEAT_TYPE_KDSA, 48, "KDSA Encrypted-EdDSA-Sign-Ed25519"), - FEAT_INIT("kdsa-eeddsa-sign-ed448", S390_FEAT_TYPE_KDSA, 52, "KDSA Encrypted-EdDSA-Sign-Ed448"), - - FEAT_INIT("sortl-sflr", S390_FEAT_TYPE_SORTL, 1, "SORTL SFLR"), - FEAT_INIT("sortl-svlr", S390_FEAT_TYPE_SORTL, 2, "SORTL SVLR"), - FEAT_INIT("sortl-32", S390_FEAT_TYPE_SORTL, 130, "SORTL 32 input lists"), - FEAT_INIT("sortl-128", S390_FEAT_TYPE_SORTL, 132, "SORTL 128 input lists"), - FEAT_INIT("sortl-f0", S390_FEAT_TYPE_SORTL, 192, "SORTL format 0 parameter-block"), - - FEAT_INIT("dfltcc-gdht", S390_FEAT_TYPE_DFLTCC, 1, "DFLTCC GDHT"), - FEAT_INIT("dfltcc-cmpr", S390_FEAT_TYPE_DFLTCC, 2, "DFLTCC CMPR"), - FEAT_INIT("dfltcc-xpnd", S390_FEAT_TYPE_DFLTCC, 4, "DFLTCC XPND"), - FEAT_INIT("dfltcc-f0", S390_FEAT_TYPE_DFLTCC, 192, "DFLTCC format 0 parameter-block"), +#define DEF_FEAT(_FEAT, _NAME, _TYPE, _BIT, _DESC) \ + [S390_FEAT_##_FEAT] = { \ + .name = _NAME, \ + .type = S390_FEAT_TYPE_##_TYPE, \ + .bit = _BIT, \ + .desc = _DESC, \ + }, +static const S390FeatDef s390_features[S390_FEAT_MAX] = { + #include "cpu_features_def.inc.h" }; +#undef DEF_FEAT const S390FeatDef *s390_feat_def(S390Feat feat) { diff --git a/target/s390x/cpu_features_def.h b/target/s390x/cpu_features_def.h index 292b17b35d..412d356feb 100644 --- a/target/s390x/cpu_features_def.h +++ b/target/s390x/cpu_features_def.h @@ -2,9 +2,10 @@ * CPU features/facilities for s390 * * Copyright IBM Corp. 2016, 2018 + * Copyright Red Hat, Inc. 2019 * * Author(s): Michael Mueller <mimu@linux.vnet.ibm.com> - * David Hildenbrand <dahi@linux.vnet.ibm.com> + * David Hildenbrand <david@redhat.com> * * This work is licensed under the terms of the GNU GPL, version 2 or (at * your option) any later version. See the COPYING file in the top-level @@ -14,354 +15,11 @@ #ifndef TARGET_S390X_CPU_FEATURES_DEF_H #define TARGET_S390X_CPU_FEATURES_DEF_H +#define DEF_FEAT(_FEAT, ...) S390_FEAT_##_FEAT, typedef enum { - /* Stfle */ - S390_FEAT_ESAN3 = 0, - S390_FEAT_ZARCH, - S390_FEAT_DAT_ENH, - S390_FEAT_IDTE_SEGMENT, - S390_FEAT_IDTE_REGION, - S390_FEAT_ASN_LX_REUSE, - S390_FEAT_STFLE, - S390_FEAT_EDAT, - S390_FEAT_SENSE_RUNNING_STATUS, - S390_FEAT_CONDITIONAL_SSKE, - S390_FEAT_CONFIGURATION_TOPOLOGY, - S390_FEAT_AP_QUERY_CONFIG_INFO, - S390_FEAT_IPTE_RANGE, - S390_FEAT_NONQ_KEY_SETTING, - S390_FEAT_AP_FACILITIES_TEST, - S390_FEAT_EXTENDED_TRANSLATION_2, - S390_FEAT_MSA, - S390_FEAT_LONG_DISPLACEMENT, - S390_FEAT_LONG_DISPLACEMENT_FAST, - S390_FEAT_HFP_MADDSUB, - S390_FEAT_EXTENDED_IMMEDIATE, - S390_FEAT_EXTENDED_TRANSLATION_3, - S390_FEAT_HFP_UNNORMALIZED_EXT, - S390_FEAT_ETF2_ENH, - S390_FEAT_STORE_CLOCK_FAST, - S390_FEAT_PARSING_ENH, - S390_FEAT_MOVE_WITH_OPTIONAL_SPEC, - S390_FEAT_TOD_CLOCK_STEERING, - S390_FEAT_ETF3_ENH, - S390_FEAT_EXTRACT_CPU_TIME, - S390_FEAT_COMPARE_AND_SWAP_AND_STORE, - S390_FEAT_COMPARE_AND_SWAP_AND_STORE_2, - S390_FEAT_GENERAL_INSTRUCTIONS_EXT, - S390_FEAT_EXECUTE_EXT, - S390_FEAT_ENHANCED_MONITOR, - S390_FEAT_FLOATING_POINT_EXT, - S390_FEAT_ORDER_PRESERVING_COMPRESSION, - S390_FEAT_SET_PROGRAM_PARAMETERS, - S390_FEAT_FLOATING_POINT_SUPPPORT_ENH, - S390_FEAT_DFP, - S390_FEAT_DFP_FAST, - S390_FEAT_PFPO, - S390_FEAT_STFLE_45, - S390_FEAT_CMPSC_ENH, - S390_FEAT_DFP_ZONED_CONVERSION, - S390_FEAT_STFLE_49, - S390_FEAT_CONSTRAINT_TRANSACTIONAL_EXE, - S390_FEAT_LOCAL_TLB_CLEARING, - S390_FEAT_INTERLOCKED_ACCESS_2, - S390_FEAT_STFLE_53, - S390_FEAT_ENTROPY_ENC_COMP, - S390_FEAT_MSA_EXT_5, - S390_FEAT_MISC_INSTRUCTION_EXT, - S390_FEAT_SEMAPHORE_ASSIST, - S390_FEAT_TIME_SLICE_INSTRUMENTATION, - S390_FEAT_MISC_INSTRUCTION_EXT3, - S390_FEAT_RUNTIME_INSTRUMENTATION, - S390_FEAT_ZPCI, - S390_FEAT_ADAPTER_EVENT_NOTIFICATION, - S390_FEAT_ADAPTER_INT_SUPPRESSION, - S390_FEAT_TRANSACTIONAL_EXE, - S390_FEAT_STORE_HYPERVISOR_INFO, - S390_FEAT_ACCESS_EXCEPTION_FS_INDICATION, - S390_FEAT_MSA_EXT_3, - S390_FEAT_MSA_EXT_4, - S390_FEAT_EDAT_2, - S390_FEAT_DFP_PACKED_CONVERSION, - S390_FEAT_PPA15, - S390_FEAT_BPB, - S390_FEAT_VECTOR, - S390_FEAT_INSTRUCTION_EXEC_PROT, - S390_FEAT_SIDE_EFFECT_ACCESS_ESOP2, - S390_FEAT_GUARDED_STORAGE, - S390_FEAT_VECTOR_PACKED_DECIMAL, - S390_FEAT_VECTOR_ENH, - S390_FEAT_MULTIPLE_EPOCH, - S390_FEAT_TEST_PENDING_EXT_INTERRUPTION, - S390_FEAT_INSERT_REFERENCE_BITS_MULT, - S390_FEAT_MSA_EXT_8, - S390_FEAT_CMM_NT, - S390_FEAT_VECTOR_ENH2, - S390_FEAT_ESORT_BASE, - S390_FEAT_DEFLATE_BASE, - S390_FEAT_VECTOR_BCD_ENH, - S390_FEAT_MSA_EXT_9, - S390_FEAT_ETOKEN, - - /* Sclp Conf Char */ - S390_FEAT_SIE_GSLS, - S390_FEAT_ESOP, - S390_FEAT_HPMA2, - S390_FEAT_SIE_KSS, - - /* Sclp Conf Char Ext */ - S390_FEAT_SIE_64BSCAO, - S390_FEAT_SIE_CMMA, - S390_FEAT_SIE_PFMFI, - S390_FEAT_SIE_IBS, - - /* Sclp Cpu */ - S390_FEAT_SIE_F2, - S390_FEAT_SIE_SKEY, - S390_FEAT_SIE_GPERE, - S390_FEAT_SIE_SIIF, - S390_FEAT_SIE_SIGPIF, - S390_FEAT_SIE_IB, - S390_FEAT_SIE_CEI, - - /* Misc */ - S390_FEAT_DAT_ENH_2, - S390_FEAT_CMM, - S390_FEAT_AP, - - /* PLO */ - S390_FEAT_PLO_CL, - S390_FEAT_PLO_CLG, - S390_FEAT_PLO_CLGR, - S390_FEAT_PLO_CLX, - S390_FEAT_PLO_CS, - S390_FEAT_PLO_CSG, - S390_FEAT_PLO_CSGR, - S390_FEAT_PLO_CSX, - S390_FEAT_PLO_DCS, - S390_FEAT_PLO_DCSG, - S390_FEAT_PLO_DCSGR, - S390_FEAT_PLO_DCSX, - S390_FEAT_PLO_CSST, - S390_FEAT_PLO_CSSTG, - S390_FEAT_PLO_CSSTGR, - S390_FEAT_PLO_CSSTX, - S390_FEAT_PLO_CSDST, - S390_FEAT_PLO_CSDSTG, - S390_FEAT_PLO_CSDSTGR, - S390_FEAT_PLO_CSDSTX, - S390_FEAT_PLO_CSTST, - S390_FEAT_PLO_CSTSTG, - S390_FEAT_PLO_CSTSTGR, - S390_FEAT_PLO_CSTSTX, - - /* PTFF */ - S390_FEAT_PTFF_QTO, - S390_FEAT_PTFF_QSI, - S390_FEAT_PTFF_QPT, - S390_FEAT_PTFF_QUI, - S390_FEAT_PTFF_QTOU, - S390_FEAT_PTFF_QSIE, - S390_FEAT_PTFF_QTOUE, - S390_FEAT_PTFF_STO, - S390_FEAT_PTFF_STOU, - S390_FEAT_PTFF_STOE, - S390_FEAT_PTFF_STOUE, - - /* KMAC */ - S390_FEAT_KMAC_DEA, - S390_FEAT_KMAC_TDEA_128, - S390_FEAT_KMAC_TDEA_192, - S390_FEAT_KMAC_EDEA, - S390_FEAT_KMAC_ETDEA_128, - S390_FEAT_KMAC_ETDEA_192, - S390_FEAT_KMAC_AES_128, - S390_FEAT_KMAC_AES_192, - S390_FEAT_KMAC_AES_256, - S390_FEAT_KMAC_EAES_128, - S390_FEAT_KMAC_EAES_192, - S390_FEAT_KMAC_EAES_256, - - /* KMC */ - S390_FEAT_KMC_DEA, - S390_FEAT_KMC_TDEA_128, - S390_FEAT_KMC_TDEA_192, - S390_FEAT_KMC_EDEA, - S390_FEAT_KMC_ETDEA_128, - S390_FEAT_KMC_ETDEA_192, - S390_FEAT_KMC_AES_128, - S390_FEAT_KMC_AES_192, - S390_FEAT_KMC_AES_256, - S390_FEAT_KMC_EAES_128, - S390_FEAT_KMC_EAES_192, - S390_FEAT_KMC_EAES_256, - S390_FEAT_KMC_PRNG, - - /* KM */ - S390_FEAT_KM_DEA, - S390_FEAT_KM_TDEA_128, - S390_FEAT_KM_TDEA_192, - S390_FEAT_KM_EDEA, - S390_FEAT_KM_ETDEA_128, - S390_FEAT_KM_ETDEA_192, - S390_FEAT_KM_AES_128, - S390_FEAT_KM_AES_192, - S390_FEAT_KM_AES_256, - S390_FEAT_KM_EAES_128, - S390_FEAT_KM_EAES_192, - S390_FEAT_KM_EAES_256, - S390_FEAT_KM_XTS_AES_128, - S390_FEAT_KM_XTS_AES_256, - S390_FEAT_KM_XTS_EAES_128, - S390_FEAT_KM_XTS_EAES_256, - - /* KIMD */ - S390_FEAT_KIMD_SHA_1, - S390_FEAT_KIMD_SHA_256, - S390_FEAT_KIMD_SHA_512, - S390_FEAT_KIMD_SHA3_224, - S390_FEAT_KIMD_SHA3_256, - S390_FEAT_KIMD_SHA3_384, - S390_FEAT_KIMD_SHA3_512, - S390_FEAT_KIMD_SHAKE_128, - S390_FEAT_KIMD_SHAKE_256, - S390_FEAT_KIMD_GHASH, - - /* KLMD */ - S390_FEAT_KLMD_SHA_1, - S390_FEAT_KLMD_SHA_256, - S390_FEAT_KLMD_SHA_512, - S390_FEAT_KLMD_SHA3_224, - S390_FEAT_KLMD_SHA3_256, - S390_FEAT_KLMD_SHA3_384, - S390_FEAT_KLMD_SHA3_512, - S390_FEAT_KLMD_SHAKE_128, - S390_FEAT_KLMD_SHAKE_256, - - /* PCKMO */ - S390_FEAT_PCKMO_EDEA, - S390_FEAT_PCKMO_ETDEA_128, - S390_FEAT_PCKMO_ETDEA_256, - S390_FEAT_PCKMO_AES_128, - S390_FEAT_PCKMO_AES_192, - S390_FEAT_PCKMO_AES_256, - S390_FEAT_PCKMO_ECC_P256, - S390_FEAT_PCKMO_ECC_P384, - S390_FEAT_PCKMO_ECC_P521, - S390_FEAT_PCKMO_ECC_ED25519, - S390_FEAT_PCKMO_ECC_ED448, - - /* KMCTR */ - S390_FEAT_KMCTR_DEA, - S390_FEAT_KMCTR_TDEA_128, - S390_FEAT_KMCTR_TDEA_192, - S390_FEAT_KMCTR_EDEA, - S390_FEAT_KMCTR_ETDEA_128, - S390_FEAT_KMCTR_ETDEA_192, - S390_FEAT_KMCTR_AES_128, - S390_FEAT_KMCTR_AES_192, - S390_FEAT_KMCTR_AES_256, - S390_FEAT_KMCTR_EAES_128, - S390_FEAT_KMCTR_EAES_192, - S390_FEAT_KMCTR_EAES_256, - - /* KMF */ - S390_FEAT_KMF_DEA, - S390_FEAT_KMF_TDEA_128, - S390_FEAT_KMF_TDEA_192, - S390_FEAT_KMF_EDEA, - S390_FEAT_KMF_ETDEA_128, - S390_FEAT_KMF_ETDEA_192, - S390_FEAT_KMF_AES_128, - S390_FEAT_KMF_AES_192, - S390_FEAT_KMF_AES_256, - S390_FEAT_KMF_EAES_128, - S390_FEAT_KMF_EAES_192, - S390_FEAT_KMF_EAES_256, - - /* KMO */ - S390_FEAT_KMO_DEA, - S390_FEAT_KMO_TDEA_128, - S390_FEAT_KMO_TDEA_192, - S390_FEAT_KMO_EDEA, - S390_FEAT_KMO_ETDEA_128, - S390_FEAT_KMO_ETDEA_192, - S390_FEAT_KMO_AES_128, - S390_FEAT_KMO_AES_192, - S390_FEAT_KMO_AES_256, - S390_FEAT_KMO_EAES_128, - S390_FEAT_KMO_EAES_192, - S390_FEAT_KMO_EAES_256, - - /* PCC */ - S390_FEAT_PCC_CMAC_DEA, - S390_FEAT_PCC_CMAC_TDEA_128, - S390_FEAT_PCC_CMAC_TDEA_192, - S390_FEAT_PCC_CMAC_ETDEA_128, - S390_FEAT_PCC_CMAC_ETDEA_192, - S390_FEAT_PCC_CMAC_TDEA, - S390_FEAT_PCC_CMAC_AES_128, - S390_FEAT_PCC_CMAC_AES_192, - S390_FEAT_PCC_CMAC_AES_256, - S390_FEAT_PCC_CMAC_EAES_128, - S390_FEAT_PCC_CMAC_EAES_192, - S390_FEAT_PCC_CMAC_EAES_256, - S390_FEAT_PCC_XTS_AES_128, - S390_FEAT_PCC_XTS_AES_256, - S390_FEAT_PCC_XTS_EAES_128, - S390_FEAT_PCC_XTS_EAES_256, - S390_FEAT_PCC_SCALAR_MULT_P256, - S390_FEAT_PCC_SCALAR_MULT_P384, - S390_FEAT_PCC_SCALAR_MULT_P512, - S390_FEAT_PCC_SCALAR_MULT_ED25519, - S390_FEAT_PCC_SCALAR_MULT_ED448, - S390_FEAT_PCC_SCALAR_MULT_X25519, - S390_FEAT_PCC_SCALAR_MULT_X448, - - /* PPNO/PRNO */ - S390_FEAT_PPNO_SHA_512_DRNG, - S390_FEAT_PRNO_TRNG_QRTCR, - S390_FEAT_PRNO_TRNG, - - /* KMA */ - S390_FEAT_KMA_GCM_AES_128, - S390_FEAT_KMA_GCM_AES_192, - S390_FEAT_KMA_GCM_AES_256 , - S390_FEAT_KMA_GCM_EAES_128, - S390_FEAT_KMA_GCM_EAES_192, - S390_FEAT_KMA_GCM_EAES_256, - - /* KDSA */ - S390_FEAT_ECDSA_VERIFY_P256, - S390_FEAT_ECDSA_VERIFY_P384, - S390_FEAT_ECDSA_VERIFY_P512, - S390_FEAT_ECDSA_SIGN_P256, - S390_FEAT_ECDSA_SIGN_P384, - S390_FEAT_ECDSA_SIGN_P512, - S390_FEAT_EECDSA_SIGN_P256, - S390_FEAT_EECDSA_SIGN_P384, - S390_FEAT_EECDSA_SIGN_P512, - S390_FEAT_EDDSA_VERIFY_ED25519, - S390_FEAT_EDDSA_VERIFY_ED448, - S390_FEAT_EDDSA_SIGN_ED25519, - S390_FEAT_EDDSA_SIGN_ED448, - S390_FEAT_EEDDSA_SIGN_ED25519, - S390_FEAT_EEDDSA_SIGN_ED448, - - /* SORTL */ - S390_FEAT_SORTL_SFLR, - S390_FEAT_SORTL_SVLR, - S390_FEAT_SORTL_32, - S390_FEAT_SORTL_128, - S390_FEAT_SORTL_F0, - - /* DEFLATE */ - S390_FEAT_DEFLATE_GHDT, - S390_FEAT_DEFLATE_CMPR, - S390_FEAT_DEFLATE_XPND, - S390_FEAT_DEFLATE_F0, - + #include "cpu_features_def.inc.h" S390_FEAT_MAX, } S390Feat; +#undef DEF_FEAT #endif /* TARGET_S390X_CPU_FEATURES_DEF_H */ diff --git a/target/s390x/cpu_features_def.inc.h b/target/s390x/cpu_features_def.inc.h new file mode 100644 index 0000000000..c20c780f2e --- /dev/null +++ b/target/s390x/cpu_features_def.inc.h @@ -0,0 +1,369 @@ +/* + * RAW s390x CPU feature definitions: + * + * DEF_FEAT(_FEAT, _NAME, _TYPE, _BIT, _DESC): + * - _FEAT: Feature (enum) name used internally (S390_FEAT_##_FEAT) + * - _NAME: Feature name exposed to the user. + * - _TYPE: Feature type (S390_FEAT_TYPE_##_TYPE). + * - _BIT: Feature bit number within feature type block (unused for MISC). + * - _DESC: Feature description, exposed to the user. + * + * Copyright IBM Corp. 2016, 2018 + * Copyright Red Hat, Inc. 2019 + * + * Author(s): Michael Mueller <mimu@linux.vnet.ibm.com> + * David Hildenbrand <david@redhat.com> + * + * This work is licensed under the terms of the GNU GPL, version 2 or (at + * your option) any later version. See the COPYING file in the top-level + * directory. + */ + +/* Features exposed via the STFL(E) instruction. */ +DEF_FEAT(ESAN3, "esan3", STFL, 0, "Instructions marked as n3") +DEF_FEAT(ZARCH, "zarch", STFL, 1, "z/Architecture architectural mode") +DEF_FEAT(DAT_ENH, "dateh", STFL, 3, "DAT-enhancement facility") +DEF_FEAT(IDTE_SEGMENT, "idtes", STFL, 4, "IDTE selective TLB segment-table clearing") +DEF_FEAT(IDTE_REGION, "idter", STFL, 5, "IDTE selective TLB region-table clearing") +DEF_FEAT(ASN_LX_REUSE, "asnlxr", STFL, 6, "ASN-and-LX reuse facility") +DEF_FEAT(STFLE, "stfle", STFL, 7, "Store-facility-list-extended facility") +DEF_FEAT(EDAT, "edat", STFL, 8, "Enhanced-DAT facility") +DEF_FEAT(SENSE_RUNNING_STATUS, "srs", STFL, 9, "Sense-running-status facility") +DEF_FEAT(CONDITIONAL_SSKE, "csske", STFL, 10, "Conditional-SSKE facility") +DEF_FEAT(CONFIGURATION_TOPOLOGY, "ctop", STFL, 11, "Configuration-topology facility") +DEF_FEAT(AP_QUERY_CONFIG_INFO, "apqci", STFL, 12, "Query AP Configuration Information facility") +DEF_FEAT(IPTE_RANGE, "ipter", STFL, 13, "IPTE-range facility") +DEF_FEAT(NONQ_KEY_SETTING, "nonqks", STFL, 14, "Nonquiescing key-setting facility") +DEF_FEAT(AP_FACILITIES_TEST, "apft", STFL, 15, "AP Facilities Test facility") +DEF_FEAT(EXTENDED_TRANSLATION_2, "etf2", STFL, 16, "Extended-translation facility 2") +DEF_FEAT(MSA, "msa-base", STFL, 17, "Message-security-assist facility (excluding subfunctions)") +DEF_FEAT(LONG_DISPLACEMENT, "ldisp", STFL, 18, "Long-displacement facility") +DEF_FEAT(LONG_DISPLACEMENT_FAST, "ldisphp", STFL, 19, "Long-displacement facility has high performance") +DEF_FEAT(HFP_MADDSUB, "hfpm", STFL, 20, "HFP-multiply-add/subtract facility") +DEF_FEAT(EXTENDED_IMMEDIATE, "eimm", STFL, 21, "Extended-immediate facility") +DEF_FEAT(EXTENDED_TRANSLATION_3, "etf3", STFL, 22, "Extended-translation facility 3") +DEF_FEAT(HFP_UNNORMALIZED_EXT, "hfpue", STFL, 23, "HFP-unnormalized-extension facility") +DEF_FEAT(ETF2_ENH, "etf2eh", STFL, 24, "ETF2-enhancement facility") +DEF_FEAT(STORE_CLOCK_FAST, "stckf", STFL, 25, "Store-clock-fast facility") +DEF_FEAT(PARSING_ENH, "parseh", STFL, 26, "Parsing-enhancement facility") +DEF_FEAT(MOVE_WITH_OPTIONAL_SPEC, "mvcos", STFL, 27, "Move-with-optional-specification facility") +DEF_FEAT(TOD_CLOCK_STEERING, "tods-base", STFL, 28, "TOD-clock-steering facility (excluding subfunctions)") +DEF_FEAT(ETF3_ENH, "etf3eh", STFL, 30, "ETF3-enhancement facility") +DEF_FEAT(EXTRACT_CPU_TIME, "ectg", STFL, 31, "Extract-CPU-time facility") +DEF_FEAT(COMPARE_AND_SWAP_AND_STORE, "csst", STFL, 32, "Compare-and-swap-and-store facility") +DEF_FEAT(COMPARE_AND_SWAP_AND_STORE_2, "csst2", STFL, 33, "Compare-and-swap-and-store facility 2") +DEF_FEAT(GENERAL_INSTRUCTIONS_EXT, "ginste", STFL, 34, "General-instructions-extension facility") +DEF_FEAT(EXECUTE_EXT, "exrl", STFL, 35, "Execute-extensions facility") +DEF_FEAT(ENHANCED_MONITOR, "emon", STFL, 36, "Enhanced-monitor facility") +DEF_FEAT(FLOATING_POINT_EXT, "fpe", STFL, 37, "Floating-point extension facility") +DEF_FEAT(ORDER_PRESERVING_COMPRESSION, "opc", STFL, 38, "Order Preserving Compression facility") +DEF_FEAT(SET_PROGRAM_PARAMETERS, "sprogp", STFL, 40, "Set-program-parameters facility") +DEF_FEAT(FLOATING_POINT_SUPPPORT_ENH, "fpseh", STFL, 41, "Floating-point-support-enhancement facilities") +DEF_FEAT(DFP, "dfp", STFL, 42, "DFP (decimal-floating-point) facility") +DEF_FEAT(DFP_FAST, "dfphp", STFL, 43, "DFP (decimal-floating-point) facility has high performance") +DEF_FEAT(PFPO, "pfpo", STFL, 44, "PFPO instruction") +DEF_FEAT(STFLE_45, "stfle45", STFL, 45, "Various facilities introduced with z196") +DEF_FEAT(CMPSC_ENH, "cmpsceh", STFL, 47, "CMPSC-enhancement facility") +DEF_FEAT(DFP_ZONED_CONVERSION, "dfpzc", STFL, 48, "Decimal-floating-point zoned-conversion facility") +DEF_FEAT(STFLE_49, "stfle49", STFL, 49, "Various facilities introduced with zEC12") +DEF_FEAT(CONSTRAINT_TRANSACTIONAL_EXE, "cte", STFL, 50, "Constrained transactional-execution facility") +DEF_FEAT(LOCAL_TLB_CLEARING, "ltlbc", STFL, 51, "Local-TLB-clearing facility") +DEF_FEAT(INTERLOCKED_ACCESS_2, "iacc2", STFL, 52, "Interlocked-access facility 2") +DEF_FEAT(STFLE_53, "stfle53", STFL, 53, "Various facilities introduced with z13") +DEF_FEAT(ENTROPY_ENC_COMP, "eec", STFL, 54, "Entropy encoding compression facility") +DEF_FEAT(MSA_EXT_5, "msa5-base", STFL, 57, "Message-security-assist-extension-5 facility (excluding subfunctions)") +DEF_FEAT(MISC_INSTRUCTION_EXT, "minste2", STFL, 58, "Miscellaneous-instruction-extensions facility 2") +DEF_FEAT(SEMAPHORE_ASSIST, "sema", STFL, 59, "Semaphore-assist facility") +DEF_FEAT(TIME_SLICE_INSTRUMENTATION, "tsi", STFL, 60, "Time-slice Instrumentation facility") +DEF_FEAT(MISC_INSTRUCTION_EXT3, "minste3", STFL, 61, "Miscellaneous-Instruction-Extensions Facility 3") +DEF_FEAT(RUNTIME_INSTRUMENTATION, "ri", STFL, 64, "CPU runtime-instrumentation facility") +DEF_FEAT(ZPCI, "zpci", STFL, 69, "z/PCI facility") +DEF_FEAT(ADAPTER_EVENT_NOTIFICATION, "aen", STFL, 71, "General-purpose-adapter-event-notification facility") +DEF_FEAT(ADAPTER_INT_SUPPRESSION, "ais", STFL, 72, "General-purpose-adapter-interruption-suppression facility") +DEF_FEAT(TRANSACTIONAL_EXE, "te", STFL, 73, "Transactional-execution facility") +DEF_FEAT(STORE_HYPERVISOR_INFO, "sthyi", STFL, 74, "Store-hypervisor-information facility") +DEF_FEAT(ACCESS_EXCEPTION_FS_INDICATION, "aefsi", STFL, 75, "Access-exception-fetch/store-indication facility") +DEF_FEAT(MSA_EXT_3, "msa3-base", STFL, 76, "Message-security-assist-extension-3 facility (excluding subfunctions)") +DEF_FEAT(MSA_EXT_4, "msa4-base", STFL, 77, "Message-security-assist-extension-4 facility (excluding subfunctions)") +DEF_FEAT(EDAT_2, "edat2", STFL, 78, "Enhanced-DAT facility 2") +DEF_FEAT(DFP_PACKED_CONVERSION, "dfppc", STFL, 80, "Decimal-floating-point packed-conversion facility") +DEF_FEAT(PPA15, "ppa15", STFL, 81, "PPA15 is installed") +DEF_FEAT(BPB, "bpb", STFL, 82, "Branch prediction blocking") +DEF_FEAT(VECTOR, "vx", STFL, 129, "Vector facility") +DEF_FEAT(INSTRUCTION_EXEC_PROT, "iep", STFL, 130, "Instruction-execution-protection facility") +DEF_FEAT(SIDE_EFFECT_ACCESS_ESOP2, "sea_esop2", STFL, 131, "Side-effect-access facility and Enhanced-suppression-on-protection facility 2") +DEF_FEAT(GUARDED_STORAGE, "gs", STFL, 133, "Guarded-storage facility") +DEF_FEAT(VECTOR_PACKED_DECIMAL, "vxpd", STFL, 134, "Vector packed decimal facility") +DEF_FEAT(VECTOR_ENH, "vxeh", STFL, 135, "Vector enhancements facility") +DEF_FEAT(MULTIPLE_EPOCH, "mepoch", STFL, 139, "Multiple-epoch facility") +DEF_FEAT(TEST_PENDING_EXT_INTERRUPTION, "tpei", STFL, 144, "Test-pending-external-interruption facility") +DEF_FEAT(INSERT_REFERENCE_BITS_MULT, "irbm", STFL, 145, "Insert-reference-bits-multiple facility") +DEF_FEAT(MSA_EXT_8, "msa8-base", STFL, 146, "Message-security-assist-extension-8 facility (excluding subfunctions)") +DEF_FEAT(CMM_NT, "cmmnt", STFL, 147, "CMM: ESSA-enhancement (no translate) facility") +DEF_FEAT(VECTOR_ENH2, "vxeh2", STFL, 148, "Vector Enhancements facility 2") +DEF_FEAT(ESORT_BASE, "esort-base", STFL, 150, "Enhanced-sort facility (excluding subfunctions)") +DEF_FEAT(DEFLATE_BASE, "deflate-base", STFL, 151, "Deflate-conversion facility (excluding subfunctions)") +DEF_FEAT(VECTOR_BCD_ENH, "vxbeh", STFL, 152, "Vector BCD enhancements facility 1") +DEF_FEAT(MSA_EXT_9, "msa9-base", STFL, 155, "Message-security-assist-extension-9 facility (excluding subfunctions)") +DEF_FEAT(ETOKEN, "etoken", STFL, 156, "Etoken facility") + +/* Features exposed via SCLP SCCB Byte 80 - 98 (bit numbers relative to byte-80) */ +DEF_FEAT(SIE_GSLS, "gsls", SCLP_CONF_CHAR, 40, "SIE: Guest-storage-limit-suppression facility") +DEF_FEAT(ESOP, "esop", SCLP_CONF_CHAR, 46, "Enhanced-suppression-on-protection facility") +DEF_FEAT(HPMA2, "hpma2", SCLP_CONF_CHAR, 90, "Host page management assist 2 Facility") /* 91-2 */ +DEF_FEAT(SIE_KSS, "kss", SCLP_CONF_CHAR, 151, "SIE: Keyless-subset facility") /* 98-7 */ + +/* Features exposed via SCLP SCCB Byte 116 - 119 (bit numbers relative to byte-116) */ +DEF_FEAT(SIE_64BSCAO, "64bscao", SCLP_CONF_CHAR_EXT, 0, "SIE: 64-bit-SCAO facility") +DEF_FEAT(SIE_CMMA, "cmma", SCLP_CONF_CHAR_EXT, 1, "SIE: Collaborative-memory-management assist") +DEF_FEAT(SIE_PFMFI, "pfmfi", SCLP_CONF_CHAR_EXT, 9, "SIE: PFMF interpretation facility") +DEF_FEAT(SIE_IBS, "ibs", SCLP_CONF_CHAR_EXT, 10, "SIE: Interlock-and-broadcast-suppression facility") + +/* Features exposed via SCLP CPU info. */ +DEF_FEAT(SIE_F2, "sief2", SCLP_CPU, 4, "SIE: interception format 2 (Virtual SIE)") +DEF_FEAT(SIE_SKEY, "skey", SCLP_CPU, 5, "SIE: Storage-key facility") +DEF_FEAT(SIE_GPERE, "gpereh", SCLP_CPU, 10, "SIE: Guest-PER enhancement facility") +DEF_FEAT(SIE_SIIF, "siif", SCLP_CPU, 11, "SIE: Shared IPTE-interlock facility") +DEF_FEAT(SIE_SIGPIF, "sigpif", SCLP_CPU, 12, "SIE: SIGP interpretation facility") +DEF_FEAT(SIE_IB, "ib", SCLP_CPU, 42, "SIE: Intervention bypass facility") +DEF_FEAT(SIE_CEI, "cei", SCLP_CPU, 43, "SIE: Conditional-external-interception facility") + +/* + * Features exposed via no feature bit (but e.g., instruction sensing) + * -> the feature bit number is irrelavant + */ +DEF_FEAT(DAT_ENH_2, "dateh2", MISC, 0, "DAT-enhancement facility 2") +DEF_FEAT(CMM, "cmm", MISC, 0, "Collaborative-memory-management facility") +DEF_FEAT(AP, "ap", MISC, 0, "AP instructions installed") + +/* Features exposed via the PLO instruction. */ +DEF_FEAT(PLO_CL, "plo-cl", PLO, 0, "PLO Compare and load (32 bit in general registers)") +DEF_FEAT(PLO_CLG, "plo-clg", PLO, 1, "PLO Compare and load (64 bit in parameter list)") +DEF_FEAT(PLO_CLGR, "plo-clgr", PLO, 2, "PLO Compare and load (32 bit in general registers)") +DEF_FEAT(PLO_CLX, "plo-clx", PLO, 3, "PLO Compare and load (128 bit in parameter list)") +DEF_FEAT(PLO_CS, "plo-cs", PLO, 4, "PLO Compare and swap (32 bit in general registers)") +DEF_FEAT(PLO_CSG, "plo-csg", PLO, 5, "PLO Compare and swap (64 bit in parameter list)") +DEF_FEAT(PLO_CSGR, "plo-csgr", PLO, 6, "PLO Compare and swap (32 bit in general registers)") +DEF_FEAT(PLO_CSX, "plo-csx", PLO, 7, "PLO Compare and swap (128 bit in parameter list)") +DEF_FEAT(PLO_DCS, "plo-dcs", PLO, 8, "PLO Double compare and swap (32 bit in general registers)") +DEF_FEAT(PLO_DCSG, "plo-dcsg", PLO, 9, "PLO Double compare and swap (64 bit in parameter list)") +DEF_FEAT(PLO_DCSGR, "plo-dcsgr", PLO, 10, "PLO Double compare and swap (32 bit in general registers)") +DEF_FEAT(PLO_DCSX, "plo-dcsx", PLO, 11, "PLO Double compare and swap (128 bit in parameter list)") +DEF_FEAT(PLO_CSST, "plo-csst", PLO, 12, "PLO Compare and swap and store (32 bit in general registers)") +DEF_FEAT(PLO_CSSTG, "plo-csstg", PLO, 13, "PLO Compare and swap and store (64 bit in parameter list)") +DEF_FEAT(PLO_CSSTGR, "plo-csstgr", PLO, 14, "PLO Compare and swap and store (32 bit in general registers)") +DEF_FEAT(PLO_CSSTX, "plo-csstx", PLO, 15, "PLO Compare and swap and store (128 bit in parameter list)") +DEF_FEAT(PLO_CSDST, "plo-csdst", PLO, 16, "PLO Compare and swap and double store (32 bit in general registers)") +DEF_FEAT(PLO_CSDSTG, "plo-csdstg", PLO, 17, "PLO Compare and swap and double store (64 bit in parameter list)") +DEF_FEAT(PLO_CSDSTGR, "plo-csdstgr", PLO, 18, "PLO Compare and swap and double store (32 bit in general registers)") +DEF_FEAT(PLO_CSDSTX, "plo-csdstx", PLO, 19, "PLO Compare and swap and double store (128 bit in parameter list)") +DEF_FEAT(PLO_CSTST, "plo-cstst", PLO, 20, "PLO Compare and swap and triple store (32 bit in general registers)") +DEF_FEAT(PLO_CSTSTG, "plo-cststg", PLO, 21, "PLO Compare and swap and triple store (64 bit in parameter list)") +DEF_FEAT(PLO_CSTSTGR, "plo-cststgr", PLO, 22, "PLO Compare and swap and triple store (32 bit in general registers)") +DEF_FEAT(PLO_CSTSTX, "plo-cststx", PLO, 23, "PLO Compare and swap and triple store (128 bit in parameter list)") + +/* Features exposed via the PTFF instruction. */ +DEF_FEAT(PTFF_QTO, "ptff-qto", PTFF, 1, "PTFF Query TOD Offset") +DEF_FEAT(PTFF_QSI, "ptff-qsi", PTFF, 2, "PTFF Query Steering Information") +DEF_FEAT(PTFF_QPT, "ptff-qpc", PTFF, 3, "PTFF Query Physical Clock") +DEF_FEAT(PTFF_QUI, "ptff-qui", PTFF, 4, "PTFF Query UTC Information") +DEF_FEAT(PTFF_QTOU, "ptff-qtou", PTFF, 5, "PTFF Query TOD Offset User") +DEF_FEAT(PTFF_QSIE, "ptff-qsie", PTFF, 10, "PTFF Query Steering Information Extended") +DEF_FEAT(PTFF_QTOUE, "ptff-qtoue", PTFF, 13, "PTFF Query TOD Offset User Extended") +DEF_FEAT(PTFF_STO, "ptff-sto", PTFF, 65, "PTFF Set TOD Offset") +DEF_FEAT(PTFF_STOU, "ptff-stou", PTFF, 69, "PTFF Set TOD Offset User") +DEF_FEAT(PTFF_STOE, "ptff-stoe", PTFF, 73, "PTFF Set TOD Offset Extended") +DEF_FEAT(PTFF_STOUE, "ptff-stoue", PTFF, 77, "PTFF Set TOD Offset User Extended") + +/* Features exposed via the KMAC instruction. */ +DEF_FEAT(KMAC_DEA, "kmac-dea", KMAC, 1, "KMAC DEA") +DEF_FEAT(KMAC_TDEA_128, "kmac-tdea-128", KMAC, 2, "KMAC TDEA-128") +DEF_FEAT(KMAC_TDEA_192, "kmac-tdea-192", KMAC, 3, "KMAC TDEA-192") +DEF_FEAT(KMAC_EDEA, "kmac-edea", KMAC, 9, "KMAC Encrypted-DEA") +DEF_FEAT(KMAC_ETDEA_128, "kmac-etdea-128", KMAC, 10, "KMAC Encrypted-TDEA-128") +DEF_FEAT(KMAC_ETDEA_192, "kmac-etdea-192", KMAC, 11, "KMAC Encrypted-TDEA-192") +DEF_FEAT(KMAC_AES_128, "kmac-aes-128", KMAC, 18, "KMAC AES-128") +DEF_FEAT(KMAC_AES_192, "kmac-aes-192", KMAC, 19, "KMAC AES-192") +DEF_FEAT(KMAC_AES_256, "kmac-aes-256", KMAC, 20, "KMAC AES-256") +DEF_FEAT(KMAC_EAES_128, "kmac-eaes-128", KMAC, 26, "KMAC Encrypted-AES-128") +DEF_FEAT(KMAC_EAES_192, "kmac-eaes-192", KMAC, 27, "KMAC Encrypted-AES-192") +DEF_FEAT(KMAC_EAES_256, "kmac-eaes-256", KMAC, 28, "KMAC Encrypted-AES-256") + +/* Features exposed via the KMC instruction. */ +DEF_FEAT(KMC_DEA, "kmc-dea", KMC, 1, "KMC DEA") +DEF_FEAT(KMC_TDEA_128, "kmc-tdea-128", KMC, 2, "KMC TDEA-128") +DEF_FEAT(KMC_TDEA_192, "kmc-tdea-192", KMC, 3, "KMC TDEA-192") +DEF_FEAT(KMC_EDEA, "kmc-edea", KMC, 9, "KMC Encrypted-DEA") +DEF_FEAT(KMC_ETDEA_128, "kmc-etdea-128", KMC, 10, "KMC Encrypted-TDEA-128") +DEF_FEAT(KMC_ETDEA_192, "kmc-etdea-192", KMC, 11, "KMC Encrypted-TDEA-192") +DEF_FEAT(KMC_AES_128, "kmc-aes-128", KMC, 18, "KMC AES-128") +DEF_FEAT(KMC_AES_192, "kmc-aes-192", KMC, 19, "KMC AES-192") +DEF_FEAT(KMC_AES_256, "kmc-aes-256", KMC, 20, "KMC AES-256") +DEF_FEAT(KMC_EAES_128, "kmc-eaes-128", KMC, 26, "KMC Encrypted-AES-128") +DEF_FEAT(KMC_EAES_192, "kmc-eaes-192", KMC, 27, "KMC Encrypted-AES-192") +DEF_FEAT(KMC_EAES_256, "kmc-eaes-256", KMC, 28, "KMC Encrypted-AES-256") +DEF_FEAT(KMC_PRNG, "kmc-prng", KMC, 67, "KMC PRNG") + +/* Features exposed via the KM instruction. */ +DEF_FEAT(KM_DEA, "km-dea", KM, 1, "KM DEA") +DEF_FEAT(KM_TDEA_128, "km-tdea-128", KM, 2, "KM TDEA-128") +DEF_FEAT(KM_TDEA_192, "km-tdea-192", KM, 3, "KM TDEA-192") +DEF_FEAT(KM_EDEA, "km-edea", KM, 9, "KM Encrypted-DEA") +DEF_FEAT(KM_ETDEA_128, "km-etdea-128", KM, 10, "KM Encrypted-TDEA-128") +DEF_FEAT(KM_ETDEA_192, "km-etdea-192", KM, 11, "KM Encrypted-TDEA-192") +DEF_FEAT(KM_AES_128, "km-aes-128", KM, 18, "KM AES-128") +DEF_FEAT(KM_AES_192, "km-aes-192", KM, 19, "KM AES-192") +DEF_FEAT(KM_AES_256, "km-aes-256", KM, 20, "KM AES-256") +DEF_FEAT(KM_EAES_128, "km-eaes-128", KM, 26, "KM Encrypted-AES-128") +DEF_FEAT(KM_EAES_192, "km-eaes-192", KM, 27, "KM Encrypted-AES-192") +DEF_FEAT(KM_EAES_256, "km-eaes-256", KM, 28, "KM Encrypted-AES-256") +DEF_FEAT(KM_XTS_AES_128, "km-xts-aes-128", KM, 50, "KM XTS-AES-128") +DEF_FEAT(KM_XTS_AES_256, "km-xts-aes-256", KM, 52, "KM XTS-AES-256") +DEF_FEAT(KM_XTS_EAES_128, "km-xts-eaes-128", KM, 58, "KM XTS-Encrypted-AES-128") +DEF_FEAT(KM_XTS_EAES_256, "km-xts-eaes-256", KM, 60, "KM XTS-Encrypted-AES-256") + +/* Features exposed via the KIMD instruction. */ +DEF_FEAT(KIMD_SHA_1, "kimd-sha-1", KIMD, 1, "KIMD SHA-1") +DEF_FEAT(KIMD_SHA_256, "kimd-sha-256", KIMD, 2, "KIMD SHA-256") +DEF_FEAT(KIMD_SHA_512, "kimd-sha-512", KIMD, 3, "KIMD SHA-512") +DEF_FEAT(KIMD_SHA3_224, "kimd-sha3-224", KIMD, 32, "KIMD SHA3-224") +DEF_FEAT(KIMD_SHA3_256, "kimd-sha3-256", KIMD, 33, "KIMD SHA3-256") +DEF_FEAT(KIMD_SHA3_384, "kimd-sha3-384", KIMD, 34, "KIMD SHA3-384") +DEF_FEAT(KIMD_SHA3_512, "kimd-sha3-512", KIMD, 35, "KIMD SHA3-512") +DEF_FEAT(KIMD_SHAKE_128, "kimd-shake-128", KIMD, 36, "KIMD SHAKE-128") +DEF_FEAT(KIMD_SHAKE_256, "kimd-shake-256", KIMD, 37, "KIMD SHAKE-256") +DEF_FEAT(KIMD_GHASH, "kimd-ghash", KIMD, 65, "KIMD GHASH") + +/* Features exposed via the KLMD instruction. */ +DEF_FEAT(KLMD_SHA_1, "klmd-sha-1", KLMD, 1, "KLMD SHA-1") +DEF_FEAT(KLMD_SHA_256, "klmd-sha-256", KLMD, 2, "KLMD SHA-256") +DEF_FEAT(KLMD_SHA_512, "klmd-sha-512", KLMD, 3, "KLMD SHA-512") +DEF_FEAT(KLMD_SHA3_224, "klmd-sha3-224", KLMD, 32, "KLMD SHA3-224") +DEF_FEAT(KLMD_SHA3_256, "klmd-sha3-256", KLMD, 33, "KLMD SHA3-256") +DEF_FEAT(KLMD_SHA3_384, "klmd-sha3-384", KLMD, 34, "KLMD SHA3-384") +DEF_FEAT(KLMD_SHA3_512, "klmd-sha3-512", KLMD, 35, "KLMD SHA3-512") +DEF_FEAT(KLMD_SHAKE_128, "klmd-shake-128", KLMD, 36, "KLMD SHAKE-128") +DEF_FEAT(KLMD_SHAKE_256, "klmd-shake-256", KLMD, 37, "KLMD SHAKE-256") + +/* Features exposed via the PCKMO instruction. */ +DEF_FEAT(PCKMO_EDEA, "pckmo-edea", PCKMO, 1, "PCKMO Encrypted-DEA-Key") +DEF_FEAT(PCKMO_ETDEA_128, "pckmo-etdea-128", PCKMO, 2, "PCKMO Encrypted-TDEA-128-Key") +DEF_FEAT(PCKMO_ETDEA_256, "pckmo-etdea-192", PCKMO, 3, "PCKMO Encrypted-TDEA-192-Key") +DEF_FEAT(PCKMO_AES_128, "pckmo-aes-128", PCKMO, 18, "PCKMO Encrypted-AES-128-Key") +DEF_FEAT(PCKMO_AES_192, "pckmo-aes-192", PCKMO, 19, "PCKMO Encrypted-AES-192-Key") +DEF_FEAT(PCKMO_AES_256, "pckmo-aes-256", PCKMO, 20, "PCKMO Encrypted-AES-256-Key") +DEF_FEAT(PCKMO_ECC_P256, "pckmo-ecc-p256", PCKMO, 32, "PCKMO Encrypt-ECC-P256-Key") +DEF_FEAT(PCKMO_ECC_P384, "pckmo-ecc-p384", PCKMO, 33, "PCKMO Encrypt-ECC-P384-Key") +DEF_FEAT(PCKMO_ECC_P521, "pckmo-ecc-p521", PCKMO, 34, "PCKMO Encrypt-ECC-P521-Key") +DEF_FEAT(PCKMO_ECC_ED25519, "pckmo-ecc-ed25519", PCKMO, 40 , "PCKMO Encrypt-ECC-Ed25519-Key") +DEF_FEAT(PCKMO_ECC_ED448, "pckmo-ecc-ed448", PCKMO, 41 , "PCKMO Encrypt-ECC-Ed448-Key") + +/* Features exposed via the KMCTR instruction. */ +DEF_FEAT(KMCTR_DEA, "kmctr-dea", KMCTR, 1, "KMCTR DEA") +DEF_FEAT(KMCTR_TDEA_128, "kmctr-tdea-128", KMCTR, 2, "KMCTR TDEA-128") +DEF_FEAT(KMCTR_TDEA_192, "kmctr-tdea-192", KMCTR, 3, "KMCTR TDEA-192") +DEF_FEAT(KMCTR_EDEA, "kmctr-edea", KMCTR, 9, "KMCTR Encrypted-DEA") +DEF_FEAT(KMCTR_ETDEA_128, "kmctr-etdea-128", KMCTR, 10, "KMCTR Encrypted-TDEA-128") +DEF_FEAT(KMCTR_ETDEA_192, "kmctr-etdea-192", KMCTR, 11, "KMCTR Encrypted-TDEA-192") +DEF_FEAT(KMCTR_AES_128, "kmctr-aes-128", KMCTR, 18, "KMCTR AES-128") +DEF_FEAT(KMCTR_AES_192, "kmctr-aes-192", KMCTR, 19, "KMCTR AES-192") +DEF_FEAT(KMCTR_AES_256, "kmctr-aes-256", KMCTR, 20, "KMCTR AES-256") +DEF_FEAT(KMCTR_EAES_128, "kmctr-eaes-128", KMCTR, 26, "KMCTR Encrypted-AES-128") +DEF_FEAT(KMCTR_EAES_192, "kmctr-eaes-192", KMCTR, 27, "KMCTR Encrypted-AES-192") +DEF_FEAT(KMCTR_EAES_256, "kmctr-eaes-256", KMCTR, 28, "KMCTR Encrypted-AES-256") + +/* Features exposed via the KMF instruction. */ +DEF_FEAT(KMF_DEA, "kmf-dea", KMF, 1, "KMF DEA") +DEF_FEAT(KMF_TDEA_128, "kmf-tdea-128", KMF, 2, "KMF TDEA-128") +DEF_FEAT(KMF_TDEA_192, "kmf-tdea-192", KMF, 3, "KMF TDEA-192") +DEF_FEAT(KMF_EDEA, "kmf-edea", KMF, 9, "KMF Encrypted-DEA") +DEF_FEAT(KMF_ETDEA_128, "kmf-etdea-128", KMF, 10, "KMF Encrypted-TDEA-128") +DEF_FEAT(KMF_ETDEA_192, "kmf-etdea-192", KMF, 11, "KMF Encrypted-TDEA-192") +DEF_FEAT(KMF_AES_128, "kmf-aes-128", KMF, 18, "KMF AES-128") +DEF_FEAT(KMF_AES_192, "kmf-aes-192", KMF, 19, "KMF AES-192") +DEF_FEAT(KMF_AES_256, "kmf-aes-256", KMF, 20, "KMF AES-256") +DEF_FEAT(KMF_EAES_128, "kmf-eaes-128", KMF, 26, "KMF Encrypted-AES-128") +DEF_FEAT(KMF_EAES_192, "kmf-eaes-192", KMF, 27, "KMF Encrypted-AES-192") +DEF_FEAT(KMF_EAES_256, "kmf-eaes-256", KMF, 28, "KMF Encrypted-AES-256") + +/* Features exposed via the KMO instruction. */ +DEF_FEAT(KMO_DEA, "kmo-dea", KMO, 1, "KMO DEA") +DEF_FEAT(KMO_TDEA_128, "kmo-tdea-128", KMO, 2, "KMO TDEA-128") +DEF_FEAT(KMO_TDEA_192, "kmo-tdea-192", KMO, 3, "KMO TDEA-192") +DEF_FEAT(KMO_EDEA, "kmo-edea", KMO, 9, "KMO Encrypted-DEA") +DEF_FEAT(KMO_ETDEA_128, "kmo-etdea-128", KMO, 10, "KMO Encrypted-TDEA-128") +DEF_FEAT(KMO_ETDEA_192, "kmo-etdea-192", KMO, 11, "KMO Encrypted-TDEA-192") +DEF_FEAT(KMO_AES_128, "kmo-aes-128", KMO, 18, "KMO AES-128") +DEF_FEAT(KMO_AES_192, "kmo-aes-192", KMO, 19, "KMO AES-192") +DEF_FEAT(KMO_AES_256, "kmo-aes-256", KMO, 20, "KMO AES-256") +DEF_FEAT(KMO_EAES_128, "kmo-eaes-128", KMO, 26, "KMO Encrypted-AES-128") +DEF_FEAT(KMO_EAES_192, "kmo-eaes-192", KMO, 27, "KMO Encrypted-AES-192") +DEF_FEAT(KMO_EAES_256, "kmo-eaes-256", KMO, 28, "KMO Encrypted-AES-256") + +/* Features exposed via the PCC instruction. */ +DEF_FEAT(PCC_CMAC_DEA, "pcc-cmac-dea", PCC, 1, "PCC Compute-Last-Block-CMAC-Using-DEA") +DEF_FEAT(PCC_CMAC_TDEA_128, "pcc-cmac-tdea-128", PCC, 2, "PCC Compute-Last-Block-CMAC-Using-TDEA-128") +DEF_FEAT(PCC_CMAC_TDEA_192, "pcc-cmac-tdea-192", PCC, 3, "PCC Compute-Last-Block-CMAC-Using-TDEA-192") +DEF_FEAT(PCC_CMAC_ETDEA_128, "pcc-cmac-edea", PCC, 9, "PCC Compute-Last-Block-CMAC-Using-Encrypted-DEA") +DEF_FEAT(PCC_CMAC_ETDEA_192, "pcc-cmac-etdea-128", PCC, 10, "PCC Compute-Last-Block-CMAC-Using-Encrypted-TDEA-128") +DEF_FEAT(PCC_CMAC_TDEA, "pcc-cmac-etdea-192", PCC, 11, "PCC Compute-Last-Block-CMAC-Using-EncryptedTDEA-192") +DEF_FEAT(PCC_CMAC_AES_128, "pcc-cmac-aes-128", PCC, 18, "PCC Compute-Last-Block-CMAC-Using-AES-128") +DEF_FEAT(PCC_CMAC_AES_192, "pcc-cmac-aes-192", PCC, 19, "PCC Compute-Last-Block-CMAC-Using-AES-192") +DEF_FEAT(PCC_CMAC_AES_256, "pcc-cmac-eaes-256", PCC, 20, "PCC Compute-Last-Block-CMAC-Using-AES-256") +DEF_FEAT(PCC_CMAC_EAES_128, "pcc-cmac-eaes-128", PCC, 26, "PCC Compute-Last-Block-CMAC-Using-Encrypted-AES-128") +DEF_FEAT(PCC_CMAC_EAES_192, "pcc-cmac-eaes-192", PCC, 27, "PCC Compute-Last-Block-CMAC-Using-Encrypted-AES-192") +DEF_FEAT(PCC_CMAC_EAES_256, "pcc-cmac-eaes-256", PCC, 28, "PCC Compute-Last-Block-CMAC-Using-Encrypted-AES-256") +DEF_FEAT(PCC_XTS_AES_128, "pcc-xts-aes-128", PCC, 50, "PCC Compute-XTS-Parameter-Using-AES-128") +DEF_FEAT(PCC_XTS_AES_256, "pcc-xts-aes-256", PCC, 52, "PCC Compute-XTS-Parameter-Using-AES-256") +DEF_FEAT(PCC_XTS_EAES_128, "pcc-xts-eaes-128", PCC, 58, "PCC Compute-XTS-Parameter-Using-Encrypted-AES-128") +DEF_FEAT(PCC_XTS_EAES_256, "pcc-xts-eaes-256", PCC, 60, "PCC Compute-XTS-Parameter-Using-Encrypted-AES-256") +DEF_FEAT(PCC_SCALAR_MULT_P256, "pcc-scalar-mult-p256", PCC, 64, "PCC Scalar-Multiply-P256") +DEF_FEAT(PCC_SCALAR_MULT_P384, "pcc-scalar-mult-p384", PCC, 65, "PCC Scalar-Multiply-P384") +DEF_FEAT(PCC_SCALAR_MULT_P512, "pcc-scalar-mult-p521", PCC, 66, "PCC Scalar-Multiply-P521") +DEF_FEAT(PCC_SCALAR_MULT_ED25519, "pcc-scalar-mult-ed25519", PCC, 72, "PCC Scalar-Multiply-Ed25519") +DEF_FEAT(PCC_SCALAR_MULT_ED448, "pcc-scalar-mult-ed448", PCC, 73, "PCC Scalar-Multiply-Ed448") +DEF_FEAT(PCC_SCALAR_MULT_X25519, "pcc-scalar-mult-x25519", PCC, 80, "PCC Scalar-Multiply-X25519") +DEF_FEAT(PCC_SCALAR_MULT_X448, "pcc-scalar-mult-x448", PCC, 81, "PCC Scalar-Multiply-X448") + +/* Features exposed via the PPNO/PRNO instruction. */ +DEF_FEAT(PPNO_SHA_512_DRNG, "ppno-sha-512-drng", PPNO, 3, "PPNO SHA-512-DRNG") +DEF_FEAT(PRNO_TRNG_QRTCR, "prno-trng-qrtcr", PPNO, 112, "PRNO TRNG-Query-Raw-to-Conditioned-Ratio") +DEF_FEAT(PRNO_TRNG, "prno-trng", PPNO, 114, "PRNO TRNG") + +/* Features exposed via the KMA instruction. */ +DEF_FEAT(KMA_GCM_AES_128, "kma-gcm-aes-128", KMA, 18, "KMA GCM-AES-128") +DEF_FEAT(KMA_GCM_AES_192, "kma-gcm-aes-192", KMA, 19, "KMA GCM-AES-192") +DEF_FEAT(KMA_GCM_AES_256, "kma-gcm-aes-256", KMA, 20, "KMA GCM-AES-256") +DEF_FEAT(KMA_GCM_EAES_128, "kma-gcm-eaes-128", KMA, 26, "KMA GCM-Encrypted-AES-128") +DEF_FEAT(KMA_GCM_EAES_192, "kma-gcm-eaes-192", KMA, 27, "KMA GCM-Encrypted-AES-192") +DEF_FEAT(KMA_GCM_EAES_256, "kma-gcm-eaes-256", KMA, 28, "KMA GCM-Encrypted-AES-256") + +/* Features exposed via the KDSA instruction. */ +DEF_FEAT(KDSA_ECDSA_VERIFY_P256, "kdsa-ecdsa-verify-p256", KDSA, 1, "KDSA ECDSA-Verify-P256") +DEF_FEAT(KDSA_ECDSA_VERIFY_P384, "kdsa-ecdsa-verify-p384", KDSA, 2, "KDSA ECDSA-Verify-P384") +DEF_FEAT(KDSA_ECDSA_VERIFY_P512, "kdsa-ecdsa-verify-p521", KDSA, 3, "KDSA ECDSA-Verify-P521") +DEF_FEAT(KDSA_ECDSA_SIGN_P256, "kdsa-ecdsa-sign-p256", KDSA, 9, "KDSA ECDSA-Sign-P256") +DEF_FEAT(KDSA_ECDSA_SIGN_P384, "kdsa-ecdsa-sign-p384", KDSA, 10, "KDSA ECDSA-Sign-P384") +DEF_FEAT(KDSA_ECDSA_SIGN_P512, "kdsa-ecdsa-sign-p521", KDSA, 11, "KDSA ECDSA-Sign-P521") +DEF_FEAT(KDSA_EECDSA_SIGN_P256, "kdsa-eecdsa-sign-p256", KDSA, 17, "KDSA Encrypted-ECDSA-Sign-P256") +DEF_FEAT(KDSA_EECDSA_SIGN_P384, "kdsa-eecdsa-sign-p384", KDSA, 18, "KDSA Encrypted-ECDSA-Sign-P384") +DEF_FEAT(KDSA_EECDSA_SIGN_P512, "kdsa-eecdsa-sign-p521", KDSA, 19, "KDSA Encrypted-ECDSA-Sign-P521") +DEF_FEAT(KDSA_EDDSA_VERIFY_ED25519, "kdsa-eddsa-verify-ed25519", KDSA, 32, "KDSA EdDSA-Verify-Ed25519") +DEF_FEAT(KDSA_EDDSA_VERIFY_ED448, "kdsa-eddsa-verify-ed448", KDSA, 36, "KDSA EdDSA-Verify-Ed448") +DEF_FEAT(KDSA_EDDSA_SIGN_ED25519, "kdsa-eddsa-sign-ed25519", KDSA, 40, "KDSA EdDSA-Sign-Ed25519") +DEF_FEAT(KDSA_EDDSA_SIGN_ED448, "kdsa-eddsa-sign-ed448", KDSA, 44, "KDSA EdDSA-Sign-Ed448") +DEF_FEAT(KDSA_EEDDSA_SIGN_ED25519, "kdsa-eeddsa-sign-ed25519", KDSA, 48, "KDSA Encrypted-EdDSA-Sign-Ed25519") +DEF_FEAT(KDSA_EEDDSA_SIGN_ED448, "kdsa-eeddsa-sign-ed448", KDSA, 52, "KDSA Encrypted-EdDSA-Sign-Ed448") + +/* Features exposed via the SORTL instruction. */ +DEF_FEAT(SORTL_SFLR, "sortl-sflr", SORTL, 1, "SORTL SFLR") +DEF_FEAT(SORTL_SVLR, "sortl-svlr", SORTL, 2, "SORTL SVLR") +DEF_FEAT(SORTL_32, "sortl-32", SORTL, 130, "SORTL 32 input lists") +DEF_FEAT(SORTL_128, "sortl-128", SORTL, 132, "SORTL 128 input lists") +DEF_FEAT(SORTL_F0, "sortl-f0", SORTL, 192, "SORTL format 0 parameter-block") + +/* Features exposed via the DEFLATE instruction. */ +DEF_FEAT(DEFLATE_GHDT, "dfltcc-gdht", DFLTCC, 1, "DFLTCC GDHT") +DEF_FEAT(DEFLATE_CMPR, "dfltcc-cmpr", DFLTCC, 2, "DFLTCC CMPR") +DEF_FEAT(DEFLATE_XPND, "dfltcc-xpnd", DFLTCC, 4, "DFLTCC XPND") +DEF_FEAT(DEFLATE_F0, "dfltcc-f0", DFLTCC, 192, "DFLTCC format 0 parameter-block") diff --git a/target/s390x/gen-features.c b/target/s390x/gen-features.c index dc320a06c2..af06be3e3b 100644 --- a/target/s390x/gen-features.c +++ b/target/s390x/gen-features.c @@ -216,21 +216,21 @@ #define S390_FEAT_GROUP_MSA_EXT_9 \ S390_FEAT_MSA_EXT_9, \ - S390_FEAT_ECDSA_VERIFY_P256, \ - S390_FEAT_ECDSA_VERIFY_P384, \ - S390_FEAT_ECDSA_VERIFY_P512, \ - S390_FEAT_ECDSA_SIGN_P256, \ - S390_FEAT_ECDSA_SIGN_P384, \ - S390_FEAT_ECDSA_SIGN_P512, \ - S390_FEAT_EECDSA_SIGN_P256, \ - S390_FEAT_EECDSA_SIGN_P384, \ - S390_FEAT_EECDSA_SIGN_P512, \ - S390_FEAT_EDDSA_VERIFY_ED25519, \ - S390_FEAT_EDDSA_VERIFY_ED448, \ - S390_FEAT_EDDSA_SIGN_ED25519, \ - S390_FEAT_EDDSA_SIGN_ED448, \ - S390_FEAT_EEDDSA_SIGN_ED25519, \ - S390_FEAT_EEDDSA_SIGN_ED448, \ + S390_FEAT_KDSA_ECDSA_VERIFY_P256, \ + S390_FEAT_KDSA_ECDSA_VERIFY_P384, \ + S390_FEAT_KDSA_ECDSA_VERIFY_P512, \ + S390_FEAT_KDSA_ECDSA_SIGN_P256, \ + S390_FEAT_KDSA_ECDSA_SIGN_P384, \ + S390_FEAT_KDSA_ECDSA_SIGN_P512, \ + S390_FEAT_KDSA_EECDSA_SIGN_P256, \ + S390_FEAT_KDSA_EECDSA_SIGN_P384, \ + S390_FEAT_KDSA_EECDSA_SIGN_P512, \ + S390_FEAT_KDSA_EDDSA_VERIFY_ED25519, \ + S390_FEAT_KDSA_EDDSA_VERIFY_ED448, \ + S390_FEAT_KDSA_EDDSA_SIGN_ED25519, \ + S390_FEAT_KDSA_EDDSA_SIGN_ED448, \ + S390_FEAT_KDSA_EEDDSA_SIGN_ED25519, \ + S390_FEAT_KDSA_EEDDSA_SIGN_ED448, \ S390_FEAT_PCC_SCALAR_MULT_P256, \ S390_FEAT_PCC_SCALAR_MULT_P384, \ S390_FEAT_PCC_SCALAR_MULT_P512, \ diff --git a/tests/tcg/s390x/csst.c b/tests/tcg/s390x/csst.c index 1dae9071fb..084d80af49 100644 --- a/tests/tcg/s390x/csst.c +++ b/tests/tcg/s390x/csst.c @@ -3,7 +3,7 @@ int main(void) { - uint64_t parmlist[] = { + uint64_t parmlist[] __attribute__((aligned(16))) = { 0xfedcba9876543210ull, 0, 0x7777777777777777ull, |