diff options
| -rw-r--r-- | hw/vfio/pci.c | 11 | ||||
| -rw-r--r-- | hw/vfio/platform.c | 2 | ||||
| -rw-r--r-- | target/i386/cpu.c | 34 |
3 files changed, 31 insertions, 16 deletions
diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c index d4051cb951..31e1edf447 100644 --- a/hw/vfio/pci.c +++ b/hw/vfio/pci.c @@ -257,7 +257,7 @@ static void vfio_intx_update(PCIDevice *pdev) static int vfio_intx_enable(VFIOPCIDevice *vdev, Error **errp) { uint8_t pin = vfio_pci_read_config(&vdev->pdev, PCI_INTERRUPT_PIN, 1); - int ret, argsz; + int ret, argsz, retval = 0; struct vfio_irq_set *irq_set; int32_t *pfd; Error *err = NULL; @@ -302,12 +302,12 @@ static int vfio_intx_enable(VFIOPCIDevice *vdev, Error **errp) qemu_set_fd_handler(*pfd, vfio_intx_interrupt, NULL, vdev); ret = ioctl(vdev->vbasedev.fd, VFIO_DEVICE_SET_IRQS, irq_set); - g_free(irq_set); if (ret) { error_setg_errno(errp, -ret, "failed to setup INTx fd"); qemu_set_fd_handler(*pfd, NULL, NULL, vdev); event_notifier_cleanup(&vdev->intx.interrupt); - return -errno; + retval = -errno; + goto cleanup; } vfio_intx_enable_kvm(vdev, &err); @@ -319,7 +319,10 @@ static int vfio_intx_enable(VFIOPCIDevice *vdev, Error **errp) trace_vfio_intx_enable(vdev->vbasedev.name); - return 0; +cleanup: + g_free(irq_set); + + return retval; } static void vfio_intx_disable(VFIOPCIDevice *vdev) diff --git a/hw/vfio/platform.c b/hw/vfio/platform.c index 7c09deda61..da84abf4fc 100644 --- a/hw/vfio/platform.c +++ b/hw/vfio/platform.c @@ -120,11 +120,11 @@ static int vfio_set_trigger_eventfd(VFIOINTp *intp, *pfd = event_notifier_get_fd(intp->interrupt); qemu_set_fd_handler(*pfd, (IOHandler *)handler, NULL, intp); ret = ioctl(vbasedev->fd, VFIO_DEVICE_SET_IRQS, irq_set); - g_free(irq_set); if (ret < 0) { error_report("vfio: Failed to set trigger eventfd: %m"); qemu_set_fd_handler(*pfd, NULL, NULL, NULL); } + g_free(irq_set); return ret; } diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 89f5fb7a3f..ddc45abd70 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -1585,6 +1585,17 @@ static bool lmce_supported(void) return !!(mce_cap & MCG_LMCE_P); } +#define CPUID_MODEL_ID_SZ 48 + +/** + * cpu_x86_fill_model_id: + * Get CPUID model ID string from host CPU. + * + * @str should have at least CPUID_MODEL_ID_SZ bytes + * + * The function does NOT add a null terminator to the string + * automatically. + */ static int cpu_x86_fill_model_id(char *str) { uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0; @@ -1633,20 +1644,21 @@ static void max_x86_cpu_initfn(Object *obj) cpu->max_features = true; if (kvm_enabled()) { - X86CPUDefinition host_cpudef = { }; - uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0; - - host_cpuid(0x0, 0, &eax, &ebx, &ecx, &edx); - x86_cpu_vendor_words2str(host_cpudef.vendor, ebx, edx, ecx); + char vendor[CPUID_VENDOR_SZ + 1] = { 0 }; + char model_id[CPUID_MODEL_ID_SZ + 1] = { 0 }; + int family, model, stepping; - host_cpuid(0x1, 0, &eax, &ebx, &ecx, &edx); - host_cpudef.family = ((eax >> 8) & 0x0F) + ((eax >> 20) & 0xFF); - host_cpudef.model = ((eax >> 4) & 0x0F) | ((eax & 0xF0000) >> 12); - host_cpudef.stepping = eax & 0x0F; + host_vendor_fms(vendor, &family, &model, &stepping); - cpu_x86_fill_model_id(host_cpudef.model_id); + cpu_x86_fill_model_id(model_id); - x86_cpu_load_def(cpu, &host_cpudef, &error_abort); + object_property_set_str(OBJECT(cpu), vendor, "vendor", &error_abort); + object_property_set_int(OBJECT(cpu), family, "family", &error_abort); + object_property_set_int(OBJECT(cpu), model, "model", &error_abort); + object_property_set_int(OBJECT(cpu), stepping, "stepping", + &error_abort); + object_property_set_str(OBJECT(cpu), model_id, "model-id", + &error_abort); env->cpuid_min_level = kvm_arch_get_supported_cpuid(s, 0x0, 0, R_EAX); |