diff options
| -rw-r--r-- | target/riscv/cpu.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index eeb91f8513..55a180edf9 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -133,6 +133,7 @@ static void riscv_base32_cpu_init(Object *obj) CPURISCVState *env = &RISCV_CPU(obj)->env; /* We set this in the realise function */ set_misa(env, 0); + set_resetvec(env, DEFAULT_RSTVEC); } static void rv32gcsu_priv1_10_0_cpu_init(Object *obj) @@ -170,6 +171,7 @@ static void riscv_base64_cpu_init(Object *obj) CPURISCVState *env = &RISCV_CPU(obj)->env; /* We set this in the realise function */ set_misa(env, 0); + set_resetvec(env, DEFAULT_RSTVEC); } static void rv64gcsu_priv1_10_0_cpu_init(Object *obj) @@ -377,7 +379,6 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp) } set_priv_version(env, priv_version); - set_resetvec(env, DEFAULT_RSTVEC); if (cpu->cfg.mmu) { set_feature(env, RISCV_FEATURE_MMU); |