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-rw-r--r--disas/alpha.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/disas/alpha.c b/disas/alpha.c
index b7b0ae0d92..a0c9ecd49d 100644
--- a/disas/alpha.c
+++ b/disas/alpha.c
@@ -672,7 +672,7 @@ extract_ev6hwjhint(unsigned insn, int *invalid ATTRIBUTE_UNUSED)
    OPCODE	is the instruction opcode.
 
    MASK		is the opcode mask; this is used to tell the disassembler
-            	which bits in the actual opcode must match OPCODE.
+		which bits in the actual opcode must match OPCODE.
 
    OPERANDS	is the list of operands.
 
@@ -699,10 +699,10 @@ extract_ev6hwjhint(unsigned insn, int *invalid ATTRIBUTE_UNUSED)
    And two annotations:
 
    EV56 BUT	opcodes that are officially introduced as of the ev56,
-   		but with defined results on previous implementations.
+		but with defined results on previous implementations.
 
    EV56 UNA	opcodes that were introduced as of the ev56 with
-   		presumably undefined results on previous implementations
+		presumably undefined results on previous implementations
 		that were not assigned to a particular extension.
 */
 
@@ -832,7 +832,7 @@ const struct alpha_opcode alpha_opcodes[] = {
   { "cmovgt",		OPR(0x11,0x66), BASE, ARG_OPR },
   { "cmovgt",		OPRL(0x11,0x66), BASE, ARG_OPRL },
   { "implver",		OPRL_(0x11,0x6C)|(31<<21)|(1<<13),
-    			0xFFFFFFE0, BASE, { RC } },		/* ev56 but */
+			0xFFFFFFE0, BASE, { RC } },		/* ev56 but */
 
   { "mskbl",		OPR(0x12,0x02), BASE, ARG_OPR },
   { "mskbl",		OPRL(0x12,0x02), BASE, ARG_OPRL },