diff options
Diffstat (limited to 'disas')
| -rw-r--r-- | disas/alpha.c | 8 | ||||
| -rw-r--r-- | disas/arm.c | 2 | ||||
| -rw-r--r-- | disas/i386.c | 4 | ||||
| -rw-r--r-- | disas/m68k.c | 4 |
4 files changed, 9 insertions, 9 deletions
diff --git a/disas/alpha.c b/disas/alpha.c index b7b0ae0d92..a0c9ecd49d 100644 --- a/disas/alpha.c +++ b/disas/alpha.c @@ -672,7 +672,7 @@ extract_ev6hwjhint(unsigned insn, int *invalid ATTRIBUTE_UNUSED) OPCODE is the instruction opcode. MASK is the opcode mask; this is used to tell the disassembler - which bits in the actual opcode must match OPCODE. + which bits in the actual opcode must match OPCODE. OPERANDS is the list of operands. @@ -699,10 +699,10 @@ extract_ev6hwjhint(unsigned insn, int *invalid ATTRIBUTE_UNUSED) And two annotations: EV56 BUT opcodes that are officially introduced as of the ev56, - but with defined results on previous implementations. + but with defined results on previous implementations. EV56 UNA opcodes that were introduced as of the ev56 with - presumably undefined results on previous implementations + presumably undefined results on previous implementations that were not assigned to a particular extension. */ @@ -832,7 +832,7 @@ const struct alpha_opcode alpha_opcodes[] = { { "cmovgt", OPR(0x11,0x66), BASE, ARG_OPR }, { "cmovgt", OPRL(0x11,0x66), BASE, ARG_OPRL }, { "implver", OPRL_(0x11,0x6C)|(31<<21)|(1<<13), - 0xFFFFFFE0, BASE, { RC } }, /* ev56 but */ + 0xFFFFFFE0, BASE, { RC } }, /* ev56 but */ { "mskbl", OPR(0x12,0x02), BASE, ARG_OPR }, { "mskbl", OPRL(0x12,0x02), BASE, ARG_OPRL }, diff --git a/disas/arm.c b/disas/arm.c index dda7b2a943..17ea120b44 100644 --- a/disas/arm.c +++ b/disas/arm.c @@ -1077,7 +1077,7 @@ static const struct opcode32 arm_opcodes[] = %S print Thumb register (bits 3..5 as high number if bit 6 set) %D print Thumb register (bits 0..2 as high number if bit 7 set) %<bitfield>I print bitfield as a signed decimal - (top bit of range being the sign bit) + (top bit of range being the sign bit) %N print Thumb register mask (with LR) %O print Thumb register mask (with PC) %M print Thumb register mask diff --git a/disas/i386.c b/disas/i386.c index a557e678ec..fc03b9f06a 100644 --- a/disas/i386.c +++ b/disas/i386.c @@ -6075,7 +6075,7 @@ OP_EM (int bytemode, int sizeflag) { bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode; used_prefixes |= (prefixes & PREFIX_DATA); - } + } OP_E (bytemode, sizeflag); return; } @@ -6112,7 +6112,7 @@ OP_EMC (int bytemode, int sizeflag) { bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode; used_prefixes |= (prefixes & PREFIX_DATA); - } + } OP_E (bytemode, sizeflag); return; } diff --git a/disas/m68k.c b/disas/m68k.c index 0dc8aa1a3c..e544c7137f 100644 --- a/disas/m68k.c +++ b/disas/m68k.c @@ -350,7 +350,7 @@ struct m68k_opcode_alias * all (modes 0-6,7.0-4) ~ alterable memory (modes 2-6,7.0,7.1) - (not 0,1,7.2-4) + (not 0,1,7.2-4) % alterable (modes 0-6,7.0,7.1) (not 7.2-4) ; data (modes 0,2-6,7.0-4) @@ -1647,7 +1647,7 @@ print_insn_arg (const char *d, case 0x15: name = "%val"; break; case 0x16: name = "%scc"; break; case 0x17: name = "%ac"; break; - case 0x18: name = "%psr"; break; + case 0x18: name = "%psr"; break; case 0x19: name = "%pcsr"; break; case 0x1c: case 0x1d: |