6 files changed, 29 insertions, 18 deletions
diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c
index b696c6291a..ee1d47ff75 100644
--- a/hw/ide/ahci.c
+++ b/hw/ide/ahci.c
@@ -1819,7 +1819,7 @@ type_init(sysbus_ahci_register_types)
 
 int32_t ahci_get_num_ports(PCIDevice *dev)
 {
-    AHCIPCIState *d = ICH_AHCI(dev);
+    AHCIPCIState *d = ICH9_AHCI(dev);
     AHCIState *ahci = &d->ahci;
 
     return ahci->ports;
@@ -1827,7 +1827,7 @@ int32_t ahci_get_num_ports(PCIDevice *dev)
 
 void ahci_ide_create_devs(PCIDevice *dev, DriveInfo **hd)
 {
-    AHCIPCIState *d = ICH_AHCI(dev);
+    AHCIPCIState *d = ICH9_AHCI(dev);
     AHCIState *ahci = &d->ahci;
     int i;
 
diff --git a/hw/ide/ich.c b/hw/ide/ich.c
index eff3188fff..51cd2f38b7 100644
--- a/hw/ide/ich.c
+++ b/hw/ide/ich.c
@@ -91,14 +91,14 @@ static const VMStateDescription vmstate_ich9_ahci = {
 
 static void pci_ich9_reset(DeviceState *dev)
 {
-    AHCIPCIState *d = ICH_AHCI(dev);
+    AHCIPCIState *d = ICH9_AHCI(dev);
 
     ahci_reset(&d->ahci);
 }
 
 static void pci_ich9_ahci_init(Object *obj)
 {
-    struct AHCIPCIState *d = ICH_AHCI(obj);
+    struct AHCIPCIState *d = ICH9_AHCI(obj);
 
     ahci_init(&d->ahci, DEVICE(obj));
 }
@@ -108,7 +108,7 @@ static void pci_ich9_ahci_realize(PCIDevice *dev, Error **errp)
     struct AHCIPCIState *d;
     int sata_cap_offset;
     uint8_t *sata_cap;
-    d = ICH_AHCI(dev);
+    d = ICH9_AHCI(dev);
     int ret;
 
     ahci_realize(&d->ahci, DEVICE(dev), pci_get_address_space(dev), 6);
@@ -154,7 +154,7 @@ static void pci_ich9_ahci_realize(PCIDevice *dev, Error **errp)
 static void pci_ich9_uninit(PCIDevice *dev)
 {
     struct AHCIPCIState *d;
-    d = ICH_AHCI(dev);
+    d = ICH9_AHCI(dev);
 
     msi_uninit(dev);
     ahci_uninit(&d->ahci);
diff --git a/hw/ide/isa.c b/hw/ide/isa.c
index f28c8fba6c..9a3489691b 100644
--- a/hw/ide/isa.c
+++ b/hw/ide/isa.c
@@ -32,14 +32,17 @@
 #include "sysemu/dma.h"
 
 #include "hw/ide/internal.h"
+#include "qom/object.h"
 
 /***********************************************************/
 /* ISA IDE definitions */
 
 #define TYPE_ISA_IDE "isa-ide"
-#define ISA_IDE(obj) OBJECT_CHECK(ISAIDEState, (obj), TYPE_ISA_IDE)
+typedef struct ISAIDEState ISAIDEState;
+DECLARE_INSTANCE_CHECKER(ISAIDEState, ISA_IDE,
+                         TYPE_ISA_IDE)
 
-typedef struct ISAIDEState {
+struct ISAIDEState {
     ISADevice parent_obj;
 
     IDEBus    bus;
@@ -47,7 +50,7 @@ typedef struct ISAIDEState {
     uint32_t  iobase2;
     uint32_t  isairq;
     qemu_irq  irq;
-} ISAIDEState;
+};
 
 static void isa_ide_reset(DeviceState *d)
 {
diff --git a/hw/ide/microdrive.c b/hw/ide/microdrive.c
index c4cc0a84eb..6e7f5df901 100644
--- a/hw/ide/microdrive.c
+++ b/hw/ide/microdrive.c
@@ -31,9 +31,12 @@
 #include "sysemu/dma.h"
 
 #include "hw/ide/internal.h"
+#include "qom/object.h"
 
 #define TYPE_MICRODRIVE "microdrive"
-#define MICRODRIVE(obj) OBJECT_CHECK(MicroDriveState, (obj), TYPE_MICRODRIVE)
+typedef struct MicroDriveState MicroDriveState;
+DECLARE_INSTANCE_CHECKER(MicroDriveState, MICRODRIVE,
+                         TYPE_MICRODRIVE)
 
 /***********************************************************/
 /* CF-ATA Microdrive */
@@ -42,7 +45,7 @@
 
 /* DSCM-1XXXX Microdrive hard disk with CF+ II / PCMCIA interface.  */
 
-typedef struct MicroDriveState {
+struct MicroDriveState {
     /*< private >*/
     PCMCIACardState parent_obj;
     /*< public >*/
@@ -59,7 +62,7 @@ typedef struct MicroDriveState {
     uint8_t ctrl;
     uint16_t io;
     uint8_t cycle;
-} MicroDriveState;
+};
 
 /* Register bitfields */
 enum md_opt {
diff --git a/hw/ide/mmio.c b/hw/ide/mmio.c
index d233bd8c01..4bf6e3a8b7 100644
--- a/hw/ide/mmio.c
+++ b/hw/ide/mmio.c
@@ -31,6 +31,7 @@
 
 #include "hw/ide/internal.h"
 #include "hw/qdev-properties.h"
+#include "qom/object.h"
 
 /***********************************************************/
 /* MMIO based ide port
@@ -39,9 +40,11 @@
  */
 
 #define TYPE_MMIO_IDE "mmio-ide"
-#define MMIO_IDE(obj) OBJECT_CHECK(MMIOState, (obj), TYPE_MMIO_IDE)
+typedef struct MMIOIDEState MMIOState;
+DECLARE_INSTANCE_CHECKER(MMIOState, MMIO_IDE,
+                         TYPE_MMIO_IDE)
 
-typedef struct MMIOIDEState {
+struct MMIOIDEState {
     /*< private >*/
     SysBusDevice parent_obj;
     /*< public >*/
@@ -51,7 +54,7 @@ typedef struct MMIOIDEState {
     uint32_t shift;
     qemu_irq irq;
     MemoryRegion iomem1, iomem2;
-} MMIOState;
+};
 
 static void mmio_ide_reset(DeviceState *dev)
 {
diff --git a/hw/ide/sii3112.c b/hw/ide/sii3112.c
index 94d2b57f95..968c239ab8 100644
--- a/hw/ide/sii3112.c
+++ b/hw/ide/sii3112.c
@@ -16,9 +16,11 @@
 #include "hw/ide/pci.h"
 #include "qemu/module.h"
 #include "trace.h"
+#include "qom/object.h"
 
 #define TYPE_SII3112_PCI "sii3112"
-#define SII3112_PCI(obj) OBJECT_CHECK(SiI3112PCIState, (obj), \
+typedef struct SiI3112PCIState SiI3112PCIState;
+DECLARE_INSTANCE_CHECKER(SiI3112PCIState, SII3112_PCI,
                          TYPE_SII3112_PCI)
 
 typedef struct SiI3112Regs {
@@ -28,11 +30,11 @@ typedef struct SiI3112Regs {
     uint8_t swdata;
 } SiI3112Regs;
 
-typedef struct SiI3112PCIState {
+struct SiI3112PCIState {
     PCIIDEState i;
     MemoryRegion mmio;
     SiI3112Regs regs[2];
-} SiI3112PCIState;
+};
 
 /* The sii3112_reg_read and sii3112_reg_write functions implement the
  * Internal Register Space - BAR5 (section 6.7 of the data sheet).