diff options
Diffstat (limited to 'hw/intc')
38 files changed, 60 insertions, 59 deletions
diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c index 85ded28032..2a3e878c4d 100644 --- a/hw/intc/apic_common.c +++ b/hw/intc/apic_common.c @@ -414,7 +414,6 @@ static const Property apic_properties_common[] = { true), DEFINE_PROP_BOOL("legacy-instance-id", APICCommonState, legacy_instance_id, false), - DEFINE_PROP_END_OF_LIST(), }; static void apic_common_get_id(Object *obj, Visitor *v, const char *name, diff --git a/hw/intc/arm_gic_common.c b/hw/intc/arm_gic_common.c index 5eba8badb8..5ac56e3389 100644 --- a/hw/intc/arm_gic_common.c +++ b/hw/intc/arm_gic_common.c @@ -360,7 +360,6 @@ static const Property arm_gic_common_properties[] = { /* True if the GIC should implement the virtualization extensions */ DEFINE_PROP_BOOL("has-virtualization-extensions", GICState, virt_extn, 0), DEFINE_PROP_UINT32("num-priority-bits", GICState, n_prio_bits, 8), - DEFINE_PROP_END_OF_LIST(), }; static void arm_gic_common_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/arm_gicv2m.c b/hw/intc/arm_gicv2m.c index 66d4377cde..3a8c62698c 100644 --- a/hw/intc/arm_gicv2m.c +++ b/hw/intc/arm_gicv2m.c @@ -173,7 +173,6 @@ static void gicv2m_init(Object *obj) static const Property gicv2m_properties[] = { DEFINE_PROP_UINT32("base-spi", ARMGICv2mState, base_spi, 0), DEFINE_PROP_UINT32("num-spi", ARMGICv2mState, num_spi, 64), - DEFINE_PROP_END_OF_LIST(), }; static void gicv2m_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/arm_gicv3_common.c b/hw/intc/arm_gicv3_common.c index 67d0ab71cc..76b2283c92 100644 --- a/hw/intc/arm_gicv3_common.c +++ b/hw/intc/arm_gicv3_common.c @@ -621,7 +621,6 @@ static const Property arm_gicv3_common_properties[] = { redist_region_count, qdev_prop_uint32, uint32_t), DEFINE_PROP_LINK("sysmem", GICv3State, dma, TYPE_MEMORY_REGION, MemoryRegion *), - DEFINE_PROP_END_OF_LIST(), }; static void arm_gicv3_common_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c index 0de7643008..936368c901 100644 --- a/hw/intc/arm_gicv3_its.c +++ b/hw/intc/arm_gicv3_its.c @@ -2005,7 +2005,6 @@ static void gicv3_its_post_load(GICv3ITSState *s) static const Property gicv3_its_props[] = { DEFINE_PROP_LINK("parent-gicv3", GICv3ITSState, gicv3, "arm-gicv3", GICv3State *), - DEFINE_PROP_END_OF_LIST(), }; static void gicv3_its_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/arm_gicv3_its_kvm.c b/hw/intc/arm_gicv3_its_kvm.c index 62961b62b4..e198974560 100644 --- a/hw/intc/arm_gicv3_its_kvm.c +++ b/hw/intc/arm_gicv3_its_kvm.c @@ -237,7 +237,6 @@ static void kvm_arm_its_reset_hold(Object *obj, ResetType type) static const Property kvm_arm_its_props[] = { DEFINE_PROP_LINK("parent-gicv3", GICv3ITSState, gicv3, "kvm-arm-gicv3", GICv3State *), - DEFINE_PROP_END_OF_LIST(), }; static void kvm_arm_its_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c index 10a773c07f..5fd0760982 100644 --- a/hw/intc/armv7m_nvic.c +++ b/hw/intc/armv7m_nvic.c @@ -2577,7 +2577,6 @@ static const Property props_nvic[] = { * to use a reasonable default. */ DEFINE_PROP_UINT8("num-prio-bits", NVICState, num_prio_bits, 0), - DEFINE_PROP_END_OF_LIST() }; static void armv7m_nvic_reset(DeviceState *dev) diff --git a/hw/intc/exynos4210_combiner.c b/hw/intc/exynos4210_combiner.c index 221dfa912a..6ddbcd4c6d 100644 --- a/hw/intc/exynos4210_combiner.c +++ b/hw/intc/exynos4210_combiner.c @@ -327,7 +327,6 @@ static void exynos4210_combiner_init(Object *obj) static const Property exynos4210_combiner_properties[] = { DEFINE_PROP_UINT32("external", Exynos4210CombinerState, external, 0), - DEFINE_PROP_END_OF_LIST(), }; static void exynos4210_combiner_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/exynos4210_gic.c b/hw/intc/exynos4210_gic.c index e1b956d990..01a53936d3 100644 --- a/hw/intc/exynos4210_gic.c +++ b/hw/intc/exynos4210_gic.c @@ -113,7 +113,6 @@ static void exynos4210_gic_realize(DeviceState *dev, Error **errp) static const Property exynos4210_gic_properties[] = { DEFINE_PROP_UINT32("num-cpu", Exynos4210GicState, num_cpu, 1), - DEFINE_PROP_END_OF_LIST(), }; static void exynos4210_gic_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/goldfish_pic.c b/hw/intc/goldfish_pic.c index f5343c9d2f..aa5162c18f 100644 --- a/hw/intc/goldfish_pic.c +++ b/hw/intc/goldfish_pic.c @@ -183,7 +183,6 @@ static void goldfish_pic_instance_init(Object *obj) static const Property goldfish_pic_properties[] = { DEFINE_PROP_UINT8("index", GoldfishPICState, idx, 0), - DEFINE_PROP_END_OF_LIST(), }; static void goldfish_pic_class_init(ObjectClass *oc, void *data) diff --git a/hw/intc/grlib_irqmp.c b/hw/intc/grlib_irqmp.c index bf53251ea2..95cdb411d2 100644 --- a/hw/intc/grlib_irqmp.c +++ b/hw/intc/grlib_irqmp.c @@ -378,7 +378,6 @@ static void grlib_irqmp_realize(DeviceState *dev, Error **errp) static const Property grlib_irqmp_properties[] = { DEFINE_PROP_UINT32("ncpus", IRQMP, ncpus, 1), - DEFINE_PROP_END_OF_LIST(), }; static void grlib_irqmp_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/i8259_common.c b/hw/intc/i8259_common.c index c3174f4fdc..c77ff683bb 100644 --- a/hw/intc/i8259_common.c +++ b/hw/intc/i8259_common.c @@ -198,7 +198,6 @@ static const Property pic_properties_common[] = { DEFINE_PROP_UINT32("elcr_addr", PICCommonState, elcr_addr, -1), DEFINE_PROP_UINT8("elcr_mask", PICCommonState, elcr_mask, -1), DEFINE_PROP_BIT("master", PICCommonState, master, 0, false), - DEFINE_PROP_END_OF_LIST(), }; static void pic_common_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/ioapic.c b/hw/intc/ioapic.c index d101df1ca0..8cd1d85e06 100644 --- a/hw/intc/ioapic.c +++ b/hw/intc/ioapic.c @@ -478,7 +478,6 @@ static void ioapic_unrealize(DeviceState *dev) static const Property ioapic_properties[] = { DEFINE_PROP_UINT8("version", IOAPICCommonState, version, IOAPIC_VER_DEF), - DEFINE_PROP_END_OF_LIST(), }; static void ioapic_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/loongarch_extioi_common.c b/hw/intc/loongarch_extioi_common.c index e50431f124..e4c1cc3c98 100644 --- a/hw/intc/loongarch_extioi_common.c +++ b/hw/intc/loongarch_extioi_common.c @@ -85,7 +85,6 @@ static const Property extioi_properties[] = { DEFINE_PROP_UINT32("num-cpu", LoongArchExtIOICommonState, num_cpu, 1), DEFINE_PROP_BIT("has-virtualization-extension", LoongArchExtIOICommonState, features, EXTIOI_HAS_VIRT_EXTENSION, 0), - DEFINE_PROP_END_OF_LIST(), }; static void loongarch_extioi_common_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/loongarch_pch_msi.c b/hw/intc/loongarch_pch_msi.c index e2eca30660..66b5c1e660 100644 --- a/hw/intc/loongarch_pch_msi.c +++ b/hw/intc/loongarch_pch_msi.c @@ -86,7 +86,6 @@ static void loongarch_pch_msi_init(Object *obj) static const Property loongarch_msi_properties[] = { DEFINE_PROP_UINT32("msi_irq_base", LoongArchPCHMSI, irq_base, 0), DEFINE_PROP_UINT32("msi_irq_num", LoongArchPCHMSI, irq_num, 0), - DEFINE_PROP_END_OF_LIST(), }; static void loongarch_pch_msi_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/loongarch_pic_common.c b/hw/intc/loongarch_pic_common.c index bcb6b7b3fc..e7f541db4b 100644 --- a/hw/intc/loongarch_pic_common.c +++ b/hw/intc/loongarch_pic_common.c @@ -46,7 +46,6 @@ static void loongarch_pic_common_realize(DeviceState *dev, Error **errp) static const Property loongarch_pic_common_properties[] = { DEFINE_PROP_UINT32("pch_pic_irq_num", LoongArchPICCommonState, irq_num, 0), - DEFINE_PROP_END_OF_LIST(), }; static const VMStateDescription vmstate_loongarch_pic_common = { diff --git a/hw/intc/loongson_ipi_common.c b/hw/intc/loongson_ipi_common.c index d3f894a5bd..9a081565f5 100644 --- a/hw/intc/loongson_ipi_common.c +++ b/hw/intc/loongson_ipi_common.c @@ -317,7 +317,6 @@ static const VMStateDescription vmstate_loongson_ipi_common = { static const Property ipi_common_properties[] = { DEFINE_PROP_UINT32("num-cpu", LoongsonIPICommonState, num_cpu, 1), - DEFINE_PROP_END_OF_LIST(), }; static void loongson_ipi_common_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/m68k_irqc.c b/hw/intc/m68k_irqc.c index b5d10ab1f6..a82b80f5c6 100644 --- a/hw/intc/m68k_irqc.c +++ b/hw/intc/m68k_irqc.c @@ -88,7 +88,6 @@ static const VMStateDescription vmstate_m68k_irqc = { static const Property m68k_irqc_properties[] = { DEFINE_PROP_LINK("m68k-cpu", M68KIRQCState, cpu, TYPE_M68K_CPU, ArchCPU *), - DEFINE_PROP_END_OF_LIST(), }; static void m68k_irqc_class_init(ObjectClass *oc, void *data) diff --git a/hw/intc/mips_gic.c b/hw/intc/mips_gic.c index f34f0bc350..5e3cbeabec 100644 --- a/hw/intc/mips_gic.c +++ b/hw/intc/mips_gic.c @@ -441,7 +441,6 @@ static void mips_gic_realize(DeviceState *dev, Error **errp) static const Property mips_gic_properties[] = { DEFINE_PROP_UINT32("num-vp", MIPSGICState, num_vps, 1), DEFINE_PROP_UINT32("num-irq", MIPSGICState, num_irq, 256), - DEFINE_PROP_END_OF_LIST(), }; static void mips_gic_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/omap_intc.c b/hw/intc/omap_intc.c index 28606f102b..095a3d504f 100644 --- a/hw/intc/omap_intc.c +++ b/hw/intc/omap_intc.c @@ -377,7 +377,6 @@ void omap_intc_set_fclk(OMAPIntcState *intc, omap_clk clk) static const Property omap_intc_properties[] = { DEFINE_PROP_UINT32("size", OMAPIntcState, size, 0x100), - DEFINE_PROP_END_OF_LIST(), }; static void omap_intc_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/ompic.c b/hw/intc/ompic.c index 8ee1bd64bd..42af4567c6 100644 --- a/hw/intc/ompic.c +++ b/hw/intc/ompic.c @@ -130,7 +130,6 @@ static void or1k_ompic_realize(DeviceState *dev, Error **errp) static const Property or1k_ompic_properties[] = { DEFINE_PROP_UINT32("num-cpus", OR1KOMPICState, num_cpus, 1), - DEFINE_PROP_END_OF_LIST(), }; static const VMStateDescription vmstate_or1k_ompic_cpu = { diff --git a/hw/intc/openpic.c b/hw/intc/openpic.c index 2257ae2ee7..78a82d0d30 100644 --- a/hw/intc/openpic.c +++ b/hw/intc/openpic.c @@ -1609,7 +1609,6 @@ static void openpic_realize(DeviceState *dev, Error **errp) static const Property openpic_properties[] = { DEFINE_PROP_UINT32("model", OpenPICState, model, OPENPIC_MODEL_FSL_MPIC_20), DEFINE_PROP_UINT32("nb_cpus", OpenPICState, nb_cpus, 1), - DEFINE_PROP_END_OF_LIST(), }; static void openpic_class_init(ObjectClass *oc, void *data) diff --git a/hw/intc/openpic_kvm.c b/hw/intc/openpic_kvm.c index 13aa653aa1..9cdaa97004 100644 --- a/hw/intc/openpic_kvm.c +++ b/hw/intc/openpic_kvm.c @@ -265,7 +265,6 @@ int kvm_openpic_connect_vcpu(DeviceState *d, CPUState *cs) static const Property kvm_openpic_properties[] = { DEFINE_PROP_UINT32("model", KVMOpenPICState, model, OPENPIC_MODEL_FSL_MPIC_20), - DEFINE_PROP_END_OF_LIST(), }; static void kvm_openpic_class_init(ObjectClass *oc, void *data) diff --git a/hw/intc/pnv_xive.c b/hw/intc/pnv_xive.c index c374aed43a..b755ddf0ff 100644 --- a/hw/intc/pnv_xive.c +++ b/hw/intc/pnv_xive.c @@ -2066,7 +2066,6 @@ static const Property pnv_xive_properties[] = { DEFINE_PROP_UINT64("tm-bar", PnvXive, tm_base, 0), /* The PnvChip id identifies the XIVE interrupt controller. */ DEFINE_PROP_LINK("chip", PnvXive, chip, TYPE_PNV_CHIP, PnvChip *), - DEFINE_PROP_END_OF_LIST(), }; static void pnv_xive_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/pnv_xive2.c b/hw/intc/pnv_xive2.c index ae6da95df2..9ed759417e 100644 --- a/hw/intc/pnv_xive2.c +++ b/hw/intc/pnv_xive2.c @@ -2366,7 +2366,6 @@ static const Property pnv_xive2_properties[] = { DEFINE_PROP_UINT64("config", PnvXive2, config, PNV_XIVE2_CONFIGURATION), DEFINE_PROP_LINK("chip", PnvXive2, chip, TYPE_PNV_CHIP, PnvChip *), - DEFINE_PROP_END_OF_LIST(), }; static void pnv_xive2_instance_init(Object *obj) diff --git a/hw/intc/ppc-uic.c b/hw/intc/ppc-uic.c index d683413a83..7de4bf9885 100644 --- a/hw/intc/ppc-uic.c +++ b/hw/intc/ppc-uic.c @@ -262,7 +262,6 @@ static void ppc_uic_realize(DeviceState *dev, Error **errp) static const Property ppc_uic_properties[] = { DEFINE_PROP_UINT32("dcr-base", PPCUIC, dcr_base, 0xc0), DEFINE_PROP_BOOL("use-vectors", PPCUIC, use_vectors, true), - DEFINE_PROP_END_OF_LIST() }; static const VMStateDescription ppc_uic_vmstate = { diff --git a/hw/intc/riscv_aclint.c b/hw/intc/riscv_aclint.c index db195fb1ff..db374a7c2d 100644 --- a/hw/intc/riscv_aclint.c +++ b/hw/intc/riscv_aclint.c @@ -274,7 +274,6 @@ static const Property riscv_aclint_mtimer_properties[] = { aperture_size, RISCV_ACLINT_DEFAULT_MTIMER_SIZE), DEFINE_PROP_UINT32("timebase-freq", RISCVAclintMTimerState, timebase_freq, 0), - DEFINE_PROP_END_OF_LIST(), }; static void riscv_aclint_mtimer_realize(DeviceState *dev, Error **errp) @@ -466,7 +465,6 @@ static const Property riscv_aclint_swi_properties[] = { DEFINE_PROP_UINT32("hartid-base", RISCVAclintSwiState, hartid_base, 0), DEFINE_PROP_UINT32("num-harts", RISCVAclintSwiState, num_harts, 1), DEFINE_PROP_UINT32("sswi", RISCVAclintSwiState, sswi, false), - DEFINE_PROP_END_OF_LIST(), }; static void riscv_aclint_swi_realize(DeviceState *dev, Error **errp) diff --git a/hw/intc/riscv_aplic.c b/hw/intc/riscv_aplic.c index b56edecb50..4866649115 100644 --- a/hw/intc/riscv_aplic.c +++ b/hw/intc/riscv_aplic.c @@ -32,6 +32,7 @@ #include "target/riscv/cpu.h" #include "system/system.h" #include "system/kvm.h" +#include "system/tcg.h" #include "kvm/kvm_riscv.h" #include "migration/vmstate.h" @@ -154,11 +155,38 @@ * KVM AIA only supports APLIC MSI, fallback to QEMU emulation if we want to use * APLIC Wired. */ -static bool is_kvm_aia(bool msimode) +bool riscv_is_kvm_aia_aplic_imsic(bool msimode) { return kvm_irqchip_in_kernel() && msimode; } +bool riscv_use_emulated_aplic(bool msimode) +{ +#ifdef CONFIG_KVM + if (tcg_enabled()) { + return true; + } + + if (!riscv_is_kvm_aia_aplic_imsic(msimode)) { + return true; + } + + return kvm_kernel_irqchip_split(); +#else + return true; +#endif +} + +void riscv_aplic_set_kvm_msicfgaddr(RISCVAPLICState *aplic, hwaddr addr) +{ +#ifdef CONFIG_KVM + if (riscv_use_emulated_aplic(aplic->msimode)) { + aplic->kvm_msicfgaddr = extract64(addr, 0, 32); + aplic->kvm_msicfgaddrH = extract64(addr, 32, 32); + } +#endif +} + static bool riscv_aplic_irq_rectified_val(RISCVAPLICState *aplic, uint32_t irq) { @@ -248,9 +276,12 @@ static void riscv_aplic_set_pending(RISCVAPLICState *aplic, if ((sm == APLIC_SOURCECFG_SM_LEVEL_HIGH) || (sm == APLIC_SOURCECFG_SM_LEVEL_LOW)) { - if (!aplic->msimode || (aplic->msimode && !pending)) { + if (!aplic->msimode) { return; } + if (aplic->msimode && !pending) { + goto noskip_write_pending; + } if ((aplic->state[irq] & APLIC_ISTATE_INPUT) && (sm == APLIC_SOURCECFG_SM_LEVEL_LOW)) { return; @@ -261,6 +292,7 @@ static void riscv_aplic_set_pending(RISCVAPLICState *aplic, } } +noskip_write_pending: riscv_aplic_set_pending_raw(aplic, irq, pending); } @@ -359,13 +391,16 @@ static void riscv_aplic_msi_send(RISCVAPLICState *aplic, uint32_t lhxs, lhxw, hhxs, hhxw, group_idx, msicfgaddr, msicfgaddrH; aplic_m = aplic; - while (aplic_m && !aplic_m->mmode) { - aplic_m = aplic_m->parent; - } - if (!aplic_m) { - qemu_log_mask(LOG_GUEST_ERROR, "%s: m-level APLIC not found\n", - __func__); - return; + + if (!aplic->kvm_splitmode) { + while (aplic_m && !aplic_m->mmode) { + aplic_m = aplic_m->parent; + } + if (!aplic_m) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: m-level APLIC not found\n", + __func__); + return; + } } if (aplic->mmode) { @@ -397,6 +432,11 @@ static void riscv_aplic_msi_send(RISCVAPLICState *aplic, addr |= (uint64_t)(guest_idx & APLIC_xMSICFGADDR_PPN_HART(lhxs)); addr <<= APLIC_xMSICFGADDR_PPN_SHIFT; + if (aplic->kvm_splitmode) { + addr |= aplic->kvm_msicfgaddr; + addr |= ((uint64_t)aplic->kvm_msicfgaddrH << 32); + } + address_space_stl_le(&address_space_memory, addr, eiid, MEMTXATTRS_UNSPECIFIED, &result); if (result != MEMTX_OK) { @@ -853,7 +893,7 @@ static void riscv_aplic_realize(DeviceState *dev, Error **errp) uint32_t i; RISCVAPLICState *aplic = RISCV_APLIC(dev); - if (!is_kvm_aia(aplic->msimode)) { + if (riscv_use_emulated_aplic(aplic->msimode)) { aplic->bitfield_words = (aplic->num_irqs + 31) >> 5; aplic->sourcecfg = g_new0(uint32_t, aplic->num_irqs); aplic->state = g_new0(uint32_t, aplic->num_irqs); @@ -870,6 +910,10 @@ static void riscv_aplic_realize(DeviceState *dev, Error **errp) memory_region_init_io(&aplic->mmio, OBJECT(dev), &riscv_aplic_ops, aplic, TYPE_RISCV_APLIC, aplic->aperture_size); sysbus_init_mmio(SYS_BUS_DEVICE(dev), &aplic->mmio); + + if (kvm_enabled()) { + aplic->kvm_splitmode = true; + } } /* @@ -877,7 +921,7 @@ static void riscv_aplic_realize(DeviceState *dev, Error **errp) * have IRQ lines delegated by their parent APLIC. */ if (!aplic->parent) { - if (kvm_enabled() && is_kvm_aia(aplic->msimode)) { + if (kvm_enabled() && !riscv_use_emulated_aplic(aplic->msimode)) { qdev_init_gpio_in(dev, riscv_kvm_aplic_request, aplic->num_irqs); } else { qdev_init_gpio_in(dev, riscv_aplic_request, aplic->num_irqs); @@ -912,13 +956,12 @@ static const Property riscv_aplic_properties[] = { DEFINE_PROP_UINT32("num-irqs", RISCVAPLICState, num_irqs, 0), DEFINE_PROP_BOOL("msimode", RISCVAPLICState, msimode, 0), DEFINE_PROP_BOOL("mmode", RISCVAPLICState, mmode, 0), - DEFINE_PROP_END_OF_LIST(), }; static const VMStateDescription vmstate_riscv_aplic = { .name = "riscv_aplic", - .version_id = 1, - .minimum_version_id = 1, + .version_id = 2, + .minimum_version_id = 2, .fields = (const VMStateField[]) { VMSTATE_UINT32(domaincfg, RISCVAPLICState), VMSTATE_UINT32(mmsicfgaddr, RISCVAPLICState), @@ -926,6 +969,8 @@ static const VMStateDescription vmstate_riscv_aplic = { VMSTATE_UINT32(smsicfgaddr, RISCVAPLICState), VMSTATE_UINT32(smsicfgaddrH, RISCVAPLICState), VMSTATE_UINT32(genmsi, RISCVAPLICState), + VMSTATE_UINT32(kvm_msicfgaddr, RISCVAPLICState), + VMSTATE_UINT32(kvm_msicfgaddrH, RISCVAPLICState), VMSTATE_VARRAY_UINT32(sourcecfg, RISCVAPLICState, num_irqs, 0, vmstate_info_uint32, uint32_t), @@ -1021,7 +1066,7 @@ DeviceState *riscv_aplic_create(hwaddr addr, hwaddr size, sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); - if (!is_kvm_aia(msimode)) { + if (riscv_use_emulated_aplic(msimode)) { sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, addr); } diff --git a/hw/intc/riscv_imsic.c b/hw/intc/riscv_imsic.c index cfd9eca8bc..dc8162c0a7 100644 --- a/hw/intc/riscv_imsic.c +++ b/hw/intc/riscv_imsic.c @@ -393,7 +393,6 @@ static const Property riscv_imsic_properties[] = { DEFINE_PROP_UINT32("hartid", RISCVIMSICState, hartid, 0), DEFINE_PROP_UINT32("num-pages", RISCVIMSICState, num_pages, 0), DEFINE_PROP_UINT32("num-irqs", RISCVIMSICState, num_irqs, 0), - DEFINE_PROP_END_OF_LIST(), }; static const VMStateDescription vmstate_riscv_imsic = { diff --git a/hw/intc/rx_icu.c b/hw/intc/rx_icu.c index dfe11ade20..ca13c5fb37 100644 --- a/hw/intc/rx_icu.c +++ b/hw/intc/rx_icu.c @@ -366,7 +366,6 @@ static const Property rxicu_properties[] = { qdev_prop_uint8, uint8_t), DEFINE_PROP_ARRAY("trigger-level", RXICUState, nr_sense, init_sense, qdev_prop_uint8, uint8_t), - DEFINE_PROP_END_OF_LIST(), }; static void rxicu_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/s390_flic.c b/hw/intc/s390_flic.c index 2963bd5bd6..3f3fa939d3 100644 --- a/hw/intc/s390_flic.c +++ b/hw/intc/s390_flic.c @@ -448,7 +448,6 @@ static void qemu_s390_flic_instance_init(Object *obj) static const Property qemu_s390_flic_properties[] = { DEFINE_PROP_BOOL("migrate-all-state", QEMUS390FLICState, migrate_all_state, true), - DEFINE_PROP_END_OF_LIST(), }; static void qemu_s390_flic_class_init(ObjectClass *oc, void *data) @@ -476,7 +475,6 @@ static const Property s390_flic_common_properties[] = { adapter_routes_max_batch, ADAPTER_ROUTES_MAX_GSI), DEFINE_PROP_BOOL("migration-enabled", S390FLICState, migration_enabled, true), - DEFINE_PROP_END_OF_LIST(), }; static void s390_flic_common_realize(DeviceState *dev, Error **errp) diff --git a/hw/intc/sifive_plic.c b/hw/intc/sifive_plic.c index 5b011b2a7d..a5b0f6ef1b 100644 --- a/hw/intc/sifive_plic.c +++ b/hw/intc/sifive_plic.c @@ -444,7 +444,6 @@ static const Property sifive_plic_properties[] = { DEFINE_PROP_UINT32("context-base", SiFivePLICState, context_base, 0), DEFINE_PROP_UINT32("context-stride", SiFivePLICState, context_stride, 0), DEFINE_PROP_UINT32("aperture-size", SiFivePLICState, aperture_size, 0), - DEFINE_PROP_END_OF_LIST(), }; static void sifive_plic_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c index bb9b2a4a12..a764c0bb57 100644 --- a/hw/intc/spapr_xive.c +++ b/hw/intc/spapr_xive.c @@ -633,7 +633,6 @@ static const Property spapr_xive_properties[] = { DEFINE_PROP_UINT64("vc-base", SpaprXive, vc_base, SPAPR_XIVE_VC_BASE), DEFINE_PROP_UINT64("tm-base", SpaprXive, tm_base, SPAPR_XIVE_TM_BASE), DEFINE_PROP_UINT8("hv-prio", SpaprXive, hv_prio, 7), - DEFINE_PROP_END_OF_LIST(), }; static int spapr_xive_cpu_intc_create(SpaprInterruptController *intc, diff --git a/hw/intc/xics.c b/hw/intc/xics.c index aa3f7d7daa..9c1b7bbe9e 100644 --- a/hw/intc/xics.c +++ b/hw/intc/xics.c @@ -348,7 +348,6 @@ static const Property icp_properties[] = { DEFINE_PROP_LINK(ICP_PROP_XICS, ICPState, xics, TYPE_XICS_FABRIC, XICSFabric *), DEFINE_PROP_LINK(ICP_PROP_CPU, ICPState, cs, TYPE_CPU, CPUState *), - DEFINE_PROP_END_OF_LIST(), }; static void icp_class_init(ObjectClass *klass, void *data) @@ -680,7 +679,6 @@ static const Property ics_properties[] = { DEFINE_PROP_UINT32("nr-irqs", ICSState, nr_irqs, 0), DEFINE_PROP_LINK(ICS_PROP_XICS, ICSState, xics, TYPE_XICS_FABRIC, XICSFabric *), - DEFINE_PROP_END_OF_LIST(), }; static void ics_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/xilinx_intc.c b/hw/intc/xilinx_intc.c index 3e860ab582..d99cf567ae 100644 --- a/hw/intc/xilinx_intc.c +++ b/hw/intc/xilinx_intc.c @@ -178,7 +178,6 @@ static void xilinx_intc_init(Object *obj) static const Property xilinx_intc_properties[] = { DEFINE_PROP_UINT32("kind-of-intr", XpsIntc, c_kind_of_intr, 0), - DEFINE_PROP_END_OF_LIST(), }; static void xilinx_intc_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/xive.c b/hw/intc/xive.c index 5994e4ce36..139cfdf9bf 100644 --- a/hw/intc/xive.c +++ b/hw/intc/xive.c @@ -931,7 +931,6 @@ static const Property xive_tctx_properties[] = { DEFINE_PROP_LINK("cpu", XiveTCTX, cs, TYPE_CPU, CPUState *), DEFINE_PROP_LINK("presenter", XiveTCTX, xptr, TYPE_XIVE_PRESENTER, XivePresenter *), - DEFINE_PROP_END_OF_LIST(), }; static void xive_tctx_class_init(ObjectClass *klass, void *data) @@ -1414,7 +1413,6 @@ static const Property xive_source_properties[] = { DEFINE_PROP_UINT8("reset-pq", XiveSource, reset_pq, XIVE_ESB_OFF), DEFINE_PROP_LINK("xive", XiveSource, xive, TYPE_XIVE_NOTIFIER, XiveNotifier *), - DEFINE_PROP_END_OF_LIST(), }; static void xive_source_class_init(ObjectClass *klass, void *data) @@ -2005,7 +2003,6 @@ void xive_router_notify(XiveNotifier *xn, uint32_t lisn, bool pq_checked) static const Property xive_router_properties[] = { DEFINE_PROP_LINK("xive-fabric", XiveRouter, xfb, TYPE_XIVE_FABRIC, XiveFabric *), - DEFINE_PROP_END_OF_LIST(), }; static void xive_router_class_init(ObjectClass *klass, void *data) @@ -2175,7 +2172,6 @@ static const Property xive_end_source_properties[] = { DEFINE_PROP_UINT32("shift", XiveENDSource, esb_shift, XIVE_ESB_64K), DEFINE_PROP_LINK("xive", XiveENDSource, xrtr, TYPE_XIVE_ROUTER, XiveRouter *), - DEFINE_PROP_END_OF_LIST(), }; static void xive_end_source_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/xive2.c b/hw/intc/xive2.c index 91d3d68705..fc5aed3315 100644 --- a/hw/intc/xive2.c +++ b/hw/intc/xive2.c @@ -1031,7 +1031,6 @@ void xive2_router_notify(XiveNotifier *xn, uint32_t lisn, bool pq_checked) static const Property xive2_router_properties[] = { DEFINE_PROP_LINK("xive-fabric", Xive2Router, xfb, TYPE_XIVE_FABRIC, XiveFabric *), - DEFINE_PROP_END_OF_LIST(), }; static void xive2_router_class_init(ObjectClass *klass, void *data) @@ -1247,7 +1246,6 @@ static const Property xive2_end_source_properties[] = { DEFINE_PROP_UINT32("shift", Xive2EndSource, esb_shift, XIVE_ESB_64K), DEFINE_PROP_LINK("xive", Xive2EndSource, xrtr, TYPE_XIVE2_ROUTER, Xive2Router *), - DEFINE_PROP_END_OF_LIST(), }; static void xive2_end_source_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/xlnx-pmu-iomod-intc.c b/hw/intc/xlnx-pmu-iomod-intc.c index 21b9c83658..ccdab244b3 100644 --- a/hw/intc/xlnx-pmu-iomod-intc.c +++ b/hw/intc/xlnx-pmu-iomod-intc.c @@ -478,7 +478,6 @@ static const Property xlnx_pmu_io_intc_properties[] = { DEFINE_PROP_UINT32("intc-intr-size", XlnxPMUIOIntc, cfg.intr_size, 0), DEFINE_PROP_UINT32("intc-level-edge", XlnxPMUIOIntc, cfg.level_edge, 0), DEFINE_PROP_UINT32("intc-positive", XlnxPMUIOIntc, cfg.positive, 0), - DEFINE_PROP_END_OF_LIST(), }; static void xlnx_pmu_io_intc_realize(DeviceState *dev, Error **errp) |