diff options
Diffstat (limited to 'hw/intc')
| -rw-r--r-- | hw/intc/xive.c | 9 | ||||
| -rw-r--r-- | hw/intc/xive2.c | 10 |
2 files changed, 19 insertions, 0 deletions
diff --git a/hw/intc/xive.c b/hw/intc/xive.c index f15f98588a..0d98b9539c 100644 --- a/hw/intc/xive.c +++ b/hw/intc/xive.c @@ -1061,6 +1061,15 @@ static void xive_source_esb_write(void *opaque, hwaddr addr, notify = xive_source_esb_eoi(xsrc, srcno); break; + /* + * This is an internal offset used to inject triggers when the PQ + * state bits are not controlled locally. Such as for LSIs when + * under ABT mode. + */ + case XIVE_ESB_INJECT ... XIVE_ESB_INJECT + 0x3FF: + notify = true; + break; + case XIVE_ESB_SET_PQ_00 ... XIVE_ESB_SET_PQ_00 + 0x0FF: case XIVE_ESB_SET_PQ_01 ... XIVE_ESB_SET_PQ_01 + 0x0FF: case XIVE_ESB_SET_PQ_10 ... XIVE_ESB_SET_PQ_10 + 0x0FF: diff --git a/hw/intc/xive2.c b/hw/intc/xive2.c index 8f278f3bf6..2836bbdc83 100644 --- a/hw/intc/xive2.c +++ b/hw/intc/xive2.c @@ -659,6 +659,16 @@ static void xive2_end_source_write(void *opaque, hwaddr addr, notify = xive_esb_eoi(&pq); break; + case XIVE_ESB_INJECT ... XIVE_ESB_INJECT + 0x3FF: + if (end_esmask == END2_W1_ESe) { + qemu_log_mask(LOG_GUEST_ERROR, + "XIVE: END %x/%x can not EQ inject on ESe\n", + end_blk, end_idx); + return; + } + notify = true; + break; + default: qemu_log_mask(LOG_GUEST_ERROR, "XIVE: invalid END ESB write addr %d\n", offset); |