diff options
Diffstat (limited to 'hw/mips')
| -rw-r--r-- | hw/mips/Makefile.objs | 2 | ||||
| -rw-r--r-- | hw/mips/cps.c | 2 | ||||
| -rw-r--r-- | hw/mips/cputimer.c | 165 | ||||
| -rw-r--r-- | hw/mips/mips_fulong2e.c | 2 | ||||
| -rw-r--r-- | hw/mips/mips_jazz.c | 2 | ||||
| -rw-r--r-- | hw/mips/mips_malta.c | 2 | ||||
| -rw-r--r-- | hw/mips/mips_mipssim.c | 2 | ||||
| -rw-r--r-- | hw/mips/mips_r4k.c | 2 |
8 files changed, 7 insertions, 172 deletions
diff --git a/hw/mips/Makefile.objs b/hw/mips/Makefile.objs index 48cd2ef50e..17a311aaba 100644 --- a/hw/mips/Makefile.objs +++ b/hw/mips/Makefile.objs @@ -1,5 +1,5 @@ obj-y += mips_r4k.o mips_malta.o mips_mipssim.o -obj-y += addr.o cputimer.o mips_int.o +obj-y += addr.o mips_int.o obj-$(CONFIG_JAZZ) += mips_jazz.o obj-$(CONFIG_FULONG) += mips_fulong2e.o obj-y += gt64xxx_pci.o diff --git a/hw/mips/cps.c b/hw/mips/cps.c index 79d4c5e30a..fe5c630af6 100644 --- a/hw/mips/cps.c +++ b/hw/mips/cps.c @@ -71,7 +71,7 @@ static void mips_cps_realize(DeviceState *dev, Error **errp) bool itu_present = false; for (i = 0; i < s->num_vp; i++) { - cpu = cpu_mips_init(s->cpu_model); + cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, s->cpu_model)); /* Init internal devices */ cpu_mips_irq_init_cpu(cpu); diff --git a/hw/mips/cputimer.c b/hw/mips/cputimer.c deleted file mode 100644 index 8a166b3ea7..0000000000 --- a/hw/mips/cputimer.c +++ /dev/null @@ -1,165 +0,0 @@ -/* - * QEMU MIPS timer support - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "qemu/osdep.h" -#include "hw/hw.h" -#include "hw/mips/cpudevs.h" -#include "qemu/timer.h" -#include "sysemu/kvm.h" - -#define TIMER_PERIOD 10 /* 10 ns period for 100 Mhz frequency */ - -/* XXX: do not use a global */ -uint32_t cpu_mips_get_random (CPUMIPSState *env) -{ - static uint32_t seed = 1; - static uint32_t prev_idx = 0; - uint32_t idx; - uint32_t nb_rand_tlb = env->tlb->nb_tlb - env->CP0_Wired; - - if (nb_rand_tlb == 1) { - return env->tlb->nb_tlb - 1; - } - - /* Don't return same value twice, so get another value */ - do { - /* Use a simple algorithm of Linear Congruential Generator - * from ISO/IEC 9899 standard. */ - seed = 1103515245 * seed + 12345; - idx = (seed >> 16) % nb_rand_tlb + env->CP0_Wired; - } while (idx == prev_idx); - prev_idx = idx; - return idx; -} - -/* MIPS R4K timer */ -static void cpu_mips_timer_update(CPUMIPSState *env) -{ - uint64_t now, next; - uint32_t wait; - - now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); - wait = env->CP0_Compare - env->CP0_Count - (uint32_t)(now / TIMER_PERIOD); - next = now + (uint64_t)wait * TIMER_PERIOD; - timer_mod(env->timer, next); -} - -/* Expire the timer. */ -static void cpu_mips_timer_expire(CPUMIPSState *env) -{ - cpu_mips_timer_update(env); - if (env->insn_flags & ISA_MIPS32R2) { - env->CP0_Cause |= 1 << CP0Ca_TI; - } - qemu_irq_raise(env->irq[(env->CP0_IntCtl >> CP0IntCtl_IPTI) & 0x7]); -} - -uint32_t cpu_mips_get_count (CPUMIPSState *env) -{ - if (env->CP0_Cause & (1 << CP0Ca_DC)) { - return env->CP0_Count; - } else { - uint64_t now; - - now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); - if (timer_pending(env->timer) - && timer_expired(env->timer, now)) { - /* The timer has already expired. */ - cpu_mips_timer_expire(env); - } - - return env->CP0_Count + (uint32_t)(now / TIMER_PERIOD); - } -} - -void cpu_mips_store_count (CPUMIPSState *env, uint32_t count) -{ - /* - * This gets called from cpu_state_reset(), potentially before timer init. - * So env->timer may be NULL, which is also the case with KVM enabled so - * treat timer as disabled in that case. - */ - if (env->CP0_Cause & (1 << CP0Ca_DC) || !env->timer) - env->CP0_Count = count; - else { - /* Store new count register */ - env->CP0_Count = count - - (uint32_t)(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) / TIMER_PERIOD); - /* Update timer timer */ - cpu_mips_timer_update(env); - } -} - -void cpu_mips_store_compare (CPUMIPSState *env, uint32_t value) -{ - env->CP0_Compare = value; - if (!(env->CP0_Cause & (1 << CP0Ca_DC))) - cpu_mips_timer_update(env); - if (env->insn_flags & ISA_MIPS32R2) - env->CP0_Cause &= ~(1 << CP0Ca_TI); - qemu_irq_lower(env->irq[(env->CP0_IntCtl >> CP0IntCtl_IPTI) & 0x7]); -} - -void cpu_mips_start_count(CPUMIPSState *env) -{ - cpu_mips_store_count(env, env->CP0_Count); -} - -void cpu_mips_stop_count(CPUMIPSState *env) -{ - /* Store the current value */ - env->CP0_Count += (uint32_t)(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) / - TIMER_PERIOD); -} - -static void mips_timer_cb (void *opaque) -{ - CPUMIPSState *env; - - env = opaque; -#if 0 - qemu_log("%s\n", __func__); -#endif - - if (env->CP0_Cause & (1 << CP0Ca_DC)) - return; - - /* ??? This callback should occur when the counter is exactly equal to - the comparator value. Offset the count by one to avoid immediately - retriggering the callback before any virtual time has passed. */ - env->CP0_Count++; - cpu_mips_timer_expire(env); - env->CP0_Count--; -} - -void cpu_mips_clock_init (MIPSCPU *cpu) -{ - CPUMIPSState *env = &cpu->env; - - /* - * If we're in KVM mode, don't create the periodic timer, that is handled in - * kernel. - */ - if (!kvm_enabled()) { - env->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, &mips_timer_cb, env); - } -} diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c index 439a3d7a66..75318680e1 100644 --- a/hw/mips/mips_fulong2e.c +++ b/hw/mips/mips_fulong2e.c @@ -280,7 +280,7 @@ static void mips_fulong2e_init(MachineState *machine) if (cpu_model == NULL) { cpu_model = "Loongson-2E"; } - cpu = cpu_mips_init(cpu_model); + cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model)); env = &cpu->env; qemu_register_reset(main_cpu_reset, cpu); diff --git a/hw/mips/mips_jazz.c b/hw/mips/mips_jazz.c index ae10670efd..7e6626dc88 100644 --- a/hw/mips/mips_jazz.c +++ b/hw/mips/mips_jazz.c @@ -151,7 +151,7 @@ static void mips_jazz_init(MachineState *machine, if (cpu_model == NULL) { cpu_model = "R4000"; } - cpu = cpu_mips_init(cpu_model); + cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model)); env = &cpu->env; qemu_register_reset(main_cpu_reset, cpu); diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c index e87cd3230b..2adb9bcf89 100644 --- a/hw/mips/mips_malta.c +++ b/hw/mips/mips_malta.c @@ -931,7 +931,7 @@ static void create_cpu_without_cps(const char *cpu_model, int i; for (i = 0; i < smp_cpus; i++) { - cpu = cpu_mips_init(cpu_model); + cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model)); /* Init internal devices */ cpu_mips_irq_init_cpu(cpu); diff --git a/hw/mips/mips_mipssim.c b/hw/mips/mips_mipssim.c index 49cd38d680..a092072e2a 100644 --- a/hw/mips/mips_mipssim.c +++ b/hw/mips/mips_mipssim.c @@ -163,7 +163,7 @@ mips_mipssim_init(MachineState *machine) cpu_model = "24Kf"; #endif } - cpu = cpu_mips_init(cpu_model); + cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model)); env = &cpu->env; reset_info = g_malloc0(sizeof(ResetData)); diff --git a/hw/mips/mips_r4k.c b/hw/mips/mips_r4k.c index 7efee94431..1272d4ef9d 100644 --- a/hw/mips/mips_r4k.c +++ b/hw/mips/mips_r4k.c @@ -193,7 +193,7 @@ void mips_r4k_init(MachineState *machine) cpu_model = "24Kf"; #endif } - cpu = cpu_mips_init(cpu_model); + cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model)); env = &cpu->env; reset_info = g_malloc0(sizeof(ResetData)); |