diff options
Diffstat (limited to 'hw/misc')
| -rw-r--r-- | hw/misc/auxbus.c | 2 | ||||
| -rw-r--r-- | hw/misc/ivshmem.c | 6 | ||||
| -rw-r--r-- | hw/misc/macio/mac_dbdma.c | 4 | ||||
| -rw-r--r-- | hw/misc/mst_fpga.c | 4 |
4 files changed, 8 insertions, 8 deletions
diff --git a/hw/misc/auxbus.c b/hw/misc/auxbus.c index 8a8012f5f0..28d50d9d09 100644 --- a/hw/misc/auxbus.c +++ b/hw/misc/auxbus.c @@ -299,7 +299,7 @@ static void aux_slave_dev_print(Monitor *mon, DeviceState *dev, int indent) s = AUX_SLAVE(dev); - monitor_printf(mon, "%*smemory " TARGET_FMT_plx "/" TARGET_FMT_plx "\n", + monitor_printf(mon, "%*smemory " HWADDR_FMT_plx "/" HWADDR_FMT_plx "\n", indent, "", object_property_get_uint(OBJECT(s->mmio), "addr", NULL), memory_region_size(s->mmio)); diff --git a/hw/misc/ivshmem.c b/hw/misc/ivshmem.c index 8270db53cd..d66d912172 100644 --- a/hw/misc/ivshmem.c +++ b/hw/misc/ivshmem.c @@ -179,7 +179,7 @@ static void ivshmem_io_write(void *opaque, hwaddr addr, addr &= 0xfc; - IVSHMEM_DPRINTF("writing to addr " TARGET_FMT_plx "\n", addr); + IVSHMEM_DPRINTF("writing to addr " HWADDR_FMT_plx "\n", addr); switch (addr) { case INTRMASK: @@ -207,7 +207,7 @@ static void ivshmem_io_write(void *opaque, hwaddr addr, } break; default: - IVSHMEM_DPRINTF("Unhandled write " TARGET_FMT_plx "\n", addr); + IVSHMEM_DPRINTF("Unhandled write " HWADDR_FMT_plx "\n", addr); } } @@ -233,7 +233,7 @@ static uint64_t ivshmem_io_read(void *opaque, hwaddr addr, break; default: - IVSHMEM_DPRINTF("why are we reading " TARGET_FMT_plx "\n", addr); + IVSHMEM_DPRINTF("why are we reading " HWADDR_FMT_plx "\n", addr); ret = 0; } diff --git a/hw/misc/macio/mac_dbdma.c b/hw/misc/macio/mac_dbdma.c index efcc02609f..43bb1f56ba 100644 --- a/hw/misc/macio/mac_dbdma.c +++ b/hw/misc/macio/mac_dbdma.c @@ -704,7 +704,7 @@ static void dbdma_write(void *opaque, hwaddr addr, DBDMA_channel *ch = &s->channels[channel]; int reg = (addr - (channel << DBDMA_CHANNEL_SHIFT)) >> 2; - DBDMA_DPRINTFCH(ch, "writel 0x" TARGET_FMT_plx " <= 0x%08"PRIx64"\n", + DBDMA_DPRINTFCH(ch, "writel 0x" HWADDR_FMT_plx " <= 0x%08"PRIx64"\n", addr, value); DBDMA_DPRINTFCH(ch, "channel 0x%x reg 0x%x\n", (uint32_t)addr >> DBDMA_CHANNEL_SHIFT, reg); @@ -786,7 +786,7 @@ static uint64_t dbdma_read(void *opaque, hwaddr addr, break; } - DBDMA_DPRINTFCH(ch, "readl 0x" TARGET_FMT_plx " => 0x%08x\n", addr, value); + DBDMA_DPRINTFCH(ch, "readl 0x" HWADDR_FMT_plx " => 0x%08x\n", addr, value); DBDMA_DPRINTFCH(ch, "channel 0x%x reg 0x%x\n", (uint32_t)addr >> DBDMA_CHANNEL_SHIFT, reg); diff --git a/hw/misc/mst_fpga.c b/hw/misc/mst_fpga.c index 2aaadfa966..7692825867 100644 --- a/hw/misc/mst_fpga.c +++ b/hw/misc/mst_fpga.c @@ -131,7 +131,7 @@ mst_fpga_readb(void *opaque, hwaddr addr, unsigned size) return s->pcmcia1; default: printf("Mainstone - mst_fpga_readb: Bad register offset " - "0x" TARGET_FMT_plx "\n", addr); + "0x" HWADDR_FMT_plx "\n", addr); } return 0; } @@ -185,7 +185,7 @@ mst_fpga_writeb(void *opaque, hwaddr addr, uint64_t value, break; default: printf("Mainstone - mst_fpga_writeb: Bad register offset " - "0x" TARGET_FMT_plx "\n", addr); + "0x" HWADDR_FMT_plx "\n", addr); } } |