diff options
Diffstat (limited to 'hw/rdma/vmw/pvrdma_main.c')
| -rw-r--r-- | hw/rdma/vmw/pvrdma_main.c | 53 |
1 files changed, 27 insertions, 26 deletions
diff --git a/hw/rdma/vmw/pvrdma_main.c b/hw/rdma/vmw/pvrdma_main.c index 99787812ba..c552248c90 100644 --- a/hw/rdma/vmw/pvrdma_main.c +++ b/hw/rdma/vmw/pvrdma_main.c @@ -13,16 +13,16 @@ * */ -#include <qemu/osdep.h> -#include <qapi/error.h> -#include <hw/hw.h> -#include <hw/pci/pci.h> -#include <hw/pci/pci_ids.h> -#include <hw/pci/msi.h> -#include <hw/pci/msix.h> -#include <hw/qdev-core.h> -#include <hw/qdev-properties.h> -#include <cpu.h> +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "hw/hw.h" +#include "hw/pci/pci.h" +#include "hw/pci/pci_ids.h" +#include "hw/pci/msi.h" +#include "hw/pci/msix.h" +#include "hw/qdev-core.h" +#include "hw/qdev-properties.h" +#include "cpu.h" #include "trace.h" #include "../rdma_rm.h" @@ -31,8 +31,8 @@ #include <infiniband/verbs.h> #include "pvrdma.h" -#include <standard-headers/rdma/vmw_pvrdma-abi.h> -#include <standard-headers/drivers/infiniband/hw/vmw_pvrdma/pvrdma_dev_api.h> +#include "standard-headers/rdma/vmw_pvrdma-abi.h" +#include "standard-headers/drivers/infiniband/hw/vmw_pvrdma/pvrdma_dev_api.h" #include "pvrdma_qp_ops.h" static Property pvrdma_dev_properties[] = { @@ -91,7 +91,7 @@ static int init_dev_ring(PvrdmaRing *ring, struct pvrdma_ring **ring_state, goto out_free_tbl; } /* RX ring is the second */ - (struct pvrdma_ring *)(*ring_state)++; + (*ring_state)++; rc = pvrdma_ring_init(ring, name, pci_dev, (struct pvrdma_ring *)*ring_state, (num_pages - 1) * TARGET_PAGE_SIZE / @@ -236,7 +236,7 @@ static void init_dsr_dev_caps(PVRDMADev *dev) dsr = dev->dsr_info.dsr; dsr->caps.fw_ver = PVRDMA_FW_VERSION; - pr_dbg("fw_ver=0x%lx\n", dsr->caps.fw_ver); + pr_dbg("fw_ver=0x%" PRIx64 "\n", dsr->caps.fw_ver); dsr->caps.mode = PVRDMA_DEVICE_MODE_ROCE; pr_dbg("mode=%d\n", dsr->caps.mode); @@ -261,11 +261,10 @@ static void init_dsr_dev_caps(PVRDMADev *dev) pr_dbg("gid_tbl_len=%d\n", dsr->caps.gid_tbl_len); dsr->caps.sys_image_guid = 0; - pr_dbg("sys_image_guid=%lx\n", dsr->caps.sys_image_guid); + pr_dbg("sys_image_guid=%" PRIx64 "\n", dsr->caps.sys_image_guid); dsr->caps.node_guid = cpu_to_be64(dev->node_guid); - pr_dbg("node_guid=%llx\n", - (long long unsigned int)be64_to_cpu(dsr->caps.node_guid)); + pr_dbg("node_guid=%" PRIx64 "\n", be64_to_cpu(dsr->caps.node_guid)); dsr->caps.phys_port_cnt = MAX_PORTS; pr_dbg("phys_port_cnt=%d\n", dsr->caps.phys_port_cnt); @@ -292,7 +291,7 @@ static void init_ports(PVRDMADev *dev, Error **errp) memset(dev->rdma_dev_res.ports, 0, sizeof(dev->rdma_dev_res.ports)); for (i = 0; i < MAX_PORTS; i++) { - dev->rdma_dev_res.ports[i].state = PVRDMA_PORT_DOWN; + dev->rdma_dev_res.ports[i].state = IBV_PORT_DOWN; dev->rdma_dev_res.ports[i].pkey_tbl = g_malloc0(sizeof(*dev->rdma_dev_res.ports[i].pkey_tbl) * @@ -343,8 +342,8 @@ static void regs_write(void *opaque, hwaddr addr, uint64_t val, unsigned size) /* pr_dbg("addr=0x%lx, val=0x%x, size=%d\n", addr, (uint32_t)val, size); */ if (set_reg_val(dev, addr, val)) { - pr_err("Error trying to set REG value, addr=0x%lx, val=0x%lx\n", - (uint64_t)addr, val); + pr_err("Fail to set REG value, addr=0x%" PRIx64 ", val=0x%" PRIx64 "\n", + addr, val); return; } @@ -373,7 +372,7 @@ static void regs_write(void *opaque, hwaddr addr, uint64_t val, unsigned size) } break; case PVRDMA_REG_IMR: - pr_dbg("Interrupt mask=0x%lx\n", val); + pr_dbg("Interrupt mask=0x%" PRIx64 "\n", val); dev->interrupt_mask = val; break; case PVRDMA_REG_REQUEST: @@ -404,7 +403,8 @@ static void uar_write(void *opaque, hwaddr addr, uint64_t val, unsigned size) switch (addr & 0xFFF) { /* Mask with 0xFFF as each UC gets page */ case PVRDMA_UAR_QP_OFFSET: - pr_dbg("UAR QP command, addr=0x%x, val=0x%lx\n", (uint32_t)addr, val); + pr_dbg("UAR QP command, addr=0x%" PRIx64 ", val=0x%" PRIx64 "\n", + (uint64_t)addr, val); if (val & PVRDMA_UAR_QP_SEND) { pvrdma_qp_send(dev, val & PVRDMA_UAR_HANDLE_MASK); } @@ -420,16 +420,17 @@ static void uar_write(void *opaque, hwaddr addr, uint64_t val, unsigned size) !!(val & PVRDMA_UAR_CQ_ARM_SOL)); } if (val & PVRDMA_UAR_CQ_ARM_SOL) { - pr_dbg("UAR_CQ_ARM_SOL (%ld)\n", val & PVRDMA_UAR_HANDLE_MASK); + pr_dbg("UAR_CQ_ARM_SOL (%" PRIx64 ")\n", + val & PVRDMA_UAR_HANDLE_MASK); } if (val & PVRDMA_UAR_CQ_POLL) { - pr_dbg("UAR_CQ_POLL (%ld)\n", val & PVRDMA_UAR_HANDLE_MASK); + pr_dbg("UAR_CQ_POLL (%" PRIx64 ")\n", val & PVRDMA_UAR_HANDLE_MASK); pvrdma_cq_poll(&dev->rdma_dev_res, val & PVRDMA_UAR_HANDLE_MASK); } break; default: - pr_err("Unsupported command, addr=0x%lx, val=0x%lx\n", - (uint64_t)addr, val); + pr_err("Unsupported command, addr=0x%" PRIx64 ", val=0x%" PRIx64 "\n", + addr, val); break; } } |