diff options
Diffstat (limited to 'hw/riscv/riscv-iommu-pci.c')
| -rw-r--r-- | hw/riscv/riscv-iommu-pci.c | 22 |
1 files changed, 21 insertions, 1 deletions
diff --git a/hw/riscv/riscv-iommu-pci.c b/hw/riscv/riscv-iommu-pci.c index a695314bbe..12451869e4 100644 --- a/hw/riscv/riscv-iommu-pci.c +++ b/hw/riscv/riscv-iommu-pci.c @@ -31,6 +31,7 @@ #include "cpu_bits.h" #include "riscv-iommu.h" #include "riscv-iommu-bits.h" +#include "trace.h" /* RISC-V IOMMU PCI Device Emulation */ #define RISCV_PCI_CLASS_SYSTEM_IOMMU 0x0806 @@ -66,6 +67,12 @@ typedef struct RISCVIOMMUStatePci { RISCVIOMMUState iommu; /* common IOMMU state */ } RISCVIOMMUStatePci; +struct RISCVIOMMUPciClass { + /*< public >*/ + DeviceRealize parent_realize; + ResettablePhases parent_phases; +}; + /* interrupt delivery callback */ static void riscv_iommu_pci_notify(RISCVIOMMUState *iommu, unsigned vector) { @@ -155,6 +162,7 @@ static void riscv_iommu_pci_init(Object *obj) qdev_alias_all_properties(DEVICE(iommu), obj); iommu->icvec_avail_vectors = RISCV_IOMMU_PCI_ICVEC_VECTORS; + riscv_iommu_set_cap_igs(iommu, RISCV_IOMMU_CAP_IGS_MSI); } static const Property riscv_iommu_pci_properties[] = { @@ -163,13 +171,25 @@ static const Property riscv_iommu_pci_properties[] = { DEFINE_PROP_UINT16("device-id", RISCVIOMMUStatePci, device_id, PCI_DEVICE_ID_REDHAT_RISCV_IOMMU), DEFINE_PROP_UINT8("revision", RISCVIOMMUStatePci, revision, 0x01), - DEFINE_PROP_END_OF_LIST(), }; +static void riscv_iommu_pci_reset_hold(Object *obj, ResetType type) +{ + RISCVIOMMUStatePci *pci = RISCV_IOMMU_PCI(obj); + RISCVIOMMUState *iommu = &pci->iommu; + + riscv_iommu_reset(iommu); + + trace_riscv_iommu_pci_reset_hold(type); +} + static void riscv_iommu_pci_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); + ResettableClass *rc = RESETTABLE_CLASS(klass); + + rc->phases.hold = riscv_iommu_pci_reset_hold; k->realize = riscv_iommu_pci_realize; k->exit = riscv_iommu_pci_exit; |