diff options
Diffstat (limited to 'hw/slavio_misc.c')
| -rw-r--r-- | hw/slavio_misc.c | 250 |
1 files changed, 121 insertions, 129 deletions
diff --git a/hw/slavio_misc.c b/hw/slavio_misc.c index 1f5a2d7330..484301c48a 100644 --- a/hw/slavio_misc.c +++ b/hw/slavio_misc.c @@ -36,6 +36,13 @@ typedef struct MiscState { SysBusDevice busdev; + MemoryRegion cfg_iomem; + MemoryRegion diag_iomem; + MemoryRegion mdm_iomem; + MemoryRegion led_iomem; + MemoryRegion sysctrl_iomem; + MemoryRegion aux1_iomem; + MemoryRegion aux2_iomem; qemu_irq irq; qemu_irq fdc_tc; uint32_t dummy; @@ -48,6 +55,7 @@ typedef struct MiscState { typedef struct APCState { SysBusDevice busdev; + MemoryRegion iomem; qemu_irq cpu_halt; } APCState; @@ -100,7 +108,7 @@ static void slavio_set_power_fail(void *opaque, int irq, int power_failing) } static void slavio_cfg_mem_writeb(void *opaque, target_phys_addr_t addr, - uint32_t val) + uint64_t val, unsigned size) { MiscState *s = opaque; @@ -109,7 +117,8 @@ static void slavio_cfg_mem_writeb(void *opaque, target_phys_addr_t addr, slavio_misc_update_irq(s); } -static uint32_t slavio_cfg_mem_readb(void *opaque, target_phys_addr_t addr) +static uint64_t slavio_cfg_mem_readb(void *opaque, target_phys_addr_t addr, + unsigned size) { MiscState *s = opaque; uint32_t ret = 0; @@ -119,20 +128,18 @@ static uint32_t slavio_cfg_mem_readb(void *opaque, target_phys_addr_t addr) return ret; } -static CPUReadMemoryFunc * const slavio_cfg_mem_read[3] = { - slavio_cfg_mem_readb, - NULL, - NULL, -}; - -static CPUWriteMemoryFunc * const slavio_cfg_mem_write[3] = { - slavio_cfg_mem_writeb, - NULL, - NULL, +static const MemoryRegionOps slavio_cfg_mem_ops = { + .read = slavio_cfg_mem_readb, + .write = slavio_cfg_mem_writeb, + .endianness = DEVICE_NATIVE_ENDIAN, + .valid = { + .min_access_size = 1, + .max_access_size = 1, + }, }; static void slavio_diag_mem_writeb(void *opaque, target_phys_addr_t addr, - uint32_t val) + uint64_t val, unsigned size) { MiscState *s = opaque; @@ -140,7 +147,8 @@ static void slavio_diag_mem_writeb(void *opaque, target_phys_addr_t addr, s->diag = val & 0xff; } -static uint32_t slavio_diag_mem_readb(void *opaque, target_phys_addr_t addr) +static uint64_t slavio_diag_mem_readb(void *opaque, target_phys_addr_t addr, + unsigned size) { MiscState *s = opaque; uint32_t ret = 0; @@ -150,20 +158,18 @@ static uint32_t slavio_diag_mem_readb(void *opaque, target_phys_addr_t addr) return ret; } -static CPUReadMemoryFunc * const slavio_diag_mem_read[3] = { - slavio_diag_mem_readb, - NULL, - NULL, -}; - -static CPUWriteMemoryFunc * const slavio_diag_mem_write[3] = { - slavio_diag_mem_writeb, - NULL, - NULL, +static const MemoryRegionOps slavio_diag_mem_ops = { + .read = slavio_diag_mem_readb, + .write = slavio_diag_mem_writeb, + .endianness = DEVICE_NATIVE_ENDIAN, + .valid = { + .min_access_size = 1, + .max_access_size = 1, + }, }; static void slavio_mdm_mem_writeb(void *opaque, target_phys_addr_t addr, - uint32_t val) + uint64_t val, unsigned size) { MiscState *s = opaque; @@ -171,7 +177,8 @@ static void slavio_mdm_mem_writeb(void *opaque, target_phys_addr_t addr, s->mctrl = val & 0xff; } -static uint32_t slavio_mdm_mem_readb(void *opaque, target_phys_addr_t addr) +static uint64_t slavio_mdm_mem_readb(void *opaque, target_phys_addr_t addr, + unsigned size) { MiscState *s = opaque; uint32_t ret = 0; @@ -181,20 +188,18 @@ static uint32_t slavio_mdm_mem_readb(void *opaque, target_phys_addr_t addr) return ret; } -static CPUReadMemoryFunc * const slavio_mdm_mem_read[3] = { - slavio_mdm_mem_readb, - NULL, - NULL, -}; - -static CPUWriteMemoryFunc * const slavio_mdm_mem_write[3] = { - slavio_mdm_mem_writeb, - NULL, - NULL, +static const MemoryRegionOps slavio_mdm_mem_ops = { + .read = slavio_mdm_mem_readb, + .write = slavio_mdm_mem_writeb, + .endianness = DEVICE_NATIVE_ENDIAN, + .valid = { + .min_access_size = 1, + .max_access_size = 1, + }, }; static void slavio_aux1_mem_writeb(void *opaque, target_phys_addr_t addr, - uint32_t val) + uint64_t val, unsigned size) { MiscState *s = opaque; @@ -210,7 +215,8 @@ static void slavio_aux1_mem_writeb(void *opaque, target_phys_addr_t addr, s->aux1 = val & 0xff; } -static uint32_t slavio_aux1_mem_readb(void *opaque, target_phys_addr_t addr) +static uint64_t slavio_aux1_mem_readb(void *opaque, target_phys_addr_t addr, + unsigned size) { MiscState *s = opaque; uint32_t ret = 0; @@ -220,20 +226,18 @@ static uint32_t slavio_aux1_mem_readb(void *opaque, target_phys_addr_t addr) return ret; } -static CPUReadMemoryFunc * const slavio_aux1_mem_read[3] = { - slavio_aux1_mem_readb, - NULL, - NULL, -}; - -static CPUWriteMemoryFunc * const slavio_aux1_mem_write[3] = { - slavio_aux1_mem_writeb, - NULL, - NULL, +static const MemoryRegionOps slavio_aux1_mem_ops = { + .read = slavio_aux1_mem_readb, + .write = slavio_aux1_mem_writeb, + .endianness = DEVICE_NATIVE_ENDIAN, + .valid = { + .min_access_size = 1, + .max_access_size = 1, + }, }; static void slavio_aux2_mem_writeb(void *opaque, target_phys_addr_t addr, - uint32_t val) + uint64_t val, unsigned size) { MiscState *s = opaque; @@ -248,7 +252,8 @@ static void slavio_aux2_mem_writeb(void *opaque, target_phys_addr_t addr, slavio_misc_update_irq(s); } -static uint32_t slavio_aux2_mem_readb(void *opaque, target_phys_addr_t addr) +static uint64_t slavio_aux2_mem_readb(void *opaque, target_phys_addr_t addr, + unsigned size) { MiscState *s = opaque; uint32_t ret = 0; @@ -258,19 +263,18 @@ static uint32_t slavio_aux2_mem_readb(void *opaque, target_phys_addr_t addr) return ret; } -static CPUReadMemoryFunc * const slavio_aux2_mem_read[3] = { - slavio_aux2_mem_readb, - NULL, - NULL, +static const MemoryRegionOps slavio_aux2_mem_ops = { + .read = slavio_aux2_mem_readb, + .write = slavio_aux2_mem_writeb, + .endianness = DEVICE_NATIVE_ENDIAN, + .valid = { + .min_access_size = 1, + .max_access_size = 1, + }, }; -static CPUWriteMemoryFunc * const slavio_aux2_mem_write[3] = { - slavio_aux2_mem_writeb, - NULL, - NULL, -}; - -static void apc_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val) +static void apc_mem_writeb(void *opaque, target_phys_addr_t addr, + uint64_t val, unsigned size) { APCState *s = opaque; @@ -278,7 +282,8 @@ static void apc_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val) qemu_irq_raise(s->cpu_halt); } -static uint32_t apc_mem_readb(void *opaque, target_phys_addr_t addr) +static uint64_t apc_mem_readb(void *opaque, target_phys_addr_t addr, + unsigned size) { uint32_t ret = 0; @@ -286,19 +291,18 @@ static uint32_t apc_mem_readb(void *opaque, target_phys_addr_t addr) return ret; } -static CPUReadMemoryFunc * const apc_mem_read[3] = { - apc_mem_readb, - NULL, - NULL, -}; - -static CPUWriteMemoryFunc * const apc_mem_write[3] = { - apc_mem_writeb, - NULL, - NULL, +static const MemoryRegionOps apc_mem_ops = { + .read = apc_mem_readb, + .write = apc_mem_writeb, + .endianness = DEVICE_NATIVE_ENDIAN, + .valid = { + .min_access_size = 1, + .max_access_size = 1, + } }; -static uint32_t slavio_sysctrl_mem_readl(void *opaque, target_phys_addr_t addr) +static uint64_t slavio_sysctrl_mem_readl(void *opaque, target_phys_addr_t addr, + unsigned size) { MiscState *s = opaque; uint32_t ret = 0; @@ -315,7 +319,7 @@ static uint32_t slavio_sysctrl_mem_readl(void *opaque, target_phys_addr_t addr) } static void slavio_sysctrl_mem_writel(void *opaque, target_phys_addr_t addr, - uint32_t val) + uint64_t val, unsigned size) { MiscState *s = opaque; @@ -332,19 +336,18 @@ static void slavio_sysctrl_mem_writel(void *opaque, target_phys_addr_t addr, } } -static CPUReadMemoryFunc * const slavio_sysctrl_mem_read[3] = { - NULL, - NULL, - slavio_sysctrl_mem_readl, +static const MemoryRegionOps slavio_sysctrl_mem_ops = { + .read = slavio_sysctrl_mem_readl, + .write = slavio_sysctrl_mem_writel, + .endianness = DEVICE_NATIVE_ENDIAN, + .valid = { + .min_access_size = 4, + .max_access_size = 4, + }, }; -static CPUWriteMemoryFunc * const slavio_sysctrl_mem_write[3] = { - NULL, - NULL, - slavio_sysctrl_mem_writel, -}; - -static uint32_t slavio_led_mem_readw(void *opaque, target_phys_addr_t addr) +static uint64_t slavio_led_mem_readw(void *opaque, target_phys_addr_t addr, + unsigned size) { MiscState *s = opaque; uint32_t ret = 0; @@ -361,7 +364,7 @@ static uint32_t slavio_led_mem_readw(void *opaque, target_phys_addr_t addr) } static void slavio_led_mem_writew(void *opaque, target_phys_addr_t addr, - uint32_t val) + uint64_t val, unsigned size) { MiscState *s = opaque; @@ -375,16 +378,14 @@ static void slavio_led_mem_writew(void *opaque, target_phys_addr_t addr, } } -static CPUReadMemoryFunc * const slavio_led_mem_read[3] = { - NULL, - slavio_led_mem_readw, - NULL, -}; - -static CPUWriteMemoryFunc * const slavio_led_mem_write[3] = { - NULL, - slavio_led_mem_writew, - NULL, +static const MemoryRegionOps slavio_led_mem_ops = { + .read = slavio_led_mem_readw, + .write = slavio_led_mem_writew, + .endianness = DEVICE_NATIVE_ENDIAN, + .valid = { + .min_access_size = 2, + .max_access_size = 2, + }, }; static const VMStateDescription vmstate_misc = { @@ -407,69 +408,60 @@ static const VMStateDescription vmstate_misc = { static int apc_init1(SysBusDevice *dev) { APCState *s = FROM_SYSBUS(APCState, dev); - int io; sysbus_init_irq(dev, &s->cpu_halt); /* Power management (APC) XXX: not a Slavio device */ - io = cpu_register_io_memory(apc_mem_read, apc_mem_write, s, - DEVICE_NATIVE_ENDIAN); - sysbus_init_mmio(dev, MISC_SIZE, io); + memory_region_init_io(&s->iomem, &apc_mem_ops, s, + "apc", MISC_SIZE); + sysbus_init_mmio(dev, &s->iomem); return 0; } static int slavio_misc_init1(SysBusDevice *dev) { MiscState *s = FROM_SYSBUS(MiscState, dev); - int io; sysbus_init_irq(dev, &s->irq); sysbus_init_irq(dev, &s->fdc_tc); /* 8 bit registers */ /* Slavio control */ - io = cpu_register_io_memory(slavio_cfg_mem_read, - slavio_cfg_mem_write, s, - DEVICE_NATIVE_ENDIAN); - sysbus_init_mmio(dev, MISC_SIZE, io); + memory_region_init_io(&s->cfg_iomem, &slavio_cfg_mem_ops, s, + "configuration", MISC_SIZE); + sysbus_init_mmio(dev, &s->cfg_iomem); /* Diagnostics */ - io = cpu_register_io_memory(slavio_diag_mem_read, - slavio_diag_mem_write, s, - DEVICE_NATIVE_ENDIAN); - sysbus_init_mmio(dev, MISC_SIZE, io); + memory_region_init_io(&s->diag_iomem, &slavio_diag_mem_ops, s, + "diagnostic", MISC_SIZE); + sysbus_init_mmio(dev, &s->diag_iomem); /* Modem control */ - io = cpu_register_io_memory(slavio_mdm_mem_read, - slavio_mdm_mem_write, s, - DEVICE_NATIVE_ENDIAN); - sysbus_init_mmio(dev, MISC_SIZE, io); + memory_region_init_io(&s->mdm_iomem, &slavio_mdm_mem_ops, s, + "modem", MISC_SIZE); + sysbus_init_mmio(dev, &s->mdm_iomem); /* 16 bit registers */ /* ss600mp diag LEDs */ - io = cpu_register_io_memory(slavio_led_mem_read, - slavio_led_mem_write, s, - DEVICE_NATIVE_ENDIAN); - sysbus_init_mmio(dev, MISC_SIZE, io); + memory_region_init_io(&s->led_iomem, &slavio_led_mem_ops, s, + "leds", MISC_SIZE); + sysbus_init_mmio(dev, &s->led_iomem); /* 32 bit registers */ /* System control */ - io = cpu_register_io_memory(slavio_sysctrl_mem_read, - slavio_sysctrl_mem_write, s, - DEVICE_NATIVE_ENDIAN); - sysbus_init_mmio(dev, SYSCTRL_SIZE, io); + memory_region_init_io(&s->sysctrl_iomem, &slavio_sysctrl_mem_ops, s, + "system-control", MISC_SIZE); + sysbus_init_mmio(dev, &s->sysctrl_iomem); /* AUX 1 (Misc System Functions) */ - io = cpu_register_io_memory(slavio_aux1_mem_read, - slavio_aux1_mem_write, s, - DEVICE_NATIVE_ENDIAN); - sysbus_init_mmio(dev, MISC_SIZE, io); + memory_region_init_io(&s->aux1_iomem, &slavio_aux1_mem_ops, s, + "misc-system-functions", MISC_SIZE); + sysbus_init_mmio(dev, &s->aux1_iomem); /* AUX 2 (Software Powerdown Control) */ - io = cpu_register_io_memory(slavio_aux2_mem_read, - slavio_aux2_mem_write, s, - DEVICE_NATIVE_ENDIAN); - sysbus_init_mmio(dev, MISC_SIZE, io); + memory_region_init_io(&s->aux2_iomem, &slavio_aux2_mem_ops, s, + "software-powerdown-control", MISC_SIZE); + sysbus_init_mmio(dev, &s->aux2_iomem); qdev_init_gpio_in(&dev->qdev, slavio_set_power_fail, 1); |