diff options
Diffstat (limited to 'hw/timer')
| -rw-r--r-- | hw/timer/a9gtimer.c | 2 | ||||
| -rw-r--r-- | hw/timer/cadence_ttc.c | 2 | ||||
| -rw-r--r-- | hw/timer/hpet.c | 30 | ||||
| -rw-r--r-- | hw/timer/mss-timer.c | 2 | ||||
| -rw-r--r-- | hw/timer/omap_gptimer.c | 6 | ||||
| -rw-r--r-- | hw/timer/stm32f2xx_timer.c | 2 | ||||
| -rw-r--r-- | hw/timer/twl92230.c | 6 |
7 files changed, 38 insertions, 12 deletions
diff --git a/hw/timer/a9gtimer.c b/hw/timer/a9gtimer.c index ce1dc63911..96d534d8a8 100644 --- a/hw/timer/a9gtimer.c +++ b/hw/timer/a9gtimer.c @@ -37,7 +37,7 @@ fprintf(stderr, ": %s: ", __func__); \ fprintf(stderr, ## __VA_ARGS__); \ } \ -} while (0); +} while (0) #define DB_PRINT(...) DB_PRINT_L(0, ## __VA_ARGS__) diff --git a/hw/timer/cadence_ttc.c b/hw/timer/cadence_ttc.c index 5e65fdb5a0..10056407ab 100644 --- a/hw/timer/cadence_ttc.c +++ b/hw/timer/cadence_ttc.c @@ -24,7 +24,7 @@ #define DB_PRINT(...) do { \ fprintf(stderr, ": %s: ", __func__); \ fprintf(stderr, ## __VA_ARGS__); \ - } while (0); + } while (0) #else #define DB_PRINT(...) #endif diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c index 577371bc6d..d97436bc7b 100644 --- a/hw/timer/hpet.c +++ b/hw/timer/hpet.c @@ -70,6 +70,7 @@ typedef struct HPETState { MemoryRegion iomem; uint64_t hpet_offset; + bool hpet_offset_saved; qemu_irq irqs[HPET_NUM_IRQ_ROUTES]; uint32_t flags; uint8_t rtc_irq_level; @@ -221,7 +222,9 @@ static int hpet_pre_save(void *opaque) HPETState *s = opaque; /* save current counter value */ - s->hpet_counter = hpet_get_ticks(s); + if (hpet_enabled(s)) { + s->hpet_counter = hpet_get_ticks(s); + } return 0; } @@ -252,7 +255,10 @@ static int hpet_post_load(void *opaque, int version_id) HPETState *s = opaque; /* Recalculate the offset between the main counter and guest time */ - s->hpet_offset = ticks_to_ns(s->hpet_counter) - qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); + if (!s->hpet_offset_saved) { + s->hpet_offset = ticks_to_ns(s->hpet_counter) + - qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); + } /* Push number of timers into capability returned via HPET_ID */ s->capability &= ~HPET_ID_NUM_TIM_MASK; @@ -267,6 +273,13 @@ static int hpet_post_load(void *opaque, int version_id) return 0; } +static bool hpet_offset_needed(void *opaque) +{ + HPETState *s = opaque; + + return hpet_enabled(s) && s->hpet_offset_saved; +} + static bool hpet_rtc_irq_level_needed(void *opaque) { HPETState *s = opaque; @@ -285,6 +298,17 @@ static const VMStateDescription vmstate_hpet_rtc_irq_level = { } }; +static const VMStateDescription vmstate_hpet_offset = { + .name = "hpet/offset", + .version_id = 1, + .minimum_version_id = 1, + .needed = hpet_offset_needed, + .fields = (VMStateField[]) { + VMSTATE_UINT64(hpet_offset, HPETState), + VMSTATE_END_OF_LIST() + } +}; + static const VMStateDescription vmstate_hpet_timer = { .name = "hpet_timer", .version_id = 1, @@ -320,6 +344,7 @@ static const VMStateDescription vmstate_hpet = { }, .subsections = (const VMStateDescription*[]) { &vmstate_hpet_rtc_irq_level, + &vmstate_hpet_offset, NULL } }; @@ -762,6 +787,7 @@ static Property hpet_device_properties[] = { DEFINE_PROP_UINT8("timers", HPETState, num_timers, HPET_MIN_TIMERS), DEFINE_PROP_BIT("msi", HPETState, flags, HPET_MSI_SUPPORT, false), DEFINE_PROP_UINT32(HPET_INTCAP, HPETState, intcap, 0), + DEFINE_PROP_BOOL("hpet-offset-saved", HPETState, hpet_offset_saved, true), DEFINE_PROP_END_OF_LIST(), }; diff --git a/hw/timer/mss-timer.c b/hw/timer/mss-timer.c index 60f1213a3b..4f814572e2 100644 --- a/hw/timer/mss-timer.c +++ b/hw/timer/mss-timer.c @@ -36,7 +36,7 @@ if (MSS_TIMER_ERR_DEBUG >= lvl) { \ qemu_log("%s: " fmt "\n", __func__, ## args); \ } \ -} while (0); +} while (0) #define DB_PRINT(fmt, args...) DB_PRINT_L(1, fmt, ## args) diff --git a/hw/timer/omap_gptimer.c b/hw/timer/omap_gptimer.c index 6d7c8a396f..ae2dc99832 100644 --- a/hw/timer/omap_gptimer.c +++ b/hw/timer/omap_gptimer.c @@ -357,7 +357,7 @@ static void omap_gp_timer_write(void *opaque, hwaddr addr, s->config = value & 0x33d; if (((value >> 3) & 3) == 3) /* IDLEMODE */ fprintf(stderr, "%s: illegal IDLEMODE value in TIOCP_CFG\n", - __FUNCTION__); + __func__); if (value & 2) /* SOFTRESET */ omap_gp_timer_reset(s); break; @@ -395,10 +395,10 @@ static void omap_gp_timer_write(void *opaque, hwaddr addr, s->st = (value >> 0) & 1; if (s->inout && s->trigger != gpt_trigger_none) fprintf(stderr, "%s: GP timer pin must be an output " - "for this trigger mode\n", __FUNCTION__); + "for this trigger mode\n", __func__); if (!s->inout && s->capture != gpt_capture_none) fprintf(stderr, "%s: GP timer pin must be an input " - "for this capture mode\n", __FUNCTION__); + "for this capture mode\n", __func__); if (s->trigger == gpt_trigger_none) omap_gp_timer_out(s, s->scpwm); /* TODO: make sure this doesn't overflow 32-bits */ diff --git a/hw/timer/stm32f2xx_timer.c b/hw/timer/stm32f2xx_timer.c index e5f5e14a90..58fc7b1188 100644 --- a/hw/timer/stm32f2xx_timer.c +++ b/hw/timer/stm32f2xx_timer.c @@ -34,7 +34,7 @@ if (STM_TIMER_ERR_DEBUG >= lvl) { \ qemu_log("%s: " fmt, __func__, ## args); \ } \ -} while (0); +} while (0) #define DB_PRINT(fmt, args...) DB_PRINT_L(1, fmt, ## args) diff --git a/hw/timer/twl92230.c b/hw/timer/twl92230.c index eb58c378e0..ef116c636c 100644 --- a/hw/timer/twl92230.c +++ b/hw/timer/twl92230.c @@ -403,7 +403,7 @@ static uint8_t menelaus_read(void *opaque, uint8_t addr) default: #ifdef VERBOSE - printf("%s: unknown register %02x\n", __FUNCTION__, addr); + printf("%s: unknown register %02x\n", __func__, addr); #endif break; } @@ -615,7 +615,7 @@ static void menelaus_write(void *opaque, uint8_t addr, uint8_t value) rtc_badness: default: fprintf(stderr, "%s: bad RTC_UPDATE value %02x\n", - __FUNCTION__, value); + __func__, value); s->status |= 1 << 10; /* RTCERR */ menelaus_update(s); } @@ -708,7 +708,7 @@ static void menelaus_write(void *opaque, uint8_t addr, uint8_t value) default: #ifdef VERBOSE - printf("%s: unknown register %02x\n", __FUNCTION__, addr); + printf("%s: unknown register %02x\n", __func__, addr); #endif } } |