diff options
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/i386/intel_iommu.c | 71 | ||||
| -rw-r--r-- | hw/i386/pc_piix.c | 12 | ||||
| -rw-r--r-- | hw/intc/ioapic.c | 11 |
3 files changed, 58 insertions, 36 deletions
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 44b1231157..de86f53b4e 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -3363,11 +3363,28 @@ VTDAddressSpace *vtd_find_add_as(IntelIOMMUState *s, PCIBus *bus, int devfn) return vtd_dev_as; } +static uint64_t get_naturally_aligned_size(uint64_t start, + uint64_t size, int gaw) +{ + uint64_t max_mask = 1ULL << gaw; + uint64_t alignment = start ? start & -start : max_mask; + + alignment = MIN(alignment, max_mask); + size = MIN(size, max_mask); + + if (alignment <= size) { + /* Increase the alignment of start */ + return alignment; + } else { + /* Find the largest page mask from size */ + return 1ULL << (63 - clz64(size)); + } +} + /* Unmap the whole range in the notifier's scope. */ static void vtd_address_space_unmap(VTDAddressSpace *as, IOMMUNotifier *n) { - IOMMUTLBEntry entry; - hwaddr size; + hwaddr size, remain; hwaddr start = n->start; hwaddr end = n->end; IntelIOMMUState *s = as->iommu_state; @@ -3379,48 +3396,46 @@ static void vtd_address_space_unmap(VTDAddressSpace *as, IOMMUNotifier *n) * VT-d spec), otherwise we need to consider overflow of 64 bits. */ - if (end > VTD_ADDRESS_SIZE(s->aw_bits)) { + if (end > VTD_ADDRESS_SIZE(s->aw_bits) - 1) { /* * Don't need to unmap regions that is bigger than the whole * VT-d supported address space size */ - end = VTD_ADDRESS_SIZE(s->aw_bits); + end = VTD_ADDRESS_SIZE(s->aw_bits) - 1; } assert(start <= end); - size = end - start; + size = remain = end - start + 1; - if (ctpop64(size) != 1) { - /* - * This size cannot format a correct mask. Let's enlarge it to - * suite the minimum available mask. - */ - int n = 64 - clz64(size); - if (n > s->aw_bits) { - /* should not happen, but in case it happens, limit it */ - n = s->aw_bits; - } - size = 1ULL << n; + while (remain >= VTD_PAGE_SIZE) { + IOMMUTLBEntry entry; + uint64_t mask = get_naturally_aligned_size(start, remain, s->aw_bits); + + assert(mask); + + entry.iova = start; + entry.addr_mask = mask - 1; + entry.target_as = &address_space_memory; + entry.perm = IOMMU_NONE; + /* This field is meaningless for unmap */ + entry.translated_addr = 0; + + memory_region_notify_one(n, &entry); + + start += mask; + remain -= mask; } - entry.target_as = &address_space_memory; - /* Adjust iova for the size */ - entry.iova = n->start & ~(size - 1); - /* This field is meaningless for unmap */ - entry.translated_addr = 0; - entry.perm = IOMMU_NONE; - entry.addr_mask = size - 1; + assert(!remain); trace_vtd_as_unmap_whole(pci_bus_num(as->bus), VTD_PCI_SLOT(as->devfn), VTD_PCI_FUNC(as->devfn), - entry.iova, size); + n->start, size); - map.iova = entry.iova; - map.size = entry.addr_mask; + map.iova = n->start; + map.size = size; iova_tree_remove(as->iova_tree, &map); - - memory_region_notify_one(n, &entry); } static void vtd_address_space_unmap_all(IntelIOMMUState *s) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 581b3c2baa..c2280c72ef 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -23,6 +23,7 @@ */ #include "qemu/osdep.h" +#include "config-devices.h" #include "qemu/units.h" #include "hw/hw.h" @@ -61,9 +62,11 @@ #define MAX_IDE_BUS 2 +#ifdef CONFIG_IDE_ISA static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 }; static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 }; static const int ide_irq[MAX_IDE_BUS] = { 14, 15 }; +#endif /* PC hardware initialisation */ static void pc_init1(MachineState *machine, @@ -254,7 +257,10 @@ static void pc_init1(MachineState *machine, } idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0"); idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1"); - } else { + pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state); + } +#ifdef CONFIG_IDE_ISA +else { for(i = 0; i < MAX_IDE_BUS; i++) { ISADevice *dev; char busname[] = "ide.0"; @@ -268,9 +274,9 @@ static void pc_init1(MachineState *machine, busname[4] = '0' + i; idebus[i] = qdev_get_child_bus(DEVICE(dev), busname); } + pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state); } - - pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state); +#endif if (pcmc->pci_enabled && machine_usb(machine)) { pci_create_simple(pci_bus, piix3_devfn + 2, "piix3-usb-uhci"); diff --git a/hw/intc/ioapic.c b/hw/intc/ioapic.c index 7074489fdf..c408749876 100644 --- a/hw/intc/ioapic.c +++ b/hw/intc/ioapic.c @@ -245,8 +245,8 @@ void ioapic_eoi_broadcast(int vector) s->ioredtbl[n] = entry & ~IOAPIC_LVT_REMOTE_IRR; if (!(entry & IOAPIC_LVT_MASKED) && (s->irr & (1 << n))) { - ++s->irq_eoi[vector]; - if (s->irq_eoi[vector] >= SUCCESSIVE_IRQ_MAX_COUNT) { + ++s->irq_eoi[n]; + if (s->irq_eoi[n] >= SUCCESSIVE_IRQ_MAX_COUNT) { /* * Real hardware does not deliver the interrupt immediately * during eoi broadcast, and this lets a buggy guest make @@ -254,16 +254,16 @@ void ioapic_eoi_broadcast(int vector) * level-triggered interrupt. Emulate this behavior if we * detect an interrupt storm. */ - s->irq_eoi[vector] = 0; + s->irq_eoi[n] = 0; timer_mod_anticipate(s->delayed_ioapic_service_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + NANOSECONDS_PER_SECOND / 100); - trace_ioapic_eoi_delayed_reassert(vector); + trace_ioapic_eoi_delayed_reassert(n); } else { ioapic_service(s); } } else { - s->irq_eoi[vector] = 0; + s->irq_eoi[n] = 0; } } } @@ -380,6 +380,7 @@ ioapic_mem_write(void *opaque, hwaddr addr, uint64_t val, /* restore RO bits */ s->ioredtbl[index] &= IOAPIC_RW_BITS; s->ioredtbl[index] |= ro_bits; + s->irq_eoi[index] = 0; ioapic_fix_edge_remote_irr(&s->ioredtbl[index]); ioapic_service(s); } |