diff options
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/arm/Kconfig | 30 | ||||
| -rw-r--r-- | hw/char/Kconfig | 6 | ||||
| -rw-r--r-- | hw/char/meson.build | 2 | ||||
| -rw-r--r-- | hw/core/loader.c | 4 | ||||
| -rw-r--r-- | hw/core/qdev-properties.c | 37 | ||||
| -rw-r--r-- | hw/i386/fw_cfg.c | 2 | ||||
| -rw-r--r-- | hw/i386/pc.c | 2 | ||||
| -rw-r--r-- | hw/intc/xive.c | 29 | ||||
| -rw-r--r-- | hw/intc/xive2.c | 21 | ||||
| -rw-r--r-- | hw/loongarch/virt.c | 41 | ||||
| -rw-r--r-- | hw/ppc/amigaone.c | 16 | ||||
| -rw-r--r-- | hw/ppc/mac_newworld.c | 7 | ||||
| -rw-r--r-- | hw/ppc/mac_oldworld.c | 7 | ||||
| -rw-r--r-- | hw/ppc/pnv.c | 2 | ||||
| -rw-r--r-- | hw/ppc/pnv_bmc.c | 4 | ||||
| -rw-r--r-- | hw/ppc/pnv_core.c | 6 | ||||
| -rw-r--r-- | hw/ppc/pnv_occ.c | 201 | ||||
| -rw-r--r-- | hw/ppc/pnv_pnor.c | 2 | ||||
| -rw-r--r-- | hw/ppc/spapr.c | 2 | ||||
| -rw-r--r-- | hw/ppc/spapr_cpu_core.c | 6 | ||||
| -rw-r--r-- | hw/ppc/spapr_rtas.c | 5 | ||||
| -rw-r--r-- | hw/riscv/virt.c | 2 | ||||
| -rw-r--r-- | hw/sparc/sun4m.c | 9 | ||||
| -rw-r--r-- | hw/sparc64/sun4u.c | 9 | ||||
| -rw-r--r-- | hw/timer/Kconfig | 8 | ||||
| -rw-r--r-- | hw/timer/meson.build | 2 | ||||
| -rw-r--r-- | hw/uefi/Kconfig | 2 | ||||
| -rw-r--r-- | hw/uefi/var-service-core.c | 1 | ||||
| -rw-r--r-- | hw/uefi/var-service-json.c | 24 | ||||
| -rw-r--r-- | hw/xen/xen-bus.c | 8 |
30 files changed, 281 insertions, 216 deletions
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index 15200a2d7e..a55b44d7bd 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -21,8 +21,7 @@ config ARM_VIRT select PCI_EXPRESS select PCI_EXPRESS_GENERIC_BRIDGE select PFLASH_CFI01 - select PL011 if !HAVE_RUST # UART - select X_PL011_RUST if HAVE_RUST # UART + select PL011 # UART select PL031 # RTC select PL061 # GPIO select GPIO_PWR @@ -75,8 +74,7 @@ config HIGHBANK select AHCI_SYSBUS select ARM_TIMER # sp804 select ARM_V7M - select PL011 if !HAVE_RUST # UART - select X_PL011_RUST if HAVE_RUST # UART + select PL011 # UART select PL022 # SPI select PL031 # RTC select PL061 # GPIO @@ -89,8 +87,7 @@ config INTEGRATOR depends on TCG && ARM select ARM_TIMER select INTEGRATOR_DEBUG - select PL011 if !HAVE_RUST # UART - select X_PL011_RUST if HAVE_RUST # UART + select PL011 # UART select PL031 # RTC select PL041 # audio select PL050 # keyboard/mouse @@ -108,8 +105,7 @@ config MUSCA default y depends on TCG && ARM select ARMSSE - select PL011 if !HAVE_RUST # UART - select X_PL011_RUST if HAVE_RUST # UART + select PL011 # UART select PL031 select SPLIT_IRQ select UNIMP @@ -173,8 +169,7 @@ config REALVIEW select WM8750 # audio codec select LSI_SCSI_PCI select PCI - select PL011 if !HAVE_RUST # UART - select X_PL011_RUST if HAVE_RUST # UART + select PL011 # UART select PL031 # RTC select PL041 # audio codec select PL050 # keyboard/mouse @@ -199,8 +194,7 @@ config SBSA_REF select PCI_EXPRESS select PCI_EXPRESS_GENERIC_BRIDGE select PFLASH_CFI01 - select PL011 if !HAVE_RUST # UART - select X_PL011_RUST if HAVE_RUST # UART + select PL011 # UART select PL031 # RTC select PL061 # GPIO select USB_XHCI_SYSBUS @@ -224,8 +218,7 @@ config STELLARIS select ARM_V7M select CMSDK_APB_WATCHDOG select I2C - select PL011 if !HAVE_RUST # UART - select X_PL011_RUST if HAVE_RUST # UART + select PL011 # UART select PL022 # SPI select PL061 # GPIO select SSD0303 # OLED display @@ -285,8 +278,7 @@ config VEXPRESS select ARM_TIMER # sp804 select LAN9118 select PFLASH_CFI01 - select PL011 if !HAVE_RUST # UART - select X_PL011_RUST if HAVE_RUST # UART + select PL011 # UART select PL041 # audio codec select PL181 # display select REALVIEW @@ -371,8 +363,7 @@ config RASPI default y depends on TCG && ARM select FRAMEBUFFER - select PL011 if !HAVE_RUST # UART - select X_PL011_RUST if HAVE_RUST # UART + select PL011 # UART select SDHCI select USB_DWC2 select BCM2835_SPI @@ -448,8 +439,7 @@ config XLNX_VERSAL select ARM_GIC select CPU_CLUSTER select DEVICE_TREE - select PL011 if !HAVE_RUST # UART - select X_PL011_RUST if HAVE_RUST # UART + select PL011 # UART select CADENCE select VIRTIO_MMIO select UNIMP diff --git a/hw/char/Kconfig b/hw/char/Kconfig index 3f702565e6..9d517f3e28 100644 --- a/hw/char/Kconfig +++ b/hw/char/Kconfig @@ -11,6 +11,12 @@ config PARALLEL config PL011 bool + # The PL011 has both a Rust and a C implementation + select PL011_C if !HAVE_RUST + select X_PL011_RUST if HAVE_RUST + +config PL011_C + bool config SERIAL bool diff --git a/hw/char/meson.build b/hw/char/meson.build index 86ee808cae..4e439da8b9 100644 --- a/hw/char/meson.build +++ b/hw/char/meson.build @@ -9,7 +9,7 @@ system_ss.add(when: 'CONFIG_ISA_BUS', if_true: files('parallel-isa.c')) system_ss.add(when: 'CONFIG_ISA_DEBUG', if_true: files('debugcon.c')) system_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf51_uart.c')) system_ss.add(when: 'CONFIG_PARALLEL', if_true: files('parallel.c')) -system_ss.add(when: 'CONFIG_PL011', if_true: files('pl011.c')) +system_ss.add(when: 'CONFIG_PL011_C', if_true: files('pl011.c')) system_ss.add(when: 'CONFIG_SCLPCONSOLE', if_true: files('sclpconsole.c', 'sclpconsole-lm.c')) system_ss.add(when: 'CONFIG_SERIAL', if_true: files('serial.c')) system_ss.add(when: 'CONFIG_SERIAL_ISA', if_true: files('serial-isa.c')) diff --git a/hw/core/loader.c b/hw/core/loader.c index ce6ff1b52e..2e35f0aa90 100644 --- a/hw/core/loader.c +++ b/hw/core/loader.c @@ -226,7 +226,7 @@ static void bswap_ahdr(struct exec *e) ssize_t load_aout(const char *filename, hwaddr addr, int max_sz, - int bswap_needed, hwaddr target_page_size) + bool big_endian, hwaddr target_page_size) { int fd; ssize_t size, ret; @@ -241,7 +241,7 @@ ssize_t load_aout(const char *filename, hwaddr addr, int max_sz, if (size < 0) goto fail; - if (bswap_needed) { + if (big_endian != HOST_BIG_ENDIAN) { bswap_ahdr(&e); } diff --git a/hw/core/qdev-properties.c b/hw/core/qdev-properties.c index c04df3b337..147b3ffd16 100644 --- a/hw/core/qdev-properties.c +++ b/hw/core/qdev-properties.c @@ -442,6 +442,43 @@ const PropertyInfo qdev_prop_uint64_checkmask = { .set = set_uint64_checkmask, }; +/* --- pointer-size integer --- */ + +static void get_usize(Object *obj, Visitor *v, const char *name, void *opaque, + Error **errp) +{ + const Property *prop = opaque; + +#if HOST_LONG_BITS == 32 + uint32_t *ptr = object_field_prop_ptr(obj, prop); + visit_type_uint32(v, name, ptr, errp); +#else + uint64_t *ptr = object_field_prop_ptr(obj, prop); + visit_type_uint64(v, name, ptr, errp); +#endif +} + +static void set_usize(Object *obj, Visitor *v, const char *name, void *opaque, + Error **errp) +{ + const Property *prop = opaque; + +#if HOST_LONG_BITS == 32 + uint32_t *ptr = object_field_prop_ptr(obj, prop); + visit_type_uint32(v, name, ptr, errp); +#else + uint64_t *ptr = object_field_prop_ptr(obj, prop); + visit_type_uint64(v, name, ptr, errp); +#endif +} + +const PropertyInfo qdev_prop_usize = { + .type = "usize", + .get = get_usize, + .set = set_usize, + .set_default_value = qdev_propinfo_set_default_value_uint, +}; + /* --- string --- */ static void release_string(Object *obj, const char *name, void *opaque) diff --git a/hw/i386/fw_cfg.c b/hw/i386/fw_cfg.c index a7f1b60b98..5c0bcd5f8a 100644 --- a/hw/i386/fw_cfg.c +++ b/hw/i386/fw_cfg.c @@ -26,7 +26,7 @@ #include CONFIG_DEVICES #include "target/i386/cpu.h" -#if !defined(CONFIG_HPET) && !defined(CONFIG_X_HPET_RUST) +#if !defined(CONFIG_HPET) struct hpet_fw_config hpet_fw_cfg = {.count = UINT8_MAX}; #endif diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 63a96cd23f..01d0581f62 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1704,7 +1704,7 @@ static void pc_machine_initfn(Object *obj) pcms->sata_enabled = true; pcms->i8042_enabled = true; pcms->max_fw_size = 8 * MiB; -#if defined(CONFIG_HPET) || defined(CONFIG_X_HPET_RUST) +#if defined(CONFIG_HPET) pcms->hpet_enabled = true; #endif pcms->fd_bootchk = true; diff --git a/hw/intc/xive.c b/hw/intc/xive.c index c77df2c1f8..3eb28c2265 100644 --- a/hw/intc/xive.c +++ b/hw/intc/xive.c @@ -1662,12 +1662,20 @@ uint32_t xive_get_vpgroup_size(uint32_t nvp_index) * (starting with the least significant bits) in the NVP index * gives the size of the group. */ - return 1 << (ctz32(~nvp_index) + 1); + int first_zero = cto32(nvp_index); + if (first_zero >= 31) { + qemu_log_mask(LOG_GUEST_ERROR, "XIVE: Invalid group index 0x%08x", + nvp_index); + return 0; + } + + return 1U << (first_zero + 1); } static uint8_t xive_get_group_level(bool crowd, bool ignore, uint32_t nvp_blk, uint32_t nvp_index) { + int first_zero; uint8_t level; if (!ignore) { @@ -1675,18 +1683,31 @@ static uint8_t xive_get_group_level(bool crowd, bool ignore, return 0; } - level = (ctz32(~nvp_index) + 1) & 0b1111; + first_zero = cto32(nvp_index); + if (first_zero >= 31) { + qemu_log_mask(LOG_GUEST_ERROR, "XIVE: Invalid group index 0x%08x", + nvp_index); + return 0; + } + + level = (first_zero + 1) & 0b1111; if (crowd) { uint32_t blk; /* crowd level is bit position of first 0 from the right in nvp_blk */ - blk = ctz32(~nvp_blk) + 1; + first_zero = cto32(nvp_blk); + if (first_zero >= 31) { + qemu_log_mask(LOG_GUEST_ERROR, "XIVE: Invalid crowd block 0x%08x", + nvp_blk); + return 0; + } + blk = first_zero + 1; /* * Supported crowd sizes are 2^1, 2^2, and 2^4. 2^3 is not supported. * HW will encode level 4 as the value 3. See xive2_pgofnext(). */ - switch (level) { + switch (blk) { case 1: case 2: break; diff --git a/hw/intc/xive2.c b/hw/intc/xive2.c index f8ef615487..7d584dfafa 100644 --- a/hw/intc/xive2.c +++ b/hw/intc/xive2.c @@ -1153,13 +1153,15 @@ static bool xive2_vp_match_mask(uint32_t cam1, uint32_t cam2, static uint8_t xive2_get_vp_block_mask(uint32_t nvt_blk, bool crowd) { - uint8_t size, block_mask = 0b1111; + uint8_t block_mask = 0b1111; /* 3 supported crowd sizes: 2, 4, 16 */ if (crowd) { - size = xive_get_vpgroup_size(nvt_blk); - if (size == 8) { - qemu_log_mask(LOG_GUEST_ERROR, "XIVE: Invalid crowd size of 8n"); + uint32_t size = xive_get_vpgroup_size(nvt_blk); + + if (size != 2 && size != 4 && size != 16) { + qemu_log_mask(LOG_GUEST_ERROR, "XIVE: Invalid crowd size of %d", + size); return block_mask; } block_mask &= ~(size - 1); @@ -1172,7 +1174,14 @@ static uint32_t xive2_get_vp_index_mask(uint32_t nvt_index, bool cam_ignore) uint32_t index_mask = 0xFFFFFF; /* 24 bits */ if (cam_ignore) { - index_mask &= ~(xive_get_vpgroup_size(nvt_index) - 1); + uint32_t size = xive_get_vpgroup_size(nvt_index); + + if (size < 2) { + qemu_log_mask(LOG_GUEST_ERROR, "XIVE: Invalid group size of %d", + size); + return index_mask; + } + index_mask &= ~(size - 1); } return index_mask; } @@ -1335,7 +1344,7 @@ static void xive2_router_end_notify(Xive2Router *xrtr, uint8_t end_blk, return; } - if (xive2_end_is_crowd(&end) & !xive2_end_is_ignore(&end)) { + if (xive2_end_is_crowd(&end) && !xive2_end_is_ignore(&end)) { qemu_log_mask(LOG_GUEST_ERROR, "XIVE: invalid END, 'crowd' bit requires 'ignore' bit\n"); return; diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c index a5840ff968..e25864214f 100644 --- a/hw/loongarch/virt.c +++ b/hw/loongarch/virt.c @@ -38,6 +38,7 @@ #include "hw/mem/nvdimm.h" #include "hw/platform-bus.h" #include "hw/display/ramfb.h" +#include "hw/uefi/var-service-api.h" #include "hw/mem/pc-dimm.h" #include "system/tpm.h" #include "system/block-backend.h" @@ -327,7 +328,6 @@ static void virt_cpu_irq_init(LoongArchVirtMachineState *lvms) MachineClass *mc = MACHINE_GET_CLASS(ms); const CPUArchIdList *possible_cpus; CPUState *cs; - Error *err = NULL; /* cpu nodes */ possible_cpus = mc->possible_cpu_arch_ids(ms); @@ -337,8 +337,10 @@ static void virt_cpu_irq_init(LoongArchVirtMachineState *lvms) continue; } - hotplug_handler_plug(HOTPLUG_HANDLER(lvms->ipi), DEVICE(cs), &err); - hotplug_handler_plug(HOTPLUG_HANDLER(lvms->extioi), DEVICE(cs), &err); + hotplug_handler_plug(HOTPLUG_HANDLER(lvms->ipi), DEVICE(cs), + &error_abort); + hotplug_handler_plug(HOTPLUG_HANDLER(lvms->extioi), DEVICE(cs), + &error_abort); } } @@ -859,30 +861,29 @@ static void virt_cpu_pre_plug(HotplugHandler *hotplug_dev, LoongArchCPU *cpu = LOONGARCH_CPU(dev); CPUState *cs = CPU(dev); CPUArchId *cpu_slot; - Error *err = NULL; LoongArchCPUTopo topo; int arch_id; if (lvms->acpi_ged) { if ((cpu->thread_id < 0) || (cpu->thread_id >= ms->smp.threads)) { - error_setg(&err, + error_setg(errp, "Invalid thread-id %u specified, must be in range 1:%u", cpu->thread_id, ms->smp.threads - 1); - goto out; + return; } if ((cpu->core_id < 0) || (cpu->core_id >= ms->smp.cores)) { - error_setg(&err, + error_setg(errp, "Invalid core-id %u specified, must be in range 1:%u", cpu->core_id, ms->smp.cores - 1); - goto out; + return; } if ((cpu->socket_id < 0) || (cpu->socket_id >= ms->smp.sockets)) { - error_setg(&err, + error_setg(errp, "Invalid socket-id %u specified, must be in range 1:%u", cpu->socket_id, ms->smp.sockets - 1); - goto out; + return; } topo.socket_id = cpu->socket_id; @@ -891,11 +892,11 @@ static void virt_cpu_pre_plug(HotplugHandler *hotplug_dev, arch_id = virt_get_arch_id_from_topo(ms, &topo); cpu_slot = virt_find_cpu_slot(ms, arch_id); if (CPU(cpu_slot->cpu)) { - error_setg(&err, + error_setg(errp, "cpu(id%d=%d:%d:%d) with arch-id %" PRIu64 " exists", cs->cpu_index, cpu->socket_id, cpu->core_id, cpu->thread_id, cpu_slot->arch_id); - goto out; + return; } } else { /* For cold-add cpu, find empty cpu slot */ @@ -911,33 +912,24 @@ static void virt_cpu_pre_plug(HotplugHandler *hotplug_dev, cpu->env.address_space_iocsr = &lvms->as_iocsr; cpu->phy_id = cpu_slot->arch_id; cs->cpu_index = cpu_slot - ms->possible_cpus->cpus; - numa_cpu_pre_plug(cpu_slot, dev, &err); -out: - if (err) { - error_propagate(errp, err); - } + numa_cpu_pre_plug(cpu_slot, dev, errp); } static void virt_cpu_unplug_request(HotplugHandler *hotplug_dev, DeviceState *dev, Error **errp) { LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev); - Error *err = NULL; LoongArchCPU *cpu = LOONGARCH_CPU(dev); CPUState *cs = CPU(dev); if (cs->cpu_index == 0) { - error_setg(&err, "hot-unplug of boot cpu(id%d=%d:%d:%d) not supported", + error_setg(errp, "hot-unplug of boot cpu(id%d=%d:%d:%d) not supported", cs->cpu_index, cpu->socket_id, cpu->core_id, cpu->thread_id); - error_propagate(errp, err); return; } - hotplug_handler_unplug_request(HOTPLUG_HANDLER(lvms->acpi_ged), dev, &err); - if (err) { - error_propagate(errp, err); - } + hotplug_handler_unplug_request(HOTPLUG_HANDLER(lvms->acpi_ged), dev, errp); } static void virt_cpu_unplug(HotplugHandler *hotplug_dev, @@ -1207,6 +1199,7 @@ static void virt_class_init(ObjectClass *oc, void *data) object_class_property_set_description(oc, "v-eiointc", "Enable Virt Extend I/O Interrupt Controller."); machine_class_allow_dynamic_sysbus_dev(mc, TYPE_RAMFB_DEVICE); + machine_class_allow_dynamic_sysbus_dev(mc, TYPE_UEFI_VARS_SYSBUS); #ifdef CONFIG_TPM machine_class_allow_dynamic_sysbus_dev(mc, TYPE_TPM_TIS_SYSBUS); #endif diff --git a/hw/ppc/amigaone.c b/hw/ppc/amigaone.c index 483512125f..e9407a51b5 100644 --- a/hw/ppc/amigaone.c +++ b/hw/ppc/amigaone.c @@ -63,7 +63,7 @@ static const char dummy_fw[] = { #define NVRAM_ADDR 0xfd0e0000 #define NVRAM_SIZE (4 * KiB) -static char default_env[] = +static const char default_env[] = "baudrate=115200\0" "stdout=vga\0" "stdin=ps2kbd\0" @@ -108,8 +108,8 @@ static void nvram_write(void *opaque, hwaddr addr, uint64_t val, uint8_t *p = memory_region_get_ram_ptr(&s->mr); p[addr] = val; - if (s->blk) { - blk_pwrite(s->blk, addr, 1, &val, 0); + if (s->blk && blk_pwrite(s->blk, addr, 1, &val, 0) < 0) { + error_report("%s: could not write %s", __func__, blk_name(s->blk)); } } @@ -151,15 +151,17 @@ static void nvram_realize(DeviceState *dev, Error **errp) *c = cpu_to_be32(CRC32_DEFAULT_ENV); /* Also copies terminating \0 as env is terminated by \0\0 */ memcpy(p + 4, default_env, sizeof(default_env)); - if (s->blk) { - blk_pwrite(s->blk, 0, sizeof(crc) + sizeof(default_env), p, 0); + if (s->blk && + blk_pwrite(s->blk, 0, sizeof(crc) + sizeof(default_env), p, 0) < 0 + ) { + error_report("%s: could not write %s", __func__, blk_name(s->blk)); } return; } if (*c == 0) { *c = cpu_to_be32(crc32(0, p + 4, NVRAM_SIZE - 4)); - if (s->blk) { - blk_pwrite(s->blk, 0, 4, p, 0); + if (s->blk && blk_pwrite(s->blk, 0, 4, p, 0) < 0) { + error_report("%s: could not write %s", __func__, blk_name(s->blk)); } } if (be32_to_cpu(*c) != crc) { diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c index cb3dc3ab48..2d5309d6f5 100644 --- a/hw/ppc/mac_newworld.c +++ b/hw/ppc/mac_newworld.c @@ -197,11 +197,6 @@ static void ppc_core99_init(MachineState *machine) } if (machine->kernel_filename) { - int bswap_needed = 0; - -#ifdef BSWAP_NEEDED - bswap_needed = 1; -#endif kernel_base = KERNEL_LOAD_ADDR; kernel_size = load_elf(machine->kernel_filename, NULL, translate_kernel_address, NULL, NULL, NULL, @@ -209,7 +204,7 @@ static void ppc_core99_init(MachineState *machine) if (kernel_size < 0) { kernel_size = load_aout(machine->kernel_filename, kernel_base, machine->ram_size - kernel_base, - bswap_needed, TARGET_PAGE_SIZE); + true, TARGET_PAGE_SIZE); } if (kernel_size < 0) { kernel_size = load_image_targphys(machine->kernel_filename, diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c index 0dbcea035c..b5814690f5 100644 --- a/hw/ppc/mac_oldworld.c +++ b/hw/ppc/mac_oldworld.c @@ -153,11 +153,6 @@ static void ppc_heathrow_init(MachineState *machine) } if (machine->kernel_filename) { - int bswap_needed = 0; - -#ifdef BSWAP_NEEDED - bswap_needed = 1; -#endif kernel_base = KERNEL_LOAD_ADDR; kernel_size = load_elf(machine->kernel_filename, NULL, translate_kernel_address, NULL, NULL, NULL, @@ -165,7 +160,7 @@ static void ppc_heathrow_init(MachineState *machine) if (kernel_size < 0) { kernel_size = load_aout(machine->kernel_filename, kernel_base, machine->ram_size - kernel_base, - bswap_needed, TARGET_PAGE_SIZE); + true, TARGET_PAGE_SIZE); } if (kernel_size < 0) { kernel_size = load_image_targphys(machine->kernel_filename, diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 59365370c3..63f2232f32 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -1191,7 +1191,7 @@ static void pnv_init(MachineState *machine) * Since we can not reach the remote BMC machine with LPC memops, * map it always for now. */ - memory_region_add_subregion(pnv->chips[0]->fw_mr, PNOR_SPI_OFFSET, + memory_region_add_subregion(pnv->chips[0]->fw_mr, pnv->pnor->lpc_address, &pnv->pnor->mmio); /* diff --git a/hw/ppc/pnv_bmc.c b/hw/ppc/pnv_bmc.c index 811ba3d7a4..fb70a8c1f2 100644 --- a/hw/ppc/pnv_bmc.c +++ b/hw/ppc/pnv_bmc.c @@ -174,8 +174,8 @@ static void hiomap_cmd(IPMIBmcSim *ibs, uint8_t *cmd, unsigned int cmd_len, { PnvPnor *pnor = PNV_PNOR(object_property_get_link(OBJECT(ibs), "pnor", &error_abort)); + uint32_t pnor_addr = pnor->lpc_address; uint32_t pnor_size = pnor->size; - uint32_t pnor_addr = PNOR_SPI_OFFSET; bool readonly = false; rsp_buffer_push(rsp, cmd[2]); @@ -251,8 +251,8 @@ static const IPMINetfn hiomap_netfn = { void pnv_bmc_set_pnor(IPMIBmc *bmc, PnvPnor *pnor) { + uint32_t pnor_addr = pnor->lpc_address; uint32_t pnor_size = pnor->size; - uint32_t pnor_addr = PNOR_SPI_OFFSET; if (!pnv_bmc_is_simulator(bmc)) { return; diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c index 99d9644ee3..a33977da18 100644 --- a/hw/ppc/pnv_core.c +++ b/hw/ppc/pnv_core.c @@ -248,21 +248,25 @@ static void pnv_core_power10_xscom_write(void *opaque, hwaddr addr, if (val & PPC_BIT(7 + 8 * i)) { /* stop */ val &= ~PPC_BIT(7 + 8 * i); - cpu_pause(cs); env->quiesced = true; + ppc_maybe_interrupt(env); + cpu_pause(cs); } if (val & PPC_BIT(6 + 8 * i)) { /* start */ val &= ~PPC_BIT(6 + 8 * i); env->quiesced = false; + ppc_maybe_interrupt(env); cpu_resume(cs); } if (val & PPC_BIT(4 + 8 * i)) { /* sreset */ val &= ~PPC_BIT(4 + 8 * i); env->quiesced = false; + ppc_maybe_interrupt(env); pnv_cpu_do_nmi_resume(cs); } if (val & PPC_BIT(3 + 8 * i)) { /* clear maint */ env->quiesced = false; + ppc_maybe_interrupt(env); /* * Hardware has very particular cases for where clear maint * must be used and where start must be used to resume a diff --git a/hw/ppc/pnv_occ.c b/hw/ppc/pnv_occ.c index bda6b23ad3..177c5e514b 100644 --- a/hw/ppc/pnv_occ.c +++ b/hw/ppc/pnv_occ.c @@ -364,7 +364,12 @@ static void pnv_occ_register_types(void) type_init(pnv_occ_register_types); -/* From skiboot/hw/occ.c with tab to space conversion */ +/* + * From skiboot/hw/occ.c with following changes: + * - tab to space conversion + * - Type conversions u8->uint8_t s8->int8_t __be16->uint16_t etc + * - __packed -> QEMU_PACKED + */ /* OCC Communication Area for PStates */ #define OPAL_DYNAMIC_DATA_OFFSET 0x0B80 @@ -384,20 +389,6 @@ type_init(pnv_occ_register_types); #define FREQ_MAX_IN_DOMAIN 0 #define FREQ_MOST_RECENTLY_SET 1 -#define u8 uint8_t -#define s8 int8_t -#define u16 uint16_t -#define s16 int16_t -#define u32 uint32_t -#define s32 int32_t -#define u64 uint64_t -#define s64 int64_t -#define __be16 uint16_t -#define __be32 uint32_t -#ifndef __packed -#define __packed QEMU_PACKED -#endif /* !__packed */ - /** * OCC-OPAL Shared Memory Region * @@ -434,69 +425,69 @@ type_init(pnv_occ_register_types); * @spare/reserved/pad: Unused data */ struct occ_pstate_table { - u8 valid; - u8 version; - union __packed { - struct __packed { /* Version 0x01 and 0x02 */ - u8 throttle; - s8 pstate_min; - s8 pstate_nom; - s8 pstate_turbo; - s8 pstate_ultra_turbo; - u8 spare; - u64 reserved; - struct __packed { - s8 id; - u8 flags; - u8 vdd; - u8 vcs; - __be32 freq_khz; + uint8_t valid; + uint8_t version; + union QEMU_PACKED { + struct QEMU_PACKED { /* Version 0x01 and 0x02 */ + uint8_t throttle; + int8_t pstate_min; + int8_t pstate_nom; + int8_t pstate_turbo; + int8_t pstate_ultra_turbo; + uint8_t spare; + uint64_t reserved; + struct QEMU_PACKED { + int8_t id; + uint8_t flags; + uint8_t vdd; + uint8_t vcs; + uint32_t freq_khz; } pstates[MAX_PSTATES]; - s8 core_max[MAX_P8_CORES]; - u8 pad[100]; + int8_t core_max[MAX_P8_CORES]; + uint8_t pad[100]; } v2; - struct __packed { /* Version 0x90 */ - u8 occ_role; - u8 pstate_min; - u8 pstate_nom; - u8 pstate_turbo; - u8 pstate_ultra_turbo; - u8 spare; - u64 reserved1; - u64 reserved2; - struct __packed { - u8 id; - u8 flags; - u16 reserved; - __be32 freq_khz; + struct QEMU_PACKED { /* Version 0x90 */ + uint8_t occ_role; + uint8_t pstate_min; + uint8_t pstate_nom; + uint8_t pstate_turbo; + uint8_t pstate_ultra_turbo; + uint8_t spare; + uint64_t reserved1; + uint64_t reserved2; + struct QEMU_PACKED { + uint8_t id; + uint8_t flags; + uint16_t reserved; + uint32_t freq_khz; } pstates[MAX_PSTATES]; - u8 core_max[MAX_P9_CORES]; - u8 pad[56]; + uint8_t core_max[MAX_P9_CORES]; + uint8_t pad[56]; } v9; - struct __packed { /* Version 0xA0 */ - u8 occ_role; - u8 pstate_min; - u8 pstate_fixed_freq; - u8 pstate_base; - u8 pstate_ultra_turbo; - u8 pstate_fmax; - u8 minor; - u8 pstate_bottom_throttle; - u8 spare; - u8 spare1; - u32 reserved_32; - u64 reserved_64; - struct __packed { - u8 id; - u8 valid; - u16 reserved; - __be32 freq_khz; + struct QEMU_PACKED { /* Version 0xA0 */ + uint8_t occ_role; + uint8_t pstate_min; + uint8_t pstate_fixed_freq; + uint8_t pstate_base; + uint8_t pstate_ultra_turbo; + uint8_t pstate_fmax; + uint8_t minor; + uint8_t pstate_bottom_throttle; + uint8_t spare; + uint8_t spare1; + uint32_t reserved_32; + uint64_t reserved_64; + struct QEMU_PACKED { + uint8_t id; + uint8_t valid; + uint16_t reserved; + uint32_t freq_khz; } pstates[MAX_PSTATES]; - u8 core_max[MAX_P10_CORES]; - u8 pad[48]; + uint8_t core_max[MAX_P10_CORES]; + uint8_t pad[48]; } v10; }; -} __packed; +} QEMU_PACKED; /** * OPAL-OCC Command Response Interface @@ -531,13 +522,13 @@ struct occ_pstate_table { * @spare: Unused byte */ struct opal_command_buffer { - u8 flag; - u8 request_id; - u8 cmd; - u8 spare; - __be16 data_size; - u8 data[MAX_OPAL_CMD_DATA_LENGTH]; -} __packed; + uint8_t flag; + uint8_t request_id; + uint8_t cmd; + uint8_t spare; + uint16_t data_size; + uint8_t data[MAX_OPAL_CMD_DATA_LENGTH]; +} QEMU_PACKED; /** * OPAL-OCC Response Buffer @@ -571,13 +562,13 @@ struct opal_command_buffer { * @data: Response specific data */ struct occ_response_buffer { - u8 flag; - u8 request_id; - u8 cmd; - u8 status; - __be16 data_size; - u8 data[MAX_OCC_RSP_DATA_LENGTH]; -} __packed; + uint8_t flag; + uint8_t request_id; + uint8_t cmd; + uint8_t status; + uint16_t data_size; + uint8_t data[MAX_OCC_RSP_DATA_LENGTH]; +} QEMU_PACKED; /** * OCC-OPAL Shared Memory Interface Dynamic Data Vx90 @@ -608,31 +599,31 @@ struct occ_response_buffer { * @rsp: OCC Response Buffer */ struct occ_dynamic_data { - u8 occ_state; - u8 major_version; - u8 minor_version; - u8 gpus_present; - union __packed { - struct __packed { /* Version 0x90 */ - u8 spare1; + uint8_t occ_state; + uint8_t major_version; + uint8_t minor_version; + uint8_t gpus_present; + union QEMU_PACKED { + struct QEMU_PACKED { /* Version 0x90 */ + uint8_t spare1; } v9; - struct __packed { /* Version 0xA0 */ - u8 wof_enabled; + struct QEMU_PACKED { /* Version 0xA0 */ + uint8_t wof_enabled; } v10; }; - u8 cpu_throttle; - u8 mem_throttle; - u8 quick_pwr_drop; - u8 pwr_shifting_ratio; - u8 pwr_cap_type; - __be16 hard_min_pwr_cap; - __be16 max_pwr_cap; - __be16 cur_pwr_cap; - __be16 soft_min_pwr_cap; - u8 pad[110]; + uint8_t cpu_throttle; + uint8_t mem_throttle; + uint8_t quick_pwr_drop; + uint8_t pwr_shifting_ratio; + uint8_t pwr_cap_type; + uint16_t hard_min_pwr_cap; + uint16_t max_pwr_cap; + uint16_t cur_pwr_cap; + uint16_t soft_min_pwr_cap; + uint8_t pad[110]; struct opal_command_buffer cmd; struct occ_response_buffer rsp; -} __packed; +} QEMU_PACKED; enum occ_response_status { OCC_RSP_SUCCESS = 0x00, diff --git a/hw/ppc/pnv_pnor.c b/hw/ppc/pnv_pnor.c index 863e2e70ac..9db44ca21d 100644 --- a/hw/ppc/pnv_pnor.c +++ b/hw/ppc/pnv_pnor.c @@ -108,6 +108,8 @@ static void pnv_pnor_realize(DeviceState *dev, Error **errp) memset(s->storage, 0xFF, s->size); } + s->lpc_address = PNOR_SPI_OFFSET; + memory_region_init_io(&s->mmio, OBJECT(s), &pnv_pnor_ops, s, TYPE_PNV_PNOR, s->size); } diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index a415e51d07..b0a0f8c689 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -296,6 +296,7 @@ static void spapr_dt_pa_features(SpaprMachineState *spapr, pa_features[40 + 2] &= ~0x80; /* Radix MMU */ } if (spapr_get_cap(spapr, SPAPR_CAP_DAWR1)) { + g_assert(pa_size > 66); pa_features[66] |= 0x80; } @@ -4815,6 +4816,7 @@ static void spapr_machine_8_2_class_options(MachineClass *mc) { spapr_machine_9_0_class_options(mc); compat_props_add(mc->compat_props, hw_compat_8_2, hw_compat_8_2_len); + mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power9_v2.2"); } DEFINE_SPAPR_MACHINE(8, 2); diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index 0671d9e44b..faf9170ba6 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -37,6 +37,9 @@ static void spapr_reset_vcpu(PowerPCCPU *cpu) cpu_reset(cs); + env->quiesced = true; /* set "RTAS stopped" state. */ + ppc_maybe_interrupt(env); + /* * "PowerPC Processor binding to IEEE 1275" defines the initial MSR state * as 32bit (MSR_SF=0) with MSR_ME=1 and MSR_FP=1 in "8.2.1. Initial @@ -98,6 +101,9 @@ void spapr_cpu_set_entry_state(PowerPCCPU *cpu, target_ulong nip, CPU(cpu)->halted = 0; /* Enable Power-saving mode Exit Cause exceptions */ ppc_store_lpcr(cpu, env->spr[SPR_LPCR] | pcc->lpcr_pm); + + env->quiesced = false; /* clear "RTAS stopped" state. */ + ppc_maybe_interrupt(env); } /* diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c index 503d441b48..78309dbb09 100644 --- a/hw/ppc/spapr_rtas.c +++ b/hw/ppc/spapr_rtas.c @@ -110,7 +110,8 @@ static void rtas_query_cpu_stopped_state(PowerPCCPU *cpu_, id = rtas_ld(args, 0); cpu = spapr_find_cpu(id); if (cpu != NULL) { - if (CPU(cpu)->halted) { + CPUPPCState *env = &cpu->env; + if (env->quiesced) { rtas_st(rets, 1, 0); } else { rtas_st(rets, 1, 2); @@ -215,6 +216,8 @@ static void rtas_stop_self(PowerPCCPU *cpu, SpaprMachineState *spapr, * For the same reason, set PSSCR_EC. */ env->spr[SPR_PSSCR] |= PSSCR_EC; + env->quiesced = true; /* set "RTAS stopped" state. */ + ppc_maybe_interrupt(env); cs->halted = 1; ppc_store_lpcr(cpu, env->spr[SPR_LPCR] & ~pcc->lpcr_pm); kvmppc_set_reg_ppc_online(cpu, 0); diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index dae46f4733..e517002fdf 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -57,6 +57,7 @@ #include "hw/acpi/aml-build.h" #include "qapi/qapi-visit-common.h" #include "hw/virtio/virtio-iommu.h" +#include "hw/uefi/var-service-api.h" /* KVM AIA only supports APLIC MSI. APLIC Wired is always emulated by QEMU. */ static bool virt_use_kvm_aia_aplic_imsic(RISCVVirtAIAType aia_type) @@ -1935,6 +1936,7 @@ static void virt_machine_class_init(ObjectClass *oc, void *data) hc->plug = virt_machine_device_plug_cb; machine_class_allow_dynamic_sysbus_dev(mc, TYPE_RAMFB_DEVICE); + machine_class_allow_dynamic_sysbus_dev(mc, TYPE_UEFI_VARS_SYSBUS); #ifdef CONFIG_TPM machine_class_allow_dynamic_sysbus_dev(mc, TYPE_TPM_TIS_SYSBUS); #endif diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c index a48d3622c5..5aaafb40da 100644 --- a/hw/sparc/sun4m.c +++ b/hw/sparc/sun4m.c @@ -233,20 +233,13 @@ static unsigned long sun4m_load_kernel(const char *kernel_filename, kernel_size = 0; if (linux_boot) { - int bswap_needed; - -#ifdef BSWAP_NEEDED - bswap_needed = 1; -#else - bswap_needed = 0; -#endif kernel_size = load_elf(kernel_filename, NULL, translate_kernel_address, NULL, NULL, NULL, NULL, NULL, ELFDATA2MSB, EM_SPARC, 0, 0); if (kernel_size < 0) kernel_size = load_aout(kernel_filename, KERNEL_LOAD_ADDR, - RAM_size - KERNEL_LOAD_ADDR, bswap_needed, + RAM_size - KERNEL_LOAD_ADDR, true, TARGET_PAGE_SIZE); if (kernel_size < 0) kernel_size = load_image_targphys(kernel_filename, diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c index 8ab5cf0461..d3cb7270ff 100644 --- a/hw/sparc64/sun4u.c +++ b/hw/sparc64/sun4u.c @@ -168,13 +168,6 @@ static uint64_t sun4u_load_kernel(const char *kernel_filename, kernel_size = 0; if (linux_boot) { - int bswap_needed; - -#ifdef BSWAP_NEEDED - bswap_needed = 1; -#else - bswap_needed = 0; -#endif kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, kernel_entry, kernel_addr, &kernel_top, NULL, ELFDATA2MSB, EM_SPARCV9, 0, 0); @@ -182,7 +175,7 @@ static uint64_t sun4u_load_kernel(const char *kernel_filename, *kernel_addr = KERNEL_LOAD_ADDR; *kernel_entry = KERNEL_LOAD_ADDR; kernel_size = load_aout(kernel_filename, KERNEL_LOAD_ADDR, - RAM_size - KERNEL_LOAD_ADDR, bswap_needed, + RAM_size - KERNEL_LOAD_ADDR, true, TARGET_PAGE_SIZE); } if (kernel_size < 0) { diff --git a/hw/timer/Kconfig b/hw/timer/Kconfig index 9ac0084534..b3d823ce2c 100644 --- a/hw/timer/Kconfig +++ b/hw/timer/Kconfig @@ -11,7 +11,13 @@ config A9_GTIMER config HPET bool - default y if PC && !HAVE_RUST + default y if PC + # The HPET has both a Rust and a C implementation + select HPET_C if !HAVE_RUST + select X_HPET_RUST if HAVE_RUST + +config HPET_C + bool config I8254 bool diff --git a/hw/timer/meson.build b/hw/timer/meson.build index f5f9eed2d0..178321c029 100644 --- a/hw/timer/meson.build +++ b/hw/timer/meson.build @@ -13,7 +13,7 @@ system_ss.add(when: 'CONFIG_DIGIC', if_true: files('digic-timer.c')) system_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_mct.c')) system_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_pwm.c')) system_ss.add(when: 'CONFIG_GRLIB', if_true: files('grlib_gptimer.c')) -system_ss.add(when: 'CONFIG_HPET', if_true: files('hpet.c')) +system_ss.add(when: 'CONFIG_HPET_C', if_true: files('hpet.c')) system_ss.add(when: 'CONFIG_I8254', if_true: files('i8254_common.c', 'i8254.c')) system_ss.add(when: 'CONFIG_IMX', if_true: files('imx_epit.c')) system_ss.add(when: 'CONFIG_IMX', if_true: files('imx_gpt.c')) diff --git a/hw/uefi/Kconfig b/hw/uefi/Kconfig index ca6c2bc46a..046d55320e 100644 --- a/hw/uefi/Kconfig +++ b/hw/uefi/Kconfig @@ -1,3 +1,3 @@ config UEFI_VARS bool - default y if X86_64 || AARCH64 + default y if X86_64 || AARCH64 || RISCV64 || LOONGARCH64 diff --git a/hw/uefi/var-service-core.c b/hw/uefi/var-service-core.c index 8ed8378ab9..4836a0cb81 100644 --- a/hw/uefi/var-service-core.c +++ b/hw/uefi/var-service-core.c @@ -29,6 +29,7 @@ static int uefi_vars_post_load(void *opaque, int version_id) uefi_vars_state *uv = opaque; uefi_vars_update_storage(uv); + uefi_vars_json_save(uv); uv->buffer = g_malloc(uv->buf_size); return 0; } diff --git a/hw/uefi/var-service-json.c b/hw/uefi/var-service-json.c index 761082c11f..ad3462cd15 100644 --- a/hw/uefi/var-service-json.c +++ b/hw/uefi/var-service-json.c @@ -178,7 +178,7 @@ void uefi_vars_json_init(uefi_vars_state *uv, Error **errp) void uefi_vars_json_save(uefi_vars_state *uv) { - GString *gstr; + g_autoptr(GString) gstr = NULL; int rc; if (uv->jsonfd == -1) { @@ -187,18 +187,25 @@ void uefi_vars_json_save(uefi_vars_state *uv) gstr = uefi_vars_to_json(uv); - lseek(uv->jsonfd, 0, SEEK_SET); + rc = lseek(uv->jsonfd, 0, SEEK_SET); + if (rc < 0) { + warn_report("%s: lseek error", __func__); + return; + } + rc = ftruncate(uv->jsonfd, 0); if (rc != 0) { warn_report("%s: ftruncate error", __func__); + return; } + rc = write(uv->jsonfd, gstr->str, gstr->len); if (rc != gstr->len) { warn_report("%s: write error", __func__); + return; } - fsync(uv->jsonfd); - g_string_free(gstr, true); + fsync(uv->jsonfd); } void uefi_vars_json_load(uefi_vars_state *uv, Error **errp) @@ -207,7 +214,7 @@ void uefi_vars_json_load(uefi_vars_state *uv, Error **errp) QObject *qobj; Visitor *v; char *str; - size_t len; + ssize_t len; int rc; if (uv->jsonfd == -1) { @@ -215,7 +222,12 @@ void uefi_vars_json_load(uefi_vars_state *uv, Error **errp) } len = lseek(uv->jsonfd, 0, SEEK_END); + if (len < 0) { + warn_report("%s: lseek error", __func__); + return; + } if (len == 0) { + /* empty file */ return; } @@ -224,6 +236,8 @@ void uefi_vars_json_load(uefi_vars_state *uv, Error **errp) rc = read(uv->jsonfd, str, len); if (rc != len) { warn_report("%s: read error", __func__); + g_free(str); + return; } str[len] = 0; diff --git a/hw/xen/xen-bus.c b/hw/xen/xen-bus.c index 8260f1e1bb..f808a01813 100644 --- a/hw/xen/xen-bus.c +++ b/hw/xen/xen-bus.c @@ -353,10 +353,10 @@ static void xen_bus_realize(BusState *bus, Error **errp) xs_node_watch(xenbus->xsh, node, key, xen_bus_backend_changed, xenbus, &local_err); if (local_err) { - /* This need not be treated as a hard error so don't propagate */ - error_reportf_err(local_err, - "failed to set up '%s' enumeration watch: ", - type[i]); + warn_reportf_err(local_err, + "failed to set up '%s' enumeration watch: ", + type[i]); + local_err = NULL; } g_free(node); |