diff options
Diffstat (limited to 'hw')
86 files changed, 771 insertions, 171 deletions
diff --git a/hw/9pfs/9p-proxy.c b/hw/9pfs/9p-proxy.c index 8b4b5cf7dc..4c5e0fc217 100644 --- a/hw/9pfs/9p-proxy.c +++ b/hw/9pfs/9p-proxy.c @@ -1187,7 +1187,7 @@ static int proxy_parse_opts(QemuOpts *opts, FsDriverEntry *fs, Error **errp) static int proxy_init(FsContext *ctx, Error **errp) { - V9fsProxy *proxy = g_malloc(sizeof(V9fsProxy)); + V9fsProxy *proxy = g_new(V9fsProxy, 1); int sock_id; if (ctx->export_flags & V9FS_PROXY_SOCK_NAME) { diff --git a/hw/9pfs/9p-synth.c b/hw/9pfs/9p-synth.c index b3080e415b..d99d263985 100644 --- a/hw/9pfs/9p-synth.c +++ b/hw/9pfs/9p-synth.c @@ -49,7 +49,7 @@ static V9fsSynthNode *v9fs_add_dir_node(V9fsSynthNode *parent, int mode, /* Add directory type and remove write bits */ mode = ((mode & 0777) | S_IFDIR) & ~(S_IWUSR | S_IWGRP | S_IWOTH); - node = g_malloc0(sizeof(V9fsSynthNode)); + node = g_new0(V9fsSynthNode, 1); if (attr) { /* We are adding .. or . entries */ node->attr = attr; @@ -128,7 +128,7 @@ int qemu_v9fs_synth_add_file(V9fsSynthNode *parent, int mode, } /* Add file type and remove write bits */ mode = ((mode & 0777) | S_IFREG); - node = g_malloc0(sizeof(V9fsSynthNode)); + node = g_new0(V9fsSynthNode, 1); node->attr = &node->actual_attr; node->attr->inode = synth_node_count++; node->attr->nlink = 1; diff --git a/hw/9pfs/9p.c b/hw/9pfs/9p.c index a6d6b3f835..8e9d4aea73 100644 --- a/hw/9pfs/9p.c +++ b/hw/9pfs/9p.c @@ -324,7 +324,7 @@ static V9fsFidState *alloc_fid(V9fsState *s, int32_t fid) return NULL; } } - f = g_malloc0(sizeof(V9fsFidState)); + f = g_new0(V9fsFidState, 1); f->fid = fid; f->fid_type = P9_FID_NONE; f->ref = 1; @@ -804,7 +804,7 @@ static int qid_inode_prefix_hash_bits(V9fsPDU *pdu, dev_t dev) val = qht_lookup(&pdu->s->qpd_table, &lookup, hash); if (!val) { - val = g_malloc0(sizeof(QpdEntry)); + val = g_new0(QpdEntry, 1); *val = lookup; affix = affixForIndex(pdu->s->qp_affix_next); val->prefix_bits = affix.bits; @@ -852,7 +852,7 @@ static int qid_path_fullmap(V9fsPDU *pdu, const struct stat *stbuf, return -ENFILE; } - val = g_malloc0(sizeof(QppEntry)); + val = g_new0(QpfEntry, 1); *val = lookup; /* new unique inode and device combo */ @@ -928,7 +928,7 @@ static int qid_path_suffixmap(V9fsPDU *pdu, const struct stat *stbuf, return -ENFILE; } - val = g_malloc0(sizeof(QppEntry)); + val = g_new0(QppEntry, 1); *val = lookup; /* new unique inode affix and device combo */ diff --git a/hw/9pfs/codir.c b/hw/9pfs/codir.c index 75148bc985..93ba44fb75 100644 --- a/hw/9pfs/codir.c +++ b/hw/9pfs/codir.c @@ -141,9 +141,9 @@ static int do_readdir_many(V9fsPDU *pdu, V9fsFidState *fidp, /* append next node to result chain */ if (!e) { - *entries = e = g_malloc0(sizeof(V9fsDirEnt)); + *entries = e = g_new0(V9fsDirEnt, 1); } else { - e = e->next = g_malloc0(sizeof(V9fsDirEnt)); + e = e->next = g_new0(V9fsDirEnt, 1); } e->dent = qemu_dirent_dup(dent); @@ -163,7 +163,7 @@ static int do_readdir_many(V9fsPDU *pdu, V9fsFidState *fidp, break; } - e->st = g_malloc0(sizeof(struct stat)); + e->st = g_new0(struct stat, 1); memcpy(e->st, &stbuf, sizeof(struct stat)); } diff --git a/hw/acpi/hmat.c b/hw/acpi/hmat.c index 6913ebf730..3a6d51282a 100644 --- a/hw/acpi/hmat.c +++ b/hw/acpi/hmat.c @@ -128,7 +128,7 @@ static void build_hmat_lb(GArray *table_data, HMAT_LB_Info *hmat_lb, } /* Latency or Bandwidth Entries */ - entry_list = g_malloc0(num_initiator * num_target * sizeof(uint16_t)); + entry_list = g_new0(uint16_t, num_initiator * num_target); for (i = 0; i < hmat_lb->list->len; i++) { lb_data = &g_array_index(hmat_lb->list, HMAT_LB_Data, i); index = lb_data->initiator * num_target + lb_data->target; diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 46a42502bc..d2e5ecd234 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -1852,7 +1852,12 @@ static void finalize_gic_version(VirtMachineState *vms) vms->gic_version = VIRT_GIC_VERSION_2; break; case VIRT_GIC_VERSION_MAX: - vms->gic_version = VIRT_GIC_VERSION_3; + if (module_object_class_by_name("arm-gicv3")) { + /* CONFIG_ARM_GICV3_TCG was set */ + vms->gic_version = VIRT_GIC_VERSION_3; + } else { + vms->gic_version = VIRT_GIC_VERSION_2; + } break; case VIRT_GIC_VERSION_HOST: error_report("gic-version=host requires KVM"); diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c index 6d0e4116db..5bfe285a19 100644 --- a/hw/arm/xlnx-zynqmp.c +++ b/hw/arm/xlnx-zynqmp.c @@ -52,6 +52,13 @@ #define QSPI_DMA_ADDR 0xff0f0800 #define NUM_QSPI_IRQ_LINES 2 +#define CRF_ADDR 0xfd1a0000 +#define CRF_IRQ 120 + +/* Serializer/Deserializer. */ +#define SERDES_ADDR 0xfd400000 +#define SERDES_SIZE 0x20000 + #define DP_ADDR 0xfd4a0000 #define DP_IRQ 113 @@ -59,7 +66,7 @@ #define DPDMA_IRQ 116 #define APU_ADDR 0xfd5c0000 -#define APU_SIZE 0x100 +#define APU_IRQ 153 #define IPI_ADDR 0xFF300000 #define IPI_IRQ 64 @@ -276,6 +283,39 @@ static void xlnx_zynqmp_create_efuse(XlnxZynqMPState *s, qemu_irq *gic) sysbus_connect_irq(sbd, 0, gic[EFUSE_IRQ]); } +static void xlnx_zynqmp_create_apu_ctrl(XlnxZynqMPState *s, qemu_irq *gic) +{ + SysBusDevice *sbd; + int i; + + object_initialize_child(OBJECT(s), "apu-ctrl", &s->apu_ctrl, + TYPE_XLNX_ZYNQMP_APU_CTRL); + sbd = SYS_BUS_DEVICE(&s->apu_ctrl); + + for (i = 0; i < XLNX_ZYNQMP_NUM_APU_CPUS; i++) { + g_autofree gchar *name = g_strdup_printf("cpu%d", i); + + object_property_set_link(OBJECT(&s->apu_ctrl), name, + OBJECT(&s->apu_cpu[i]), &error_abort); + } + + sysbus_realize(sbd, &error_fatal); + sysbus_mmio_map(sbd, 0, APU_ADDR); + sysbus_connect_irq(sbd, 0, gic[APU_IRQ]); +} + +static void xlnx_zynqmp_create_crf(XlnxZynqMPState *s, qemu_irq *gic) +{ + SysBusDevice *sbd; + + object_initialize_child(OBJECT(s), "crf", &s->crf, TYPE_XLNX_ZYNQMP_CRF); + sbd = SYS_BUS_DEVICE(&s->crf); + + sysbus_realize(sbd, &error_fatal); + sysbus_mmio_map(sbd, 0, CRF_ADDR); + sysbus_connect_irq(sbd, 0, gic[CRF_IRQ]); +} + static void xlnx_zynqmp_create_unimp_mmio(XlnxZynqMPState *s) { static const struct UnimpInfo { @@ -283,7 +323,7 @@ static void xlnx_zynqmp_create_unimp_mmio(XlnxZynqMPState *s) hwaddr base; hwaddr size; } unimp_areas[ARRAY_SIZE(s->mr_unimp)] = { - { .name = "apu", APU_ADDR, APU_SIZE }, + { .name = "serdes", SERDES_ADDR, SERDES_SIZE }, }; unsigned int nr; @@ -679,6 +719,8 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) xlnx_zynqmp_create_bbram(s, gic_spi); xlnx_zynqmp_create_efuse(s, gic_spi); + xlnx_zynqmp_create_apu_ctrl(s, gic_spi); + xlnx_zynqmp_create_crf(s, gic_spi); xlnx_zynqmp_create_unimp_mmio(s); for (i = 0; i < XLNX_ZYNQMP_NUM_GDMA_CH; i++) { diff --git a/hw/audio/intel-hda.c b/hw/audio/intel-hda.c index 5f8a878f20..686fb94d5c 100644 --- a/hw/audio/intel-hda.c +++ b/hw/audio/intel-hda.c @@ -473,7 +473,7 @@ static void intel_hda_parse_bdl(IntelHDAState *d, IntelHDAStream *st) addr = intel_hda_addr(st->bdlp_lbase, st->bdlp_ubase); st->bentries = st->lvi +1; g_free(st->bpl); - st->bpl = g_malloc(sizeof(bpl) * st->bentries); + st->bpl = g_new(bpl, st->bentries); for (i = 0; i < st->bentries; i++, addr += 16) { pci_dma_read(&d->pci, addr, buf, 16); st->bpl[i].addr = le64_to_cpu(*(uint64_t *)buf); diff --git a/hw/char/parallel.c b/hw/char/parallel.c index adb9bd9be3..f735a6cd7f 100644 --- a/hw/char/parallel.c +++ b/hw/char/parallel.c @@ -622,7 +622,7 @@ bool parallel_mm_init(MemoryRegion *address_space, { ParallelState *s; - s = g_malloc0(sizeof(ParallelState)); + s = g_new0(ParallelState, 1); s->irq = irq; qemu_chr_fe_init(&s->chr, chr, &error_abort); s->it_shift = it_shift; diff --git a/hw/char/riscv_htif.c b/hw/char/riscv_htif.c index 729edbf968..6577f0e640 100644 --- a/hw/char/riscv_htif.c +++ b/hw/char/riscv_htif.c @@ -248,7 +248,7 @@ HTIFState *htif_mm_init(MemoryRegion *address_space, MemoryRegion *main_mem, tohost_offset = tohost_addr - base; fromhost_offset = fromhost_addr - base; - HTIFState *s = g_malloc0(sizeof(HTIFState)); + HTIFState *s = g_new0(HTIFState, 1); s->address_space = address_space; s->main_mem = main_mem; s->main_mem_ram_ptr = memory_region_get_ram_ptr(main_mem); diff --git a/hw/char/virtio-serial-bus.c b/hw/char/virtio-serial-bus.c index f01ec2137c..6048d408b8 100644 --- a/hw/char/virtio-serial-bus.c +++ b/hw/char/virtio-serial-bus.c @@ -1055,10 +1055,8 @@ static void virtio_serial_device_realize(DeviceState *dev, Error **errp) QTAILQ_INIT(&vser->ports); vser->bus.max_nr_ports = vser->serial.max_virtserial_ports; - vser->ivqs = g_malloc(vser->serial.max_virtserial_ports - * sizeof(VirtQueue *)); - vser->ovqs = g_malloc(vser->serial.max_virtserial_ports - * sizeof(VirtQueue *)); + vser->ivqs = g_new(VirtQueue *, vser->serial.max_virtserial_ports); + vser->ovqs = g_new(VirtQueue *, vser->serial.max_virtserial_ports); /* Add a queue for host to guest transfers for port 0 (backward compat) */ vser->ivqs[0] = virtio_add_queue(vdev, 128, handle_input); diff --git a/hw/core/irq.c b/hw/core/irq.c index 8a9cbdd556..741219277b 100644 --- a/hw/core/irq.c +++ b/hw/core/irq.c @@ -115,7 +115,7 @@ static void qemu_splitirq(void *opaque, int line, int level) qemu_irq qemu_irq_split(qemu_irq irq1, qemu_irq irq2) { - qemu_irq *s = g_malloc0(2 * sizeof(qemu_irq)); + qemu_irq *s = g_new0(qemu_irq, 2); s[0] = irq1; s[1] = irq2; return qemu_allocate_irq(qemu_splitirq, s, 0); diff --git a/hw/core/reset.c b/hw/core/reset.c index 9c477f2bf5..36be82c491 100644 --- a/hw/core/reset.c +++ b/hw/core/reset.c @@ -40,7 +40,7 @@ static QTAILQ_HEAD(, QEMUResetEntry) reset_handlers = void qemu_register_reset(QEMUResetHandler *func, void *opaque) { - QEMUResetEntry *re = g_malloc0(sizeof(QEMUResetEntry)); + QEMUResetEntry *re = g_new0(QEMUResetEntry, 1); re->func = func; re->opaque = opaque; diff --git a/hw/display/ati.c b/hw/display/ati.c index 31f22754dc..6e38e00502 100644 --- a/hw/display/ati.c +++ b/hw/display/ati.c @@ -955,7 +955,9 @@ static void ati_vga_realize(PCIDevice *dev, Error **errp) } /* init vga bits */ - vga_common_init(vga, OBJECT(s)); + if (!vga_common_init(vga, OBJECT(s), errp)) { + return; + } vga_init(vga, OBJECT(s), pci_address_space(dev), pci_address_space_io(dev), true); vga->con = graphic_console_init(DEVICE(s), 0, s->vga.hw_ops, &s->vga); diff --git a/hw/display/cirrus_vga.c b/hw/display/cirrus_vga.c index fdca6ca659..3bb6a58698 100644 --- a/hw/display/cirrus_vga.c +++ b/hw/display/cirrus_vga.c @@ -2940,27 +2940,30 @@ void cirrus_init_common(CirrusVGAState *s, Object *owner, static void pci_cirrus_vga_realize(PCIDevice *dev, Error **errp) { - PCICirrusVGAState *d = PCI_CIRRUS_VGA(dev); - CirrusVGAState *s = &d->cirrus_vga; - PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(dev); - int16_t device_id = pc->device_id; - - /* follow real hardware, cirrus card emulated has 4 MB video memory. - Also accept 8 MB/16 MB for backward compatibility. */ - if (s->vga.vram_size_mb != 4 && s->vga.vram_size_mb != 8 && - s->vga.vram_size_mb != 16) { - error_setg(errp, "Invalid cirrus_vga ram size '%u'", - s->vga.vram_size_mb); - return; - } - /* setup VGA */ - vga_common_init(&s->vga, OBJECT(dev)); - cirrus_init_common(s, OBJECT(dev), device_id, 1, pci_address_space(dev), - pci_address_space_io(dev)); - s->vga.con = graphic_console_init(DEVICE(dev), 0, s->vga.hw_ops, &s->vga); - - /* setup PCI */ + PCICirrusVGAState *d = PCI_CIRRUS_VGA(dev); + CirrusVGAState *s = &d->cirrus_vga; + PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(dev); + int16_t device_id = pc->device_id; + + /* + * Follow real hardware, cirrus card emulated has 4 MB video memory. + * Also accept 8 MB/16 MB for backward compatibility. + */ + if (s->vga.vram_size_mb != 4 && s->vga.vram_size_mb != 8 && + s->vga.vram_size_mb != 16) { + error_setg(errp, "Invalid cirrus_vga ram size '%u'", + s->vga.vram_size_mb); + return; + } + /* setup VGA */ + if (!vga_common_init(&s->vga, OBJECT(dev), errp)) { + return; + } + cirrus_init_common(s, OBJECT(dev), device_id, 1, pci_address_space(dev), + pci_address_space_io(dev)); + s->vga.con = graphic_console_init(DEVICE(dev), 0, s->vga.hw_ops, &s->vga); + /* setup PCI */ memory_region_init(&s->pci_bar, OBJECT(dev), "cirrus-pci-bar0", 0x2000000); /* XXX: add byte swapping apertures */ @@ -2968,14 +2971,14 @@ static void pci_cirrus_vga_realize(PCIDevice *dev, Error **errp) memory_region_add_subregion(&s->pci_bar, 0x1000000, &s->cirrus_linear_bitblt_io); - /* setup memory space */ - /* memory #0 LFB */ - /* memory #1 memory-mapped I/O */ - /* XXX: s->vga.vram_size must be a power of two */ - pci_register_bar(&d->dev, 0, PCI_BASE_ADDRESS_MEM_PREFETCH, &s->pci_bar); - if (device_id == CIRRUS_ID_CLGD5446) { - pci_register_bar(&d->dev, 1, 0, &s->cirrus_mmio_io); - } + /* setup memory space */ + /* memory #0 LFB */ + /* memory #1 memory-mapped I/O */ + /* XXX: s->vga.vram_size must be a power of two */ + pci_register_bar(&d->dev, 0, PCI_BASE_ADDRESS_MEM_PREFETCH, &s->pci_bar); + if (device_id == CIRRUS_ID_CLGD5446) { + pci_register_bar(&d->dev, 1, 0, &s->cirrus_mmio_io); + } } static Property pci_vga_cirrus_properties[] = { diff --git a/hw/display/cirrus_vga_isa.c b/hw/display/cirrus_vga_isa.c index 4f6fb1af3b..96144bd690 100644 --- a/hw/display/cirrus_vga_isa.c +++ b/hw/display/cirrus_vga_isa.c @@ -56,7 +56,9 @@ static void isa_cirrus_vga_realizefn(DeviceState *dev, Error **errp) return; } s->global_vmstate = true; - vga_common_init(s, OBJECT(dev)); + if (!vga_common_init(s, OBJECT(dev), errp)) { + return; + } cirrus_init_common(&d->cirrus_vga, OBJECT(dev), CIRRUS_ID_CLGD5430, 0, isa_address_space(isadev), isa_address_space_io(isadev)); diff --git a/hw/display/pxa2xx_lcd.c b/hw/display/pxa2xx_lcd.c index 2887ce496b..0f06ed6e9f 100644 --- a/hw/display/pxa2xx_lcd.c +++ b/hw/display/pxa2xx_lcd.c @@ -1427,7 +1427,7 @@ PXA2xxLCDState *pxa2xx_lcdc_init(MemoryRegion *sysmem, { PXA2xxLCDState *s; - s = (PXA2xxLCDState *) g_malloc0(sizeof(PXA2xxLCDState)); + s = g_new0(PXA2xxLCDState, 1); s->invalidated = 1; s->irq = irq; s->sysmem = sysmem; diff --git a/hw/display/qxl.c b/hw/display/qxl.c index 1f9ad31943..adbdbcaeb6 100644 --- a/hw/display/qxl.c +++ b/hw/display/qxl.c @@ -2215,7 +2215,11 @@ static void qxl_realize_primary(PCIDevice *dev, Error **errp) qxl_init_ramsize(qxl); vga->vbe_size = qxl->vgamem_size; vga->vram_size_mb = qxl->vga.vram_size / MiB; - vga_common_init(vga, OBJECT(dev)); + vga_common_init(vga, OBJECT(dev), &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } vga_init(vga, OBJECT(dev), pci_address_space(dev), pci_address_space_io(dev), false); portio_list_init(&qxl->vga_port_list, OBJECT(dev), qxl_vga_portio_list, diff --git a/hw/display/tc6393xb.c b/hw/display/tc6393xb.c index 1f28223c7b..c7beba453b 100644 --- a/hw/display/tc6393xb.c +++ b/hw/display/tc6393xb.c @@ -540,7 +540,7 @@ TC6393xbState *tc6393xb_init(MemoryRegion *sysmem, uint32_t base, qemu_irq irq) }, }; - s = (TC6393xbState *) g_malloc0(sizeof(TC6393xbState)); + s = g_new0(TC6393xbState, 1); s->irq = irq; s->gpio_in = qemu_allocate_irqs(tc6393xb_gpio_set, s, TC6393XB_GPIOS); diff --git a/hw/display/vga-isa.c b/hw/display/vga-isa.c index 90851e730b..46abbc5653 100644 --- a/hw/display/vga-isa.c +++ b/hw/display/vga-isa.c @@ -62,7 +62,10 @@ static void vga_isa_realizefn(DeviceState *dev, Error **errp) const MemoryRegionPortio *vga_ports, *vbe_ports; s->global_vmstate = true; - vga_common_init(s, OBJECT(dev)); + if (!vga_common_init(s, OBJECT(dev), errp)) { + return; + } + s->legacy_address_space = isa_address_space(isadev); vga_io_memory = vga_init_io(s, OBJECT(dev), &vga_ports, &vbe_ports); isa_register_portio_list(isadev, &d->portio_vga, diff --git a/hw/display/vga-mmio.c b/hw/display/vga-mmio.c index 4969368081..75dfcedea5 100644 --- a/hw/display/vga-mmio.c +++ b/hw/display/vga-mmio.c @@ -102,7 +102,10 @@ static void vga_mmio_realizefn(DeviceState *dev, Error **errp) s->vga.bank_offset = 0; s->vga.global_vmstate = true; - vga_common_init(&s->vga, OBJECT(dev)); + if (!vga_common_init(&s->vga, OBJECT(dev), errp)) { + return; + } + sysbus_init_mmio(sbd, &s->vga.vram); s->vga.con = graphic_console_init(dev, 0, s->vga.hw_ops, &s->vga); } diff --git a/hw/display/vga-pci.c b/hw/display/vga-pci.c index 62fb5c38c1..3e5bc259f7 100644 --- a/hw/display/vga-pci.c +++ b/hw/display/vga-pci.c @@ -239,7 +239,9 @@ static void pci_std_vga_realize(PCIDevice *dev, Error **errp) bool edid = false; /* vga + console init */ - vga_common_init(s, OBJECT(dev)); + if (!vga_common_init(s, OBJECT(dev), errp)) { + return; + } vga_init(s, OBJECT(dev), pci_address_space(dev), pci_address_space_io(dev), true); @@ -275,7 +277,9 @@ static void pci_secondary_vga_realize(PCIDevice *dev, Error **errp) bool edid = false; /* vga + console init */ - vga_common_init(s, OBJECT(dev)); + if (!vga_common_init(s, OBJECT(dev), errp)) { + return; + } s->con = graphic_console_init(DEVICE(dev), 0, s->hw_ops, s); /* mmio bar */ diff --git a/hw/display/vga.c b/hw/display/vga.c index 9d1f66af40..a7a291fa20 100644 --- a/hw/display/vga.c +++ b/hw/display/vga.c @@ -2168,9 +2168,10 @@ static inline uint32_t uint_clamp(uint32_t val, uint32_t vmin, uint32_t vmax) return val; } -void vga_common_init(VGACommonState *s, Object *obj) +bool vga_common_init(VGACommonState *s, Object *obj, Error **errp) { int i, j, v, b; + Error *local_err = NULL; for(i = 0;i < 256; i++) { v = 0; @@ -2205,8 +2206,18 @@ void vga_common_init(VGACommonState *s, Object *obj) s->vbe_size_mask = s->vbe_size - 1; s->is_vbe_vmstate = 1; + + if (s->global_vmstate && qemu_ram_block_by_name("vga.vram")) { + error_setg(errp, "Only one global VGA device can be used at a time"); + return false; + } + memory_region_init_ram_nomigrate(&s->vram, obj, "vga.vram", s->vram_size, - &error_fatal); + &local_err); + if (local_err) { + error_propagate(errp, local_err); + return false; + } vmstate_register_ram(&s->vram, s->global_vmstate ? NULL : DEVICE(obj)); xen_register_framebuffer(&s->vram); s->vram_ptr = memory_region_get_ram_ptr(&s->vram); @@ -2237,6 +2248,8 @@ void vga_common_init(VGACommonState *s, Object *obj) s->default_endian_fb = false; #endif vga_dirty_log_start(s); + + return true; } static const MemoryRegionPortio vga_portio_list[] = { diff --git a/hw/display/vga_int.h b/hw/display/vga_int.h index 847e784ca6..305e700014 100644 --- a/hw/display/vga_int.h +++ b/hw/display/vga_int.h @@ -156,7 +156,7 @@ static inline int c6_to_8(int v) return (v << 2) | (b << 1) | b; } -void vga_common_init(VGACommonState *s, Object *obj); +bool vga_common_init(VGACommonState *s, Object *obj, Error **errp); void vga_init(VGACommonState *s, Object *obj, MemoryRegion *address_space, MemoryRegion *address_space_io, bool init_vga_ports); MemoryRegion *vga_init_io(VGACommonState *s, Object *obj, diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c index c6dc818988..529b5246b2 100644 --- a/hw/display/virtio-gpu.c +++ b/hw/display/virtio-gpu.c @@ -831,9 +831,9 @@ int virtio_gpu_create_mapping_iov(VirtIOGPU *g, } if (!(v % 16)) { - *iov = g_realloc(*iov, sizeof(struct iovec) * (v + 16)); + *iov = g_renew(struct iovec, *iov, v + 16); if (addr) { - *addr = g_realloc(*addr, sizeof(uint64_t) * (v + 16)); + *addr = g_renew(uint64_t, *addr, v + 16); } } (*iov)[v].iov_base = map; diff --git a/hw/display/virtio-vga.c b/hw/display/virtio-vga.c index 5a2f7a4540..7b55c8d0e7 100644 --- a/hw/display/virtio-vga.c +++ b/hw/display/virtio-vga.c @@ -108,7 +108,9 @@ static void virtio_vga_base_realize(VirtIOPCIProxy *vpci_dev, Error **errp) /* init vga compat bits */ vga->vram_size_mb = 8; - vga_common_init(vga, OBJECT(vpci_dev)); + if (!vga_common_init(vga, OBJECT(vpci_dev), errp)) { + return; + } vga_init(vga, OBJECT(vpci_dev), pci_address_space(&vpci_dev->pci_dev), pci_address_space_io(&vpci_dev->pci_dev), true); pci_register_bar(&vpci_dev->pci_dev, 0, diff --git a/hw/display/vmware_vga.c b/hw/display/vmware_vga.c index 0cc43a1f15..98c83474ad 100644 --- a/hw/display/vmware_vga.c +++ b/hw/display/vmware_vga.c @@ -1254,7 +1254,7 @@ static void vmsvga_init(DeviceState *dev, struct vmsvga_state_s *s, &error_fatal); s->fifo_ptr = memory_region_get_ram_ptr(&s->fifo_ram); - vga_common_init(&s->vga, OBJECT(dev)); + vga_common_init(&s->vga, OBJECT(dev), &error_fatal); vga_init(&s->vga, OBJECT(dev), address_space, io, true); vmstate_register(NULL, 0, &vmstate_vga_common, &s->vga); s->new_depth = 32; diff --git a/hw/display/xenfb.c b/hw/display/xenfb.c index 838260b6ad..cea10fe3c7 100644 --- a/hw/display/xenfb.c +++ b/hw/display/xenfb.c @@ -496,8 +496,8 @@ static int xenfb_map_fb(struct XenFB *xenfb) n_fbdirs = xenfb->fbpages * mode / 8; n_fbdirs = DIV_ROUND_UP(n_fbdirs, XC_PAGE_SIZE); - pgmfns = g_malloc0(sizeof(xen_pfn_t) * n_fbdirs); - fbmfns = g_malloc0(sizeof(xen_pfn_t) * xenfb->fbpages); + pgmfns = g_new0(xen_pfn_t, n_fbdirs); + fbmfns = g_new0(xen_pfn_t, xenfb->fbpages); xenfb_copy_mfns(mode, n_fbdirs, pgmfns, pd); map = xenforeignmemory_map(xen_fmem, xenfb->c.xendev.dom, diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c index e4d2f1725b..aa1d323a36 100644 --- a/hw/dma/rc4030.c +++ b/hw/dma/rc4030.c @@ -646,8 +646,8 @@ static rc4030_dma *rc4030_allocate_dmas(void *opaque, int n) struct rc4030DMAState *p; int i; - s = (rc4030_dma *)g_new0(rc4030_dma, n); - p = (struct rc4030DMAState *)g_new0(struct rc4030DMAState, n); + s = g_new0(rc4030_dma, n); + p = g_new0(struct rc4030DMAState, n); for (i = 0; i < n; i++) { p->opaque = opaque; p->n = i; diff --git a/hw/dma/xlnx_csu_dma.c b/hw/dma/xlnx_csu_dma.c index 84f782fcdc..60ada3286b 100644 --- a/hw/dma/xlnx_csu_dma.c +++ b/hw/dma/xlnx_csu_dma.c @@ -744,6 +744,7 @@ static const TypeInfo xlnx_csu_dma_info = { .parent = TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(XlnxCSUDMA), .class_init = xlnx_csu_dma_class_init, + .class_size = sizeof(XlnxCSUDMAClass), .instance_init = xlnx_csu_dma_init, .interfaces = (InterfaceInfo[]) { { TYPE_STREAM_SINK }, diff --git a/hw/i2c/core.c b/hw/i2c/core.c index 0e7d2763b9..d0cb2d32fa 100644 --- a/hw/i2c/core.c +++ b/hw/i2c/core.c @@ -274,7 +274,7 @@ static int i2c_slave_post_load(void *opaque, int version_id) bus = I2C_BUS(qdev_get_parent_bus(DEVICE(dev))); if ((bus->saved_address == dev->address) || (bus->saved_address == I2C_BROADCAST)) { - node = g_malloc(sizeof(struct I2CNode)); + node = g_new(struct I2CNode, 1); node->elt = dev; QLIST_INSERT_HEAD(&bus->current_devs, node, next); } @@ -319,7 +319,7 @@ static bool i2c_slave_match(I2CSlave *candidate, uint8_t address, bool broadcast, I2CNodeList *current_devs) { if ((candidate->address == address) || (broadcast)) { - I2CNode *node = g_malloc(sizeof(struct I2CNode)); + I2CNode *node = g_new(struct I2CNode, 1); node->elt = candidate; QLIST_INSERT_HEAD(current_devs, node, next); return true; diff --git a/hw/i2c/i2c_mux_pca954x.c b/hw/i2c/i2c_mux_pca954x.c index a9517b612a..3945de795c 100644 --- a/hw/i2c/i2c_mux_pca954x.c +++ b/hw/i2c/i2c_mux_pca954x.c @@ -71,7 +71,7 @@ static bool pca954x_match(I2CSlave *candidate, uint8_t address, /* They are talking to the mux itself (or all devices enabled). */ if ((candidate->address == address) || broadcast) { - I2CNode *node = g_malloc(sizeof(struct I2CNode)); + I2CNode *node = g_new(struct I2CNode, 1); node->elt = candidate; QLIST_INSERT_HEAD(current_devs, node, next); if (!broadcast) { diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 4ad4d7286c..dcf6ece3d0 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -583,7 +583,7 @@ Aml *aml_pci_device_dsm(void) Aml *bnum = aml_arg(4); Aml *func = aml_arg(2); Aml *rev = aml_arg(1); - Aml *sun = aml_arg(5); + Aml *sunum = aml_arg(5); method = aml_method("PDSM", 6, AML_SERIALIZED); @@ -594,7 +594,7 @@ Aml *aml_pci_device_dsm(void) UUID = aml_touuid("E5C937D0-3553-4D7A-9117-EA4D19C3434D"); ifctx = aml_if(aml_equal(aml_arg(0), UUID)); { - aml_append(ifctx, aml_store(aml_call2("AIDX", bnum, sun), acpi_index)); + aml_append(ifctx, aml_store(aml_call2("AIDX", bnum, sunum), acpi_index)); ifctx1 = aml_if(aml_equal(func, zero)); { uint8_t byte_list[1]; diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c index 6986ad3b87..ea8eaeb330 100644 --- a/hw/i386/amd_iommu.c +++ b/hw/i386/amd_iommu.c @@ -1402,7 +1402,7 @@ static AddressSpace *amdvi_host_dma_iommu(PCIBus *bus, void *opaque, int devfn) /* allocate memory during the first run */ if (!iommu_as) { - iommu_as = g_malloc0(sizeof(AMDVIAddressSpace *) * PCI_DEVFN_MAX); + iommu_as = g_new0(AMDVIAddressSpace *, PCI_DEVFN_MAX); s->address_spaces[bus_num] = iommu_as; } @@ -1410,7 +1410,7 @@ static AddressSpace *amdvi_host_dma_iommu(PCIBus *bus, void *opaque, int devfn) if (!iommu_as[devfn]) { snprintf(name, sizeof(name), "amd_iommu_devfn_%d", devfn); - iommu_as[devfn] = g_malloc0(sizeof(AMDVIAddressSpace)); + iommu_as[devfn] = g_new0(AMDVIAddressSpace, 1); iommu_as[devfn]->bus_num = (uint8_t)bus_num; iommu_as[devfn]->devfn = (uint8_t)devfn; iommu_as[devfn]->iommu_state = s; diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 32471a44cb..c64aa81a83 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -3416,7 +3416,7 @@ VTDAddressSpace *vtd_find_add_as(IntelIOMMUState *s, PCIBus *bus, int devfn) if (!vtd_dev_as) { snprintf(name, sizeof(name), "vtd-%02x.%x", PCI_SLOT(devfn), PCI_FUNC(devfn)); - vtd_bus->dev_as[devfn] = vtd_dev_as = g_malloc0(sizeof(VTDAddressSpace)); + vtd_bus->dev_as[devfn] = vtd_dev_as = g_new0(VTDAddressSpace, 1); vtd_dev_as->bus = bus; vtd_dev_as->devfn = (uint8_t)devfn; diff --git a/hw/i386/xen/xen-hvm.c b/hw/i386/xen/xen-hvm.c index cf8e500514..0731f70410 100644 --- a/hw/i386/xen/xen-hvm.c +++ b/hw/i386/xen/xen-hvm.c @@ -396,7 +396,7 @@ go_physmap: mr_name = memory_region_name(mr); - physmap = g_malloc(sizeof(XenPhysmap)); + physmap = g_new(XenPhysmap, 1); physmap->start_addr = start_addr; physmap->size = size; @@ -1281,7 +1281,7 @@ static void xen_read_physmap(XenIOState *state) return; for (i = 0; i < num; i++) { - physmap = g_malloc(sizeof (XenPhysmap)); + physmap = g_new(XenPhysmap, 1); physmap->phys_offset = strtoull(entries[i], NULL, 16); snprintf(path, sizeof(path), "/local/domain/0/device-model/%d/physmap/%s/start_addr", @@ -1410,7 +1410,7 @@ void xen_hvm_init_pc(PCMachineState *pcms, MemoryRegion **ram_memory) xen_pfn_t ioreq_pfn; XenIOState *state; - state = g_malloc0(sizeof (XenIOState)); + state = g_new0(XenIOState, 1); state->xce_handle = xenevtchn_open(NULL, 0); if (state->xce_handle == NULL) { @@ -1463,7 +1463,7 @@ void xen_hvm_init_pc(PCMachineState *pcms, MemoryRegion **ram_memory) } /* Note: cpus is empty at this point in init */ - state->cpu_by_vcpu_id = g_malloc0(max_cpus * sizeof(CPUState *)); + state->cpu_by_vcpu_id = g_new0(CPUState *, max_cpus); rc = xen_set_ioreq_server_state(xen_domid, state->ioservid, true); if (rc < 0) { @@ -1472,7 +1472,7 @@ void xen_hvm_init_pc(PCMachineState *pcms, MemoryRegion **ram_memory) goto err; } - state->ioreq_local_port = g_malloc0(max_cpus * sizeof (evtchn_port_t)); + state->ioreq_local_port = g_new0(evtchn_port_t, max_cpus); /* FIXME: how about if we overflow the page here? */ for (i = 0; i < max_cpus; i++) { diff --git a/hw/i386/xen/xen-mapcache.c b/hw/i386/xen/xen-mapcache.c index f2ef977963..a2f93096e7 100644 --- a/hw/i386/xen/xen-mapcache.c +++ b/hw/i386/xen/xen-mapcache.c @@ -108,7 +108,7 @@ void xen_map_cache_init(phys_offset_to_gaddr_t f, void *opaque) unsigned long size; struct rlimit rlimit_as; - mapcache = g_malloc0(sizeof (MapCache)); + mapcache = g_new0(MapCache, 1); mapcache->phys_offset_to_gaddr = f; mapcache->opaque = opaque; @@ -164,8 +164,8 @@ static void xen_remap_bucket(MapCacheEntry *entry, trace_xen_remap_bucket(address_index); - pfns = g_malloc0(nb_pfn * sizeof (xen_pfn_t)); - err = g_malloc0(nb_pfn * sizeof (int)); + pfns = g_new0(xen_pfn_t, nb_pfn); + err = g_new0(int, nb_pfn); if (entry->vaddr_base != NULL) { if (!(entry->flags & XEN_MAPCACHE_ENTRY_DUMMY)) { @@ -231,8 +231,8 @@ static void xen_remap_bucket(MapCacheEntry *entry, entry->vaddr_base = vaddr_base; entry->paddr_index = address_index; entry->size = size; - entry->valid_mapping = (unsigned long *) g_malloc0(sizeof(unsigned long) * - BITS_TO_LONGS(size >> XC_PAGE_SHIFT)); + entry->valid_mapping = g_new0(unsigned long, + BITS_TO_LONGS(size >> XC_PAGE_SHIFT)); if (dummy) { entry->flags |= XEN_MAPCACHE_ENTRY_DUMMY; @@ -319,7 +319,7 @@ tryagain: pentry = free_pentry; } if (!entry) { - entry = g_malloc0(sizeof (MapCacheEntry)); + entry = g_new0(MapCacheEntry, 1); pentry->next = entry; xen_remap_bucket(entry, NULL, cache_size, address_index, dummy); } else if (!entry->lock) { @@ -353,7 +353,7 @@ tryagain: mapcache->last_entry = entry; if (lock) { - MapCacheRev *reventry = g_malloc0(sizeof(MapCacheRev)); + MapCacheRev *reventry = g_new0(MapCacheRev, 1); entry->lock++; if (entry->lock == 0) { fprintf(stderr, diff --git a/hw/input/lasips2.c b/hw/input/lasips2.c index 68d741d342..94f18be4cd 100644 --- a/hw/input/lasips2.c +++ b/hw/input/lasips2.c @@ -266,7 +266,7 @@ void lasips2_init(MemoryRegion *address_space, { LASIPS2State *s; - s = g_malloc0(sizeof(LASIPS2State)); + s = g_new0(LASIPS2State, 1); s->irq = irq; s->mouse.id = 1; diff --git a/hw/input/pckbd.c b/hw/input/pckbd.c index 1773db0d25..4efdf75620 100644 --- a/hw/input/pckbd.c +++ b/hw/input/pckbd.c @@ -649,7 +649,7 @@ void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, MemoryRegion *region, ram_addr_t size, hwaddr mask) { - KBDState *s = g_malloc0(sizeof(KBDState)); + KBDState *s = g_new0(KBDState, 1); s->irq_kbd = kbd_irq; s->irq_mouse = mouse_irq; diff --git a/hw/input/ps2.c b/hw/input/ps2.c index 6236711e1b..c16df1de7a 100644 --- a/hw/input/ps2.c +++ b/hw/input/ps2.c @@ -1226,7 +1226,7 @@ static QemuInputHandler ps2_keyboard_handler = { void *ps2_kbd_init(void (*update_irq)(void *, int), void *update_arg) { - PS2KbdState *s = (PS2KbdState *)g_malloc0(sizeof(PS2KbdState)); + PS2KbdState *s = g_new0(PS2KbdState, 1); trace_ps2_kbd_init(s); s->common.update_irq = update_irq; @@ -1248,7 +1248,7 @@ static QemuInputHandler ps2_mouse_handler = { void *ps2_mouse_init(void (*update_irq)(void *, int), void *update_arg) { - PS2MouseState *s = (PS2MouseState *)g_malloc0(sizeof(PS2MouseState)); + PS2MouseState *s = g_new0(PS2MouseState, 1); trace_ps2_mouse_init(s); s->common.update_irq = update_irq; diff --git a/hw/input/pxa2xx_keypad.c b/hw/input/pxa2xx_keypad.c index 7f2f739fb3..3dd03e8c9f 100644 --- a/hw/input/pxa2xx_keypad.c +++ b/hw/input/pxa2xx_keypad.c @@ -306,7 +306,7 @@ PXA2xxKeyPadState *pxa27x_keypad_init(MemoryRegion *sysmem, { PXA2xxKeyPadState *s; - s = (PXA2xxKeyPadState *) g_malloc0(sizeof(PXA2xxKeyPadState)); + s = g_new0(PXA2xxKeyPadState, 1); s->irq = irq; memory_region_init_io(&s->iomem, NULL, &pxa2xx_keypad_ops, s, diff --git a/hw/input/tsc2005.c b/hw/input/tsc2005.c index 55d61cc843..14698ce109 100644 --- a/hw/input/tsc2005.c +++ b/hw/input/tsc2005.c @@ -489,8 +489,7 @@ void *tsc2005_init(qemu_irq pintdav) { TSC2005State *s; - s = (TSC2005State *) - g_malloc0(sizeof(TSC2005State)); + s = g_new0(TSC2005State, 1); s->x = 400; s->y = 240; s->pressure = false; diff --git a/hw/intc/Kconfig b/hw/intc/Kconfig index ec8d4cec29..a7cf301eab 100644 --- a/hw/intc/Kconfig +++ b/hw/intc/Kconfig @@ -25,7 +25,7 @@ config APIC select MSI_NONBROKEN select I8259 -config ARM_GIC_TCG +config ARM_GICV3_TCG bool default y depends on ARM_GIC && TCG diff --git a/hw/intc/meson.build b/hw/intc/meson.build index 81ccdb0d78..d6d012fb26 100644 --- a/hw/intc/meson.build +++ b/hw/intc/meson.build @@ -6,7 +6,7 @@ softmmu_ss.add(when: 'CONFIG_ARM_GIC', if_true: files( 'arm_gicv3_common.c', 'arm_gicv3_its_common.c', )) -softmmu_ss.add(when: 'CONFIG_ARM_GIC_TCG', if_true: files( +softmmu_ss.add(when: 'CONFIG_ARM_GICV3_TCG', if_true: files( 'arm_gicv3.c', 'arm_gicv3_dist.c', 'arm_gicv3_its.c', @@ -28,7 +28,7 @@ softmmu_ss.add(when: 'CONFIG_XLNX_ZYNQMP_PMU', if_true: files('xlnx-pmu-iomod-in specific_ss.add(when: 'CONFIG_ALLWINNER_A10_PIC', if_true: files('allwinner-a10-pic.c')) specific_ss.add(when: 'CONFIG_APIC', if_true: files('apic.c', 'apic_common.c')) specific_ss.add(when: 'CONFIG_ARM_GIC', if_true: files('arm_gicv3_cpuif_common.c')) -specific_ss.add(when: 'CONFIG_ARM_GIC_TCG', if_true: files('arm_gicv3_cpuif.c')) +specific_ss.add(when: 'CONFIG_ARM_GICV3_TCG', if_true: files('arm_gicv3_cpuif.c')) specific_ss.add(when: 'CONFIG_ARM_GIC_KVM', if_true: files('arm_gic_kvm.c')) specific_ss.add(when: ['CONFIG_ARM_GIC_KVM', 'TARGET_AARCH64'], if_true: files('arm_gicv3_kvm.c', 'arm_gicv3_its_kvm.c')) specific_ss.add(when: 'CONFIG_ARM_V7M', if_true: files('armv7m_nvic.c')) diff --git a/hw/intc/riscv_aclint.c b/hw/intc/riscv_aclint.c index f1a5d3d284..e43b050e92 100644 --- a/hw/intc/riscv_aclint.c +++ b/hw/intc/riscv_aclint.c @@ -235,7 +235,7 @@ static void riscv_aclint_mtimer_realize(DeviceState *dev, Error **errp) s, TYPE_RISCV_ACLINT_MTIMER, s->aperture_size); sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->mmio); - s->timer_irqs = g_malloc(sizeof(qemu_irq) * s->num_harts); + s->timer_irqs = g_new(qemu_irq, s->num_harts); qdev_init_gpio_out(dev, s->timer_irqs, s->num_harts); /* Claim timer interrupt bits */ @@ -292,7 +292,7 @@ DeviceState *riscv_aclint_mtimer_create(hwaddr addr, hwaddr size, RISCVCPU *rvcpu = RISCV_CPU(cpu); CPURISCVState *env = cpu ? cpu->env_ptr : NULL; riscv_aclint_mtimer_callback *cb = - g_malloc0(sizeof(riscv_aclint_mtimer_callback)); + g_new0(riscv_aclint_mtimer_callback, 1); if (!env) { g_free(cb); @@ -393,7 +393,7 @@ static void riscv_aclint_swi_realize(DeviceState *dev, Error **errp) TYPE_RISCV_ACLINT_SWI, RISCV_ACLINT_SWI_SIZE); sysbus_init_mmio(SYS_BUS_DEVICE(dev), &swi->mmio); - swi->soft_irqs = g_malloc(sizeof(qemu_irq) * swi->num_harts); + swi->soft_irqs = g_new(qemu_irq, swi->num_harts); qdev_init_gpio_out(dev, swi->soft_irqs, swi->num_harts); /* Claim software interrupt bits */ diff --git a/hw/intc/xics.c b/hw/intc/xics.c index 48a835eab7..24e67020db 100644 --- a/hw/intc/xics.c +++ b/hw/intc/xics.c @@ -604,7 +604,7 @@ static void ics_realize(DeviceState *dev, Error **errp) error_setg(errp, "Number of interrupts needs to be greater 0"); return; } - ics->irqs = g_malloc0(ics->nr_irqs * sizeof(ICSIRQState)); + ics->irqs = g_new0(ICSIRQState, ics->nr_irqs); qemu_register_reset(ics_reset_handler, ics); } diff --git a/hw/m68k/virt.c b/hw/m68k/virt.c index bbaf630bbf..8e630282e0 100644 --- a/hw/m68k/virt.c +++ b/hw/m68k/virt.c @@ -132,7 +132,7 @@ static void virt_init(MachineState *machine) exit(1); } - reset_info = g_malloc0(sizeof(ResetInfo)); + reset_info = g_new0(ResetInfo, 1); /* init CPUs */ cpu = M68K_CPU(cpu_create(machine->cpu_type)); diff --git a/hw/mips/mipssim.c b/hw/mips/mipssim.c index 2325e7e05a..27a46bd538 100644 --- a/hw/mips/mipssim.c +++ b/hw/mips/mipssim.c @@ -162,7 +162,7 @@ mips_mipssim_init(MachineState *machine) cpu = mips_cpu_create_with_clock(machine->cpu_type, cpuclk); env = &cpu->env; - reset_info = g_malloc0(sizeof(ResetData)); + reset_info = g_new0(ResetData, 1); reset_info->cpu = cpu; reset_info->vector = env->active_tc.PC; qemu_register_reset(main_cpu_reset, reset_info); diff --git a/hw/misc/applesmc.c b/hw/misc/applesmc.c index 1b9acaf1d3..81cd6b6423 100644 --- a/hw/misc/applesmc.c +++ b/hw/misc/applesmc.c @@ -253,7 +253,7 @@ static void applesmc_add_key(AppleSMCState *s, const char *key, { struct AppleSMCData *def; - def = g_malloc0(sizeof(struct AppleSMCData)); + def = g_new0(struct AppleSMCData, 1); def->key = key; def->len = len; def->data = data; diff --git a/hw/misc/imx6_src.c b/hw/misc/imx6_src.c index 79f4375911..7b0e968804 100644 --- a/hw/misc/imx6_src.c +++ b/hw/misc/imx6_src.c @@ -151,7 +151,7 @@ static void imx6_defer_clear_reset_bit(int cpuid, return; } - ri = g_malloc(sizeof(struct SRCSCRResetInfo)); + ri = g_new(struct SRCSCRResetInfo, 1); ri->s = s; ri->reset_bit = reset_shift; diff --git a/hw/misc/ivshmem.c b/hw/misc/ivshmem.c index 2307f4a513..e7c0099bda 100644 --- a/hw/misc/ivshmem.c +++ b/hw/misc/ivshmem.c @@ -411,7 +411,7 @@ static void resize_peers(IVShmemState *s, int nb_peers) assert(nb_peers > old_nb_peers); IVSHMEM_DPRINTF("bumping storage to %d peers\n", nb_peers); - s->peers = g_realloc(s->peers, nb_peers * sizeof(Peer)); + s->peers = g_renew(Peer, s->peers, nb_peers); s->nb_peers = nb_peers; for (i = old_nb_peers; i < nb_peers; i++) { @@ -731,7 +731,7 @@ static void ivshmem_reset(DeviceState *d) static int ivshmem_setup_interrupts(IVShmemState *s, Error **errp) { /* allocate QEMU callback data for receiving interrupts */ - s->msi_vectors = g_malloc0(s->vectors * sizeof(MSIVector)); + s->msi_vectors = g_new0(MSIVector, s->vectors); if (ivshmem_has_feature(s, IVSHMEM_MSI)) { if (msix_init_exclusive_bar(PCI_DEVICE(s), s->vectors, 1, errp)) { diff --git a/hw/misc/meson.build b/hw/misc/meson.build index 645585371a..6fb69612e0 100644 --- a/hw/misc/meson.build +++ b/hw/misc/meson.build @@ -84,6 +84,8 @@ softmmu_ss.add(when: 'CONFIG_RASPI', if_true: files( )) softmmu_ss.add(when: 'CONFIG_SLAVIO', if_true: files('slavio_misc.c')) softmmu_ss.add(when: 'CONFIG_ZYNQ', if_true: files('zynq_slcr.c')) +specific_ss.add(when: 'CONFIG_XLNX_ZYNQMP_ARM', if_true: files('xlnx-zynqmp-crf.c')) +specific_ss.add(when: 'CONFIG_XLNX_ZYNQMP_ARM', if_true: files('xlnx-zynqmp-apu-ctrl.c')) softmmu_ss.add(when: 'CONFIG_XLNX_VERSAL', if_true: files( 'xlnx-versal-xramc.c', 'xlnx-versal-pmc-iou-slcr.c', diff --git a/hw/misc/npcm7xx_clk.c b/hw/misc/npcm7xx_clk.c index 0b61070c52..bc2b879feb 100644 --- a/hw/misc/npcm7xx_clk.c +++ b/hw/misc/npcm7xx_clk.c @@ -612,8 +612,8 @@ static void npcm7xx_clk_sel_init(Object *obj) NPCM7xxClockSELState *sel = NPCM7XX_CLOCK_SEL(obj); for (i = 0; i < NPCM7XX_CLK_SEL_MAX_INPUT; ++i) { - sel->clock_in[i] = qdev_init_clock_in(DEVICE(sel), - g_strdup_printf("clock-in[%d]", i), + g_autofree char *s = g_strdup_printf("clock-in[%d]", i); + sel->clock_in[i] = qdev_init_clock_in(DEVICE(sel), s, npcm7xx_clk_update_sel_cb, sel, ClockUpdate); } sel->clock_out = qdev_init_clock_out(DEVICE(sel), "clock-out"); diff --git a/hw/misc/xlnx-zynqmp-apu-ctrl.c b/hw/misc/xlnx-zynqmp-apu-ctrl.c new file mode 100644 index 0000000000..20de23cf67 --- /dev/null +++ b/hw/misc/xlnx-zynqmp-apu-ctrl.c @@ -0,0 +1,253 @@ +/* + * QEMU model of the ZynqMP APU Control. + * + * Copyright (c) 2013-2022 Xilinx Inc + * SPDX-License-Identifier: GPL-2.0-or-later + * + * Written by Peter Crosthwaite <peter.crosthwaite@xilinx.com> and + * Edgar E. Iglesias <edgar.iglesias@xilinx.com> + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "qemu/log.h" +#include "migration/vmstate.h" +#include "hw/qdev-properties.h" +#include "hw/sysbus.h" +#include "hw/irq.h" +#include "hw/register.h" + +#include "qemu/bitops.h" +#include "qapi/qmp/qerror.h" + +#include "hw/misc/xlnx-zynqmp-apu-ctrl.h" + +#ifndef XILINX_ZYNQMP_APU_ERR_DEBUG +#define XILINX_ZYNQMP_APU_ERR_DEBUG 0 +#endif + +static void update_wfi_out(void *opaque) +{ + XlnxZynqMPAPUCtrl *s = XLNX_ZYNQMP_APU_CTRL(opaque); + unsigned int i, wfi_pending; + + wfi_pending = s->cpu_pwrdwn_req & s->cpu_in_wfi; + for (i = 0; i < APU_MAX_CPU; i++) { + qemu_set_irq(s->wfi_out[i], !!(wfi_pending & (1 << i))); + } +} + +static void zynqmp_apu_rvbar_post_write(RegisterInfo *reg, uint64_t val) +{ + XlnxZynqMPAPUCtrl *s = XLNX_ZYNQMP_APU_CTRL(reg->opaque); + int i; + + for (i = 0; i < APU_MAX_CPU; ++i) { + uint64_t rvbar = s->regs[R_RVBARADDR0L + 2 * i] + + ((uint64_t)s->regs[R_RVBARADDR0H + 2 * i] << 32); + if (s->cpus[i]) { + object_property_set_int(OBJECT(s->cpus[i]), "rvbar", rvbar, + &error_abort); + } + } +} + +static void zynqmp_apu_pwrctl_post_write(RegisterInfo *reg, uint64_t val) +{ + XlnxZynqMPAPUCtrl *s = XLNX_ZYNQMP_APU_CTRL(reg->opaque); + unsigned int i, new; + + for (i = 0; i < APU_MAX_CPU; i++) { + new = val & (1 << i); + /* Check if CPU's CPUPWRDNREQ has changed. If yes, update GPIOs. */ + if (new != (s->cpu_pwrdwn_req & (1 << i))) { + qemu_set_irq(s->cpu_power_status[i], !!new); + } + s->cpu_pwrdwn_req &= ~(1 << i); + s->cpu_pwrdwn_req |= new; + } + update_wfi_out(s); +} + +static void imr_update_irq(XlnxZynqMPAPUCtrl *s) +{ + bool pending = s->regs[R_ISR] & ~s->regs[R_IMR]; + qemu_set_irq(s->irq_imr, pending); +} + +static void isr_postw(RegisterInfo *reg, uint64_t val64) +{ + XlnxZynqMPAPUCtrl *s = XLNX_ZYNQMP_APU_CTRL(reg->opaque); + imr_update_irq(s); +} + +static uint64_t ien_prew(RegisterInfo *reg, uint64_t val64) +{ + XlnxZynqMPAPUCtrl *s = XLNX_ZYNQMP_APU_CTRL(reg->opaque); + uint32_t val = val64; + + s->regs[R_IMR] &= ~val; + imr_update_irq(s); + return 0; +} + +static uint64_t ids_prew(RegisterInfo *reg, uint64_t val64) +{ + XlnxZynqMPAPUCtrl *s = XLNX_ZYNQMP_APU_CTRL(reg->opaque); + uint32_t val = val64; + + s->regs[R_IMR] |= val; + imr_update_irq(s); + return 0; +} + +static const RegisterAccessInfo zynqmp_apu_regs_info[] = { +#define RVBAR_REGDEF(n) \ + { .name = "RVBAR CPU " #n " Low", .addr = A_RVBARADDR ## n ## L, \ + .reset = 0xffff0000ul, \ + .post_write = zynqmp_apu_rvbar_post_write, \ + },{ .name = "RVBAR CPU " #n " High", .addr = A_RVBARADDR ## n ## H, \ + .post_write = zynqmp_apu_rvbar_post_write, \ + } + { .name = "ERR_CTRL", .addr = A_APU_ERR_CTRL, + },{ .name = "ISR", .addr = A_ISR, + .w1c = 0x1, + .post_write = isr_postw, + },{ .name = "IMR", .addr = A_IMR, + .reset = 0x1, + .ro = 0x1, + },{ .name = "IEN", .addr = A_IEN, + .pre_write = ien_prew, + },{ .name = "IDS", .addr = A_IDS, + .pre_write = ids_prew, + },{ .name = "CONFIG_0", .addr = A_CONFIG_0, + .reset = 0xf0f, + },{ .name = "CONFIG_1", .addr = A_CONFIG_1, + }, + RVBAR_REGDEF(0), + RVBAR_REGDEF(1), + RVBAR_REGDEF(2), + RVBAR_REGDEF(3), + { .name = "ACE_CTRL", .addr = A_ACE_CTRL, + .reset = 0xf000f, + },{ .name = "SNOOP_CTRL", .addr = A_SNOOP_CTRL, + },{ .name = "PWRCTL", .addr = A_PWRCTL, + .post_write = zynqmp_apu_pwrctl_post_write, + },{ .name = "PWRSTAT", .addr = A_PWRSTAT, + .ro = 0x3000f, + } +}; + +static void zynqmp_apu_reset_enter(Object *obj, ResetType type) +{ + XlnxZynqMPAPUCtrl *s = XLNX_ZYNQMP_APU_CTRL(obj); + int i; + + for (i = 0; i < APU_R_MAX; ++i) { + register_reset(&s->regs_info[i]); + } + + s->cpu_pwrdwn_req = 0; + s->cpu_in_wfi = 0; +} + +static void zynqmp_apu_reset_hold(Object *obj) +{ + XlnxZynqMPAPUCtrl *s = XLNX_ZYNQMP_APU_CTRL(obj); + + update_wfi_out(s); + imr_update_irq(s); +} + +static const MemoryRegionOps zynqmp_apu_ops = { + .read = register_read_memory, + .write = register_write_memory, + .endianness = DEVICE_LITTLE_ENDIAN, + .valid = { + .min_access_size = 4, + .max_access_size = 4, + } +}; + +static void zynqmp_apu_handle_wfi(void *opaque, int irq, int level) +{ + XlnxZynqMPAPUCtrl *s = XLNX_ZYNQMP_APU_CTRL(opaque); + + s->cpu_in_wfi = deposit32(s->cpu_in_wfi, irq, 1, level); + update_wfi_out(s); +} + +static void zynqmp_apu_init(Object *obj) +{ + XlnxZynqMPAPUCtrl *s = XLNX_ZYNQMP_APU_CTRL(obj); + int i; + + s->reg_array = + register_init_block32(DEVICE(obj), zynqmp_apu_regs_info, + ARRAY_SIZE(zynqmp_apu_regs_info), + s->regs_info, s->regs, + &zynqmp_apu_ops, + XILINX_ZYNQMP_APU_ERR_DEBUG, + APU_R_MAX * 4); + sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->reg_array->mem); + sysbus_init_irq(SYS_BUS_DEVICE(obj), &s->irq_imr); + + for (i = 0; i < APU_MAX_CPU; ++i) { + g_autofree gchar *prop_name = g_strdup_printf("cpu%d", i); + object_property_add_link(obj, prop_name, TYPE_ARM_CPU, + (Object **)&s->cpus[i], + qdev_prop_allow_set_link_before_realize, + OBJ_PROP_LINK_STRONG); + } + + /* wfi_out is used to connect to PMU GPIs. */ + qdev_init_gpio_out_named(DEVICE(obj), s->wfi_out, "wfi_out", 4); + /* CPU_POWER_STATUS is used to connect to INTC redirect. */ + qdev_init_gpio_out_named(DEVICE(obj), s->cpu_power_status, + "CPU_POWER_STATUS", 4); + /* wfi_in is used as input from CPUs as wfi request. */ + qdev_init_gpio_in_named(DEVICE(obj), zynqmp_apu_handle_wfi, "wfi_in", 4); +} + +static void zynqmp_apu_finalize(Object *obj) +{ + XlnxZynqMPAPUCtrl *s = XLNX_ZYNQMP_APU_CTRL(obj); + register_finalize_block(s->reg_array); +} + +static const VMStateDescription vmstate_zynqmp_apu = { + .name = TYPE_XLNX_ZYNQMP_APU_CTRL, + .version_id = 1, + .minimum_version_id = 1, + .fields = (VMStateField[]) { + VMSTATE_UINT32_ARRAY(regs, XlnxZynqMPAPUCtrl, APU_R_MAX), + VMSTATE_END_OF_LIST(), + } +}; + +static void zynqmp_apu_class_init(ObjectClass *klass, void *data) +{ + ResettableClass *rc = RESETTABLE_CLASS(klass); + DeviceClass *dc = DEVICE_CLASS(klass); + + dc->vmsd = &vmstate_zynqmp_apu; + + rc->phases.enter = zynqmp_apu_reset_enter; + rc->phases.hold = zynqmp_apu_reset_hold; +} + +static const TypeInfo zynqmp_apu_info = { + .name = TYPE_XLNX_ZYNQMP_APU_CTRL, + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(XlnxZynqMPAPUCtrl), + .class_init = zynqmp_apu_class_init, + .instance_init = zynqmp_apu_init, + .instance_finalize = zynqmp_apu_finalize, +}; + +static void zynqmp_apu_register_types(void) +{ + type_register_static(&zynqmp_apu_info); +} + +type_init(zynqmp_apu_register_types) diff --git a/hw/misc/xlnx-zynqmp-crf.c b/hw/misc/xlnx-zynqmp-crf.c new file mode 100644 index 0000000000..57bc8cf49a --- /dev/null +++ b/hw/misc/xlnx-zynqmp-crf.c @@ -0,0 +1,266 @@ +/* + * QEMU model of the CRF - Clock Reset FPD. + * + * Copyright (c) 2022 Xilinx Inc. + * SPDX-License-Identifier: GPL-2.0-or-later + * Written by Edgar E. Iglesias <edgar.iglesias@xilinx.com> + */ + +#include "qemu/osdep.h" +#include "hw/sysbus.h" +#include "hw/register.h" +#include "qemu/bitops.h" +#include "qemu/log.h" +#include "migration/vmstate.h" +#include "hw/irq.h" +#include "hw/misc/xlnx-zynqmp-crf.h" +#include "target/arm/arm-powerctl.h" + +#ifndef XLNX_ZYNQMP_CRF_ERR_DEBUG +#define XLNX_ZYNQMP_CRF_ERR_DEBUG 0 +#endif + +#define CRF_MAX_CPU 4 + +static void ir_update_irq(XlnxZynqMPCRF *s) +{ + bool pending = s->regs[R_IR_STATUS] & ~s->regs[R_IR_MASK]; + qemu_set_irq(s->irq_ir, pending); +} + +static void ir_status_postw(RegisterInfo *reg, uint64_t val64) +{ + XlnxZynqMPCRF *s = XLNX_ZYNQMP_CRF(reg->opaque); + ir_update_irq(s); +} + +static uint64_t ir_enable_prew(RegisterInfo *reg, uint64_t val64) +{ + XlnxZynqMPCRF *s = XLNX_ZYNQMP_CRF(reg->opaque); + uint32_t val = val64; + + s->regs[R_IR_MASK] &= ~val; + ir_update_irq(s); + return 0; +} + +static uint64_t ir_disable_prew(RegisterInfo *reg, uint64_t val64) +{ + XlnxZynqMPCRF *s = XLNX_ZYNQMP_CRF(reg->opaque); + uint32_t val = val64; + + s->regs[R_IR_MASK] |= val; + ir_update_irq(s); + return 0; +} + +static uint64_t rst_fpd_apu_prew(RegisterInfo *reg, uint64_t val64) +{ + XlnxZynqMPCRF *s = XLNX_ZYNQMP_CRF(reg->opaque); + uint32_t val = val64; + uint32_t val_old = s->regs[R_RST_FPD_APU]; + unsigned int i; + + for (i = 0; i < CRF_MAX_CPU; i++) { + uint32_t mask = (1 << (R_RST_FPD_APU_ACPU0_RESET_SHIFT + i)); + + if ((val ^ val_old) & mask) { + if (val & mask) { + arm_set_cpu_off(i); + } else { + arm_set_cpu_on_and_reset(i); + } + } + } + return val64; +} + +static const RegisterAccessInfo crf_regs_info[] = { + { .name = "ERR_CTRL", .addr = A_ERR_CTRL, + },{ .name = "IR_STATUS", .addr = A_IR_STATUS, + .w1c = 0x1, + .post_write = ir_status_postw, + },{ .name = "IR_MASK", .addr = A_IR_MASK, + .reset = 0x1, + .ro = 0x1, + },{ .name = "IR_ENABLE", .addr = A_IR_ENABLE, + .pre_write = ir_enable_prew, + },{ .name = "IR_DISABLE", .addr = A_IR_DISABLE, + .pre_write = ir_disable_prew, + },{ .name = "CRF_WPROT", .addr = A_CRF_WPROT, + },{ .name = "APLL_CTRL", .addr = A_APLL_CTRL, + .reset = 0x12c09, + .rsvd = 0xf88c80f6, + },{ .name = "APLL_CFG", .addr = A_APLL_CFG, + .rsvd = 0x1801210, + },{ .name = "APLL_FRAC_CFG", .addr = A_APLL_FRAC_CFG, + .rsvd = 0x7e330000, + },{ .name = "DPLL_CTRL", .addr = A_DPLL_CTRL, + .reset = 0x2c09, + .rsvd = 0xf88c80f6, + },{ .name = "DPLL_CFG", .addr = A_DPLL_CFG, + .rsvd = 0x1801210, + },{ .name = "DPLL_FRAC_CFG", .addr = A_DPLL_FRAC_CFG, + .rsvd = 0x7e330000, + },{ .name = "VPLL_CTRL", .addr = A_VPLL_CTRL, + .reset = 0x12809, + .rsvd = 0xf88c80f6, + },{ .name = "VPLL_CFG", .addr = A_VPLL_CFG, + .rsvd = 0x1801210, + },{ .name = "VPLL_FRAC_CFG", .addr = A_VPLL_FRAC_CFG, + .rsvd = 0x7e330000, + },{ .name = "PLL_STATUS", .addr = A_PLL_STATUS, + .reset = 0x3f, + .rsvd = 0xc0, + .ro = 0x3f, + },{ .name = "APLL_TO_LPD_CTRL", .addr = A_APLL_TO_LPD_CTRL, + .reset = 0x400, + .rsvd = 0xc0ff, + },{ .name = "DPLL_TO_LPD_CTRL", .addr = A_DPLL_TO_LPD_CTRL, + .reset = 0x400, + .rsvd = 0xc0ff, + },{ .name = "VPLL_TO_LPD_CTRL", .addr = A_VPLL_TO_LPD_CTRL, + .reset = 0x400, + .rsvd = 0xc0ff, + },{ .name = "ACPU_CTRL", .addr = A_ACPU_CTRL, + .reset = 0x3000400, + .rsvd = 0xfcffc0f8, + },{ .name = "DBG_TRACE_CTRL", .addr = A_DBG_TRACE_CTRL, + .reset = 0x2500, + .rsvd = 0xfeffc0f8, + },{ .name = "DBG_FPD_CTRL", .addr = A_DBG_FPD_CTRL, + .reset = 0x1002500, + .rsvd = 0xfeffc0f8, + },{ .name = "DP_VIDEO_REF_CTRL", .addr = A_DP_VIDEO_REF_CTRL, + .reset = 0x1002300, + .rsvd = 0xfec0c0f8, + },{ .name = "DP_AUDIO_REF_CTRL", .addr = A_DP_AUDIO_REF_CTRL, + .reset = 0x1032300, + .rsvd = 0xfec0c0f8, + },{ .name = "DP_STC_REF_CTRL", .addr = A_DP_STC_REF_CTRL, + .reset = 0x1203200, + .rsvd = 0xfec0c0f8, + },{ .name = "DDR_CTRL", .addr = A_DDR_CTRL, + .reset = 0x1000500, + .rsvd = 0xfeffc0f8, + },{ .name = "GPU_REF_CTRL", .addr = A_GPU_REF_CTRL, + .reset = 0x1500, + .rsvd = 0xf8ffc0f8, + },{ .name = "SATA_REF_CTRL", .addr = A_SATA_REF_CTRL, + .reset = 0x1001600, + .rsvd = 0xfeffc0f8, + },{ .name = "PCIE_REF_CTRL", .addr = A_PCIE_REF_CTRL, + .reset = 0x1500, + .rsvd = 0xfeffc0f8, + },{ .name = "GDMA_REF_CTRL", .addr = A_GDMA_REF_CTRL, + .reset = 0x1000500, + .rsvd = 0xfeffc0f8, + },{ .name = "DPDMA_REF_CTRL", .addr = A_DPDMA_REF_CTRL, + .reset = 0x1000500, + .rsvd = 0xfeffc0f8, + },{ .name = "TOPSW_MAIN_CTRL", .addr = A_TOPSW_MAIN_CTRL, + .reset = 0x1000400, + .rsvd = 0xfeffc0f8, + },{ .name = "TOPSW_LSBUS_CTRL", .addr = A_TOPSW_LSBUS_CTRL, + .reset = 0x1000800, + .rsvd = 0xfeffc0f8, + },{ .name = "DBG_TSTMP_CTRL", .addr = A_DBG_TSTMP_CTRL, + .reset = 0xa00, + .rsvd = 0xffffc0f8, + }, + { .name = "RST_FPD_TOP", .addr = A_RST_FPD_TOP, + .reset = 0xf9ffe, + .rsvd = 0xf06001, + },{ .name = "RST_FPD_APU", .addr = A_RST_FPD_APU, + .reset = 0x3d0f, + .rsvd = 0xc2f0, + .pre_write = rst_fpd_apu_prew, + },{ .name = "RST_DDR_SS", .addr = A_RST_DDR_SS, + .reset = 0xf, + .rsvd = 0xf3, + } +}; + +static void crf_reset_enter(Object *obj, ResetType type) +{ + XlnxZynqMPCRF *s = XLNX_ZYNQMP_CRF(obj); + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(s->regs_info); ++i) { + register_reset(&s->regs_info[i]); + } +} + +static void crf_reset_hold(Object *obj) +{ + XlnxZynqMPCRF *s = XLNX_ZYNQMP_CRF(obj); + ir_update_irq(s); +} + +static const MemoryRegionOps crf_ops = { + .read = register_read_memory, + .write = register_write_memory, + .endianness = DEVICE_LITTLE_ENDIAN, + .valid = { + .min_access_size = 4, + .max_access_size = 4, + }, +}; + +static void crf_init(Object *obj) +{ + XlnxZynqMPCRF *s = XLNX_ZYNQMP_CRF(obj); + SysBusDevice *sbd = SYS_BUS_DEVICE(obj); + + s->reg_array = + register_init_block32(DEVICE(obj), crf_regs_info, + ARRAY_SIZE(crf_regs_info), + s->regs_info, s->regs, + &crf_ops, + XLNX_ZYNQMP_CRF_ERR_DEBUG, + CRF_R_MAX * 4); + sysbus_init_mmio(sbd, &s->reg_array->mem); + sysbus_init_irq(sbd, &s->irq_ir); +} + +static void crf_finalize(Object *obj) +{ + XlnxZynqMPCRF *s = XLNX_ZYNQMP_CRF(obj); + register_finalize_block(s->reg_array); +} + +static const VMStateDescription vmstate_crf = { + .name = TYPE_XLNX_ZYNQMP_CRF, + .version_id = 1, + .minimum_version_id = 1, + .fields = (VMStateField[]) { + VMSTATE_UINT32_ARRAY(regs, XlnxZynqMPCRF, CRF_R_MAX), + VMSTATE_END_OF_LIST(), + } +}; + +static void crf_class_init(ObjectClass *klass, void *data) +{ + ResettableClass *rc = RESETTABLE_CLASS(klass); + DeviceClass *dc = DEVICE_CLASS(klass); + + dc->vmsd = &vmstate_crf; + rc->phases.enter = crf_reset_enter; + rc->phases.hold = crf_reset_hold; +} + +static const TypeInfo crf_info = { + .name = TYPE_XLNX_ZYNQMP_CRF, + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(XlnxZynqMPCRF), + .class_init = crf_class_init, + .instance_init = crf_init, + .instance_finalize = crf_finalize, +}; + +static void crf_register_types(void) +{ + type_register_static(&crf_info); +} + +type_init(crf_register_types) diff --git a/hw/net/virtio-net.c b/hw/net/virtio-net.c index 2087516253..1067e72b39 100644 --- a/hw/net/virtio-net.c +++ b/hw/net/virtio-net.c @@ -1995,7 +1995,7 @@ static void virtio_net_rsc_cache_buf(VirtioNetRscChain *chain, VirtioNetRscSeg *seg; hdr_len = chain->n->guest_hdr_len; - seg = g_malloc(sizeof(VirtioNetRscSeg)); + seg = g_new(VirtioNetRscSeg, 1); seg->buf = g_malloc(hdr_len + sizeof(struct eth_header) + sizeof(struct ip6_header) + VIRTIO_NET_MAX_TCP_PAYLOAD); memcpy(seg->buf, buf, size); @@ -3443,7 +3443,7 @@ static void virtio_net_device_realize(DeviceState *dev, Error **errp) virtio_cleanup(vdev); return; } - n->vqs = g_malloc0(sizeof(VirtIONetQueue) * n->max_queue_pairs); + n->vqs = g_new0(VirtIONetQueue, n->max_queue_pairs); n->curr_queue_pairs = 1; n->tx_timeout = n->net_conf.txtimer; diff --git a/hw/nvme/ns.c b/hw/nvme/ns.c index 8a3613d9ab..324f53ea0c 100644 --- a/hw/nvme/ns.c +++ b/hw/nvme/ns.c @@ -268,7 +268,7 @@ static void nvme_ns_init_zoned(NvmeNamespace *ns) nvme_ns_zoned_init_state(ns); - id_ns_z = g_malloc0(sizeof(NvmeIdNsZoned)); + id_ns_z = g_new0(NvmeIdNsZoned, 1); /* MAR/MOR are zeroes-based, FFFFFFFFFh means no limit */ id_ns_z->mar = cpu_to_le32(ns->params.max_active_zones - 1); diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c index ac801ac835..6e9aa9d6ac 100644 --- a/hw/pci-host/pnv_phb3.c +++ b/hw/pci-host/pnv_phb3.c @@ -946,7 +946,7 @@ static AddressSpace *pnv_phb3_dma_iommu(PCIBus *bus, void *opaque, int devfn) } if (ds == NULL) { - ds = g_malloc0(sizeof(PnvPhb3DMASpace)); + ds = g_new0(PnvPhb3DMASpace, 1); ds->bus = bus; ds->devfn = devfn; ds->pe_num = PHB_INVALID_PE; diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c index b301762093..11c97e27eb 100644 --- a/hw/pci-host/pnv_phb4.c +++ b/hw/pci-host/pnv_phb4.c @@ -1466,7 +1466,7 @@ static AddressSpace *pnv_phb4_dma_iommu(PCIBus *bus, void *opaque, int devfn) ds = pnv_phb4_dma_find(phb, bus, devfn); if (ds == NULL) { - ds = g_malloc0(sizeof(PnvPhb4DMASpace)); + ds = g_new0(PnvPhb4DMASpace, 1); ds->bus = bus; ds->devfn = devfn; ds->pe_num = PHB_INVALID_PE; diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 5cb1232e27..dae9119bfe 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -1697,7 +1697,7 @@ static const pci_class_desc pci_class_descriptions[] = { 0x0902, "Mouse", "mouse"}, { 0x0A00, "Dock station", "dock", 0x00ff}, { 0x0B00, "i386 cpu", "cpu", 0x00ff}, - { 0x0c00, "Fireware contorller", "fireware"}, + { 0x0c00, "Firewire controller", "firewire"}, { 0x0c01, "Access bus controller", "access-bus"}, { 0x0c02, "SSA controller", "ssa"}, { 0x0c03, "USB controller", "usb"}, diff --git a/hw/pci/pcie_sriov.c b/hw/pci/pcie_sriov.c index 87abad6ac8..8e3faf1f59 100644 --- a/hw/pci/pcie_sriov.c +++ b/hw/pci/pcie_sriov.c @@ -177,7 +177,7 @@ static void register_vfs(PCIDevice *dev) assert(sriov_cap > 0); num_vfs = pci_get_word(dev->config + sriov_cap + PCI_SRIOV_NUM_VF); - dev->exp.sriov_pf.vf = g_malloc(sizeof(PCIDevice *) * num_vfs); + dev->exp.sriov_pf.vf = g_new(PCIDevice *, num_vfs); assert(dev->exp.sriov_pf.vf); trace_sriov_register_vfs(dev->name, PCI_SLOT(dev->devfn), diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index 960e7efcd3..c7e6767f91 100644 --- a/hw/ppc/e500.c +++ b/hw/ppc/e500.c @@ -899,7 +899,7 @@ void ppce500_init(MachineState *machine) if (!i) { /* Primary CPU */ struct boot_info *boot_info; - boot_info = g_malloc0(sizeof(struct boot_info)); + boot_info = g_new0(struct boot_info, 1); qemu_register_reset(ppce500_cpu_reset, cpu); env->load_info = boot_info; } else { diff --git a/hw/ppc/ppc.c b/hw/ppc/ppc.c index 9e99625ea9..faa02d6710 100644 --- a/hw/ppc/ppc.c +++ b/hw/ppc/ppc.c @@ -1063,7 +1063,7 @@ clk_setup_cb cpu_ppc_tb_init (CPUPPCState *env, uint32_t freq) PowerPCCPU *cpu = env_archcpu(env); ppc_tb_t *tb_env; - tb_env = g_malloc0(sizeof(ppc_tb_t)); + tb_env = g_new0(ppc_tb_t, 1); env->tb_env = tb_env; tb_env->flags = PPC_DECR_UNDERFLOW_TRIGGERED; if (is_book3s_arch2x(env)) { @@ -1338,8 +1338,8 @@ clk_setup_cb ppc_40x_timers_init (CPUPPCState *env, uint32_t freq, trace_ppc40x_timers_init(freq); - tb_env = g_malloc0(sizeof(ppc_tb_t)); - ppc40x_timer = g_malloc0(sizeof(ppc40x_timer_t)); + tb_env = g_new0(ppc_tb_t, 1); + ppc40x_timer = g_new0(ppc40x_timer_t, 1); env->tb_env = tb_env; tb_env->flags = PPC_DECR_UNDERFLOW_TRIGGERED; @@ -1447,7 +1447,7 @@ int ppc_dcr_init (CPUPPCState *env, int (*read_error)(int dcrn), { ppc_dcr_t *dcr_env; - dcr_env = g_malloc0(sizeof(ppc_dcr_t)); + dcr_env = g_new0(ppc_dcr_t, 1); dcr_env->read_error = read_error; dcr_env->write_error = write_error; env->dcr_env = dcr_env; diff --git a/hw/ppc/ppc405_boards.c b/hw/ppc/ppc405_boards.c index 3ae2b36373..7e1a4ac955 100644 --- a/hw/ppc/ppc405_boards.c +++ b/hw/ppc/ppc405_boards.c @@ -130,7 +130,7 @@ static void ref405ep_fpga_init(MemoryRegion *sysmem, uint32_t base) ref405ep_fpga_t *fpga; MemoryRegion *fpga_memory = g_new(MemoryRegion, 1); - fpga = g_malloc0(sizeof(ref405ep_fpga_t)); + fpga = g_new0(ref405ep_fpga_t, 1); memory_region_init_io(fpga_memory, NULL, &ref405ep_fpga_ops, fpga, "fpga", 0x00000100); memory_region_add_subregion(sysmem, base, fpga_memory); @@ -431,7 +431,7 @@ static void taihu_cpld_init(MemoryRegion *sysmem, uint32_t base) taihu_cpld_t *cpld; MemoryRegion *cpld_memory = g_new(MemoryRegion, 1); - cpld = g_malloc0(sizeof(taihu_cpld_t)); + cpld = g_new0(taihu_cpld_t, 1); memory_region_init_io(cpld_memory, NULL, &taihu_cpld_ops, cpld, "cpld", 0x100); memory_region_add_subregion(sysmem, base, cpld_memory); qemu_register_reset(&taihu_cpld_reset, cpld); diff --git a/hw/ppc/ppc405_uc.c b/hw/ppc/ppc405_uc.c index 8aacd275a6..36c8ba6f3c 100644 --- a/hw/ppc/ppc405_uc.c +++ b/hw/ppc/ppc405_uc.c @@ -215,7 +215,7 @@ void ppc4xx_plb_init(CPUPPCState *env) { ppc4xx_plb_t *plb; - plb = g_malloc0(sizeof(ppc4xx_plb_t)); + plb = g_new0(ppc4xx_plb_t, 1); ppc_dcr_register(env, PLB3A0_ACR, plb, &dcr_read_plb, &dcr_write_plb); ppc_dcr_register(env, PLB4A0_ACR, plb, &dcr_read_plb, &dcr_write_plb); ppc_dcr_register(env, PLB0_ACR, plb, &dcr_read_plb, &dcr_write_plb); @@ -300,7 +300,7 @@ static void ppc4xx_pob_init(CPUPPCState *env) { ppc4xx_pob_t *pob; - pob = g_malloc0(sizeof(ppc4xx_pob_t)); + pob = g_new0(ppc4xx_pob_t, 1); ppc_dcr_register(env, POB0_BEAR, pob, &dcr_read_pob, &dcr_write_pob); ppc_dcr_register(env, POB0_BESR0, pob, &dcr_read_pob, &dcr_write_pob); ppc_dcr_register(env, POB0_BESR1, pob, &dcr_read_pob, &dcr_write_pob); @@ -380,7 +380,7 @@ static void ppc4xx_opba_init(hwaddr base) trace_opba_init(base); - opba = g_malloc0(sizeof(ppc4xx_opba_t)); + opba = g_new0(ppc4xx_opba_t, 1); memory_region_init_io(&opba->io, NULL, &opba_ops, opba, "opba", 0x002); memory_region_add_subregion(get_system_memory(), base, &opba->io); qemu_register_reset(ppc4xx_opba_reset, opba); @@ -575,7 +575,7 @@ void ppc405_ebc_init(CPUPPCState *env) { ppc4xx_ebc_t *ebc; - ebc = g_malloc0(sizeof(ppc4xx_ebc_t)); + ebc = g_new0(ppc4xx_ebc_t, 1); qemu_register_reset(&ebc_reset, ebc); ppc_dcr_register(env, EBC0_CFGADDR, ebc, &dcr_read_ebc, &dcr_write_ebc); @@ -658,7 +658,7 @@ static void ppc405_dma_init(CPUPPCState *env, qemu_irq irqs[4]) { ppc405_dma_t *dma; - dma = g_malloc0(sizeof(ppc405_dma_t)); + dma = g_new0(ppc405_dma_t, 1); memcpy(dma->irqs, irqs, 4 * sizeof(qemu_irq)); qemu_register_reset(&ppc405_dma_reset, dma); ppc_dcr_register(env, DMA0_CR0, @@ -757,7 +757,7 @@ static void ppc405_gpio_init(hwaddr base) trace_ppc405_gpio_init(base); - gpio = g_malloc0(sizeof(ppc405_gpio_t)); + gpio = g_new0(ppc405_gpio_t, 1); memory_region_init_io(&gpio->io, NULL, &ppc405_gpio_ops, gpio, "pgio", 0x038); memory_region_add_subregion(get_system_memory(), base, &gpio->io); qemu_register_reset(&ppc405_gpio_reset, gpio); @@ -906,7 +906,7 @@ static void ppc405_ocm_init(CPUPPCState *env) { ppc405_ocm_t *ocm; - ocm = g_malloc0(sizeof(ppc405_ocm_t)); + ocm = g_new0(ppc405_ocm_t, 1); /* XXX: Size is 4096 or 0x04000000 */ memory_region_init_ram(&ocm->isarc_ram, NULL, "ppc405.ocm", 4 * KiB, &error_fatal); @@ -1148,7 +1148,7 @@ static void ppc4xx_gpt_init(hwaddr base, qemu_irq irqs[5]) trace_ppc4xx_gpt_init(base); - gpt = g_malloc0(sizeof(ppc4xx_gpt_t)); + gpt = g_new0(ppc4xx_gpt_t, 1); for (i = 0; i < 5; i++) { gpt->irqs[i] = irqs[i]; } @@ -1399,7 +1399,7 @@ static void ppc405ep_cpc_init (CPUPPCState *env, clk_setup_t clk_setup[8], { ppc405ep_cpc_t *cpc; - cpc = g_malloc0(sizeof(ppc405ep_cpc_t)); + cpc = g_new0(ppc405ep_cpc_t, 1); memcpy(cpc->clk_setup, clk_setup, PPC405EP_CLK_NB * sizeof(clk_setup_t)); cpc->jtagid = 0x20267049; diff --git a/hw/ppc/ppc4xx_devs.c b/hw/ppc/ppc4xx_devs.c index e7d82ae501..737c0896b4 100644 --- a/hw/ppc/ppc4xx_devs.c +++ b/hw/ppc/ppc4xx_devs.c @@ -389,7 +389,7 @@ void ppc4xx_sdram_init (CPUPPCState *env, qemu_irq irq, int nbanks, { ppc4xx_sdram_t *sdram; - sdram = g_malloc0(sizeof(ppc4xx_sdram_t)); + sdram = g_new0(ppc4xx_sdram_t, 1); sdram->irq = irq; sdram->nbanks = nbanks; sdram->ram_memories = ram_memories; diff --git a/hw/ppc/ppc_booke.c b/hw/ppc/ppc_booke.c index 10b643861f..ca22da196a 100644 --- a/hw/ppc/ppc_booke.c +++ b/hw/ppc/ppc_booke.c @@ -337,8 +337,8 @@ void ppc_booke_timers_init(PowerPCCPU *cpu, uint32_t freq, uint32_t flags) booke_timer_t *booke_timer; int ret = 0; - tb_env = g_malloc0(sizeof(ppc_tb_t)); - booke_timer = g_malloc0(sizeof(booke_timer_t)); + tb_env = g_new0(ppc_tb_t, 1); + booke_timer = g_new0(booke_timer_t, 1); cpu->env.tb_env = tb_env; tb_env->flags = flags | PPC_TIMER_BOOKE | PPC_DECR_ZERO_TRIGGERED; diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 953fc65fa8..a4372ba189 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -3601,7 +3601,7 @@ static SpaprDimmState *spapr_pending_dimm_unplugs_add(SpaprMachineState *spapr, */ ds = spapr_pending_dimm_unplugs_find(spapr, dimm); if (!ds) { - ds = g_malloc0(sizeof(SpaprDimmState)); + ds = g_new0(SpaprDimmState, 1); ds->nr_lmbs = nr_lmbs; ds->dimm = dimm; QTAILQ_INSERT_HEAD(&spapr->pending_dimm_unplugs, ds, next); diff --git a/hw/ppc/spapr_events.c b/hw/ppc/spapr_events.c index 630e86282c..4508e40814 100644 --- a/hw/ppc/spapr_events.c +++ b/hw/ppc/spapr_events.c @@ -594,7 +594,7 @@ static void spapr_hotplug_req_event(uint8_t hp_id, uint8_t hp_action, struct rtas_event_log_v6_hp *hp; entry = g_new(SpaprEventLogEntry, 1); - new_hp = g_malloc0(sizeof(struct hp_extended_log)); + new_hp = g_new0(struct hp_extended_log, 1); entry->extended_log = new_hp; v6hdr = &new_hp->v6hdr; diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c index f008290787..7c8bb76f99 100644 --- a/hw/ppc/spapr_hcall.c +++ b/hw/ppc/spapr_hcall.c @@ -1596,7 +1596,7 @@ static target_ulong h_enter_nested(PowerPCCPU *cpu, return H_PARAMETER; } - spapr_cpu->nested_host_state = g_try_malloc(sizeof(CPUPPCState)); + spapr_cpu->nested_host_state = g_try_new(CPUPPCState, 1); if (!spapr_cpu->nested_host_state) { return H_NO_MEM; } diff --git a/hw/ppc/spapr_numa.c b/hw/ppc/spapr_numa.c index 4f93bdefec..d7c0e212ba 100644 --- a/hw/ppc/spapr_numa.c +++ b/hw/ppc/spapr_numa.c @@ -436,8 +436,7 @@ int spapr_numa_write_assoc_lookup_arrays(SpaprMachineState *spapr, void *fdt, int i; /* ibm,associativity-lookup-arrays */ - int_buf = g_malloc0((nr_nodes * max_distance_ref_points + 2) * - sizeof(uint32_t)); + int_buf = g_new0(uint32_t, nr_nodes * max_distance_ref_points + 2); cur_index = int_buf; int_buf[0] = cpu_to_be32(nr_nodes); /* Number of entries per associativity list */ diff --git a/hw/rdma/vmw/pvrdma_dev_ring.c b/hw/rdma/vmw/pvrdma_dev_ring.c index 42130667a7..598e6adc5e 100644 --- a/hw/rdma/vmw/pvrdma_dev_ring.c +++ b/hw/rdma/vmw/pvrdma_dev_ring.c @@ -41,7 +41,7 @@ int pvrdma_ring_init(PvrdmaRing *ring, const char *name, PCIDevice *dev, qatomic_set(&ring->ring_state->cons_head, 0); */ ring->npages = npages; - ring->pages = g_malloc0(npages * sizeof(void *)); + ring->pages = g_new0(void *, npages); for (i = 0; i < npages; i++) { if (!tbl[i]) { diff --git a/hw/rdma/vmw/pvrdma_qp_ops.c b/hw/rdma/vmw/pvrdma_qp_ops.c index 8050287a6c..bd7cbf2bdf 100644 --- a/hw/rdma/vmw/pvrdma_qp_ops.c +++ b/hw/rdma/vmw/pvrdma_qp_ops.c @@ -154,7 +154,7 @@ void pvrdma_qp_send(PVRDMADev *dev, uint32_t qp_handle) CompHandlerCtx *comp_ctx; /* Prepare CQE */ - comp_ctx = g_malloc(sizeof(CompHandlerCtx)); + comp_ctx = g_new(CompHandlerCtx, 1); comp_ctx->dev = dev; comp_ctx->cq_handle = qp->send_cq_handle; comp_ctx->cqe.wr_id = wqe->hdr.wr_id; @@ -217,7 +217,7 @@ void pvrdma_qp_recv(PVRDMADev *dev, uint32_t qp_handle) CompHandlerCtx *comp_ctx; /* Prepare CQE */ - comp_ctx = g_malloc(sizeof(CompHandlerCtx)); + comp_ctx = g_new(CompHandlerCtx, 1); comp_ctx->dev = dev; comp_ctx->cq_handle = qp->recv_cq_handle; comp_ctx->cqe.wr_id = wqe->hdr.wr_id; @@ -259,7 +259,7 @@ void pvrdma_srq_recv(PVRDMADev *dev, uint32_t srq_handle) CompHandlerCtx *comp_ctx; /* Prepare CQE */ - comp_ctx = g_malloc(sizeof(CompHandlerCtx)); + comp_ctx = g_new(CompHandlerCtx, 1); comp_ctx->dev = dev; comp_ctx->cq_handle = srq->recv_cq_handle; comp_ctx->cqe.wr_id = wqe->hdr.wr_id; diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c index 72759413f3..39fc4f19d9 100644 --- a/hw/sh4/r2d.c +++ b/hw/sh4/r2d.c @@ -190,7 +190,7 @@ static qemu_irq *r2d_fpga_init(MemoryRegion *sysmem, { r2d_fpga_t *s; - s = g_malloc0(sizeof(r2d_fpga_t)); + s = g_new0(r2d_fpga_t, 1); s->irl = irl; @@ -248,7 +248,7 @@ static void r2d_init(MachineState *machine) cpu = SUPERH_CPU(cpu_create(machine->cpu_type)); env = &cpu->env; - reset_info = g_malloc0(sizeof(ResetData)); + reset_info = g_new0(ResetData, 1); reset_info->cpu = cpu; reset_info->vector = env->pc; qemu_register_reset(main_cpu_reset, reset_info); diff --git a/hw/sh4/sh7750.c b/hw/sh4/sh7750.c index 43dfb6497b..c77792d150 100644 --- a/hw/sh4/sh7750.c +++ b/hw/sh4/sh7750.c @@ -770,7 +770,7 @@ SH7750State *sh7750_init(SuperHCPU *cpu, MemoryRegion *sysmem) SysBusDevice *sb; MemoryRegion *mr, *alias; - s = g_malloc0(sizeof(SH7750State)); + s = g_new0(SH7750State, 1); s->cpu = cpu; s->periph_freq = 60000000; /* 60MHz */ memory_region_init_io(&s->iomem, NULL, &sh7750_mem_ops, s, diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index 7b4dec1721..a9f2496827 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -241,7 +241,7 @@ static void leon3_generic_hw_init(MachineState *machine) cpu_sparc_set_id(env, 0); /* Reset data */ - reset_info = g_malloc0(sizeof(ResetData)); + reset_info = g_new0(ResetData, 1); reset_info->cpu = cpu; reset_info->sp = LEON3_RAM_OFFSET + ram_size; qemu_register_reset(main_cpu_reset, reset_info); diff --git a/hw/sparc64/sparc64.c b/hw/sparc64/sparc64.c index 8654e955eb..72f0849f50 100644 --- a/hw/sparc64/sparc64.c +++ b/hw/sparc64/sparc64.c @@ -81,7 +81,7 @@ static CPUTimer *cpu_timer_create(const char *name, SPARCCPU *cpu, QEMUBHFunc *cb, uint32_t frequency, uint64_t disabled_mask, uint64_t npt_mask) { - CPUTimer *timer = g_malloc0(sizeof(CPUTimer)); + CPUTimer *timer = g_new0(CPUTimer, 1); timer->name = name; timer->frequency = frequency; @@ -288,7 +288,7 @@ SPARCCPU *sparc64_cpu_devinit(const char *cpu_type, uint64_t prom_addr) hstick_frequency, TICK_INT_DIS, TICK_NPT_MASK); - reset_info = g_malloc0(sizeof(ResetData)); + reset_info = g_new0(ResetData, 1); reset_info->cpu = cpu; reset_info->prom_addr = prom_addr; qemu_register_reset(main_cpu_reset, reset_info); diff --git a/hw/timer/arm_timer.c b/hw/timer/arm_timer.c index 15caff0e41..84cf2726bb 100644 --- a/hw/timer/arm_timer.c +++ b/hw/timer/arm_timer.c @@ -176,7 +176,7 @@ static arm_timer_state *arm_timer_init(uint32_t freq) { arm_timer_state *s; - s = (arm_timer_state *)g_malloc0(sizeof(arm_timer_state)); + s = g_new0(arm_timer_state, 1); s->freq = freq; s->control = TIMER_CTRL_IE; diff --git a/hw/timer/slavio_timer.c b/hw/timer/slavio_timer.c index 03e33fc592..90fdce4c44 100644 --- a/hw/timer/slavio_timer.c +++ b/hw/timer/slavio_timer.c @@ -400,7 +400,7 @@ static void slavio_timer_init(Object *obj) uint64_t size; char timer_name[20]; - tc = g_malloc0(sizeof(TimerContext)); + tc = g_new0(TimerContext, 1); tc->s = s; tc->timer_index = i; diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c index d07a4e99b1..67a183f17b 100644 --- a/hw/vfio/pci.c +++ b/hw/vfio/pci.c @@ -1532,8 +1532,8 @@ static int vfio_msix_setup(VFIOPCIDevice *vdev, int pos, Error **errp) int ret; Error *err = NULL; - vdev->msix->pending = g_malloc0(BITS_TO_LONGS(vdev->msix->entries) * - sizeof(unsigned long)); + vdev->msix->pending = g_new0(unsigned long, + BITS_TO_LONGS(vdev->msix->entries)); ret = msix_init(&vdev->pdev, vdev->msix->entries, vdev->bars[vdev->msix->table_bar].mr, vdev->msix->table_bar, vdev->msix->table_offset, diff --git a/hw/vfio/platform.c b/hw/vfio/platform.c index f8f08a0f36..5af73f9287 100644 --- a/hw/vfio/platform.c +++ b/hw/vfio/platform.c @@ -71,7 +71,7 @@ static VFIOINTp *vfio_init_intp(VFIODevice *vbasedev, sysbus_init_irq(sbdev, &intp->qemuirq); /* Get an eventfd for trigger */ - intp->interrupt = g_malloc0(sizeof(EventNotifier)); + intp->interrupt = g_new0(EventNotifier, 1); ret = event_notifier_init(intp->interrupt, 0); if (ret) { g_free(intp->interrupt); @@ -82,7 +82,7 @@ static VFIOINTp *vfio_init_intp(VFIODevice *vbasedev, } if (vfio_irq_is_automasked(intp)) { /* Get an eventfd for resample/unmask */ - intp->unmask = g_malloc0(sizeof(EventNotifier)); + intp->unmask = g_new0(EventNotifier, 1); ret = event_notifier_init(intp->unmask, 0); if (ret) { g_free(intp->interrupt); diff --git a/hw/virtio/virtio-balloon.c b/hw/virtio/virtio-balloon.c index e6c1b0aa46..163d244eb4 100644 --- a/hw/virtio/virtio-balloon.c +++ b/hw/virtio/virtio-balloon.c @@ -242,7 +242,7 @@ static void balloon_stats_get_all(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { Error *err = NULL; - VirtIOBalloon *s = opaque; + VirtIOBalloon *s = VIRTIO_BALLOON(obj); int i; if (!visit_start_struct(v, name, NULL, 0, &err)) { @@ -277,7 +277,7 @@ static void balloon_stats_get_poll_interval(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - VirtIOBalloon *s = opaque; + VirtIOBalloon *s = VIRTIO_BALLOON(obj); visit_type_int(v, name, &s->stats_poll_interval, errp); } @@ -285,7 +285,7 @@ static void balloon_stats_set_poll_interval(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - VirtIOBalloon *s = opaque; + VirtIOBalloon *s = VIRTIO_BALLOON(obj); int64_t value; if (!visit_type_int(v, name, &value, errp)) { @@ -1015,12 +1015,12 @@ static void virtio_balloon_instance_init(Object *obj) s->free_page_hint_notify.notify = virtio_balloon_free_page_hint_notify; object_property_add(obj, "guest-stats", "guest statistics", - balloon_stats_get_all, NULL, NULL, s); + balloon_stats_get_all, NULL, NULL, NULL); object_property_add(obj, "guest-stats-polling-interval", "int", balloon_stats_get_poll_interval, balloon_stats_set_poll_interval, - NULL, s); + NULL, NULL); } static const VMStateDescription vmstate_virtio_balloon = { diff --git a/hw/virtio/virtio-crypto.c b/hw/virtio/virtio-crypto.c index 54f9bbb789..dcd80b904d 100644 --- a/hw/virtio/virtio-crypto.c +++ b/hw/virtio/virtio-crypto.c @@ -812,7 +812,7 @@ static void virtio_crypto_device_realize(DeviceState *dev, Error **errp) virtio_init(vdev, "virtio-crypto", VIRTIO_ID_CRYPTO, vcrypto->config_size); vcrypto->curr_queues = 1; - vcrypto->vqs = g_malloc0(sizeof(VirtIOCryptoQueue) * vcrypto->max_queues); + vcrypto->vqs = g_new0(VirtIOCryptoQueue, vcrypto->max_queues); for (i = 0; i < vcrypto->max_queues; i++) { vcrypto->vqs[i].dataq = virtio_add_queue(vdev, 1024, virtio_crypto_handle_dataq_bh); diff --git a/hw/virtio/virtio-iommu.c b/hw/virtio/virtio-iommu.c index 239fe97b12..664cbd9583 100644 --- a/hw/virtio/virtio-iommu.c +++ b/hw/virtio/virtio-iommu.c @@ -316,7 +316,7 @@ static AddressSpace *virtio_iommu_find_add_as(PCIBus *bus, void *opaque, char *name = g_strdup_printf("%s-%d-%d", TYPE_VIRTIO_IOMMU_MEMORY_REGION, mr_index++, devfn); - sdev = sbus->pbdev[devfn] = g_malloc0(sizeof(IOMMUDevice)); + sdev = sbus->pbdev[devfn] = g_new0(IOMMUDevice, 1); sdev->viommu = s; sdev->bus = bus; diff --git a/hw/virtio/virtio.c b/hw/virtio/virtio.c index 9e8f51dfb0..32b1859391 100644 --- a/hw/virtio/virtio.c +++ b/hw/virtio/virtio.c @@ -2380,8 +2380,7 @@ VirtQueue *virtio_add_queue(VirtIODevice *vdev, int queue_size, vdev->vq[i].vring.num_default = queue_size; vdev->vq[i].vring.align = VIRTIO_PCI_VRING_ALIGN; vdev->vq[i].handle_output = handle_output; - vdev->vq[i].used_elems = g_malloc0(sizeof(VirtQueueElement) * - queue_size); + vdev->vq[i].used_elems = g_new0(VirtQueueElement, queue_size); return &vdev->vq[i]; } @@ -3228,7 +3227,7 @@ void virtio_init(VirtIODevice *vdev, const char *name, qatomic_set(&vdev->isr, 0); vdev->queue_sel = 0; vdev->config_vector = VIRTIO_NO_VECTOR; - vdev->vq = g_malloc0(sizeof(VirtQueue) * VIRTIO_QUEUE_MAX); + vdev->vq = g_new0(VirtQueue, VIRTIO_QUEUE_MAX); vdev->vm_running = runstate_is_running(); vdev->broken = false; for (i = 0; i < VIRTIO_QUEUE_MAX; i++) { diff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c index 17f087b395..c1e004e882 100644 --- a/hw/xtensa/xtfpga.c +++ b/hw/xtensa/xtfpga.c @@ -126,7 +126,7 @@ static const MemoryRegionOps xtfpga_fpga_ops = { static XtfpgaFpgaState *xtfpga_fpga_init(MemoryRegion *address_space, hwaddr base, uint32_t freq) { - XtfpgaFpgaState *s = g_malloc(sizeof(XtfpgaFpgaState)); + XtfpgaFpgaState *s = g_new(XtfpgaFpgaState, 1); memory_region_init_io(&s->iomem, NULL, &xtfpga_fpga_ops, s, "xtfpga.fpga", 0x10000); |