diff options
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/intc/ibex_plic.c | 36 | ||||
| -rw-r--r-- | hw/riscv/sifive_u.c | 26 | ||||
| -rw-r--r-- | hw/riscv/spike.c | 9 | ||||
| -rw-r--r-- | hw/riscv/virt.c | 4 |
4 files changed, 64 insertions, 11 deletions
diff --git a/hw/intc/ibex_plic.c b/hw/intc/ibex_plic.c index 41079518c6..f49fa67c91 100644 --- a/hw/intc/ibex_plic.c +++ b/hw/intc/ibex_plic.c @@ -43,12 +43,22 @@ static void ibex_plic_irqs_set_pending(IbexPlicState *s, int irq, bool level) { int pending_num = irq / 32; + if (s->claimed[pending_num] & 1 << (irq % 32)) { + /* + * The interrupt has been claimed, but not compelted. + * The pending bit can't be set. + */ + return; + } + s->pending[pending_num] |= level << (irq % 32); } static bool ibex_plic_irqs_pending(IbexPlicState *s, uint32_t context) { int i; + uint32_t max_irq = 0; + uint32_t max_prio = s->threshold; for (i = 0; i < s->pending_num; i++) { uint32_t irq_num = ctz64(s->pending[i]) + (i * 32); @@ -58,14 +68,17 @@ static bool ibex_plic_irqs_pending(IbexPlicState *s, uint32_t context) continue; } - if (s->priority[irq_num] > s->threshold) { - if (!s->claim) { - s->claim = irq_num; - } - return true; + if (s->priority[irq_num] > max_prio) { + max_irq = irq_num; + max_prio = s->priority[irq_num]; } } + if (max_irq) { + s->claim = max_irq; + return true; + } + return false; } @@ -120,7 +133,14 @@ static uint64_t ibex_plic_read(void *opaque, hwaddr addr, int pending_num = s->claim / 32; s->pending[pending_num] &= ~(1 << (s->claim % 32)); + /* Set the interrupt as claimed, but not compelted */ + s->claimed[pending_num] |= 1 << (s->claim % 32); + + /* Return the current claimed interrupt */ ret = s->claim; + + /* Update the interrupt status after the claim */ + ibex_plic_update(s); } return ret; @@ -140,6 +160,7 @@ static void ibex_plic_write(void *opaque, hwaddr addr, } else if (addr_between(addr, s->priority_base, s->priority_num)) { uint32_t irq = ((addr - s->priority_base) >> 2) + 1; s->priority[irq] = value & 7; + ibex_plic_update(s); } else if (addr_between(addr, s->enable_base, s->enable_num)) { uint32_t enable_reg = (addr - s->enable_base) / 4; @@ -151,6 +172,10 @@ static void ibex_plic_write(void *opaque, hwaddr addr, /* Interrupt was completed */ s->claim = 0; } + if (s->claimed[value / 32] & 1 << (value % 32)) { + /* This value was already claimed, clear it. */ + s->claimed[value / 32] &= ~(1 << (value % 32)); + } } ibex_plic_update(s); @@ -211,6 +236,7 @@ static void ibex_plic_realize(DeviceState *dev, Error **errp) int i; s->pending = g_new0(uint32_t, s->pending_num); + s->claimed = g_new0(uint32_t, s->pending_num); s->source = g_new0(uint32_t, s->source_num); s->priority = g_new0(uint32_t, s->priority_num); s->enable = g_new0(uint32_t, s->enable_num); diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index e5682c38a9..18301e6fa5 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -60,9 +60,9 @@ #include <libfdt.h> #if defined(TARGET_RISCV32) -# define BIOS_FILENAME "opensbi-riscv32-sifive_u-fw_jump.bin" +# define BIOS_FILENAME "opensbi-riscv32-generic-fw_dynamic.bin" #else -# define BIOS_FILENAME "opensbi-riscv64-sifive_u-fw_jump.bin" +# define BIOS_FILENAME "opensbi-riscv64-generic-fw_dynamic.bin" #endif static const struct MemmapEntry { @@ -72,6 +72,7 @@ static const struct MemmapEntry { [SIFIVE_U_DEBUG] = { 0x0, 0x100 }, [SIFIVE_U_MROM] = { 0x1000, 0xf000 }, [SIFIVE_U_CLINT] = { 0x2000000, 0x10000 }, + [SIFIVE_U_L2CC] = { 0x2010000, 0x1000 }, [SIFIVE_U_L2LIM] = { 0x8000000, 0x2000000 }, [SIFIVE_U_PLIC] = { 0xc000000, 0x4000000 }, [SIFIVE_U_PRCI] = { 0x10000000, 0x1000 }, @@ -302,6 +303,24 @@ static void create_fdt(SiFiveUState *s, const struct MemmapEntry *memmap, qemu_fdt_setprop_string(fdt, nodename, "compatible", "gpio-restart"); g_free(nodename); + nodename = g_strdup_printf("/soc/cache-controller@%lx", + (long)memmap[SIFIVE_U_L2CC].base); + qemu_fdt_add_subnode(fdt, nodename); + qemu_fdt_setprop_cells(fdt, nodename, "reg", + 0x0, memmap[SIFIVE_U_L2CC].base, + 0x0, memmap[SIFIVE_U_L2CC].size); + qemu_fdt_setprop_cells(fdt, nodename, "interrupts", + SIFIVE_U_L2CC_IRQ0, SIFIVE_U_L2CC_IRQ1, SIFIVE_U_L2CC_IRQ2); + qemu_fdt_setprop_cell(fdt, nodename, "interrupt-parent", plic_phandle); + qemu_fdt_setprop(fdt, nodename, "cache-unified", NULL, 0); + qemu_fdt_setprop_cell(fdt, nodename, "cache-size", 2097152); + qemu_fdt_setprop_cell(fdt, nodename, "cache-sets", 1024); + qemu_fdt_setprop_cell(fdt, nodename, "cache-level", 2); + qemu_fdt_setprop_cell(fdt, nodename, "cache-block-size", 64); + qemu_fdt_setprop_string(fdt, nodename, "compatible", + "sifive,fu540-c000-ccache"); + g_free(nodename); + phy_phandle = phandle++; nodename = g_strdup_printf("/soc/ethernet@%lx", (long)memmap[SIFIVE_U_GEM].base); @@ -733,6 +752,9 @@ static void sifive_u_soc_realize(DeviceState *dev, Error **errp) create_unimplemented_device("riscv.sifive.u.dmc", memmap[SIFIVE_U_DMC].base, memmap[SIFIVE_U_DMC].size); + + create_unimplemented_device("riscv.sifive.u.l2cc", + memmap[SIFIVE_U_L2CC].base, memmap[SIFIVE_U_L2CC].size); } static Property sifive_u_soc_props[] = { diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c index 7b23a297fc..13958bdbeb 100644 --- a/hw/riscv/spike.c +++ b/hw/riscv/spike.c @@ -42,10 +42,15 @@ #include "sysemu/qtest.h" #include "sysemu/sysemu.h" +/* + * Not like other RISC-V machines that use plain binary bios images, + * keeping ELF files here was intentional because BIN files don't work + * for the Spike machine as HTIF emulation depends on ELF parsing. + */ #if defined(TARGET_RISCV32) -# define BIOS_FILENAME "opensbi-riscv32-spike-fw_jump.elf" +# define BIOS_FILENAME "opensbi-riscv32-generic-fw_dynamic.elf" #else -# define BIOS_FILENAME "opensbi-riscv64-spike-fw_jump.elf" +# define BIOS_FILENAME "opensbi-riscv64-generic-fw_dynamic.elf" #endif static const struct MemmapEntry { diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 55a907bb35..6e91cf129e 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -43,9 +43,9 @@ #include "hw/pci-host/gpex.h" #if defined(TARGET_RISCV32) -# define BIOS_FILENAME "opensbi-riscv32-virt-fw_jump.bin" +# define BIOS_FILENAME "opensbi-riscv32-generic-fw_dynamic.bin" #else -# define BIOS_FILENAME "opensbi-riscv64-virt-fw_jump.bin" +# define BIOS_FILENAME "opensbi-riscv64-generic-fw_dynamic.bin" #endif static const struct MemmapEntry { |