diff options
Diffstat (limited to 'hw')
382 files changed, 2418 insertions, 1696 deletions
diff --git a/hw/9pfs/virtio-9p.h b/hw/9pfs/virtio-9p.h index e763da2c02..ff70c5a971 100644 --- a/hw/9pfs/virtio-9p.h +++ b/hw/9pfs/virtio-9p.h @@ -4,18 +4,19 @@ #include "standard-headers/linux/virtio_9p.h" #include "hw/virtio/virtio.h" #include "9p.h" +#include "qom/object.h" -typedef struct V9fsVirtioState -{ +struct V9fsVirtioState { VirtIODevice parent_obj; VirtQueue *vq; size_t config_size; VirtQueueElement *elems[MAX_REQ]; V9fsState state; -} V9fsVirtioState; +}; +typedef struct V9fsVirtioState V9fsVirtioState; #define TYPE_VIRTIO_9P "virtio-9p-device" -#define VIRTIO_9P(obj) \ - OBJECT_CHECK(V9fsVirtioState, (obj), TYPE_VIRTIO_9P) +DECLARE_INSTANCE_CHECKER(V9fsVirtioState, VIRTIO_9P, + TYPE_VIRTIO_9P) #endif diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c index e6163bb6ce..1574f7db3e 100644 --- a/hw/acpi/piix4.c +++ b/hw/acpi/piix4.c @@ -45,6 +45,7 @@ #include "migration/vmstate.h" #include "hw/core/cpu.h" #include "trace.h" +#include "qom/object.h" #define GPE_BASE 0xafe0 #define GPE_LEN 4 @@ -54,7 +55,7 @@ struct pci_status { uint32_t down; }; -typedef struct PIIX4PMState { +struct PIIX4PMState { /*< private >*/ PCIDevice parent_obj; /*< public >*/ @@ -89,10 +90,11 @@ typedef struct PIIX4PMState { CPUHotplugState cpuhp_state; MemHotplugState acpi_memory_hotplug; -} PIIX4PMState; +}; +typedef struct PIIX4PMState PIIX4PMState; -#define PIIX4_PM(obj) \ - OBJECT_CHECK(PIIX4PMState, (obj), TYPE_PIIX4_PM) +DECLARE_INSTANCE_CHECKER(PIIX4PMState, PIIX4_PM, + TYPE_PIIX4_PM) static void piix4_acpi_system_hot_add_init(MemoryRegion *parent, PCIBus *bus, PIIX4PMState *s); diff --git a/hw/acpi/vmgenid.c b/hw/acpi/vmgenid.c index 2df7623d74..53db6af75d 100644 --- a/hw/acpi/vmgenid.c +++ b/hw/acpi/vmgenid.c @@ -198,7 +198,7 @@ static void vmgenid_realize(DeviceState *dev, Error **errp) if (!bios_linker_loader_can_write_pointer()) { error_setg(errp, "%s requires DMA write support in fw_cfg, " - "which this machine type does not provide", VMGENID_DEVICE); + "which this machine type does not provide", TYPE_VMGENID); return; } @@ -206,7 +206,7 @@ static void vmgenid_realize(DeviceState *dev, Error **errp) * device. Check if there are several. */ if (!find_vmgenid_dev()) { - error_setg(errp, "at most one %s device is permitted", VMGENID_DEVICE); + error_setg(errp, "at most one %s device is permitted", TYPE_VMGENID); return; } @@ -232,7 +232,7 @@ static void vmgenid_device_class_init(ObjectClass *klass, void *data) } static const TypeInfo vmgenid_device_info = { - .name = VMGENID_DEVICE, + .name = TYPE_VMGENID, .parent = TYPE_DEVICE, .instance_size = sizeof(VmGenIdState), .class_init = vmgenid_device_class_init, diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c index 29d44dfb06..d02b14d89f 100644 --- a/hw/alpha/typhoon.c +++ b/hw/alpha/typhoon.c @@ -15,6 +15,7 @@ #include "hw/irq.h" #include "alpha_sys.h" #include "exec/address-spaces.h" +#include "qom/object.h" #define TYPE_TYPHOON_PCI_HOST_BRIDGE "typhoon-pcihost" @@ -49,16 +50,17 @@ typedef struct TyphoonPchip { TyphoonWindow win[4]; } TyphoonPchip; -#define TYPHOON_PCI_HOST_BRIDGE(obj) \ - OBJECT_CHECK(TyphoonState, (obj), TYPE_TYPHOON_PCI_HOST_BRIDGE) +typedef struct TyphoonState TyphoonState; +DECLARE_INSTANCE_CHECKER(TyphoonState, TYPHOON_PCI_HOST_BRIDGE, + TYPE_TYPHOON_PCI_HOST_BRIDGE) -typedef struct TyphoonState { +struct TyphoonState { PCIHostState parent_obj; TyphoonCchip cchip; TyphoonPchip pchip; MemoryRegion dchip_region; -} TyphoonState; +}; /* Called when one of DRIR or DIM changes. */ static void cpu_irq_change(AlphaCPU *cpu, uint64_t req) diff --git a/hw/arm/collie.c b/hw/arm/collie.c index 4b35ef4bed..a49f4a1c7c 100644 --- a/hw/arm/collie.c +++ b/hw/arm/collie.c @@ -18,16 +18,18 @@ #include "hw/block/flash.h" #include "exec/address-spaces.h" #include "cpu.h" +#include "qom/object.h" -typedef struct { +struct CollieMachineState { MachineState parent; StrongARMState *sa1110; -} CollieMachineState; +}; +typedef struct CollieMachineState CollieMachineState; #define TYPE_COLLIE_MACHINE MACHINE_TYPE_NAME("collie") -#define COLLIE_MACHINE(obj) \ - OBJECT_CHECK(CollieMachineState, obj, TYPE_COLLIE_MACHINE) +DECLARE_INSTANCE_CHECKER(CollieMachineState, COLLIE_MACHINE, + TYPE_COLLIE_MACHINE) static struct arm_boot_info collie_binfo = { .loader_start = SA_SDCS0, diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c index c96f2ab9cf..e2ace803ef 100644 --- a/hw/arm/highbank.c +++ b/hw/arm/highbank.c @@ -36,6 +36,7 @@ #include "hw/cpu/a9mpcore.h" #include "hw/cpu/a15mpcore.h" #include "qemu/log.h" +#include "qom/object.h" #define SMP_BOOT_ADDR 0x100 #define SMP_BOOT_REG 0x40 @@ -155,17 +156,18 @@ static const MemoryRegionOps hb_mem_ops = { }; #define TYPE_HIGHBANK_REGISTERS "highbank-regs" -#define HIGHBANK_REGISTERS(obj) \ - OBJECT_CHECK(HighbankRegsState, (obj), TYPE_HIGHBANK_REGISTERS) +typedef struct HighbankRegsState HighbankRegsState; +DECLARE_INSTANCE_CHECKER(HighbankRegsState, HIGHBANK_REGISTERS, + TYPE_HIGHBANK_REGISTERS) -typedef struct { +struct HighbankRegsState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ MemoryRegion iomem; uint32_t regs[NUM_REGS]; -} HighbankRegsState; +}; static VMStateDescription vmstate_highbank_regs = { .name = "highbank-regs", diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c index fe7c2b9d4b..19989b61b9 100644 --- a/hw/arm/integratorcp.c +++ b/hw/arm/integratorcp.c @@ -26,12 +26,14 @@ #include "hw/hw.h" #include "hw/irq.h" #include "hw/sd/sd.h" +#include "qom/object.h" #define TYPE_INTEGRATOR_CM "integrator_core" -#define INTEGRATOR_CM(obj) \ - OBJECT_CHECK(IntegratorCMState, (obj), TYPE_INTEGRATOR_CM) +typedef struct IntegratorCMState IntegratorCMState; +DECLARE_INSTANCE_CHECKER(IntegratorCMState, INTEGRATOR_CM, + TYPE_INTEGRATOR_CM) -typedef struct IntegratorCMState { +struct IntegratorCMState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -51,7 +53,7 @@ typedef struct IntegratorCMState { uint32_t int_level; uint32_t irq_enabled; uint32_t fiq_enabled; -} IntegratorCMState; +}; static uint8_t integrator_spd[128] = { 128, 8, 4, 11, 9, 1, 64, 0, 2, 0xa0, 0xa0, 0, 0, 8, 0, 1, @@ -326,10 +328,11 @@ static void integratorcm_realize(DeviceState *d, Error **errp) /* Primary interrupt controller. */ #define TYPE_INTEGRATOR_PIC "integrator_pic" -#define INTEGRATOR_PIC(obj) \ - OBJECT_CHECK(icp_pic_state, (obj), TYPE_INTEGRATOR_PIC) +typedef struct icp_pic_state icp_pic_state; +DECLARE_INSTANCE_CHECKER(icp_pic_state, INTEGRATOR_PIC, + TYPE_INTEGRATOR_PIC) -typedef struct icp_pic_state { +struct icp_pic_state { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -340,7 +343,7 @@ typedef struct icp_pic_state { uint32_t fiq_enabled; qemu_irq parent_irq; qemu_irq parent_fiq; -} icp_pic_state; +}; static const VMStateDescription vmstate_icp_pic = { .name = "icp_pic", @@ -465,10 +468,11 @@ static void icp_pic_init(Object *obj) /* CP control registers. */ #define TYPE_ICP_CONTROL_REGS "icp-ctrl-regs" -#define ICP_CONTROL_REGS(obj) \ - OBJECT_CHECK(ICPCtrlRegsState, (obj), TYPE_ICP_CONTROL_REGS) +typedef struct ICPCtrlRegsState ICPCtrlRegsState; +DECLARE_INSTANCE_CHECKER(ICPCtrlRegsState, ICP_CONTROL_REGS, + TYPE_ICP_CONTROL_REGS) -typedef struct ICPCtrlRegsState { +struct ICPCtrlRegsState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -477,7 +481,7 @@ typedef struct ICPCtrlRegsState { qemu_irq mmc_irq; uint32_t intreg_state; -} ICPCtrlRegsState; +}; #define ICP_GPIO_MMC_WPROT "mmc-wprot" #define ICP_GPIO_MMC_CARDIN "mmc-cardin" diff --git a/hw/arm/microbit.c b/hw/arm/microbit.c index a91acab1cb..9a4a3d357a 100644 --- a/hw/arm/microbit.c +++ b/hw/arm/microbit.c @@ -18,18 +18,20 @@ #include "hw/arm/nrf51_soc.h" #include "hw/i2c/microbit_i2c.h" #include "hw/qdev-properties.h" +#include "qom/object.h" -typedef struct { +struct MicrobitMachineState { MachineState parent; NRF51State nrf51; MicrobitI2CState i2c; -} MicrobitMachineState; +}; +typedef struct MicrobitMachineState MicrobitMachineState; #define TYPE_MICROBIT_MACHINE MACHINE_TYPE_NAME("microbit") -#define MICROBIT_MACHINE(obj) \ - OBJECT_CHECK(MicrobitMachineState, obj, TYPE_MICROBIT_MACHINE) +DECLARE_INSTANCE_CHECKER(MicrobitMachineState, MICROBIT_MACHINE, + TYPE_MICROBIT_MACHINE) static void microbit_init(MachineState *machine) { diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c index 28d9e8bfac..dbf7d63dc8 100644 --- a/hw/arm/mps2-tz.c +++ b/hw/arm/mps2-tz.c @@ -62,6 +62,7 @@ #include "hw/net/lan9118.h" #include "net/net.h" #include "hw/core/split-irq.h" +#include "qom/object.h" #define MPS2TZ_NUMIRQ 92 @@ -70,14 +71,15 @@ typedef enum MPS2TZFPGAType { FPGA_AN521, } MPS2TZFPGAType; -typedef struct { +struct MPS2TZMachineClass { MachineClass parent; MPS2TZFPGAType fpga_type; uint32_t scc_id; const char *armsse_type; -} MPS2TZMachineClass; +}; +typedef struct MPS2TZMachineClass MPS2TZMachineClass; -typedef struct { +struct MPS2TZMachineState { MachineState parent; ARMSSE iotkit; @@ -99,18 +101,15 @@ typedef struct { qemu_or_irq uart_irq_orgate; DeviceState *lan9118; SplitIRQ cpu_irq_splitter[MPS2TZ_NUMIRQ]; -} MPS2TZMachineState; +}; +typedef struct MPS2TZMachineState MPS2TZMachineState; #define TYPE_MPS2TZ_MACHINE "mps2tz" #define TYPE_MPS2TZ_AN505_MACHINE MACHINE_TYPE_NAME("mps2-an505") #define TYPE_MPS2TZ_AN521_MACHINE MACHINE_TYPE_NAME("mps2-an521") -#define MPS2TZ_MACHINE(obj) \ - OBJECT_CHECK(MPS2TZMachineState, obj, TYPE_MPS2TZ_MACHINE) -#define MPS2TZ_MACHINE_GET_CLASS(obj) \ - OBJECT_GET_CLASS(MPS2TZMachineClass, obj, TYPE_MPS2TZ_MACHINE) -#define MPS2TZ_MACHINE_CLASS(klass) \ - OBJECT_CLASS_CHECK(MPS2TZMachineClass, klass, TYPE_MPS2TZ_MACHINE) +DECLARE_OBJ_CHECKERS(MPS2TZMachineState, MPS2TZMachineClass, + MPS2TZ_MACHINE, TYPE_MPS2TZ_MACHINE) /* Main SYSCLK frequency in Hz */ #define SYSCLK_FRQ 20000000 diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c index 9f12934ca8..4ee5c38459 100644 --- a/hw/arm/mps2.c +++ b/hw/arm/mps2.c @@ -44,19 +44,21 @@ #include "hw/net/lan9118.h" #include "net/net.h" #include "hw/watchdog/cmsdk-apb-watchdog.h" +#include "qom/object.h" typedef enum MPS2FPGAType { FPGA_AN385, FPGA_AN511, } MPS2FPGAType; -typedef struct { +struct MPS2MachineClass { MachineClass parent; MPS2FPGAType fpga_type; uint32_t scc_id; -} MPS2MachineClass; +}; +typedef struct MPS2MachineClass MPS2MachineClass; -typedef struct { +struct MPS2MachineState { MachineState parent; ARMv7MState armv7m; @@ -75,18 +77,15 @@ typedef struct { /* CMSDK APB subsystem */ CMSDKAPBDualTimer dualtimer; CMSDKAPBWatchdog watchdog; -} MPS2MachineState; +}; +typedef struct MPS2MachineState MPS2MachineState; #define TYPE_MPS2_MACHINE "mps2" #define TYPE_MPS2_AN385_MACHINE MACHINE_TYPE_NAME("mps2-an385") #define TYPE_MPS2_AN511_MACHINE MACHINE_TYPE_NAME("mps2-an511") -#define MPS2_MACHINE(obj) \ - OBJECT_CHECK(MPS2MachineState, obj, TYPE_MPS2_MACHINE) -#define MPS2_MACHINE_GET_CLASS(obj) \ - OBJECT_GET_CLASS(MPS2MachineClass, obj, TYPE_MPS2_MACHINE) -#define MPS2_MACHINE_CLASS(klass) \ - OBJECT_CLASS_CHECK(MPS2MachineClass, klass, TYPE_MPS2_MACHINE) +DECLARE_OBJ_CHECKERS(MPS2MachineState, MPS2MachineClass, + MPS2_MACHINE, TYPE_MPS2_MACHINE) /* Main SYSCLK frequency in Hz */ #define SYSCLK_FRQ 25000000 diff --git a/hw/arm/musca.c b/hw/arm/musca.c index 4bc737f93b..16015255c8 100644 --- a/hw/arm/musca.c +++ b/hw/arm/musca.c @@ -33,6 +33,7 @@ #include "hw/misc/tz-ppc.h" #include "hw/misc/unimp.h" #include "hw/rtc/pl031.h" +#include "qom/object.h" #define MUSCA_NUMIRQ_MAX 96 #define MUSCA_PPC_MAX 3 @@ -45,7 +46,7 @@ typedef enum MuscaType { MUSCA_B1, } MuscaType; -typedef struct { +struct MuscaMachineClass { MachineClass parent; MuscaType type; uint32_t init_svtor; @@ -53,9 +54,10 @@ typedef struct { int num_irqs; const MPCInfo *mpc_info; int num_mpcs; -} MuscaMachineClass; +}; +typedef struct MuscaMachineClass MuscaMachineClass; -typedef struct { +struct MuscaMachineState { MachineState parent; ARMSSE sse; @@ -81,18 +83,15 @@ typedef struct { UnimplementedDeviceState sdio; UnimplementedDeviceState gpio; UnimplementedDeviceState cryptoisland; -} MuscaMachineState; +}; +typedef struct MuscaMachineState MuscaMachineState; #define TYPE_MUSCA_MACHINE "musca" #define TYPE_MUSCA_A_MACHINE MACHINE_TYPE_NAME("musca-a") #define TYPE_MUSCA_B1_MACHINE MACHINE_TYPE_NAME("musca-b1") -#define MUSCA_MACHINE(obj) \ - OBJECT_CHECK(MuscaMachineState, obj, TYPE_MUSCA_MACHINE) -#define MUSCA_MACHINE_GET_CLASS(obj) \ - OBJECT_GET_CLASS(MuscaMachineClass, obj, TYPE_MUSCA_MACHINE) -#define MUSCA_MACHINE_CLASS(klass) \ - OBJECT_CLASS_CHECK(MuscaMachineClass, klass, TYPE_MUSCA_MACHINE) +DECLARE_OBJ_CHECKERS(MuscaMachineState, MuscaMachineClass, + MUSCA_MACHINE, TYPE_MUSCA_MACHINE) /* * Main SYSCLK frequency in Hz diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c index f2f4fc0264..2117a04171 100644 --- a/hw/arm/musicpal.c +++ b/hw/arm/musicpal.c @@ -34,6 +34,7 @@ #include "exec/address-spaces.h" #include "ui/pixel_ops.h" #include "qemu/cutils.h" +#include "qom/object.h" #define MP_MISC_BASE 0x80002000 #define MP_MISC_SIZE 0x00001000 @@ -154,10 +155,11 @@ typedef struct mv88w8618_rx_desc { } mv88w8618_rx_desc; #define TYPE_MV88W8618_ETH "mv88w8618_eth" -#define MV88W8618_ETH(obj) \ - OBJECT_CHECK(mv88w8618_eth_state, (obj), TYPE_MV88W8618_ETH) +typedef struct mv88w8618_eth_state mv88w8618_eth_state; +DECLARE_INSTANCE_CHECKER(mv88w8618_eth_state, MV88W8618_ETH, + TYPE_MV88W8618_ETH) -typedef struct mv88w8618_eth_state { +struct mv88w8618_eth_state { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -177,7 +179,7 @@ typedef struct mv88w8618_eth_state { uint32_t cur_rx[4]; NICState *nic; NICConf conf; -} mv88w8618_eth_state; +}; static void eth_rx_desc_put(AddressSpace *dma_as, uint32_t addr, mv88w8618_rx_desc *desc) @@ -483,10 +485,11 @@ static const TypeInfo mv88w8618_eth_info = { #define MP_LCD_TEXTCOLOR 0xe0e0ff /* RRGGBB */ #define TYPE_MUSICPAL_LCD "musicpal_lcd" -#define MUSICPAL_LCD(obj) \ - OBJECT_CHECK(musicpal_lcd_state, (obj), TYPE_MUSICPAL_LCD) +typedef struct musicpal_lcd_state musicpal_lcd_state; +DECLARE_INSTANCE_CHECKER(musicpal_lcd_state, MUSICPAL_LCD, + TYPE_MUSICPAL_LCD) -typedef struct musicpal_lcd_state { +struct musicpal_lcd_state { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -499,7 +502,7 @@ typedef struct musicpal_lcd_state { uint32_t page_off; QemuConsole *con; uint8_t video_ram[128*64/8]; -} musicpal_lcd_state; +}; static uint8_t scale_lcd_color(musicpal_lcd_state *s, uint8_t col) { @@ -700,10 +703,11 @@ static const TypeInfo musicpal_lcd_info = { #define MP_PIC_ENABLE_CLR 0x0C #define TYPE_MV88W8618_PIC "mv88w8618_pic" -#define MV88W8618_PIC(obj) \ - OBJECT_CHECK(mv88w8618_pic_state, (obj), TYPE_MV88W8618_PIC) +typedef struct mv88w8618_pic_state mv88w8618_pic_state; +DECLARE_INSTANCE_CHECKER(mv88w8618_pic_state, MV88W8618_PIC, + TYPE_MV88W8618_PIC) -typedef struct mv88w8618_pic_state { +struct mv88w8618_pic_state { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -712,7 +716,7 @@ typedef struct mv88w8618_pic_state { uint32_t level; uint32_t enabled; qemu_irq parent_irq; -} mv88w8618_pic_state; +}; static void mv88w8618_pic_update(mv88w8618_pic_state *s) { @@ -837,17 +841,18 @@ typedef struct mv88w8618_timer_state { } mv88w8618_timer_state; #define TYPE_MV88W8618_PIT "mv88w8618_pit" -#define MV88W8618_PIT(obj) \ - OBJECT_CHECK(mv88w8618_pit_state, (obj), TYPE_MV88W8618_PIT) +typedef struct mv88w8618_pit_state mv88w8618_pit_state; +DECLARE_INSTANCE_CHECKER(mv88w8618_pit_state, MV88W8618_PIT, + TYPE_MV88W8618_PIT) -typedef struct mv88w8618_pit_state { +struct mv88w8618_pit_state { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ MemoryRegion iomem; mv88w8618_timer_state timer[4]; -} mv88w8618_pit_state; +}; static void mv88w8618_timer_tick(void *opaque) { @@ -1004,17 +1009,18 @@ static const TypeInfo mv88w8618_pit_info = { #define MP_FLASHCFG_CFGR0 0x04 #define TYPE_MV88W8618_FLASHCFG "mv88w8618_flashcfg" -#define MV88W8618_FLASHCFG(obj) \ - OBJECT_CHECK(mv88w8618_flashcfg_state, (obj), TYPE_MV88W8618_FLASHCFG) +typedef struct mv88w8618_flashcfg_state mv88w8618_flashcfg_state; +DECLARE_INSTANCE_CHECKER(mv88w8618_flashcfg_state, MV88W8618_FLASHCFG, + TYPE_MV88W8618_FLASHCFG) -typedef struct mv88w8618_flashcfg_state { +struct mv88w8618_flashcfg_state { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ MemoryRegion iomem; uint32_t cfgr0; -} mv88w8618_flashcfg_state; +}; static uint64_t mv88w8618_flashcfg_read(void *opaque, hwaddr offset, @@ -1090,14 +1096,15 @@ static const TypeInfo mv88w8618_flashcfg_info = { #define MP_BOARD_REVISION 0x31 -typedef struct { +struct MusicPalMiscState { SysBusDevice parent_obj; MemoryRegion iomem; -} MusicPalMiscState; +}; +typedef struct MusicPalMiscState MusicPalMiscState; #define TYPE_MUSICPAL_MISC "musicpal-misc" -#define MUSICPAL_MISC(obj) \ - OBJECT_CHECK(MusicPalMiscState, (obj), TYPE_MUSICPAL_MISC) +DECLARE_INSTANCE_CHECKER(MusicPalMiscState, MUSICPAL_MISC, + TYPE_MUSICPAL_MISC) static uint64_t musicpal_misc_read(void *opaque, hwaddr offset, unsigned size) @@ -1202,10 +1209,11 @@ static void mv88w8618_wlan_realize(DeviceState *dev, Error **errp) #define MP_OE_LCD_BRIGHTNESS 0x0007 #define TYPE_MUSICPAL_GPIO "musicpal_gpio" -#define MUSICPAL_GPIO(obj) \ - OBJECT_CHECK(musicpal_gpio_state, (obj), TYPE_MUSICPAL_GPIO) +typedef struct musicpal_gpio_state musicpal_gpio_state; +DECLARE_INSTANCE_CHECKER(musicpal_gpio_state, MUSICPAL_GPIO, + TYPE_MUSICPAL_GPIO) -typedef struct musicpal_gpio_state { +struct musicpal_gpio_state { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -1219,7 +1227,7 @@ typedef struct musicpal_gpio_state { uint32_t isr; qemu_irq irq; qemu_irq out[5]; /* 3 brightness out + 2 lcd (data and clock ) */ -} musicpal_gpio_state; +}; static void musicpal_gpio_brightness_update(musicpal_gpio_state *s) { int i; @@ -1452,10 +1460,11 @@ static const TypeInfo musicpal_gpio_info = { #define MP_KEY_BTN_NAVIGATION (1 << 7) #define TYPE_MUSICPAL_KEY "musicpal_key" -#define MUSICPAL_KEY(obj) \ - OBJECT_CHECK(musicpal_key_state, (obj), TYPE_MUSICPAL_KEY) +typedef struct musicpal_key_state musicpal_key_state; +DECLARE_INSTANCE_CHECKER(musicpal_key_state, MUSICPAL_KEY, + TYPE_MUSICPAL_KEY) -typedef struct musicpal_key_state { +struct musicpal_key_state { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -1464,7 +1473,7 @@ typedef struct musicpal_key_state { uint32_t kbd_extended; uint32_t pressed_keys; qemu_irq out[8]; -} musicpal_key_state; +}; static void musicpal_key_event(void *opaque, int keycode) { diff --git a/hw/arm/palm.c b/hw/arm/palm.c index e7bc9ea4c6..abc6495489 100644 --- a/hw/arm/palm.c +++ b/hw/arm/palm.c @@ -32,6 +32,7 @@ #include "exec/address-spaces.h" #include "cpu.h" #include "qemu/cutils.h" +#include "qom/object.h" static uint64_t static_read(void *opaque, hwaddr offset, unsigned size) { @@ -132,12 +133,13 @@ static void palmte_button_event(void *opaque, int keycode) */ #define TYPE_PALM_MISC_GPIO "palm-misc-gpio" -#define PALM_MISC_GPIO(obj) \ - OBJECT_CHECK(PalmMiscGPIOState, (obj), TYPE_PALM_MISC_GPIO) +typedef struct PalmMiscGPIOState PalmMiscGPIOState; +DECLARE_INSTANCE_CHECKER(PalmMiscGPIOState, PALM_MISC_GPIO, + TYPE_PALM_MISC_GPIO) -typedef struct PalmMiscGPIOState { +struct PalmMiscGPIOState { SysBusDevice parent_obj; -} PalmMiscGPIOState; +}; static void palmte_onoff_gpios(void *opaque, int line, int level) { diff --git a/hw/arm/pxa2xx.c b/hw/arm/pxa2xx.c index c1f45b2adf..33074dbf82 100644 --- a/hw/arm/pxa2xx.c +++ b/hw/arm/pxa2xx.c @@ -28,6 +28,7 @@ #include "sysemu/qtest.h" #include "qemu/cutils.h" #include "qemu/log.h" +#include "qom/object.h" static struct { hwaddr io_base; @@ -469,11 +470,12 @@ static const VMStateDescription vmstate_pxa2xx_mm = { }; #define TYPE_PXA2XX_SSP "pxa2xx-ssp" -#define PXA2XX_SSP(obj) \ - OBJECT_CHECK(PXA2xxSSPState, (obj), TYPE_PXA2XX_SSP) +typedef struct PXA2xxSSPState PXA2xxSSPState; +DECLARE_INSTANCE_CHECKER(PXA2xxSSPState, PXA2XX_SSP, + TYPE_PXA2XX_SSP) /* Synchronous Serial Ports */ -typedef struct { +struct PXA2xxSSPState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -495,7 +497,7 @@ typedef struct { uint32_t rx_fifo[16]; uint32_t rx_level; uint32_t rx_start; -} PXA2xxSSPState; +}; static bool pxa2xx_ssp_vmstate_validate(void *opaque, int version_id) { @@ -809,10 +811,11 @@ static void pxa2xx_ssp_init(Object *obj) #define PIAR 0x38 /* RTC Periodic Interrupt Alarm register */ #define TYPE_PXA2XX_RTC "pxa2xx_rtc" -#define PXA2XX_RTC(obj) \ - OBJECT_CHECK(PXA2xxRTCState, (obj), TYPE_PXA2XX_RTC) +typedef struct PXA2xxRTCState PXA2xxRTCState; +DECLARE_INSTANCE_CHECKER(PXA2xxRTCState, PXA2XX_RTC, + TYPE_PXA2XX_RTC) -typedef struct { +struct PXA2xxRTCState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -843,7 +846,7 @@ typedef struct { QEMUTimer *rtc_swal2; QEMUTimer *rtc_pi; qemu_irq rtc_irq; -} PXA2xxRTCState; +}; static inline void pxa2xx_rtc_int_update(PXA2xxRTCState *s) { @@ -1242,14 +1245,15 @@ static const TypeInfo pxa2xx_rtc_sysbus_info = { /* I2C Interface */ #define TYPE_PXA2XX_I2C_SLAVE "pxa2xx-i2c-slave" -#define PXA2XX_I2C_SLAVE(obj) \ - OBJECT_CHECK(PXA2xxI2CSlaveState, (obj), TYPE_PXA2XX_I2C_SLAVE) +typedef struct PXA2xxI2CSlaveState PXA2xxI2CSlaveState; +DECLARE_INSTANCE_CHECKER(PXA2xxI2CSlaveState, PXA2XX_I2C_SLAVE, + TYPE_PXA2XX_I2C_SLAVE) -typedef struct PXA2xxI2CSlaveState { +struct PXA2xxI2CSlaveState { I2CSlave parent_obj; PXA2xxI2CState *host; -} PXA2xxI2CSlaveState; +}; struct PXA2xxI2CState { /*< private >*/ diff --git a/hw/arm/pxa2xx_gpio.c b/hw/arm/pxa2xx_gpio.c index d6d0d0b08e..16bbe4fb70 100644 --- a/hw/arm/pxa2xx_gpio.c +++ b/hw/arm/pxa2xx_gpio.c @@ -17,14 +17,15 @@ #include "qapi/error.h" #include "qemu/log.h" #include "qemu/module.h" +#include "qom/object.h" #define PXA2XX_GPIO_BANKS 4 #define TYPE_PXA2XX_GPIO "pxa2xx-gpio" -#define PXA2XX_GPIO(obj) \ - OBJECT_CHECK(PXA2xxGPIOInfo, (obj), TYPE_PXA2XX_GPIO) - typedef struct PXA2xxGPIOInfo PXA2xxGPIOInfo; +DECLARE_INSTANCE_CHECKER(PXA2xxGPIOInfo, PXA2XX_GPIO, + TYPE_PXA2XX_GPIO) + struct PXA2xxGPIOInfo { /*< private >*/ SysBusDevice parent_obj; diff --git a/hw/arm/pxa2xx_pic.c b/hw/arm/pxa2xx_pic.c index ceee6aa48d..cb52a9dff3 100644 --- a/hw/arm/pxa2xx_pic.c +++ b/hw/arm/pxa2xx_pic.c @@ -16,6 +16,7 @@ #include "hw/arm/pxa.h" #include "hw/sysbus.h" #include "migration/vmstate.h" +#include "qom/object.h" #define ICIP 0x00 /* Interrupt Controller IRQ Pending register */ #define ICMR 0x04 /* Interrupt Controller Mask register */ @@ -37,10 +38,11 @@ #define PXA2XX_PIC_SRCS 40 #define TYPE_PXA2XX_PIC "pxa2xx_pic" -#define PXA2XX_PIC(obj) \ - OBJECT_CHECK(PXA2xxPICState, (obj), TYPE_PXA2XX_PIC) +typedef struct PXA2xxPICState PXA2xxPICState; +DECLARE_INSTANCE_CHECKER(PXA2xxPICState, PXA2XX_PIC, + TYPE_PXA2XX_PIC) -typedef struct { +struct PXA2xxPICState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -52,7 +54,7 @@ typedef struct { uint32_t is_fiq[2]; uint32_t int_idle; uint32_t priority[PXA2XX_PIC_SRCS]; -} PXA2xxPICState; +}; static void pxa2xx_pic_update(void *opaque) { diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c index b2d6c9688f..d2f674587d 100644 --- a/hw/arm/raspi.c +++ b/hw/arm/raspi.c @@ -24,6 +24,7 @@ #include "hw/loader.h" #include "hw/arm/boot.h" #include "sysemu/sysemu.h" +#include "qom/object.h" #define SMPBOOT_ADDR 0x300 /* this should leave enough space for ATAGS */ #define MVBAR_ADDR 0x400 /* secure vectors */ @@ -35,28 +36,26 @@ /* Registered machine type (matches RPi Foundation bootloader and U-Boot) */ #define MACH_TYPE_BCM2708 3138 -typedef struct RaspiMachineState { +struct RaspiMachineState { /*< private >*/ MachineState parent_obj; /*< public >*/ BCM283XState soc; -} RaspiMachineState; +}; +typedef struct RaspiMachineState RaspiMachineState; -typedef struct RaspiMachineClass { +struct RaspiMachineClass { /*< private >*/ MachineClass parent_obj; /*< public >*/ uint32_t board_rev; -} RaspiMachineClass; +}; +typedef struct RaspiMachineClass RaspiMachineClass; #define TYPE_RASPI_MACHINE MACHINE_TYPE_NAME("raspi-common") -#define RASPI_MACHINE(obj) \ - OBJECT_CHECK(RaspiMachineState, (obj), TYPE_RASPI_MACHINE) +DECLARE_OBJ_CHECKERS(RaspiMachineState, RaspiMachineClass, + RASPI_MACHINE, TYPE_RASPI_MACHINE) -#define RASPI_MACHINE_CLASS(klass) \ - OBJECT_CLASS_CHECK(RaspiMachineClass, (klass), TYPE_RASPI_MACHINE) -#define RASPI_MACHINE_GET_CLASS(obj) \ - OBJECT_GET_CLASS(RaspiMachineClass, (obj), TYPE_RASPI_MACHINE) /* * Board revision codes: diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c index 47b5286d46..ac68b4640d 100644 --- a/hw/arm/sbsa-ref.c +++ b/hw/arm/sbsa-ref.c @@ -41,6 +41,7 @@ #include "hw/usb.h" #include "hw/char/pl011.h" #include "net/net.h" +#include "qom/object.h" #define RAMLIMIT_GB 8192 #define RAMLIMIT_BYTES (RAMLIMIT_GB * GiB) @@ -84,7 +85,7 @@ typedef struct MemMapEntry { hwaddr size; } MemMapEntry; -typedef struct { +struct SBSAMachineState { MachineState parent; struct arm_boot_info bootinfo; int smp_cpus; @@ -93,11 +94,12 @@ typedef struct { int psci_conduit; DeviceState *gic; PFlashCFI01 *flash[2]; -} SBSAMachineState; +}; +typedef struct SBSAMachineState SBSAMachineState; #define TYPE_SBSA_MACHINE MACHINE_TYPE_NAME("sbsa-ref") -#define SBSA_MACHINE(obj) \ - OBJECT_CHECK(SBSAMachineState, (obj), TYPE_SBSA_MACHINE) +DECLARE_INSTANCE_CHECKER(SBSAMachineState, SBSA_MACHINE, + TYPE_SBSA_MACHINE) static const MemMapEntry sbsa_ref_memmap[] = { /* 512M boot ROM */ diff --git a/hw/arm/spitz.c b/hw/arm/spitz.c index 7ac8254aa6..a7ad667f06 100644 --- a/hw/arm/spitz.c +++ b/hw/arm/spitz.c @@ -34,16 +34,18 @@ #include "migration/vmstate.h" #include "exec/address-spaces.h" #include "cpu.h" +#include "qom/object.h" enum spitz_model_e { spitz, akita, borzoi, terrier }; -typedef struct { +struct SpitzMachineClass { MachineClass parent; enum spitz_model_e model; int arm_id; -} SpitzMachineClass; +}; +typedef struct SpitzMachineClass SpitzMachineClass; -typedef struct { +struct SpitzMachineState { MachineState parent; PXA2xxState *mpu; DeviceState *mux; @@ -53,15 +55,12 @@ typedef struct { DeviceState *scp0; DeviceState *scp1; DeviceState *misc_gpio; -} SpitzMachineState; +}; +typedef struct SpitzMachineState SpitzMachineState; #define TYPE_SPITZ_MACHINE "spitz-common" -#define SPITZ_MACHINE(obj) \ - OBJECT_CHECK(SpitzMachineState, obj, TYPE_SPITZ_MACHINE) -#define SPITZ_MACHINE_GET_CLASS(obj) \ - OBJECT_GET_CLASS(SpitzMachineClass, obj, TYPE_SPITZ_MACHINE) -#define SPITZ_MACHINE_CLASS(klass) \ - OBJECT_CLASS_CHECK(SpitzMachineClass, klass, TYPE_SPITZ_MACHINE) +DECLARE_OBJ_CHECKERS(SpitzMachineState, SpitzMachineClass, + SPITZ_MACHINE, TYPE_SPITZ_MACHINE) #define zaurus_printf(format, ...) \ fprintf(stderr, "%s: " format, __func__, ##__VA_ARGS__) @@ -85,9 +84,11 @@ typedef struct { #define FLASHCTL_NCE (FLASHCTL_CE0 | FLASHCTL_CE1) #define TYPE_SL_NAND "sl-nand" -#define SL_NAND(obj) OBJECT_CHECK(SLNANDState, (obj), TYPE_SL_NAND) +typedef struct SLNANDState SLNANDState; +DECLARE_INSTANCE_CHECKER(SLNANDState, SL_NAND, + TYPE_SL_NAND) -typedef struct { +struct SLNANDState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -96,7 +97,7 @@ typedef struct { uint8_t manf_id; uint8_t chip_id; ECCState ecc; -} SLNANDState; +}; static uint64_t sl_read(void *opaque, hwaddr addr, unsigned size) { @@ -261,10 +262,11 @@ static const int spitz_gpiomap[5] = { }; #define TYPE_SPITZ_KEYBOARD "spitz-keyboard" -#define SPITZ_KEYBOARD(obj) \ - OBJECT_CHECK(SpitzKeyboardState, (obj), TYPE_SPITZ_KEYBOARD) +typedef struct SpitzKeyboardState SpitzKeyboardState; +DECLARE_INSTANCE_CHECKER(SpitzKeyboardState, SPITZ_KEYBOARD, + TYPE_SPITZ_KEYBOARD) -typedef struct { +struct SpitzKeyboardState { SysBusDevice parent_obj; qemu_irq sense[SPITZ_KEY_SENSE_NUM]; @@ -280,7 +282,7 @@ typedef struct { uint8_t fifo[16]; int fifopos, fifolen; QEMUTimer *kbdtimer; -} SpitzKeyboardState; +}; static void spitz_keyboard_sense_update(SpitzKeyboardState *s) { @@ -580,13 +582,15 @@ static void spitz_keyboard_realize(DeviceState *dev, Error **errp) #define LCDTG_POLCTRL 0x07 #define TYPE_SPITZ_LCDTG "spitz-lcdtg" -#define SPITZ_LCDTG(obj) OBJECT_CHECK(SpitzLCDTG, (obj), TYPE_SPITZ_LCDTG) +typedef struct SpitzLCDTG SpitzLCDTG; +DECLARE_INSTANCE_CHECKER(SpitzLCDTG, SPITZ_LCDTG, + TYPE_SPITZ_LCDTG) -typedef struct { +struct SpitzLCDTG { SSISlave ssidev; uint32_t bl_intensity; uint32_t bl_power; -} SpitzLCDTG; +}; static void spitz_bl_update(SpitzLCDTG *s) { @@ -668,14 +672,16 @@ static void spitz_lcdtg_realize(SSISlave *ssi, Error **errp) #define SPITZ_GPIO_TP_INT 11 #define TYPE_CORGI_SSP "corgi-ssp" -#define CORGI_SSP(obj) OBJECT_CHECK(CorgiSSPState, (obj), TYPE_CORGI_SSP) +typedef struct CorgiSSPState CorgiSSPState; +DECLARE_INSTANCE_CHECKER(CorgiSSPState, CORGI_SSP, + TYPE_CORGI_SSP) /* "Demux" the signal based on current chipselect */ -typedef struct { +struct CorgiSSPState { SSISlave ssidev; SSIBus *bus[3]; uint32_t enable[3]; -} CorgiSSPState; +}; static uint32_t corgi_ssp_transfer(SSISlave *dev, uint32_t value) { @@ -819,14 +825,15 @@ static void spitz_akita_i2c_setup(PXA2xxState *cpu) * + named GPIO output "adc-temp": the ADC value, to be wired up to the max111x */ #define TYPE_SPITZ_MISC_GPIO "spitz-misc-gpio" -#define SPITZ_MISC_GPIO(obj) \ - OBJECT_CHECK(SpitzMiscGPIOState, (obj), TYPE_SPITZ_MISC_GPIO) +typedef struct SpitzMiscGPIOState SpitzMiscGPIOState; +DECLARE_INSTANCE_CHECKER(SpitzMiscGPIOState, SPITZ_MISC_GPIO, + TYPE_SPITZ_MISC_GPIO) -typedef struct SpitzMiscGPIOState { +struct SpitzMiscGPIOState { SysBusDevice parent_obj; qemu_irq adc_value; -} SpitzMiscGPIOState; +}; static void spitz_misc_charging(void *opaque, int n, int level) { diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c index 5f9d080180..d6fc4a4681 100644 --- a/hw/arm/stellaris.c +++ b/hw/arm/stellaris.c @@ -27,6 +27,7 @@ #include "migration/vmstate.h" #include "hw/misc/unimp.h" #include "cpu.h" +#include "qom/object.h" #define GPIO_A 0 #define GPIO_B 1 @@ -57,10 +58,11 @@ typedef const struct { /* General purpose timer module. */ #define TYPE_STELLARIS_GPTM "stellaris-gptm" -#define STELLARIS_GPTM(obj) \ - OBJECT_CHECK(gptm_state, (obj), TYPE_STELLARIS_GPTM) +typedef struct gptm_state gptm_state; +DECLARE_INSTANCE_CHECKER(gptm_state, STELLARIS_GPTM, + TYPE_STELLARIS_GPTM) -typedef struct gptm_state { +struct gptm_state { SysBusDevice parent_obj; MemoryRegion iomem; @@ -80,7 +82,7 @@ typedef struct gptm_state { /* The timers have an alternate output used to trigger the ADC. */ qemu_irq trigger; qemu_irq irq; -} gptm_state; +}; static void gptm_update_irq(gptm_state *s) { @@ -719,10 +721,11 @@ static int stellaris_sys_init(uint32_t base, qemu_irq irq, /* I2C controller. */ #define TYPE_STELLARIS_I2C "stellaris-i2c" -#define STELLARIS_I2C(obj) \ - OBJECT_CHECK(stellaris_i2c_state, (obj), TYPE_STELLARIS_I2C) +typedef struct stellaris_i2c_state stellaris_i2c_state; +DECLARE_INSTANCE_CHECKER(stellaris_i2c_state, STELLARIS_I2C, + TYPE_STELLARIS_I2C) -typedef struct { +struct stellaris_i2c_state { SysBusDevice parent_obj; I2CBus *bus; @@ -735,7 +738,7 @@ typedef struct { uint32_t mimr; uint32_t mris; uint32_t mcr; -} stellaris_i2c_state; +}; #define STELLARIS_I2C_MCS_BUSY 0x01 #define STELLARIS_I2C_MCS_ERROR 0x02 @@ -932,10 +935,11 @@ static void stellaris_i2c_init(Object *obj) #define STELLARIS_ADC_FIFO_FULL 0x1000 #define TYPE_STELLARIS_ADC "stellaris-adc" -#define STELLARIS_ADC(obj) \ - OBJECT_CHECK(stellaris_adc_state, (obj), TYPE_STELLARIS_ADC) +typedef struct StellarisADCState stellaris_adc_state; +DECLARE_INSTANCE_CHECKER(stellaris_adc_state, STELLARIS_ADC, + TYPE_STELLARIS_ADC) -typedef struct StellarisADCState { +struct StellarisADCState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -955,7 +959,7 @@ typedef struct StellarisADCState { uint32_t ssctl[4]; uint32_t noise; qemu_irq irq[4]; -} stellaris_adc_state; +}; static uint32_t stellaris_adc_fifo_read(stellaris_adc_state *s, int n) { diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c index 2639b9ae55..0fe829b868 100644 --- a/hw/arm/strongarm.c +++ b/hw/arm/strongarm.c @@ -45,6 +45,7 @@ #include "qapi/error.h" #include "qemu/cutils.h" #include "qemu/log.h" +#include "qom/object.h" //#define DEBUG @@ -84,10 +85,11 @@ static struct { /* Interrupt Controller */ #define TYPE_STRONGARM_PIC "strongarm_pic" -#define STRONGARM_PIC(obj) \ - OBJECT_CHECK(StrongARMPICState, (obj), TYPE_STRONGARM_PIC) +typedef struct StrongARMPICState StrongARMPICState; +DECLARE_INSTANCE_CHECKER(StrongARMPICState, STRONGARM_PIC, + TYPE_STRONGARM_PIC) -typedef struct StrongARMPICState { +struct StrongARMPICState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -98,7 +100,7 @@ typedef struct StrongARMPICState { uint32_t enabled; uint32_t is_fiq; uint32_t int_idle; -} StrongARMPICState; +}; #define ICIP 0x00 #define ICMR 0x04 @@ -252,10 +254,11 @@ static const TypeInfo strongarm_pic_info = { * f = 32 768 / (RTTR_trim + 1) */ #define TYPE_STRONGARM_RTC "strongarm-rtc" -#define STRONGARM_RTC(obj) \ - OBJECT_CHECK(StrongARMRTCState, (obj), TYPE_STRONGARM_RTC) +typedef struct StrongARMRTCState StrongARMRTCState; +DECLARE_INSTANCE_CHECKER(StrongARMRTCState, STRONGARM_RTC, + TYPE_STRONGARM_RTC) -typedef struct StrongARMRTCState { +struct StrongARMRTCState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -268,7 +271,7 @@ typedef struct StrongARMRTCState { QEMUTimer *rtc_hz; qemu_irq rtc_irq; qemu_irq rtc_hz_irq; -} StrongARMRTCState; +}; static inline void strongarm_rtc_int_update(StrongARMRTCState *s) { @@ -478,10 +481,10 @@ static const TypeInfo strongarm_rtc_sysbus_info = { #define GAFR 0x1c #define TYPE_STRONGARM_GPIO "strongarm-gpio" -#define STRONGARM_GPIO(obj) \ - OBJECT_CHECK(StrongARMGPIOInfo, (obj), TYPE_STRONGARM_GPIO) - typedef struct StrongARMGPIOInfo StrongARMGPIOInfo; +DECLARE_INSTANCE_CHECKER(StrongARMGPIOInfo, STRONGARM_GPIO, + TYPE_STRONGARM_GPIO) + struct StrongARMGPIOInfo { SysBusDevice busdev; MemoryRegion iomem; @@ -717,10 +720,10 @@ static const TypeInfo strongarm_gpio_info = { #define PPFR 0x10 #define TYPE_STRONGARM_PPC "strongarm-ppc" -#define STRONGARM_PPC(obj) \ - OBJECT_CHECK(StrongARMPPCInfo, (obj), TYPE_STRONGARM_PPC) - typedef struct StrongARMPPCInfo StrongARMPPCInfo; +DECLARE_INSTANCE_CHECKER(StrongARMPPCInfo, STRONGARM_PPC, + TYPE_STRONGARM_PPC) + struct StrongARMPPCInfo { SysBusDevice parent_obj; @@ -918,10 +921,11 @@ static const TypeInfo strongarm_ppc_info = { #define RX_FIFO_ROR (1 << 10) #define TYPE_STRONGARM_UART "strongarm-uart" -#define STRONGARM_UART(obj) \ - OBJECT_CHECK(StrongARMUARTState, (obj), TYPE_STRONGARM_UART) +typedef struct StrongARMUARTState StrongARMUARTState; +DECLARE_INSTANCE_CHECKER(StrongARMUARTState, STRONGARM_UART, + TYPE_STRONGARM_UART) -typedef struct StrongARMUARTState { +struct StrongARMUARTState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -945,7 +949,7 @@ typedef struct StrongARMUARTState { bool wait_break_end; QEMUTimer *rx_timeout_timer; QEMUTimer *tx_timer; -} StrongARMUARTState; +}; static void strongarm_uart_update_status(StrongARMUARTState *s) { @@ -1349,10 +1353,11 @@ static const TypeInfo strongarm_uart_info = { /* Synchronous Serial Ports */ #define TYPE_STRONGARM_SSP "strongarm-ssp" -#define STRONGARM_SSP(obj) \ - OBJECT_CHECK(StrongARMSSPState, (obj), TYPE_STRONGARM_SSP) +typedef struct StrongARMSSPState StrongARMSSPState; +DECLARE_INSTANCE_CHECKER(StrongARMSSPState, STRONGARM_SSP, + TYPE_STRONGARM_SSP) -typedef struct StrongARMSSPState { +struct StrongARMSSPState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -1365,7 +1370,7 @@ typedef struct StrongARMSSPState { uint16_t rx_fifo[8]; uint8_t rx_level; uint8_t rx_start; -} StrongARMSSPState; +}; #define SSCR0 0x60 /* SSP Control register 0 */ #define SSCR1 0x64 /* SSP Control register 1 */ diff --git a/hw/arm/tosa.c b/hw/arm/tosa.c index 90eef1f14d..2ef6c7b288 100644 --- a/hw/arm/tosa.c +++ b/hw/arm/tosa.c @@ -25,6 +25,7 @@ #include "hw/ssi/ssi.h" #include "hw/sysbus.h" #include "exec/address-spaces.h" +#include "qom/object.h" #define TOSA_RAM 0x04000000 #define TOSA_ROM 0x00800000 @@ -74,12 +75,13 @@ static void tosa_microdrive_attach(PXA2xxState *cpu) */ #define TYPE_TOSA_MISC_GPIO "tosa-misc-gpio" -#define TOSA_MISC_GPIO(obj) \ - OBJECT_CHECK(TosaMiscGPIOState, (obj), TYPE_TOSA_MISC_GPIO) +typedef struct TosaMiscGPIOState TosaMiscGPIOState; +DECLARE_INSTANCE_CHECKER(TosaMiscGPIOState, TOSA_MISC_GPIO, + TYPE_TOSA_MISC_GPIO) -typedef struct TosaMiscGPIOState { +struct TosaMiscGPIOState { SysBusDevice parent_obj; -} TosaMiscGPIOState; +}; static void tosa_gpio_leds(void *opaque, int line, int level) { @@ -170,14 +172,16 @@ static void tosa_ssp_realize(SSISlave *dev, Error **errp) } #define TYPE_TOSA_DAC "tosa_dac" -#define TOSA_DAC(obj) OBJECT_CHECK(TosaDACState, (obj), TYPE_TOSA_DAC) +typedef struct TosaDACState TosaDACState; +DECLARE_INSTANCE_CHECKER(TosaDACState, TOSA_DAC, + TYPE_TOSA_DAC) -typedef struct { +struct TosaDACState { I2CSlave parent_obj; int len; char buf[3]; -} TosaDACState; +}; static int tosa_dac_send(I2CSlave *i2c, uint8_t data) { diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c index 9127579984..2ba69f24b7 100644 --- a/hw/arm/versatilepb.c +++ b/hw/arm/versatilepb.c @@ -26,6 +26,7 @@ #include "qemu/error-report.h" #include "hw/char/pl011.h" #include "hw/sd/sd.h" +#include "qom/object.h" #define VERSATILE_FLASH_ADDR 0x34000000 #define VERSATILE_FLASH_SIZE (64 * 1024 * 1024) @@ -34,10 +35,11 @@ /* Primary interrupt controller. */ #define TYPE_VERSATILE_PB_SIC "versatilepb_sic" -#define VERSATILE_PB_SIC(obj) \ - OBJECT_CHECK(vpb_sic_state, (obj), TYPE_VERSATILE_PB_SIC) +typedef struct vpb_sic_state vpb_sic_state; +DECLARE_INSTANCE_CHECKER(vpb_sic_state, VERSATILE_PB_SIC, + TYPE_VERSATILE_PB_SIC) -typedef struct vpb_sic_state { +struct vpb_sic_state { SysBusDevice parent_obj; MemoryRegion iomem; @@ -46,7 +48,7 @@ typedef struct vpb_sic_state { uint32_t pic_enable; qemu_irq parent[32]; int irq; -} vpb_sic_state; +}; static const VMStateDescription vmstate_vpb_sic = { .name = "versatilepb_sic", diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c index 95405f5940..01bb4bba1e 100644 --- a/hw/arm/vexpress.c +++ b/hw/arm/vexpress.c @@ -44,6 +44,7 @@ #include "hw/cpu/a15mpcore.h" #include "hw/i2c/arm_sbcon_i2c.h" #include "hw/sd/sd.h" +#include "qom/object.h" #define VEXPRESS_BOARD_ID 0x8e0 #define VEXPRESS_FLASH_SIZE (64 * 1024 * 1024) @@ -166,26 +167,24 @@ static hwaddr motherboard_aseries_map[] = { typedef struct VEDBoardInfo VEDBoardInfo; -typedef struct { +struct VexpressMachineClass { MachineClass parent; VEDBoardInfo *daughterboard; -} VexpressMachineClass; +}; +typedef struct VexpressMachineClass VexpressMachineClass; -typedef struct { +struct VexpressMachineState { MachineState parent; bool secure; bool virt; -} VexpressMachineState; +}; +typedef struct VexpressMachineState VexpressMachineState; #define TYPE_VEXPRESS_MACHINE "vexpress" #define TYPE_VEXPRESS_A9_MACHINE MACHINE_TYPE_NAME("vexpress-a9") #define TYPE_VEXPRESS_A15_MACHINE MACHINE_TYPE_NAME("vexpress-a15") -#define VEXPRESS_MACHINE(obj) \ - OBJECT_CHECK(VexpressMachineState, (obj), TYPE_VEXPRESS_MACHINE) -#define VEXPRESS_MACHINE_GET_CLASS(obj) \ - OBJECT_GET_CLASS(VexpressMachineClass, obj, TYPE_VEXPRESS_MACHINE) -#define VEXPRESS_MACHINE_CLASS(klass) \ - OBJECT_CLASS_CHECK(VexpressMachineClass, klass, TYPE_VEXPRESS_MACHINE) +DECLARE_OBJ_CHECKERS(VexpressMachineState, VexpressMachineClass, + VEXPRESS_MACHINE, TYPE_VEXPRESS_MACHINE) typedef void DBoardInitFn(const VexpressMachineState *machine, ram_addr_t ram_size, diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c index 969ef0727c..9eb9cea8d4 100644 --- a/hw/arm/xilinx_zynq.c +++ b/hw/arm/xilinx_zynq.c @@ -37,10 +37,12 @@ #include "hw/cpu/a9mpcore.h" #include "hw/qdev-clock.h" #include "sysemu/reset.h" +#include "qom/object.h" #define TYPE_ZYNQ_MACHINE MACHINE_TYPE_NAME("xilinx-zynq-a9") -#define ZYNQ_MACHINE(obj) \ - OBJECT_CHECK(ZynqMachineState, (obj), TYPE_ZYNQ_MACHINE) +typedef struct ZynqMachineState ZynqMachineState; +DECLARE_INSTANCE_CHECKER(ZynqMachineState, ZYNQ_MACHINE, + TYPE_ZYNQ_MACHINE) /* board base frequency: 33.333333 MHz */ #define PS_CLK_FREQUENCY (100 * 1000 * 1000 / 3) @@ -84,10 +86,10 @@ static const int dma_irqs[8] = { 0xe3401000 + ARMV7_IMM16(extract32((val), 16, 16)), /* movt r1 ... */ \ 0xe5801000 + (addr) -typedef struct ZynqMachineState { +struct ZynqMachineState { MachineState parent; Clock *ps_clk; -} ZynqMachineState; +}; static void zynq_write_board_setup(ARMCPU *cpu, const struct arm_boot_info *info) diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c index 4b3152ee77..5a01e856fd 100644 --- a/hw/arm/xlnx-versal-virt.c +++ b/hw/arm/xlnx-versal-virt.c @@ -22,12 +22,14 @@ #include "cpu.h" #include "hw/qdev-properties.h" #include "hw/arm/xlnx-versal.h" +#include "qom/object.h" #define TYPE_XLNX_VERSAL_VIRT_MACHINE MACHINE_TYPE_NAME("xlnx-versal-virt") -#define XLNX_VERSAL_VIRT_MACHINE(obj) \ - OBJECT_CHECK(VersalVirt, (obj), TYPE_XLNX_VERSAL_VIRT_MACHINE) +typedef struct VersalVirt VersalVirt; +DECLARE_INSTANCE_CHECKER(VersalVirt, XLNX_VERSAL_VIRT_MACHINE, + TYPE_XLNX_VERSAL_VIRT_MACHINE) -typedef struct VersalVirt { +struct VersalVirt { MachineState parent_obj; Versal soc; @@ -45,7 +47,7 @@ typedef struct VersalVirt { struct { bool secure; } cfg; -} VersalVirt; +}; static void fdt_create(VersalVirt *s) { diff --git a/hw/arm/xlnx-zcu102.c b/hw/arm/xlnx-zcu102.c index 672d9d4bd1..19d5a4d4e0 100644 --- a/hw/arm/xlnx-zcu102.c +++ b/hw/arm/xlnx-zcu102.c @@ -24,8 +24,9 @@ #include "qemu/log.h" #include "sysemu/qtest.h" #include "sysemu/device_tree.h" +#include "qom/object.h" -typedef struct XlnxZCU102 { +struct XlnxZCU102 { MachineState parent_obj; XlnxZynqMPState soc; @@ -34,11 +35,12 @@ typedef struct XlnxZCU102 { bool virt; struct arm_boot_info binfo; -} XlnxZCU102; +}; +typedef struct XlnxZCU102 XlnxZCU102; #define TYPE_ZCU102_MACHINE MACHINE_TYPE_NAME("xlnx-zcu102") -#define ZCU102_MACHINE(obj) \ - OBJECT_CHECK(XlnxZCU102, (obj), TYPE_ZCU102_MACHINE) +DECLARE_INSTANCE_CHECKER(XlnxZCU102, ZCU102_MACHINE, + TYPE_ZCU102_MACHINE) static bool zcu102_get_secure(Object *obj, Error **errp) diff --git a/hw/arm/z2.c b/hw/arm/z2.c index 9a9bbc653b..72ecb6df29 100644 --- a/hw/arm/z2.c +++ b/hw/arm/z2.c @@ -26,6 +26,7 @@ #include "exec/address-spaces.h" #include "sysemu/qtest.h" #include "cpu.h" +#include "qom/object.h" #ifdef DEBUG_Z2 #define DPRINTF(fmt, ...) \ @@ -102,17 +103,19 @@ static struct arm_boot_info z2_binfo = { #define Z2_GPIO_KEY_ON 1 #define Z2_GPIO_LCD_CS 88 -typedef struct { +struct ZipitLCD { SSISlave ssidev; int32_t selected; int32_t enabled; uint8_t buf[3]; uint32_t cur_reg; int pos; -} ZipitLCD; +}; +typedef struct ZipitLCD ZipitLCD; #define TYPE_ZIPIT_LCD "zipit-lcd" -#define ZIPIT_LCD(obj) OBJECT_CHECK(ZipitLCD, (obj), TYPE_ZIPIT_LCD) +DECLARE_INSTANCE_CHECKER(ZipitLCD, ZIPIT_LCD, + TYPE_ZIPIT_LCD) static uint32_t zipit_lcd_transfer(SSISlave *dev, uint32_t value) { @@ -195,14 +198,16 @@ static const TypeInfo zipit_lcd_info = { }; #define TYPE_AER915 "aer915" -#define AER915(obj) OBJECT_CHECK(AER915State, (obj), TYPE_AER915) +typedef struct AER915State AER915State; +DECLARE_INSTANCE_CHECKER(AER915State, AER915, + TYPE_AER915) -typedef struct AER915State { +struct AER915State { I2CSlave parent_obj; int len; uint8_t buf[3]; -} AER915State; +}; static int aer915_send(I2CSlave *i2c, uint8_t data) { diff --git a/hw/audio/ac97.c b/hw/audio/ac97.c index 38522cf0ba..eb8a7f032d 100644 --- a/hw/audio/ac97.c +++ b/hw/audio/ac97.c @@ -25,6 +25,7 @@ #include "migration/vmstate.h" #include "qemu/module.h" #include "sysemu/dma.h" +#include "qom/object.h" enum { AC97_Reset = 0x00, @@ -126,8 +127,9 @@ enum { #define MUTE_SHIFT 15 #define TYPE_AC97 "AC97" -#define AC97(obj) \ - OBJECT_CHECK(AC97LinkState, (obj), TYPE_AC97) +typedef struct AC97LinkState AC97LinkState; +DECLARE_INSTANCE_CHECKER(AC97LinkState, AC97, + TYPE_AC97) #define REC_MASK 7 enum { @@ -158,7 +160,7 @@ typedef struct AC97BusMasterRegs { BD bd; } AC97BusMasterRegs; -typedef struct AC97LinkState { +struct AC97LinkState { PCIDevice dev; QEMUSoundCard card; uint32_t glob_cnt; @@ -175,7 +177,7 @@ typedef struct AC97LinkState { int bup_flag; MemoryRegion io_nam; MemoryRegion io_nabm; -} AC97LinkState; +}; enum { BUP_SET = 1, diff --git a/hw/audio/adlib.c b/hw/audio/adlib.c index 65dff5b6fc..870116e324 100644 --- a/hw/audio/adlib.c +++ b/hw/audio/adlib.c @@ -29,6 +29,7 @@ #include "audio/audio.h" #include "hw/isa/isa.h" #include "hw/qdev-properties.h" +#include "qom/object.h" //#define DEBUG @@ -51,9 +52,11 @@ #define SHIFT 1 #define TYPE_ADLIB "adlib" -#define ADLIB(obj) OBJECT_CHECK(AdlibState, (obj), TYPE_ADLIB) +typedef struct AdlibState AdlibState; +DECLARE_INSTANCE_CHECKER(AdlibState, ADLIB, + TYPE_ADLIB) -typedef struct { +struct AdlibState { ISADevice parent_obj; QEMUSoundCard card; @@ -73,7 +76,7 @@ typedef struct { QEMUAudioTimeStamp ats; FM_OPL *opl; PortioList port_list; -} AdlibState; +}; static void adlib_stop_opl_timer (AdlibState *s, size_t n) { diff --git a/hw/audio/cs4231.c b/hw/audio/cs4231.c index 11a6328fc2..8e9554ce9b 100644 --- a/hw/audio/cs4231.c +++ b/hw/audio/cs4231.c @@ -27,6 +27,7 @@ #include "migration/vmstate.h" #include "qemu/module.h" #include "trace.h" +#include "qom/object.h" /* * In addition to Crystal CS4231 there is a DMA controller on Sparc. @@ -37,17 +38,18 @@ #define CS_MAXDREG (CS_DREGS - 1) #define TYPE_CS4231 "SUNW,CS4231" -#define CS4231(obj) \ - OBJECT_CHECK(CSState, (obj), TYPE_CS4231) +typedef struct CSState CSState; +DECLARE_INSTANCE_CHECKER(CSState, CS4231, + TYPE_CS4231) -typedef struct CSState { +struct CSState { SysBusDevice parent_obj; MemoryRegion iomem; qemu_irq irq; uint32_t regs[CS_REGS]; uint8_t dregs[CS_DREGS]; -} CSState; +}; #define CS_RAP(s) ((s)->regs[0] & CS_MAXDREG) #define CS_VER 0xa0 diff --git a/hw/audio/cs4231a.c b/hw/audio/cs4231a.c index 59705a8d47..7d60ce6f0e 100644 --- a/hw/audio/cs4231a.c +++ b/hw/audio/cs4231a.c @@ -32,6 +32,7 @@ #include "qemu/module.h" #include "qemu/timer.h" #include "qapi/error.h" +#include "qom/object.h" /* Missing features: @@ -62,9 +63,11 @@ static struct { #define CS_DREGS 32 #define TYPE_CS4231A "cs4231a" -#define CS4231A(obj) OBJECT_CHECK (CSState, (obj), TYPE_CS4231A) +typedef struct CSState CSState; +DECLARE_INSTANCE_CHECKER(CSState, CS4231A, + TYPE_CS4231A) -typedef struct CSState { +struct CSState { ISADevice dev; QEMUSoundCard card; MemoryRegion ioports; @@ -82,7 +85,7 @@ typedef struct CSState { int aci_counter; SWVoiceOut *voice; int16_t *tab; -} CSState; +}; #define MODE2 (1 << 6) #define MCE (1 << 6) diff --git a/hw/audio/es1370.c b/hw/audio/es1370.c index 4255463a49..a824f8949e 100644 --- a/hw/audio/es1370.c +++ b/hw/audio/es1370.c @@ -33,6 +33,7 @@ #include "migration/vmstate.h" #include "qemu/module.h" #include "sysemu/dma.h" +#include "qom/object.h" /* Missing stuff: SCTRL_P[12](END|ST)INC @@ -263,7 +264,7 @@ struct chan { uint32_t frame_cnt; }; -typedef struct ES1370State { +struct ES1370State { PCIDevice dev; QEMUSoundCard card; MemoryRegion io; @@ -276,7 +277,8 @@ typedef struct ES1370State { uint32_t mempage; uint32_t codec; uint32_t sctl; -} ES1370State; +}; +typedef struct ES1370State ES1370State; struct chan_bits { uint32_t ctl_en; @@ -291,8 +293,8 @@ struct chan_bits { }; #define TYPE_ES1370 "ES1370" -#define ES1370(obj) \ - OBJECT_CHECK(ES1370State, (obj), TYPE_ES1370) +DECLARE_INSTANCE_CHECKER(ES1370State, ES1370, + TYPE_ES1370) static void es1370_dac1_calc_freq (ES1370State *s, uint32_t ctl, uint32_t *old_freq, uint32_t *new_freq); diff --git a/hw/audio/gus.c b/hw/audio/gus.c index 7e4a8cadad..307fd48315 100644 --- a/hw/audio/gus.c +++ b/hw/audio/gus.c @@ -33,6 +33,7 @@ #include "migration/vmstate.h" #include "gusemu.h" #include "gustate.h" +#include "qom/object.h" #define dolog(...) AUD_log ("audio", __VA_ARGS__) #ifdef DEBUG @@ -42,9 +43,11 @@ #endif #define TYPE_GUS "gus" -#define GUS(obj) OBJECT_CHECK (GUSState, (obj), TYPE_GUS) +typedef struct GUSState GUSState; +DECLARE_INSTANCE_CHECKER(GUSState, GUS, + TYPE_GUS) -typedef struct GUSState { +struct GUSState { ISADevice dev; GUSEmuState emu; QEMUSoundCard card; @@ -60,7 +63,7 @@ typedef struct GUSState { IsaDma *isa_dma; PortioList portio_list1; PortioList portio_list2; -} GUSState; +}; static uint32_t gus_readb(void *opaque, uint32_t nport) { diff --git a/hw/audio/hda-codec.c b/hw/audio/hda-codec.c index 2d16448181..77d31b91a4 100644 --- a/hw/audio/hda-codec.c +++ b/hw/audio/hda-codec.c @@ -26,6 +26,7 @@ #include "intel-hda-defs.h" #include "audio/audio.h" #include "trace.h" +#include "qom/object.h" /* -------------------------------------------------------------------------- */ @@ -171,7 +172,8 @@ struct HDAAudioStream { }; #define TYPE_HDA_AUDIO "hda-audio" -#define HDA_AUDIO(obj) OBJECT_CHECK(HDAAudioState, (obj), TYPE_HDA_AUDIO) +DECLARE_INSTANCE_CHECKER(HDAAudioState, HDA_AUDIO, + TYPE_HDA_AUDIO) struct HDAAudioState { HDACodecDevice hda; diff --git a/hw/audio/intel-hda.c b/hw/audio/intel-hda.c index f6cea49686..4330213fff 100644 --- a/hw/audio/intel-hda.c +++ b/hw/audio/intel-hda.c @@ -32,6 +32,7 @@ #include "intel-hda-defs.h" #include "sysemu/dma.h" #include "qapi/error.h" +#include "qom/object.h" /* --------------------------------------------------------------------- */ /* hda bus */ @@ -203,8 +204,8 @@ struct IntelHDAState { #define TYPE_INTEL_HDA_GENERIC "intel-hda-generic" -#define INTEL_HDA(obj) \ - OBJECT_CHECK(IntelHDAState, (obj), TYPE_INTEL_HDA_GENERIC) +DECLARE_INSTANCE_CHECKER(IntelHDAState, INTEL_HDA, + TYPE_INTEL_HDA_GENERIC) struct IntelHDAReg { const char *name; /* register name */ diff --git a/hw/audio/intel-hda.h b/hw/audio/intel-hda.h index eee6fee5af..f5cce18fa3 100644 --- a/hw/audio/intel-hda.h +++ b/hw/audio/intel-hda.h @@ -2,23 +2,20 @@ #define HW_INTEL_HDA_H #include "hw/qdev-core.h" +#include "qom/object.h" /* --------------------------------------------------------------------- */ /* hda bus */ #define TYPE_HDA_CODEC_DEVICE "hda-codec" -#define HDA_CODEC_DEVICE(obj) \ - OBJECT_CHECK(HDACodecDevice, (obj), TYPE_HDA_CODEC_DEVICE) -#define HDA_CODEC_DEVICE_CLASS(klass) \ - OBJECT_CLASS_CHECK(HDACodecDeviceClass, (klass), TYPE_HDA_CODEC_DEVICE) -#define HDA_CODEC_DEVICE_GET_CLASS(obj) \ - OBJECT_GET_CLASS(HDACodecDeviceClass, (obj), TYPE_HDA_CODEC_DEVICE) +OBJECT_DECLARE_TYPE(HDACodecDevice, HDACodecDeviceClass, + hda_codec_device, HDA_CODEC_DEVICE) #define TYPE_HDA_BUS "HDA" -#define HDA_BUS(obj) OBJECT_CHECK(HDACodecBus, (obj), TYPE_HDA_BUS) - typedef struct HDACodecBus HDACodecBus; -typedef struct HDACodecDevice HDACodecDevice; +DECLARE_INSTANCE_CHECKER(HDACodecBus, HDA_BUS, + TYPE_HDA_BUS) + typedef void (*hda_codec_response_func)(HDACodecDevice *dev, bool solicited, uint32_t response); @@ -33,15 +30,14 @@ struct HDACodecBus { hda_codec_xfer_func xfer; }; -typedef struct HDACodecDeviceClass -{ +struct HDACodecDeviceClass { DeviceClass parent_class; int (*init)(HDACodecDevice *dev); void (*exit)(HDACodecDevice *dev); void (*command)(HDACodecDevice *dev, uint32_t nid, uint32_t data); void (*stream)(HDACodecDevice *dev, uint32_t stnr, bool running, bool output); -} HDACodecDeviceClass; +}; struct HDACodecDevice { DeviceState qdev; diff --git a/hw/audio/marvell_88w8618.c b/hw/audio/marvell_88w8618.c index 8dfacec693..c8641562cc 100644 --- a/hw/audio/marvell_88w8618.c +++ b/hw/audio/marvell_88w8618.c @@ -19,6 +19,7 @@ #include "audio/audio.h" #include "qapi/error.h" #include "qemu/module.h" +#include "qom/object.h" #define MP_AUDIO_SIZE 0x00001000 @@ -42,10 +43,11 @@ #define MP_AUDIO_CLOCK_24MHZ (1 << 9) #define MP_AUDIO_MONO (1 << 14) -#define MV88W8618_AUDIO(obj) \ - OBJECT_CHECK(mv88w8618_audio_state, (obj), TYPE_MV88W8618_AUDIO) +typedef struct mv88w8618_audio_state mv88w8618_audio_state; +DECLARE_INSTANCE_CHECKER(mv88w8618_audio_state, MV88W8618_AUDIO, + TYPE_MV88W8618_AUDIO) -typedef struct mv88w8618_audio_state { +struct mv88w8618_audio_state { SysBusDevice parent_obj; MemoryRegion iomem; @@ -60,7 +62,7 @@ typedef struct mv88w8618_audio_state { uint32_t last_free; uint32_t clock_div; void *wm; -} mv88w8618_audio_state; +}; static void mv88w8618_audio_callback(void *opaque, int free_out, int free_in) { diff --git a/hw/audio/milkymist-ac97.c b/hw/audio/milkymist-ac97.c index 0fa38adbe2..7893539019 100644 --- a/hw/audio/milkymist-ac97.c +++ b/hw/audio/milkymist-ac97.c @@ -29,6 +29,7 @@ #include "audio/audio.h" #include "qemu/error-report.h" #include "qemu/module.h" +#include "qom/object.h" enum { R_AC97_CTRL = 0, @@ -55,8 +56,9 @@ enum { }; #define TYPE_MILKYMIST_AC97 "milkymist-ac97" -#define MILKYMIST_AC97(obj) \ - OBJECT_CHECK(MilkymistAC97State, (obj), TYPE_MILKYMIST_AC97) +typedef struct MilkymistAC97State MilkymistAC97State; +DECLARE_INSTANCE_CHECKER(MilkymistAC97State, MILKYMIST_AC97, + TYPE_MILKYMIST_AC97) struct MilkymistAC97State { SysBusDevice parent_obj; @@ -74,7 +76,6 @@ struct MilkymistAC97State { qemu_irq dmar_irq; qemu_irq dmaw_irq; }; -typedef struct MilkymistAC97State MilkymistAC97State; static void update_voices(MilkymistAC97State *s) { diff --git a/hw/audio/pcspk.c b/hw/audio/pcspk.c index ea539e7605..cbee8855fb 100644 --- a/hw/audio/pcspk.c +++ b/hw/audio/pcspk.c @@ -33,15 +33,18 @@ #include "migration/vmstate.h" #include "hw/audio/pcspk.h" #include "qapi/error.h" +#include "qom/object.h" #define PCSPK_BUF_LEN 1792 #define PCSPK_SAMPLE_RATE 32000 #define PCSPK_MAX_FREQ (PCSPK_SAMPLE_RATE >> 1) #define PCSPK_MIN_COUNT DIV_ROUND_UP(PIT_FREQ, PCSPK_MAX_FREQ) -#define PC_SPEAKER(obj) OBJECT_CHECK(PCSpkState, (obj), TYPE_PC_SPEAKER) +typedef struct PCSpkState PCSpkState; +DECLARE_INSTANCE_CHECKER(PCSpkState, PC_SPEAKER, + TYPE_PC_SPEAKER) -typedef struct { +struct PCSpkState { ISADevice parent_obj; MemoryRegion ioport; @@ -56,7 +59,7 @@ typedef struct { uint8_t data_on; uint8_t dummy_refresh_clock; bool migrate; -} PCSpkState; +}; static const char *s_spk = "pcspk"; static PCSpkState *pcspk_state; diff --git a/hw/audio/pl041.c b/hw/audio/pl041.c index c3d3eab6ed..570a234b72 100644 --- a/hw/audio/pl041.c +++ b/hw/audio/pl041.c @@ -30,6 +30,7 @@ #include "pl041.h" #include "lm4549.h" #include "migration/vmstate.h" +#include "qom/object.h" #if 0 #define PL041_DEBUG_LEVEL 1 @@ -77,9 +78,11 @@ typedef struct { } pl041_channel; #define TYPE_PL041 "pl041" -#define PL041(obj) OBJECT_CHECK(PL041State, (obj), TYPE_PL041) +typedef struct PL041State PL041State; +DECLARE_INSTANCE_CHECKER(PL041State, PL041, + TYPE_PL041) -typedef struct PL041State { +struct PL041State { SysBusDevice parent_obj; MemoryRegion iomem; @@ -90,7 +93,7 @@ typedef struct PL041State { pl041_regfile regs; pl041_channel fifo1; lm4549_state codec; -} PL041State; +}; static const unsigned char pl041_default_id[8] = { diff --git a/hw/audio/sb16.c b/hw/audio/sb16.c index 2d9e50f99b..6aa2c0fb93 100644 --- a/hw/audio/sb16.c +++ b/hw/audio/sb16.c @@ -34,6 +34,7 @@ #include "qemu/log.h" #include "qemu/module.h" #include "qapi/error.h" +#include "qom/object.h" #define dolog(...) AUD_log ("sb16", __VA_ARGS__) @@ -49,9 +50,11 @@ static const char e3[] = "COPYRIGHT (C) CREATIVE TECHNOLOGY LTD, 1992."; #define TYPE_SB16 "sb16" -#define SB16(obj) OBJECT_CHECK (SB16State, (obj), TYPE_SB16) +typedef struct SB16State SB16State; +DECLARE_INSTANCE_CHECKER(SB16State, SB16, + TYPE_SB16) -typedef struct SB16State { +struct SB16State { ISADevice parent_obj; QEMUSoundCard card; @@ -112,7 +115,7 @@ typedef struct SB16State { int mixer_nreg; uint8_t mixer_regs[256]; PortioList portio_list; -} SB16State; +}; static void SB_audio_callback (void *opaque, int free); diff --git a/hw/audio/wm8750.c b/hw/audio/wm8750.c index 92b2902a10..7d6fcfec03 100644 --- a/hw/audio/wm8750.c +++ b/hw/audio/wm8750.c @@ -13,6 +13,7 @@ #include "qemu/module.h" #include "hw/audio/wm8750.h" #include "audio/audio.h" +#include "qom/object.h" #define IN_PORT_N 3 #define OUT_PORT_N 3 @@ -26,9 +27,11 @@ typedef struct { int dac_hz; } WMRate; -#define WM8750(obj) OBJECT_CHECK(WM8750State, (obj), TYPE_WM8750) +typedef struct WM8750State WM8750State; +DECLARE_INSTANCE_CHECKER(WM8750State, WM8750, + TYPE_WM8750) -typedef struct WM8750State { +struct WM8750State { I2CSlave parent_obj; uint8_t i2c_data[2]; @@ -54,7 +57,7 @@ typedef struct WM8750State { const WMRate *rate; uint8_t rate_vmstate; int adc_hz, dac_hz, ext_adc_hz, ext_dac_hz, master; -} WM8750State; +}; /* pow(10.0, -i / 20.0) * 255, i = 0..42 */ static const uint8_t wm8750_vol_db_table[] = { diff --git a/hw/avr/arduino.c b/hw/avr/arduino.c index 65093ab6fd..3c8388490d 100644 --- a/hw/avr/arduino.c +++ b/hw/avr/arduino.c @@ -15,30 +15,29 @@ #include "hw/boards.h" #include "atmega.h" #include "boot.h" +#include "qom/object.h" -typedef struct ArduinoMachineState { +struct ArduinoMachineState { /*< private >*/ MachineState parent_obj; /*< public >*/ AtmegaMcuState mcu; -} ArduinoMachineState; +}; +typedef struct ArduinoMachineState ArduinoMachineState; -typedef struct ArduinoMachineClass { +struct ArduinoMachineClass { /*< private >*/ MachineClass parent_class; /*< public >*/ const char *mcu_type; uint64_t xtal_hz; -} ArduinoMachineClass; +}; +typedef struct ArduinoMachineClass ArduinoMachineClass; #define TYPE_ARDUINO_MACHINE \ MACHINE_TYPE_NAME("arduino") -#define ARDUINO_MACHINE(obj) \ - OBJECT_CHECK(ArduinoMachineState, (obj), TYPE_ARDUINO_MACHINE) -#define ARDUINO_MACHINE_CLASS(klass) \ - OBJECT_CLASS_CHECK(ArduinoMachineClass, (klass), TYPE_ARDUINO_MACHINE) -#define ARDUINO_MACHINE_GET_CLASS(obj) \ - OBJECT_GET_CLASS(ArduinoMachineClass, (obj), TYPE_ARDUINO_MACHINE) +DECLARE_OBJ_CHECKERS(ArduinoMachineState, ArduinoMachineClass, + ARDUINO_MACHINE, TYPE_ARDUINO_MACHINE) static void arduino_machine_init(MachineState *machine) { diff --git a/hw/avr/atmega.c b/hw/avr/atmega.c index 7131224431..44c6afebbb 100644 --- a/hw/avr/atmega.c +++ b/hw/avr/atmega.c @@ -17,6 +17,7 @@ #include "sysemu/sysemu.h" #include "hw/qdev-properties.h" #include "hw/sysbus.h" +#include "qom/object.h" #include "hw/boards.h" /* FIXME memory_region_allocate_system_memory for sram */ #include "hw/misc/unimp.h" #include "atmega.h" @@ -45,7 +46,7 @@ typedef struct { bool is_timer16; } peripheral_cfg; -typedef struct AtmegaMcuClass { +struct AtmegaMcuClass { /*< private >*/ SysBusDeviceClass parent_class; /*< public >*/ @@ -59,12 +60,11 @@ typedef struct AtmegaMcuClass { size_t adc_count; const uint8_t *irq; const peripheral_cfg *dev; -} AtmegaMcuClass; +}; +typedef struct AtmegaMcuClass AtmegaMcuClass; -#define ATMEGA_MCU_CLASS(klass) \ - OBJECT_CLASS_CHECK(AtmegaMcuClass, (klass), TYPE_ATMEGA_MCU) -#define ATMEGA_MCU_GET_CLASS(obj) \ - OBJECT_GET_CLASS(AtmegaMcuClass, (obj), TYPE_ATMEGA_MCU) +DECLARE_CLASS_CHECKERS(AtmegaMcuClass, ATMEGA_MCU, + TYPE_ATMEGA_MCU) static const peripheral_cfg dev168_328[PERIFMAX] = { [USART0] = { 0xc0, POWER0, 1 }, diff --git a/hw/avr/atmega.h b/hw/avr/atmega.h index 0928cb0ce6..a99ee15c7e 100644 --- a/hw/avr/atmega.h +++ b/hw/avr/atmega.h @@ -15,6 +15,7 @@ #include "hw/timer/avr_timer16.h" #include "hw/misc/avr_power.h" #include "target/avr/cpu.h" +#include "qom/object.h" #define TYPE_ATMEGA_MCU "ATmega" #define TYPE_ATMEGA168_MCU "ATmega168" @@ -22,14 +23,16 @@ #define TYPE_ATMEGA1280_MCU "ATmega1280" #define TYPE_ATMEGA2560_MCU "ATmega2560" -#define ATMEGA_MCU(obj) OBJECT_CHECK(AtmegaMcuState, (obj), TYPE_ATMEGA_MCU) +typedef struct AtmegaMcuState AtmegaMcuState; +DECLARE_INSTANCE_CHECKER(AtmegaMcuState, ATMEGA_MCU, + TYPE_ATMEGA_MCU) #define POWER_MAX 2 #define USART_MAX 4 #define TIMER_MAX 6 #define GPIO_MAX 12 -typedef struct AtmegaMcuState { +struct AtmegaMcuState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -43,6 +46,6 @@ typedef struct AtmegaMcuState { AVRUsartState usart[USART_MAX]; AVRTimer16State timer[TIMER_MAX]; uint64_t xtal_freq_hz; -} AtmegaMcuState; +}; #endif /* HW_AVR_ATMEGA_H */ diff --git a/hw/block/fdc.c b/hw/block/fdc.c index e9ed3eef45..224bac504f 100644 --- a/hw/block/fdc.c +++ b/hw/block/fdc.c @@ -46,6 +46,7 @@ #include "qemu/main-loop.h" #include "qemu/module.h" #include "trace.h" +#include "qom/object.h" /********************************************************/ /* debug Floppy devices */ @@ -64,16 +65,18 @@ /* qdev floppy bus */ #define TYPE_FLOPPY_BUS "floppy-bus" -#define FLOPPY_BUS(obj) OBJECT_CHECK(FloppyBus, (obj), TYPE_FLOPPY_BUS) +typedef struct FloppyBus FloppyBus; +DECLARE_INSTANCE_CHECKER(FloppyBus, FLOPPY_BUS, + TYPE_FLOPPY_BUS) typedef struct FDCtrl FDCtrl; typedef struct FDrive FDrive; static FDrive *get_drv(FDCtrl *fdctrl, int unit); -typedef struct FloppyBus { +struct FloppyBus { BusState bus; FDCtrl *fdc; -} FloppyBus; +}; static const TypeInfo floppy_bus_info = { .name = TYPE_FLOPPY_BUS, @@ -494,15 +497,16 @@ static const BlockDevOps fd_block_ops = { #define TYPE_FLOPPY_DRIVE "floppy" -#define FLOPPY_DRIVE(obj) \ - OBJECT_CHECK(FloppyDrive, (obj), TYPE_FLOPPY_DRIVE) +typedef struct FloppyDrive FloppyDrive; +DECLARE_INSTANCE_CHECKER(FloppyDrive, FLOPPY_DRIVE, + TYPE_FLOPPY_DRIVE) -typedef struct FloppyDrive { +struct FloppyDrive { DeviceState qdev; uint32_t unit; BlockConf conf; FloppyDriveType type; -} FloppyDrive; +}; static Property floppy_drive_properties[] = { DEFINE_PROP_UINT32("unit", FloppyDrive, unit, -1), @@ -886,19 +890,23 @@ static FloppyDriveType get_fallback_drive_type(FDrive *drv) } #define TYPE_SYSBUS_FDC "base-sysbus-fdc" -#define SYSBUS_FDC(obj) OBJECT_CHECK(FDCtrlSysBus, (obj), TYPE_SYSBUS_FDC) +typedef struct FDCtrlSysBus FDCtrlSysBus; +DECLARE_INSTANCE_CHECKER(FDCtrlSysBus, SYSBUS_FDC, + TYPE_SYSBUS_FDC) -typedef struct FDCtrlSysBus { +struct FDCtrlSysBus { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ struct FDCtrl state; -} FDCtrlSysBus; +}; -#define ISA_FDC(obj) OBJECT_CHECK(FDCtrlISABus, (obj), TYPE_ISA_FDC) +typedef struct FDCtrlISABus FDCtrlISABus; +DECLARE_INSTANCE_CHECKER(FDCtrlISABus, ISA_FDC, + TYPE_ISA_FDC) -typedef struct FDCtrlISABus { +struct FDCtrlISABus { ISADevice parent_obj; uint32_t iobase; @@ -907,7 +915,7 @@ typedef struct FDCtrlISABus { struct FDCtrl state; int32_t bootindexA; int32_t bootindexB; -} FDCtrlISABus; +}; static uint32_t fdctrl_read (void *opaque, uint32_t reg) { diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c index 15824450cd..8dae779c76 100644 --- a/hw/block/m25p80.c +++ b/hw/block/m25p80.c @@ -33,6 +33,7 @@ #include "qemu/error-report.h" #include "qapi/error.h" #include "trace.h" +#include "qom/object.h" /* Fields for FlashPartInfo->flags */ @@ -414,7 +415,7 @@ typedef enum { #define M25P80_INTERNAL_DATA_BUFFER_SZ 16 -typedef struct Flash { +struct Flash { SSISlave parent_obj; BlockBackend *blk; @@ -454,20 +455,18 @@ typedef struct Flash { const FlashPartInfo *pi; -} Flash; +}; +typedef struct Flash Flash; -typedef struct M25P80Class { +struct M25P80Class { SSISlaveClass parent_class; FlashPartInfo *pi; -} M25P80Class; +}; +typedef struct M25P80Class M25P80Class; #define TYPE_M25P80 "m25p80-generic" -#define M25P80(obj) \ - OBJECT_CHECK(Flash, (obj), TYPE_M25P80) -#define M25P80_CLASS(klass) \ - OBJECT_CLASS_CHECK(M25P80Class, (klass), TYPE_M25P80) -#define M25P80_GET_CLASS(obj) \ - OBJECT_GET_CLASS(M25P80Class, (obj), TYPE_M25P80) +DECLARE_OBJ_CHECKERS(Flash, M25P80Class, + M25P80, TYPE_M25P80) static inline Manufacturer get_man(Flash *s) { diff --git a/hw/block/nand.c b/hw/block/nand.c index 654e0cb5d1..5c8112ed5a 100644 --- a/hw/block/nand.c +++ b/hw/block/nand.c @@ -27,6 +27,7 @@ #include "qapi/error.h" #include "qemu/error-report.h" #include "qemu/module.h" +#include "qom/object.h" # define NAND_CMD_READ0 0x00 # define NAND_CMD_READ1 0x01 @@ -89,8 +90,8 @@ struct NANDFlashState { #define TYPE_NAND "nand" -#define NAND(obj) \ - OBJECT_CHECK(NANDFlashState, (obj), TYPE_NAND) +DECLARE_INSTANCE_CHECKER(NANDFlashState, NAND, + TYPE_NAND) static void mem_and(uint8_t *dest, const uint8_t *src, size_t n) { diff --git a/hw/block/onenand.c b/hw/block/onenand.c index 898ac563a3..19f55aba66 100644 --- a/hw/block/onenand.c +++ b/hw/block/onenand.c @@ -31,6 +31,7 @@ #include "qemu/error-report.h" #include "qemu/log.h" #include "qemu/module.h" +#include "qom/object.h" /* 11 for 2kB-page OneNAND ("2nd generation") and 10 for 1kB-page chips */ #define PAGE_SHIFT 11 @@ -39,9 +40,11 @@ #define BLOCK_SHIFT (PAGE_SHIFT + 6) #define TYPE_ONE_NAND "onenand" -#define ONE_NAND(obj) OBJECT_CHECK(OneNANDState, (obj), TYPE_ONE_NAND) +typedef struct OneNANDState OneNANDState; +DECLARE_INSTANCE_CHECKER(OneNANDState, ONE_NAND, + TYPE_ONE_NAND) -typedef struct OneNANDState { +struct OneNANDState { SysBusDevice parent_obj; struct { @@ -85,7 +88,7 @@ typedef struct OneNANDState { int secs_cur; int blocks; uint8_t *blockwp; -} OneNANDState; +}; enum { ONEN_BUF_BLOCK = 0, diff --git a/hw/block/trace-events b/hw/block/trace-events index 72cf2d15cb..ec94c56a41 100644 --- a/hw/block/trace-events +++ b/hw/block/trace-events @@ -4,8 +4,8 @@ fdc_ioport_read(uint8_t reg, uint8_t value) "read reg 0x%02x val 0x%02x" fdc_ioport_write(uint8_t reg, uint8_t value) "write reg 0x%02x val 0x%02x" -# pflash_cfi02.c # pflash_cfi01.c +# pflash_cfi02.c pflash_reset(void) "reset" pflash_timer_expired(uint8_t cmd) "command 0x%02x done" pflash_io_read(uint64_t offset, unsigned size, uint32_t value, uint8_t cmd, uint8_t wcycle) "offset:0x%04"PRIx64" size:%u value:0x%04x cmd:0x%02x wcycle:%u" diff --git a/hw/char/debugcon.c b/hw/char/debugcon.c index c8d938efb5..daaaca0f39 100644 --- a/hw/char/debugcon.c +++ b/hw/char/debugcon.c @@ -30,10 +30,12 @@ #include "chardev/char-fe.h" #include "hw/isa/isa.h" #include "hw/qdev-properties.h" +#include "qom/object.h" #define TYPE_ISA_DEBUGCON_DEVICE "isa-debugcon" -#define ISA_DEBUGCON_DEVICE(obj) \ - OBJECT_CHECK(ISADebugconState, (obj), TYPE_ISA_DEBUGCON_DEVICE) +typedef struct ISADebugconState ISADebugconState; +DECLARE_INSTANCE_CHECKER(ISADebugconState, ISA_DEBUGCON_DEVICE, + TYPE_ISA_DEBUGCON_DEVICE) //#define DEBUG_DEBUGCON @@ -43,12 +45,12 @@ typedef struct DebugconState { uint32_t readback; } DebugconState; -typedef struct ISADebugconState { +struct ISADebugconState { ISADevice parent_obj; uint32_t iobase; DebugconState state; -} ISADebugconState; +}; static void debugcon_ioport_write(void *opaque, hwaddr addr, uint64_t val, unsigned width) diff --git a/hw/char/etraxfs_ser.c b/hw/char/etraxfs_ser.c index 947bdb649a..d9fba2ae6c 100644 --- a/hw/char/etraxfs_ser.c +++ b/hw/char/etraxfs_ser.c @@ -29,6 +29,7 @@ #include "chardev/char-fe.h" #include "qemu/log.h" #include "qemu/module.h" +#include "qom/object.h" #define D(x) @@ -49,10 +50,11 @@ #define STAT_TR_RDY 24 #define TYPE_ETRAX_FS_SERIAL "etraxfs,serial" -#define ETRAX_SERIAL(obj) \ - OBJECT_CHECK(ETRAXSerial, (obj), TYPE_ETRAX_FS_SERIAL) +typedef struct ETRAXSerial ETRAXSerial; +DECLARE_INSTANCE_CHECKER(ETRAXSerial, ETRAX_SERIAL, + TYPE_ETRAX_FS_SERIAL) -typedef struct ETRAXSerial { +struct ETRAXSerial { SysBusDevice parent_obj; MemoryRegion mmio; @@ -67,7 +69,7 @@ typedef struct ETRAXSerial { /* Control registers. */ uint32_t regs[R_MAX]; -} ETRAXSerial; +}; static void ser_update_irq(ETRAXSerial *s) { diff --git a/hw/char/exynos4210_uart.c b/hw/char/exynos4210_uart.c index 9c8ab3a77d..b8ea34edbd 100644 --- a/hw/char/exynos4210_uart.c +++ b/hw/char/exynos4210_uart.c @@ -34,6 +34,7 @@ #include "hw/qdev-properties.h" #include "trace.h" +#include "qom/object.h" /* * Offsets for UART registers relative to SFR base address @@ -138,10 +139,11 @@ typedef struct { } Exynos4210UartFIFO; #define TYPE_EXYNOS4210_UART "exynos4210.uart" -#define EXYNOS4210_UART(obj) \ - OBJECT_CHECK(Exynos4210UartState, (obj), TYPE_EXYNOS4210_UART) +typedef struct Exynos4210UartState Exynos4210UartState; +DECLARE_INSTANCE_CHECKER(Exynos4210UartState, EXYNOS4210_UART, + TYPE_EXYNOS4210_UART) -typedef struct Exynos4210UartState { +struct Exynos4210UartState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -159,7 +161,7 @@ typedef struct Exynos4210UartState { uint32_t channel; -} Exynos4210UartState; +}; /* Used only for tracing */ diff --git a/hw/char/grlib_apbuart.c b/hw/char/grlib_apbuart.c index 16d0feac59..6fd88d83ad 100644 --- a/hw/char/grlib_apbuart.c +++ b/hw/char/grlib_apbuart.c @@ -31,6 +31,7 @@ #include "chardev/char-fe.h" #include "trace.h" +#include "qom/object.h" #define UART_REG_SIZE 20 /* Size of memory mapped registers */ @@ -72,10 +73,11 @@ #define FIFO_LENGTH 1024 -#define GRLIB_APB_UART(obj) \ - OBJECT_CHECK(UART, (obj), TYPE_GRLIB_APB_UART) +typedef struct UART UART; +DECLARE_INSTANCE_CHECKER(UART, GRLIB_APB_UART, + TYPE_GRLIB_APB_UART) -typedef struct UART { +struct UART { SysBusDevice parent_obj; MemoryRegion iomem; @@ -91,7 +93,7 @@ typedef struct UART { char buffer[FIFO_LENGTH]; int len; int current; -} UART; +}; static int uart_data_to_read(UART *uart) { diff --git a/hw/char/ipoctal232.c b/hw/char/ipoctal232.c index d7c497b939..2c987df8ad 100644 --- a/hw/char/ipoctal232.c +++ b/hw/char/ipoctal232.c @@ -16,6 +16,7 @@ #include "qemu/bitops.h" #include "qemu/module.h" #include "chardev/char-fe.h" +#include "qom/object.h" /* #define DEBUG_IPOCTAL */ @@ -122,8 +123,8 @@ struct IPOctalState { #define TYPE_IPOCTAL "ipoctal232" -#define IPOCTAL(obj) \ - OBJECT_CHECK(IPOctalState, (obj), TYPE_IPOCTAL) +DECLARE_INSTANCE_CHECKER(IPOctalState, IPOCTAL, + TYPE_IPOCTAL) static const VMStateDescription vmstate_scc2698_channel = { .name = "scc2698_channel", diff --git a/hw/char/lm32_juart.c b/hw/char/lm32_juart.c index 3f34861233..5723f2e189 100644 --- a/hw/char/lm32_juart.c +++ b/hw/char/lm32_juart.c @@ -26,6 +26,7 @@ #include "hw/char/lm32_juart.h" #include "hw/qdev-properties.h" +#include "qom/object.h" enum { LM32_JUART_MIN_SAVE_VERSION = 0, @@ -41,7 +42,9 @@ enum { JRX_FULL = (1<<8), }; -#define LM32_JUART(obj) OBJECT_CHECK(LM32JuartState, (obj), TYPE_LM32_JUART) +typedef struct LM32JuartState LM32JuartState; +DECLARE_INSTANCE_CHECKER(LM32JuartState, LM32_JUART, + TYPE_LM32_JUART) struct LM32JuartState { SysBusDevice parent_obj; @@ -51,7 +54,6 @@ struct LM32JuartState { uint32_t jtx; uint32_t jrx; }; -typedef struct LM32JuartState LM32JuartState; uint32_t lm32_juart_get_jtx(DeviceState *d) { diff --git a/hw/char/lm32_uart.c b/hw/char/lm32_uart.c index b0b1092889..624bc83c5f 100644 --- a/hw/char/lm32_uart.c +++ b/hw/char/lm32_uart.c @@ -31,6 +31,7 @@ #include "chardev/char-fe.h" #include "qemu/error-report.h" #include "qemu/module.h" +#include "qom/object.h" enum { R_RXTX = 0, @@ -94,7 +95,9 @@ enum { }; #define TYPE_LM32_UART "lm32-uart" -#define LM32_UART(obj) OBJECT_CHECK(LM32UartState, (obj), TYPE_LM32_UART) +typedef struct LM32UartState LM32UartState; +DECLARE_INSTANCE_CHECKER(LM32UartState, LM32_UART, + TYPE_LM32_UART) struct LM32UartState { SysBusDevice parent_obj; @@ -105,7 +108,6 @@ struct LM32UartState { uint32_t regs[R_MAX]; }; -typedef struct LM32UartState LM32UartState; static void uart_update_irq(LM32UartState *s) { diff --git a/hw/char/mcf_uart.c b/hw/char/mcf_uart.c index 8d1b7f2bca..f6baa3ce77 100644 --- a/hw/char/mcf_uart.c +++ b/hw/char/mcf_uart.c @@ -14,8 +14,9 @@ #include "hw/m68k/mcf.h" #include "hw/qdev-properties.h" #include "chardev/char-fe.h" +#include "qom/object.h" -typedef struct { +struct mcf_uart_state { SysBusDevice parent_obj; MemoryRegion iomem; @@ -33,10 +34,12 @@ typedef struct { int rx_enabled; qemu_irq irq; CharBackend chr; -} mcf_uart_state; +}; +typedef struct mcf_uart_state mcf_uart_state; #define TYPE_MCF_UART "mcf-uart" -#define MCF_UART(obj) OBJECT_CHECK(mcf_uart_state, (obj), TYPE_MCF_UART) +DECLARE_INSTANCE_CHECKER(mcf_uart_state, MCF_UART, + TYPE_MCF_UART) /* UART Status Register bits. */ #define MCF_UART_RxRDY 0x01 diff --git a/hw/char/milkymist-uart.c b/hw/char/milkymist-uart.c index 1439efb42a..41204a0e28 100644 --- a/hw/char/milkymist-uart.c +++ b/hw/char/milkymist-uart.c @@ -30,6 +30,7 @@ #include "chardev/char-fe.h" #include "qemu/error-report.h" #include "qemu/module.h" +#include "qom/object.h" enum { R_RXTX = 0, @@ -57,8 +58,9 @@ enum { }; #define TYPE_MILKYMIST_UART "milkymist-uart" -#define MILKYMIST_UART(obj) \ - OBJECT_CHECK(MilkymistUartState, (obj), TYPE_MILKYMIST_UART) +typedef struct MilkymistUartState MilkymistUartState; +DECLARE_INSTANCE_CHECKER(MilkymistUartState, MILKYMIST_UART, + TYPE_MILKYMIST_UART) struct MilkymistUartState { SysBusDevice parent_obj; @@ -69,7 +71,6 @@ struct MilkymistUartState { uint32_t regs[R_MAX]; }; -typedef struct MilkymistUartState MilkymistUartState; static void uart_update_irq(MilkymistUartState *s) { diff --git a/hw/char/parallel.c b/hw/char/parallel.c index c0f34bf924..ddb14f3197 100644 --- a/hw/char/parallel.c +++ b/hw/char/parallel.c @@ -37,6 +37,7 @@ #include "sysemu/reset.h" #include "sysemu/sysemu.h" #include "trace.h" +#include "qom/object.h" //#define DEBUG_PARALLEL @@ -92,17 +93,18 @@ typedef struct ParallelState { } ParallelState; #define TYPE_ISA_PARALLEL "isa-parallel" -#define ISA_PARALLEL(obj) \ - OBJECT_CHECK(ISAParallelState, (obj), TYPE_ISA_PARALLEL) +typedef struct ISAParallelState ISAParallelState; +DECLARE_INSTANCE_CHECKER(ISAParallelState, ISA_PARALLEL, + TYPE_ISA_PARALLEL) -typedef struct ISAParallelState { +struct ISAParallelState { ISADevice parent_obj; uint32_t index; uint32_t iobase; uint32_t isairq; ParallelState state; -} ISAParallelState; +}; static void parallel_update_irq(ParallelState *s) { diff --git a/hw/char/sclpconsole-lm.c b/hw/char/sclpconsole-lm.c index 5848b4e9c5..81f6d0ed4f 100644 --- a/hw/char/sclpconsole-lm.c +++ b/hw/char/sclpconsole-lm.c @@ -24,6 +24,7 @@ #include "hw/s390x/event-facility.h" #include "hw/qdev-properties.h" #include "hw/s390x/ebcdic.h" +#include "qom/object.h" #define SIZE_BUFFER 4096 #define NEWLINE "\n" @@ -37,18 +38,19 @@ typedef struct OprtnsCommand { /* max size for line-mode data in 4K SCCB page */ #define SIZE_CONSOLE_BUFFER (SCCB_DATA_LEN - sizeof(OprtnsCommand)) -typedef struct SCLPConsoleLM { +struct SCLPConsoleLM { SCLPEvent event; CharBackend chr; bool echo; /* immediate echo of input if true */ uint32_t write_errors; /* errors writing to char layer */ uint32_t length; /* length of byte stream in buffer */ uint8_t buf[SIZE_CONSOLE_BUFFER]; -} SCLPConsoleLM; +}; +typedef struct SCLPConsoleLM SCLPConsoleLM; #define TYPE_SCLPLM_CONSOLE "sclplmconsole" -#define SCLPLM_CONSOLE(obj) \ - OBJECT_CHECK(SCLPConsoleLM, (obj), TYPE_SCLPLM_CONSOLE) +DECLARE_INSTANCE_CHECKER(SCLPConsoleLM, SCLPLM_CONSOLE, + TYPE_SCLPLM_CONSOLE) /* * Character layer call-back functions diff --git a/hw/char/sclpconsole.c b/hw/char/sclpconsole.c index d6f7da0818..aa72ab40b9 100644 --- a/hw/char/sclpconsole.c +++ b/hw/char/sclpconsole.c @@ -22,6 +22,7 @@ #include "hw/qdev-properties.h" #include "hw/s390x/event-facility.h" #include "chardev/char-fe.h" +#include "qom/object.h" typedef struct ASCIIConsoleData { EventBufferHeader ebh; @@ -31,7 +32,7 @@ typedef struct ASCIIConsoleData { /* max size for ASCII data in 4K SCCB page */ #define SIZE_BUFFER_VT220 4080 -typedef struct SCLPConsole { +struct SCLPConsole { SCLPEvent event; CharBackend chr; uint8_t iov[SIZE_BUFFER_VT220]; @@ -40,11 +41,12 @@ typedef struct SCLPConsole { uint32_t iov_data_len; /* length of byte stream in buffer */ uint32_t iov_sclp_rest; /* length of byte stream not read via SCLP */ bool notify; /* qemu_notify_event() req'd if true */ -} SCLPConsole; +}; +typedef struct SCLPConsole SCLPConsole; #define TYPE_SCLP_CONSOLE "sclpconsole" -#define SCLP_CONSOLE(obj) \ - OBJECT_CHECK(SCLPConsole, (obj), TYPE_SCLP_CONSOLE) +DECLARE_INSTANCE_CHECKER(SCLPConsole, SCLP_CONSOLE, + TYPE_SCLP_CONSOLE) /* character layer call-back functions */ diff --git a/hw/char/serial-isa.c b/hw/char/serial-isa.c index b4c65949cd..d4aad81a85 100644 --- a/hw/char/serial-isa.c +++ b/hw/char/serial-isa.c @@ -32,17 +32,20 @@ #include "hw/isa/isa.h" #include "hw/qdev-properties.h" #include "migration/vmstate.h" +#include "qom/object.h" -#define ISA_SERIAL(obj) OBJECT_CHECK(ISASerialState, (obj), TYPE_ISA_SERIAL) +typedef struct ISASerialState ISASerialState; +DECLARE_INSTANCE_CHECKER(ISASerialState, ISA_SERIAL, + TYPE_ISA_SERIAL) -typedef struct ISASerialState { +struct ISASerialState { ISADevice parent_obj; uint32_t index; uint32_t iobase; uint32_t isairq; SerialState state; -} ISASerialState; +}; static const int isa_serial_io[MAX_ISA_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 diff --git a/hw/char/serial-pci.c b/hw/char/serial-pci.c index cd56924a43..f68948154e 100644 --- a/hw/char/serial-pci.c +++ b/hw/char/serial-pci.c @@ -33,15 +33,18 @@ #include "hw/pci/pci.h" #include "hw/qdev-properties.h" #include "migration/vmstate.h" +#include "qom/object.h" -typedef struct PCISerialState { +struct PCISerialState { PCIDevice dev; SerialState state; uint8_t prog_if; -} PCISerialState; +}; +typedef struct PCISerialState PCISerialState; #define TYPE_PCI_SERIAL "pci-serial" -#define PCI_SERIAL(s) OBJECT_CHECK(PCISerialState, (s), TYPE_PCI_SERIAL) +DECLARE_INSTANCE_CHECKER(PCISerialState, PCI_SERIAL, + TYPE_PCI_SERIAL) static void serial_pci_realize(PCIDevice *dev, Error **errp) { diff --git a/hw/char/spapr_vty.c b/hw/char/spapr_vty.c index 464a52342a..dd6dd2d8c3 100644 --- a/hw/char/spapr_vty.c +++ b/hw/char/spapr_vty.c @@ -8,19 +8,21 @@ #include "hw/ppc/spapr.h" #include "hw/ppc/spapr_vio.h" #include "hw/qdev-properties.h" +#include "qom/object.h" #define VTERM_BUFSIZE 16 -typedef struct SpaprVioVty { +struct SpaprVioVty { SpaprVioDevice sdev; CharBackend chardev; uint32_t in, out; uint8_t buf[VTERM_BUFSIZE]; -} SpaprVioVty; +}; +typedef struct SpaprVioVty SpaprVioVty; #define TYPE_VIO_SPAPR_VTY_DEVICE "spapr-vty" -#define VIO_SPAPR_VTY_DEVICE(obj) \ - OBJECT_CHECK(SpaprVioVty, (obj), TYPE_VIO_SPAPR_VTY_DEVICE) +DECLARE_INSTANCE_CHECKER(SpaprVioVty, VIO_SPAPR_VTY_DEVICE, + TYPE_VIO_SPAPR_VTY_DEVICE) static int vty_can_receive(void *opaque) { diff --git a/hw/char/terminal3270.c b/hw/char/terminal3270.c index 2c47ebf007..d77981bb6d 100644 --- a/hw/char/terminal3270.c +++ b/hw/char/terminal3270.c @@ -17,6 +17,7 @@ #include "chardev/char-fe.h" #include "hw/qdev-properties.h" #include "hw/s390x/3270-ccw.h" +#include "qom/object.h" /* Enough spaces for different window sizes. */ #define INPUT_BUFFER_SIZE 1000 @@ -26,7 +27,7 @@ */ #define OUTPUT_BUFFER_SIZE 2051 -typedef struct Terminal3270 { +struct Terminal3270 { EmulatedCcw3270Device cdev; CharBackend chr; uint8_t inv[INPUT_BUFFER_SIZE]; @@ -34,11 +35,12 @@ typedef struct Terminal3270 { int in_len; bool handshake_done; guint timer_tag; -} Terminal3270; +}; +typedef struct Terminal3270 Terminal3270; #define TYPE_TERMINAL_3270 "x-terminal3270" -#define TERMINAL_3270(obj) \ - OBJECT_CHECK(Terminal3270, (obj), TYPE_TERMINAL_3270) +DECLARE_INSTANCE_CHECKER(Terminal3270, TERMINAL_3270, + TYPE_TERMINAL_3270) static int terminal_can_read(void *opaque) { diff --git a/hw/char/trace-events b/hw/char/trace-events index d20eafd56f..2442a9f7d5 100644 --- a/hw/char/trace-events +++ b/hw/char/trace-events @@ -98,5 +98,5 @@ exynos_uart_rxsize(uint32_t channel, uint32_t size) "UART%d: Rx FIFO size: %d" exynos_uart_channel_error(uint32_t channel) "Wrong UART channel number: %d" exynos_uart_rx_timeout(uint32_t channel, uint32_t stat, uint32_t intsp) "UART%d: Rx timeout stat=0x%x intsp=0x%x" -# hw/char/cadence_uart.c +# cadence_uart.c cadence_uart_baudrate(unsigned baudrate) "baudrate %u" diff --git a/hw/char/virtio-console.c b/hw/char/virtio-console.c index 4f46753ea3..bc752cf90f 100644 --- a/hw/char/virtio-console.c +++ b/hw/char/virtio-console.c @@ -19,17 +19,19 @@ #include "hw/virtio/virtio-serial.h" #include "qapi/error.h" #include "qapi/qapi-events-char.h" +#include "qom/object.h" #define TYPE_VIRTIO_CONSOLE_SERIAL_PORT "virtserialport" -#define VIRTIO_CONSOLE(obj) \ - OBJECT_CHECK(VirtConsole, (obj), TYPE_VIRTIO_CONSOLE_SERIAL_PORT) +typedef struct VirtConsole VirtConsole; +DECLARE_INSTANCE_CHECKER(VirtConsole, VIRTIO_CONSOLE, + TYPE_VIRTIO_CONSOLE_SERIAL_PORT) -typedef struct VirtConsole { +struct VirtConsole { VirtIOSerialPort parent_obj; CharBackend chr; guint watch; -} VirtConsole; +}; /* * Callback function that's called from chardevs when backend becomes diff --git a/hw/char/xilinx_uartlite.c b/hw/char/xilinx_uartlite.c index ae4ccd00c7..8e9f9cd9ec 100644 --- a/hw/char/xilinx_uartlite.c +++ b/hw/char/xilinx_uartlite.c @@ -29,6 +29,7 @@ #include "hw/sysbus.h" #include "qemu/module.h" #include "chardev/char-fe.h" +#include "qom/object.h" #define DUART(x) @@ -52,10 +53,11 @@ #define CONTROL_IE 0x10 #define TYPE_XILINX_UARTLITE "xlnx.xps-uartlite" -#define XILINX_UARTLITE(obj) \ - OBJECT_CHECK(XilinxUARTLite, (obj), TYPE_XILINX_UARTLITE) +typedef struct XilinxUARTLite XilinxUARTLite; +DECLARE_INSTANCE_CHECKER(XilinxUARTLite, XILINX_UARTLITE, + TYPE_XILINX_UARTLITE) -typedef struct XilinxUARTLite { +struct XilinxUARTLite { SysBusDevice parent_obj; MemoryRegion mmio; @@ -67,7 +69,7 @@ typedef struct XilinxUARTLite { unsigned int rx_fifo_len; uint32_t regs[R_MAX]; -} XilinxUARTLite; +}; static void uart_update_irq(XilinxUARTLite *s) { diff --git a/hw/core/irq.c b/hw/core/irq.c index fb3045b912..8a9cbdd556 100644 --- a/hw/core/irq.c +++ b/hw/core/irq.c @@ -26,7 +26,8 @@ #include "hw/irq.h" #include "qom/object.h" -#define IRQ(obj) OBJECT_CHECK(struct IRQState, (obj), TYPE_IRQ) +DECLARE_INSTANCE_CHECKER(struct IRQState, IRQ, + TYPE_IRQ) struct IRQState { Object parent_obj; diff --git a/hw/cpu/realview_mpcore.c b/hw/cpu/realview_mpcore.c index 96f4d2517a..fb547aceef 100644 --- a/hw/cpu/realview_mpcore.c +++ b/hw/cpu/realview_mpcore.c @@ -15,15 +15,17 @@ #include "hw/intc/realview_gic.h" #include "hw/irq.h" #include "hw/qdev-properties.h" +#include "qom/object.h" #define TYPE_REALVIEW_MPCORE_RIRQ "realview_mpcore" -#define REALVIEW_MPCORE_RIRQ(obj) \ - OBJECT_CHECK(mpcore_rirq_state, (obj), TYPE_REALVIEW_MPCORE_RIRQ) +typedef struct mpcore_rirq_state mpcore_rirq_state; +DECLARE_INSTANCE_CHECKER(mpcore_rirq_state, REALVIEW_MPCORE_RIRQ, + TYPE_REALVIEW_MPCORE_RIRQ) /* Dummy PIC to route IRQ lines. The baseboard has 4 independent IRQ controllers. The output of these, plus some of the raw input lines are fed into a single SMP-aware interrupt controller on the CPU. */ -typedef struct { +struct mpcore_rirq_state { SysBusDevice parent_obj; qemu_irq cpuic[32]; @@ -32,7 +34,7 @@ typedef struct { ARM11MPCorePriveState priv; RealViewGICState gic[4]; -} mpcore_rirq_state; +}; /* Map baseboard IRQs onto CPU IRQ lines. */ static const int mpcore_irq_map[32] = { diff --git a/hw/display/ads7846.c b/hw/display/ads7846.c index 56bf82fe07..4b87ee7135 100644 --- a/hw/display/ads7846.c +++ b/hw/display/ads7846.c @@ -16,8 +16,9 @@ #include "migration/vmstate.h" #include "qemu/module.h" #include "ui/console.h" +#include "qom/object.h" -typedef struct { +struct ADS7846State { SSISlave ssidev; qemu_irq interrupt; @@ -27,10 +28,12 @@ typedef struct { int cycle; int output; -} ADS7846State; +}; +typedef struct ADS7846State ADS7846State; #define TYPE_ADS7846 "ads7846" -#define ADS7846(obj) OBJECT_CHECK(ADS7846State, (obj), TYPE_ADS7846) +DECLARE_INSTANCE_CHECKER(ADS7846State, ADS7846, + TYPE_ADS7846) /* Control-byte bitfields */ #define CB_PD0 (1 << 0) diff --git a/hw/display/artist.c b/hw/display/artist.c index 955296d3d8..80cd66e41d 100644 --- a/hw/display/artist.c +++ b/hw/display/artist.c @@ -22,9 +22,12 @@ #include "ui/console.h" #include "trace.h" #include "framebuffer.h" +#include "qom/object.h" #define TYPE_ARTIST "artist" -#define ARTIST(obj) OBJECT_CHECK(ARTISTState, (obj), TYPE_ARTIST) +typedef struct ARTISTState ARTISTState; +DECLARE_INSTANCE_CHECKER(ARTISTState, ARTIST, + TYPE_ARTIST) #ifdef HOST_WORDS_BIGENDIAN #define ROP8OFF(_i) (3 - (_i)) @@ -40,7 +43,7 @@ struct vram_buffer { unsigned int height; }; -typedef struct ARTISTState { +struct ARTISTState { SysBusDevice parent_obj; QemuConsole *con; @@ -103,7 +106,7 @@ typedef struct ARTISTState { uint32_t font_write_pos_y; int draw_line_pattern; -} ARTISTState; +}; typedef enum { ARTIST_BUFFER_AP = 1, diff --git a/hw/display/ati_int.h b/hw/display/ati_int.h index 2a16708e4f..714005447d 100644 --- a/hw/display/ati_int.h +++ b/hw/display/ati_int.h @@ -13,6 +13,7 @@ #include "hw/pci/pci.h" #include "hw/i2c/bitbang_i2c.h" #include "vga_int.h" +#include "qom/object.h" /*#define DEBUG_ATI*/ @@ -29,7 +30,9 @@ #define PCI_DEVICE_ID_ATI_RADEON_QY 0x5159 #define TYPE_ATI_VGA "ati-vga" -#define ATI_VGA(obj) OBJECT_CHECK(ATIVGAState, (obj), TYPE_ATI_VGA) +typedef struct ATIVGAState ATIVGAState; +DECLARE_INSTANCE_CHECKER(ATIVGAState, ATI_VGA, + TYPE_ATI_VGA) typedef struct ATIVGARegs { uint32_t mm_index; @@ -82,7 +85,7 @@ typedef struct ATIVGARegs { uint32_t default_sc_bottom_right; } ATIVGARegs; -typedef struct ATIVGAState { +struct ATIVGAState { PCIDevice dev; VGACommonState vga; char *model; @@ -97,7 +100,7 @@ typedef struct ATIVGAState { MemoryRegion io; MemoryRegion mm; ATIVGARegs regs; -} ATIVGAState; +}; const char *ati_reg_name(int num); diff --git a/hw/display/bochs-display.c b/hw/display/bochs-display.c index a8e8ab8325..41587388c4 100644 --- a/hw/display/bochs-display.c +++ b/hw/display/bochs-display.c @@ -18,6 +18,7 @@ #include "ui/console.h" #include "ui/qemu-pixman.h" +#include "qom/object.h" typedef struct BochsDisplayMode { pixman_format_code_t format; @@ -29,7 +30,7 @@ typedef struct BochsDisplayMode { uint64_t size; } BochsDisplayMode; -typedef struct BochsDisplayState { +struct BochsDisplayState { /* parent */ PCIDevice pci; @@ -53,11 +54,12 @@ typedef struct BochsDisplayState { /* device state */ BochsDisplayMode mode; -} BochsDisplayState; +}; +typedef struct BochsDisplayState BochsDisplayState; #define TYPE_BOCHS_DISPLAY "bochs-display" -#define BOCHS_DISPLAY(obj) OBJECT_CHECK(BochsDisplayState, (obj), \ - TYPE_BOCHS_DISPLAY) +DECLARE_INSTANCE_CHECKER(BochsDisplayState, BOCHS_DISPLAY, + TYPE_BOCHS_DISPLAY) static const VMStateDescription vmstate_bochs_display = { .name = "bochs-display", diff --git a/hw/display/cg3.c b/hw/display/cg3.c index 7cbe6e56ff..d66ba9ad6a 100644 --- a/hw/display/cg3.c +++ b/hw/display/cg3.c @@ -36,6 +36,7 @@ #include "qemu/log.h" #include "qemu/module.h" #include "trace.h" +#include "qom/object.h" /* Change to 1 to enable debugging */ #define DEBUG_CG3 0 @@ -65,9 +66,11 @@ #define CG3_VRAM_OFFSET 0x800000 #define TYPE_CG3 "cgthree" -#define CG3(obj) OBJECT_CHECK(CG3State, (obj), TYPE_CG3) +typedef struct CG3State CG3State; +DECLARE_INSTANCE_CHECKER(CG3State, CG3, + TYPE_CG3) -typedef struct CG3State { +struct CG3State { SysBusDevice parent_obj; QemuConsole *con; @@ -82,7 +85,7 @@ typedef struct CG3State { uint8_t r[256], g[256], b[256]; uint16_t width, height, depth; uint8_t dac_index, dac_state; -} CG3State; +}; static void cg3_update_display(void *opaque) { diff --git a/hw/display/cirrus_vga.c b/hw/display/cirrus_vga.c index 41e71af08a..c088f38cf8 100644 --- a/hw/display/cirrus_vga.c +++ b/hw/display/cirrus_vga.c @@ -44,6 +44,7 @@ #include "migration/vmstate.h" #include "ui/pixel_ops.h" #include "cirrus_vga_internal.h" +#include "qom/object.h" /* * TODO: @@ -178,14 +179,15 @@ typedef void (*cirrus_fill_t)(struct CirrusVGAState *s, uint32_t dstaddr, int dst_pitch, int width, int height); -typedef struct PCICirrusVGAState { +struct PCICirrusVGAState { PCIDevice dev; CirrusVGAState cirrus_vga; -} PCICirrusVGAState; +}; +typedef struct PCICirrusVGAState PCICirrusVGAState; #define TYPE_PCI_CIRRUS_VGA "cirrus-vga" -#define PCI_CIRRUS_VGA(obj) \ - OBJECT_CHECK(PCICirrusVGAState, (obj), TYPE_PCI_CIRRUS_VGA) +DECLARE_INSTANCE_CHECKER(PCICirrusVGAState, PCI_CIRRUS_VGA, + TYPE_PCI_CIRRUS_VGA) static uint8_t rop_to_index[256]; diff --git a/hw/display/cirrus_vga_isa.c b/hw/display/cirrus_vga_isa.c index 825ba57298..e6adee1df4 100644 --- a/hw/display/cirrus_vga_isa.c +++ b/hw/display/cirrus_vga_isa.c @@ -30,16 +30,18 @@ #include "hw/qdev-properties.h" #include "hw/isa/isa.h" #include "cirrus_vga_internal.h" +#include "qom/object.h" #define TYPE_ISA_CIRRUS_VGA "isa-cirrus-vga" -#define ISA_CIRRUS_VGA(obj) \ - OBJECT_CHECK(ISACirrusVGAState, (obj), TYPE_ISA_CIRRUS_VGA) +typedef struct ISACirrusVGAState ISACirrusVGAState; +DECLARE_INSTANCE_CHECKER(ISACirrusVGAState, ISA_CIRRUS_VGA, + TYPE_ISA_CIRRUS_VGA) -typedef struct ISACirrusVGAState { +struct ISACirrusVGAState { ISADevice parent_obj; CirrusVGAState cirrus_vga; -} ISACirrusVGAState; +}; static void isa_cirrus_vga_realizefn(DeviceState *dev, Error **errp) { diff --git a/hw/display/exynos4210_fimd.c b/hw/display/exynos4210_fimd.c index 4b7286b7c9..3ef8698eb7 100644 --- a/hw/display/exynos4210_fimd.c +++ b/hw/display/exynos4210_fimd.c @@ -32,6 +32,7 @@ #include "qemu/bswap.h" #include "qemu/module.h" #include "qemu/log.h" +#include "qom/object.h" /* Debug messages configuration */ #define EXYNOS4210_FIMD_DEBUG 0 @@ -293,10 +294,11 @@ struct Exynos4210fimdWindow { }; #define TYPE_EXYNOS4210_FIMD "exynos4210.fimd" -#define EXYNOS4210_FIMD(obj) \ - OBJECT_CHECK(Exynos4210fimdState, (obj), TYPE_EXYNOS4210_FIMD) +typedef struct Exynos4210fimdState Exynos4210fimdState; +DECLARE_INSTANCE_CHECKER(Exynos4210fimdState, EXYNOS4210_FIMD, + TYPE_EXYNOS4210_FIMD) -typedef struct { +struct Exynos4210fimdState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -325,7 +327,7 @@ typedef struct { uint8_t *ifb; /* Internal frame buffer */ bool invalidate; /* Image needs to be redrawn */ bool enabled; /* Display controller is enabled */ -} Exynos4210fimdState; +}; /* Perform byte/halfword/word swap of data according to WINCON */ static inline void fimd_swap_data(unsigned int swap_ctl, uint64_t *data) diff --git a/hw/display/g364fb.c b/hw/display/g364fb.c index adcba96e34..4a32fe4c94 100644 --- a/hw/display/g364fb.c +++ b/hw/display/g364fb.c @@ -29,6 +29,7 @@ #include "trace.h" #include "hw/sysbus.h" #include "migration/vmstate.h" +#include "qom/object.h" typedef struct G364State { /* hardware */ @@ -486,13 +487,15 @@ static void g364fb_init(DeviceState *dev, G364State *s) } #define TYPE_G364 "sysbus-g364" -#define G364(obj) OBJECT_CHECK(G364SysBusState, (obj), TYPE_G364) +typedef struct G364SysBusState G364SysBusState; +DECLARE_INSTANCE_CHECKER(G364SysBusState, G364, + TYPE_G364) -typedef struct { +struct G364SysBusState { SysBusDevice parent_obj; G364State g364; -} G364SysBusState; +}; static void g364fb_sysbus_realize(DeviceState *dev, Error **errp) { diff --git a/hw/display/jazz_led.c b/hw/display/jazz_led.c index 1d845597f9..647d05f602 100644 --- a/hw/display/jazz_led.c +++ b/hw/display/jazz_led.c @@ -29,22 +29,25 @@ #include "trace.h" #include "hw/sysbus.h" #include "migration/vmstate.h" +#include "qom/object.h" typedef enum { REDRAW_NONE = 0, REDRAW_SEGMENTS = 1, REDRAW_BACKGROUND = 2, } screen_state_t; #define TYPE_JAZZ_LED "jazz-led" -#define JAZZ_LED(obj) OBJECT_CHECK(LedState, (obj), TYPE_JAZZ_LED) +typedef struct LedState LedState; +DECLARE_INSTANCE_CHECKER(LedState, JAZZ_LED, + TYPE_JAZZ_LED) -typedef struct LedState { +struct LedState { SysBusDevice parent_obj; MemoryRegion iomem; uint8_t segments; QemuConsole *con; screen_state_t state; -} LedState; +}; static uint64_t jazz_led_read(void *opaque, hwaddr addr, unsigned int size) diff --git a/hw/display/milkymist-tmu2.c b/hw/display/milkymist-tmu2.c index c34ef1a1bf..8a9e7c23fb 100644 --- a/hw/display/milkymist-tmu2.c +++ b/hw/display/milkymist-tmu2.c @@ -38,6 +38,7 @@ #include <X11/Xlib.h> #include <epoxy/gl.h> #include <epoxy/glx.h> +#include "qom/object.h" enum { R_CTL = 0, @@ -82,8 +83,9 @@ struct vertex { } QEMU_PACKED; #define TYPE_MILKYMIST_TMU2 "milkymist-tmu2" -#define MILKYMIST_TMU2(obj) \ - OBJECT_CHECK(MilkymistTMU2State, (obj), TYPE_MILKYMIST_TMU2) +typedef struct MilkymistTMU2State MilkymistTMU2State; +DECLARE_INSTANCE_CHECKER(MilkymistTMU2State, MILKYMIST_TMU2, + TYPE_MILKYMIST_TMU2) struct MilkymistTMU2State { SysBusDevice parent_obj; @@ -98,7 +100,6 @@ struct MilkymistTMU2State { GLXFBConfig glx_fb_config; GLXContext glx_context; }; -typedef struct MilkymistTMU2State MilkymistTMU2State; static const int glx_fbconfig_attr[] = { GLX_GREEN_SIZE, 5, diff --git a/hw/display/milkymist-vgafb.c b/hw/display/milkymist-vgafb.c index 6a6441e6ea..2c879129fb 100644 --- a/hw/display/milkymist-vgafb.c +++ b/hw/display/milkymist-vgafb.c @@ -32,6 +32,7 @@ #include "ui/pixel_ops.h" #include "qemu/error-report.h" #include "qemu/module.h" +#include "qom/object.h" #define BITS 8 #include "migration/vmstate.h" @@ -68,8 +69,9 @@ enum { }; #define TYPE_MILKYMIST_VGAFB "milkymist-vgafb" -#define MILKYMIST_VGAFB(obj) \ - OBJECT_CHECK(MilkymistVgafbState, (obj), TYPE_MILKYMIST_VGAFB) +typedef struct MilkymistVgafbState MilkymistVgafbState; +DECLARE_INSTANCE_CHECKER(MilkymistVgafbState, MILKYMIST_VGAFB, + TYPE_MILKYMIST_VGAFB) struct MilkymistVgafbState { SysBusDevice parent_obj; @@ -84,7 +86,6 @@ struct MilkymistVgafbState { uint32_t regs[R_MAX]; }; -typedef struct MilkymistVgafbState MilkymistVgafbState; static int vgafb_enabled(MilkymistVgafbState *s) { diff --git a/hw/display/next-fb.c b/hw/display/next-fb.c index b0513a8fba..94db0202a3 100644 --- a/hw/display/next-fb.c +++ b/hw/display/next-fb.c @@ -30,8 +30,11 @@ #include "framebuffer.h" #include "ui/pixel_ops.h" #include "hw/m68k/next-cube.h" +#include "qom/object.h" -#define NEXTFB(obj) OBJECT_CHECK(NeXTFbState, (obj), TYPE_NEXTFB) +typedef struct NeXTFbState NeXTFbState; +DECLARE_INSTANCE_CHECKER(NeXTFbState, NEXTFB, + TYPE_NEXTFB) struct NeXTFbState { SysBusDevice parent_obj; @@ -44,7 +47,6 @@ struct NeXTFbState { uint32_t rows; int invalidate; }; -typedef struct NeXTFbState NeXTFbState; static void nextfb_draw_line(void *opaque, uint8_t *d, const uint8_t *s, int width, int pitch) diff --git a/hw/display/pl110.c b/hw/display/pl110.c index 61fefbffb3..af51a2b9e7 100644 --- a/hw/display/pl110.c +++ b/hw/display/pl110.c @@ -17,6 +17,7 @@ #include "qemu/timer.h" #include "qemu/log.h" #include "qemu/module.h" +#include "qom/object.h" #define PL110_CR_EN 0x001 #define PL110_CR_BGR 0x100 @@ -48,9 +49,11 @@ enum pl110_version }; #define TYPE_PL110 "pl110" -#define PL110(obj) OBJECT_CHECK(PL110State, (obj), TYPE_PL110) +typedef struct PL110State PL110State; +DECLARE_INSTANCE_CHECKER(PL110State, PL110, + TYPE_PL110) -typedef struct PL110State { +struct PL110State { SysBusDevice parent_obj; MemoryRegion iomem; @@ -73,7 +76,7 @@ typedef struct PL110State { uint32_t palette[256]; uint32_t raw_palette[128]; qemu_irq irq; -} PL110State; +}; static int vmstate_pl110_post_load(void *opaque, int version_id); diff --git a/hw/display/qxl.h b/hw/display/qxl.h index 707631a1f5..714cd01b63 100644 --- a/hw/display/qxl.h +++ b/hw/display/qxl.h @@ -8,6 +8,7 @@ #include "ui/qemu-spice.h" #include "ui/spice-display.h" +#include "qom/object.h" enum qxl_mode { QXL_MODE_UNDEFINED, @@ -27,7 +28,7 @@ enum qxl_mode { #define QXL_PAGE_BITS 12 #define QXL_PAGE_SIZE (1 << QXL_PAGE_BITS); -typedef struct PCIQXLDevice { +struct PCIQXLDevice { PCIDevice pci; PortioList vga_port_list; SimpleSpiceDisplay ssd; @@ -126,10 +127,12 @@ typedef struct PCIQXLDevice { int num_dirty_rects; QXLRect dirty[QXL_NUM_DIRTY_RECTS]; QEMUBH *update_area_bh; -} PCIQXLDevice; +}; +typedef struct PCIQXLDevice PCIQXLDevice; #define TYPE_PCI_QXL "pci-qxl" -#define PCI_QXL(obj) OBJECT_CHECK(PCIQXLDevice, (obj), TYPE_PCI_QXL) +DECLARE_INSTANCE_CHECKER(PCIQXLDevice, PCI_QXL, + TYPE_PCI_QXL) #define PANIC_ON(x) if ((x)) { \ printf("%s: PANIC %s failed\n", __func__, #x); \ diff --git a/hw/display/ramfb-standalone.c b/hw/display/ramfb-standalone.c index b18db97eeb..8c0094397f 100644 --- a/hw/display/ramfb-standalone.c +++ b/hw/display/ramfb-standalone.c @@ -5,14 +5,17 @@ #include "hw/qdev-properties.h" #include "hw/display/ramfb.h" #include "ui/console.h" +#include "qom/object.h" -#define RAMFB(obj) OBJECT_CHECK(RAMFBStandaloneState, (obj), TYPE_RAMFB_DEVICE) +typedef struct RAMFBStandaloneState RAMFBStandaloneState; +DECLARE_INSTANCE_CHECKER(RAMFBStandaloneState, RAMFB, + TYPE_RAMFB_DEVICE) -typedef struct RAMFBStandaloneState { +struct RAMFBStandaloneState { SysBusDevice parent_obj; QemuConsole *con; RAMFBState *state; -} RAMFBStandaloneState; +}; static void display_update_wrapper(void *dev) { diff --git a/hw/display/sii9022.c b/hw/display/sii9022.c index 3b82a8567f..d88166f449 100644 --- a/hw/display/sii9022.c +++ b/hw/display/sii9022.c @@ -19,6 +19,7 @@ #include "migration/vmstate.h" #include "hw/display/i2c-ddc.h" #include "trace.h" +#include "qom/object.h" #define SII9022_SYS_CTRL_DATA 0x1a #define SII9022_SYS_CTRL_PWR_DWN 0x10 @@ -35,16 +36,18 @@ #define SII9022_INT_STATUS_PLUGGED 0x04; #define TYPE_SII9022 "sii9022" -#define SII9022(obj) OBJECT_CHECK(sii9022_state, (obj), TYPE_SII9022) +typedef struct sii9022_state sii9022_state; +DECLARE_INSTANCE_CHECKER(sii9022_state, SII9022, + TYPE_SII9022) -typedef struct sii9022_state { +struct sii9022_state { I2CSlave parent_obj; uint8_t ptr; bool addr_byte; bool ddc_req; bool ddc_skip_finish; bool ddc; -} sii9022_state; +}; static const VMStateDescription vmstate_sii9022 = { .name = "sii9022", diff --git a/hw/display/sm501.c b/hw/display/sm501.c index 9cccc68c35..51120c6c3e 100644 --- a/hw/display/sm501.c +++ b/hw/display/sm501.c @@ -40,6 +40,7 @@ #include "ui/pixel_ops.h" #include "qemu/bswap.h" #include "trace.h" +#include "qom/object.h" #define MMIO_BASE_OFFSET 0x3e00000 #define MMIO_SIZE 0x200000 @@ -1931,10 +1932,11 @@ static const VMStateDescription vmstate_sm501_state = { }; #define TYPE_SYSBUS_SM501 "sysbus-sm501" -#define SYSBUS_SM501(obj) \ - OBJECT_CHECK(SM501SysBusState, (obj), TYPE_SYSBUS_SM501) +typedef struct SM501SysBusState SM501SysBusState; +DECLARE_INSTANCE_CHECKER(SM501SysBusState, SYSBUS_SM501, + TYPE_SYSBUS_SM501) -typedef struct { +struct SM501SysBusState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -1942,7 +1944,7 @@ typedef struct { uint32_t vram_size; uint32_t base; SerialMM serial; -} SM501SysBusState; +}; static void sm501_realize_sysbus(DeviceState *dev, Error **errp) { @@ -2034,15 +2036,17 @@ static const TypeInfo sm501_sysbus_info = { }; #define TYPE_PCI_SM501 "sm501" -#define PCI_SM501(obj) OBJECT_CHECK(SM501PCIState, (obj), TYPE_PCI_SM501) +typedef struct SM501PCIState SM501PCIState; +DECLARE_INSTANCE_CHECKER(SM501PCIState, PCI_SM501, + TYPE_PCI_SM501) -typedef struct { +struct SM501PCIState { /*< private >*/ PCIDevice parent_obj; /*< public >*/ SM501State state; uint32_t vram_size; -} SM501PCIState; +}; static void sm501_realize_pci(PCIDevice *dev, Error **errp) { diff --git a/hw/display/ssd0303.c b/hw/display/ssd0303.c index 718378f6de..0378573a42 100644 --- a/hw/display/ssd0303.c +++ b/hw/display/ssd0303.c @@ -16,6 +16,7 @@ #include "migration/vmstate.h" #include "qemu/module.h" #include "ui/console.h" +#include "qom/object.h" //#define DEBUG_SSD0303 1 @@ -46,9 +47,11 @@ enum ssd0303_cmd { }; #define TYPE_SSD0303 "ssd0303" -#define SSD0303(obj) OBJECT_CHECK(ssd0303_state, (obj), TYPE_SSD0303) +typedef struct ssd0303_state ssd0303_state; +DECLARE_INSTANCE_CHECKER(ssd0303_state, SSD0303, + TYPE_SSD0303) -typedef struct { +struct ssd0303_state { I2CSlave parent_obj; QemuConsole *con; @@ -63,7 +66,7 @@ typedef struct { enum ssd0303_mode mode; enum ssd0303_cmd cmd_state; uint8_t framebuffer[132*8]; -} ssd0303_state; +}; static uint8_t ssd0303_recv(I2CSlave *i2c) { diff --git a/hw/display/ssd0323.c b/hw/display/ssd0323.c index 32d27f008a..037da81127 100644 --- a/hw/display/ssd0323.c +++ b/hw/display/ssd0323.c @@ -16,6 +16,7 @@ #include "migration/vmstate.h" #include "qemu/module.h" #include "ui/console.h" +#include "qom/object.h" //#define DEBUG_SSD0323 1 @@ -47,7 +48,7 @@ enum ssd0323_mode SSD0323_DATA }; -typedef struct { +struct ssd0323_state { SSISlave ssidev; QemuConsole *con; @@ -64,10 +65,12 @@ typedef struct { int32_t remap; uint32_t mode; uint8_t framebuffer[128 * 80 / 2]; -} ssd0323_state; +}; +typedef struct ssd0323_state ssd0323_state; #define TYPE_SSD0323 "ssd0323" -#define SSD0323(obj) OBJECT_CHECK(ssd0323_state, (obj), TYPE_SSD0323) +DECLARE_INSTANCE_CHECKER(ssd0323_state, SSD0323, + TYPE_SSD0323) static uint32_t ssd0323_transfer(SSISlave *dev, uint32_t data) diff --git a/hw/display/tcx.c b/hw/display/tcx.c index 1fb45b1aab..69e901a800 100644 --- a/hw/display/tcx.c +++ b/hw/display/tcx.c @@ -33,6 +33,7 @@ #include "migration/vmstate.h" #include "qemu/error-report.h" #include "qemu/module.h" +#include "qom/object.h" #define TCX_ROM_FILE "QEMU,tcx.bin" #define FCODE_MAX_ROM_SIZE 0x10000 @@ -55,9 +56,11 @@ #define TCX_THC_CURSBITS 0x980 #define TYPE_TCX "SUNW,tcx" -#define TCX(obj) OBJECT_CHECK(TCXState, (obj), TYPE_TCX) +typedef struct TCXState TCXState; +DECLARE_INSTANCE_CHECKER(TCXState, TCX, + TYPE_TCX) -typedef struct TCXState { +struct TCXState { SysBusDevice parent_obj; QemuConsole *con; @@ -93,7 +96,7 @@ typedef struct TCXState { uint32_t cursbits[32]; uint16_t cursx; uint16_t cursy; -} TCXState; +}; static void tcx_set_dirty(TCXState *s, ram_addr_t addr, int len) { diff --git a/hw/display/trace-events b/hw/display/trace-events index 970d6bac5d..957b8ba994 100644 --- a/hw/display/trace-events +++ b/hw/display/trace-events @@ -32,9 +32,11 @@ vmware_scratch_read(uint32_t index, uint32_t value) "index %d, value 0x%x" vmware_scratch_write(uint32_t index, uint32_t value) "index %d, value 0x%x" vmware_setmode(uint32_t w, uint32_t h, uint32_t bpp) "%dx%d @ %d bpp" +# virtio-gpu-base.c +virtio_gpu_features(bool virgl) "virgl %d" + # virtio-gpu-3d.c # virtio-gpu.c -virtio_gpu_features(bool virgl) "virgl %d" virtio_gpu_cmd_get_display_info(void) "" virtio_gpu_cmd_get_edid(uint32_t scanout) "scanout %d" virtio_gpu_cmd_set_scanout(uint32_t id, uint32_t res, uint32_t w, uint32_t h, uint32_t x, uint32_t y) "id %d, res 0x%x, w %d, h %d, x %d, y %d" diff --git a/hw/display/vga-isa.c b/hw/display/vga-isa.c index 3aaeeeca1e..0ebfcca9d1 100644 --- a/hw/display/vga-isa.c +++ b/hw/display/vga-isa.c @@ -32,17 +32,20 @@ #include "qemu/timer.h" #include "hw/loader.h" #include "hw/qdev-properties.h" +#include "qom/object.h" #define TYPE_ISA_VGA "isa-vga" -#define ISA_VGA(obj) OBJECT_CHECK(ISAVGAState, (obj), TYPE_ISA_VGA) +typedef struct ISAVGAState ISAVGAState; +DECLARE_INSTANCE_CHECKER(ISAVGAState, ISA_VGA, + TYPE_ISA_VGA) -typedef struct ISAVGAState { +struct ISAVGAState { ISADevice parent_obj; struct VGACommonState state; PortioList portio_vga; PortioList portio_vbe; -} ISAVGAState; +}; static void vga_isa_reset(DeviceState *dev) { diff --git a/hw/display/vga-pci.c b/hw/display/vga-pci.c index a640fd866d..3b45fa3bad 100644 --- a/hw/display/vga-pci.c +++ b/hw/display/vga-pci.c @@ -34,6 +34,7 @@ #include "qemu/timer.h" #include "hw/loader.h" #include "hw/display/edid.h" +#include "qom/object.h" enum vga_pci_flags { PCI_VGA_FLAG_ENABLE_MMIO = 1, @@ -41,7 +42,7 @@ enum vga_pci_flags { PCI_VGA_FLAG_ENABLE_EDID = 3, }; -typedef struct PCIVGAState { +struct PCIVGAState { PCIDevice dev; VGACommonState vga; uint32_t flags; @@ -49,10 +50,12 @@ typedef struct PCIVGAState { MemoryRegion mmio; MemoryRegion mrs[4]; uint8_t edid[256]; -} PCIVGAState; +}; +typedef struct PCIVGAState PCIVGAState; #define TYPE_PCI_VGA "pci-vga" -#define PCI_VGA(obj) OBJECT_CHECK(PCIVGAState, (obj), TYPE_PCI_VGA) +DECLARE_INSTANCE_CHECKER(PCIVGAState, PCI_VGA, + TYPE_PCI_VGA) static const VMStateDescription vmstate_vga_pci = { .name = "vga", diff --git a/hw/display/vhost-user-gpu-pci.c b/hw/display/vhost-user-gpu-pci.c index 23ce655e0f..a02b23ecaf 100644 --- a/hw/display/vhost-user-gpu-pci.c +++ b/hw/display/vhost-user-gpu-pci.c @@ -11,16 +11,18 @@ #include "qemu/osdep.h" #include "qapi/error.h" #include "hw/virtio/virtio-gpu-pci.h" +#include "qom/object.h" #define TYPE_VHOST_USER_GPU_PCI "vhost-user-gpu-pci" -#define VHOST_USER_GPU_PCI(obj) \ - OBJECT_CHECK(VhostUserGPUPCI, (obj), TYPE_VHOST_USER_GPU_PCI) +typedef struct VhostUserGPUPCI VhostUserGPUPCI; +DECLARE_INSTANCE_CHECKER(VhostUserGPUPCI, VHOST_USER_GPU_PCI, + TYPE_VHOST_USER_GPU_PCI) -typedef struct VhostUserGPUPCI { +struct VhostUserGPUPCI { VirtIOGPUPCIBase parent_obj; VhostUserGPU vdev; -} VhostUserGPUPCI; +}; static void vhost_user_gpu_pci_initfn(Object *obj) { diff --git a/hw/display/vhost-user-vga.c b/hw/display/vhost-user-vga.c index 1690f6b610..a34a99856d 100644 --- a/hw/display/vhost-user-vga.c +++ b/hw/display/vhost-user-vga.c @@ -11,17 +11,19 @@ #include "qemu/osdep.h" #include "qapi/error.h" #include "virtio-vga.h" +#include "qom/object.h" #define TYPE_VHOST_USER_VGA "vhost-user-vga" -#define VHOST_USER_VGA(obj) \ - OBJECT_CHECK(VhostUserVGA, (obj), TYPE_VHOST_USER_VGA) +typedef struct VhostUserVGA VhostUserVGA; +DECLARE_INSTANCE_CHECKER(VhostUserVGA, VHOST_USER_VGA, + TYPE_VHOST_USER_VGA) -typedef struct VhostUserVGA { +struct VhostUserVGA { VirtIOVGABase parent_obj; VhostUserGPU vdev; -} VhostUserVGA; +}; static void vhost_user_vga_inst_initfn(Object *obj) { @@ -39,7 +41,7 @@ static void vhost_user_vga_inst_initfn(Object *obj) static const VirtioPCIDeviceTypeInfo vhost_user_vga_info = { .generic_name = TYPE_VHOST_USER_VGA, .parent = TYPE_VIRTIO_VGA_BASE, - .instance_size = sizeof(struct VhostUserVGA), + .instance_size = sizeof(VhostUserVGA), .instance_init = vhost_user_vga_inst_initfn, }; diff --git a/hw/display/virtio-gpu-pci.c b/hw/display/virtio-gpu-pci.c index 34d8e93f28..d742a30aec 100644 --- a/hw/display/virtio-gpu-pci.c +++ b/hw/display/virtio-gpu-pci.c @@ -19,6 +19,7 @@ #include "hw/virtio/virtio.h" #include "hw/virtio/virtio-bus.h" #include "hw/virtio/virtio-gpu-pci.h" +#include "qom/object.h" static Property virtio_gpu_pci_base_properties[] = { DEFINE_VIRTIO_GPU_PCI_PROPERTIES(VirtIOPCIProxy), @@ -65,13 +66,14 @@ static const TypeInfo virtio_gpu_pci_base_info = { }; #define TYPE_VIRTIO_GPU_PCI "virtio-gpu-pci" -#define VIRTIO_GPU_PCI(obj) \ - OBJECT_CHECK(VirtIOGPUPCI, (obj), TYPE_VIRTIO_GPU_PCI) +typedef struct VirtIOGPUPCI VirtIOGPUPCI; +DECLARE_INSTANCE_CHECKER(VirtIOGPUPCI, VIRTIO_GPU_PCI, + TYPE_VIRTIO_GPU_PCI) -typedef struct VirtIOGPUPCI { +struct VirtIOGPUPCI { VirtIOGPUPCIBase parent_obj; VirtIOGPU vdev; -} VirtIOGPUPCI; +}; static void virtio_gpu_initfn(Object *obj) { diff --git a/hw/display/virtio-vga.c b/hw/display/virtio-vga.c index f533d7d1b4..573e7d5928 100644 --- a/hw/display/virtio-vga.c +++ b/hw/display/virtio-vga.c @@ -5,6 +5,7 @@ #include "qapi/error.h" #include "qemu/module.h" #include "virtio-vga.h" +#include "qom/object.h" static void virtio_vga_base_invalidate_display(void *opaque) { @@ -194,22 +195,23 @@ static void virtio_vga_base_class_init(ObjectClass *klass, void *data) static TypeInfo virtio_vga_base_info = { .name = TYPE_VIRTIO_VGA_BASE, .parent = TYPE_VIRTIO_PCI, - .instance_size = sizeof(struct VirtIOVGABase), - .class_size = sizeof(struct VirtIOVGABaseClass), + .instance_size = sizeof(VirtIOVGABase), + .class_size = sizeof(VirtIOVGABaseClass), .class_init = virtio_vga_base_class_init, .abstract = true, }; #define TYPE_VIRTIO_VGA "virtio-vga" -#define VIRTIO_VGA(obj) \ - OBJECT_CHECK(VirtIOVGA, (obj), TYPE_VIRTIO_VGA) +typedef struct VirtIOVGA VirtIOVGA; +DECLARE_INSTANCE_CHECKER(VirtIOVGA, VIRTIO_VGA, + TYPE_VIRTIO_VGA) -typedef struct VirtIOVGA { +struct VirtIOVGA { VirtIOVGABase parent_obj; VirtIOGPU vdev; -} VirtIOVGA; +}; static void virtio_vga_inst_initfn(Object *obj) { @@ -224,7 +226,7 @@ static void virtio_vga_inst_initfn(Object *obj) static VirtioPCIDeviceTypeInfo virtio_vga_info = { .generic_name = TYPE_VIRTIO_VGA, .parent = TYPE_VIRTIO_VGA_BASE, - .instance_size = sizeof(struct VirtIOVGA), + .instance_size = sizeof(VirtIOVGA), .instance_init = virtio_vga_inst_initfn, }; diff --git a/hw/display/virtio-vga.h b/hw/display/virtio-vga.h index c41281a010..5c5671c9c1 100644 --- a/hw/display/virtio-vga.h +++ b/hw/display/virtio-vga.h @@ -3,30 +3,27 @@ #include "hw/virtio/virtio-gpu-pci.h" #include "vga_int.h" +#include "qom/object.h" /* * virtio-vga-base: This extends VirtioPCIProxy. */ #define TYPE_VIRTIO_VGA_BASE "virtio-vga-base" -#define VIRTIO_VGA_BASE(obj) \ - OBJECT_CHECK(VirtIOVGABase, (obj), TYPE_VIRTIO_VGA_BASE) -#define VIRTIO_VGA_BASE_GET_CLASS(obj) \ - OBJECT_GET_CLASS(VirtIOVGABaseClass, obj, TYPE_VIRTIO_VGA_BASE) -#define VIRTIO_VGA_BASE_CLASS(klass) \ - OBJECT_CLASS_CHECK(VirtIOVGABaseClass, klass, TYPE_VIRTIO_VGA_BASE) +OBJECT_DECLARE_TYPE(VirtIOVGABase, VirtIOVGABaseClass, + virtio_vga_base, VIRTIO_VGA_BASE) -typedef struct VirtIOVGABase { +struct VirtIOVGABase { VirtIOPCIProxy parent_obj; VirtIOGPUBase *vgpu; VGACommonState vga; MemoryRegion vga_mrs[3]; -} VirtIOVGABase; +}; -typedef struct VirtIOVGABaseClass { +struct VirtIOVGABaseClass { VirtioPCIClass parent_class; DeviceReset parent_reset; -} VirtIOVGABaseClass; +}; #endif /* VIRTIO_VGA_H */ diff --git a/hw/display/vmware_vga.c b/hw/display/vmware_vga.c index 2579f6b218..bef0d7d69a 100644 --- a/hw/display/vmware_vga.c +++ b/hw/display/vmware_vga.c @@ -33,6 +33,7 @@ #include "hw/pci/pci.h" #include "hw/qdev-properties.h" #include "migration/vmstate.h" +#include "qom/object.h" #undef VERBOSE #define HW_RECT_ACCEL @@ -85,8 +86,8 @@ struct vmsvga_state_s { #define TYPE_VMWARE_SVGA "vmware-svga" -#define VMWARE_SVGA(obj) \ - OBJECT_CHECK(struct pci_vmsvga_state_s, (obj), TYPE_VMWARE_SVGA) +DECLARE_INSTANCE_CHECKER(struct pci_vmsvga_state_s, VMWARE_SVGA, + TYPE_VMWARE_SVGA) struct pci_vmsvga_state_s { /*< private >*/ diff --git a/hw/dma/i82374.c b/hw/dma/i82374.c index 6977d85ef8..5b7ff635f7 100644 --- a/hw/dma/i82374.c +++ b/hw/dma/i82374.c @@ -29,9 +29,12 @@ #include "hw/qdev-properties.h" #include "migration/vmstate.h" #include "hw/dma/i8257.h" +#include "qom/object.h" #define TYPE_I82374 "i82374" -#define I82374(obj) OBJECT_CHECK(I82374State, (obj), TYPE_I82374) +typedef struct I82374State I82374State; +DECLARE_INSTANCE_CHECKER(I82374State, I82374, + TYPE_I82374) //#define DEBUG_I82374 @@ -45,13 +48,13 @@ do {} while (0) #define BADF(fmt, ...) \ do { fprintf(stderr, "i82374 ERROR: " fmt , ## __VA_ARGS__); } while (0) -typedef struct I82374State { +struct I82374State { ISADevice parent_obj; uint32_t iobase; uint8_t commands[8]; PortioList port_list; -} I82374State; +}; static const VMStateDescription vmstate_i82374 = { .name = "i82374", diff --git a/hw/dma/pl330.c b/hw/dma/pl330.c index 0bd63a43f5..859586fd2f 100644 --- a/hw/dma/pl330.c +++ b/hw/dma/pl330.c @@ -26,6 +26,7 @@ #include "qemu/log.h" #include "qemu/module.h" #include "trace.h" +#include "qom/object.h" #ifndef PL330_ERR_DEBUG #define PL330_ERR_DEBUG 0 @@ -271,7 +272,8 @@ struct PL330State { }; #define TYPE_PL330 "pl330" -#define PL330(obj) OBJECT_CHECK(PL330State, (obj), TYPE_PL330) +DECLARE_INSTANCE_CHECKER(PL330State, PL330, + TYPE_PL330) static const VMStateDescription vmstate_pl330 = { .name = "pl330", diff --git a/hw/dma/puv3_dma.c b/hw/dma/puv3_dma.c index 7fa979180f..825e3dc0ac 100644 --- a/hw/dma/puv3_dma.c +++ b/hw/dma/puv3_dma.c @@ -11,6 +11,7 @@ #include "qemu/osdep.h" #include "hw/sysbus.h" +#include "qom/object.h" #undef DEBUG_PUV3 #include "hw/unicore32/puv3.h" @@ -22,14 +23,16 @@ #define PUV3_DMA_CH(offset) ((offset) >> 8) #define TYPE_PUV3_DMA "puv3_dma" -#define PUV3_DMA(obj) OBJECT_CHECK(PUV3DMAState, (obj), TYPE_PUV3_DMA) +typedef struct PUV3DMAState PUV3DMAState; +DECLARE_INSTANCE_CHECKER(PUV3DMAState, PUV3_DMA, + TYPE_PUV3_DMA) -typedef struct PUV3DMAState { +struct PUV3DMAState { SysBusDevice parent_obj; MemoryRegion iomem; uint32_t reg_CFG[PUV3_DMA_CH_NR]; -} PUV3DMAState; +}; static uint64_t puv3_dma_read(void *opaque, hwaddr offset, unsigned size) diff --git a/hw/dma/pxa2xx_dma.c b/hw/dma/pxa2xx_dma.c index 78b2849bcb..4f6c0e5e5e 100644 --- a/hw/dma/pxa2xx_dma.c +++ b/hw/dma/pxa2xx_dma.c @@ -18,6 +18,7 @@ #include "migration/vmstate.h" #include "qapi/error.h" #include "qemu/module.h" +#include "qom/object.h" #define PXA255_DMA_NUM_CHANNELS 16 #define PXA27X_DMA_NUM_CHANNELS 32 @@ -34,9 +35,11 @@ typedef struct { } PXA2xxDMAChannel; #define TYPE_PXA2XX_DMA "pxa2xx-dma" -#define PXA2XX_DMA(obj) OBJECT_CHECK(PXA2xxDMAState, (obj), TYPE_PXA2XX_DMA) +typedef struct PXA2xxDMAState PXA2xxDMAState; +DECLARE_INSTANCE_CHECKER(PXA2xxDMAState, PXA2XX_DMA, + TYPE_PXA2XX_DMA) -typedef struct PXA2xxDMAState { +struct PXA2xxDMAState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -58,7 +61,7 @@ typedef struct PXA2xxDMAState { /* Flag to avoid recursive DMA invocations. */ int running; -} PXA2xxDMAState; +}; #define DCSR0 0x0000 /* DMA Control / Status register for Channel 0 */ #define DCSR31 0x007c /* DMA Control / Status register for Channel 31 */ diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c index 7eddc9a776..c584815d06 100644 --- a/hw/dma/rc4030.c +++ b/hw/dma/rc4030.c @@ -34,6 +34,7 @@ #include "qemu/module.h" #include "exec/address-spaces.h" #include "trace.h" +#include "qom/object.h" /********************************************************/ /* rc4030 emulation */ @@ -55,12 +56,13 @@ typedef struct dma_pagetable_entry { #define DMA_FLAG_ADDR_INTR 0x0400 #define TYPE_RC4030 "rc4030" -#define RC4030(obj) \ - OBJECT_CHECK(rc4030State, (obj), TYPE_RC4030) +typedef struct rc4030State rc4030State; +DECLARE_INSTANCE_CHECKER(rc4030State, RC4030, + TYPE_RC4030) #define TYPE_RC4030_IOMMU_MEMORY_REGION "rc4030-iommu-memory-region" -typedef struct rc4030State { +struct rc4030State { SysBusDevice parent; @@ -101,7 +103,7 @@ typedef struct rc4030State { MemoryRegion iomem_chipset; MemoryRegion iomem_jazzio; -} rc4030State; +}; static void set_next_tick(rc4030State *s) { diff --git a/hw/dma/sparc32_dma.c b/hw/dma/sparc32_dma.c index bcd1626fbd..d20a5bc065 100644 --- a/hw/dma/sparc32_dma.c +++ b/hw/dma/sparc32_dma.c @@ -303,7 +303,7 @@ static void sparc32_espdma_device_realize(DeviceState *dev, Error **errp) d = qdev_new(TYPE_ESP); object_property_add_child(OBJECT(dev), "esp", OBJECT(d)); - sysbus = ESP_STATE(d); + sysbus = ESP(d); esp = &sysbus->esp; esp->dma_memory_read = espdma_memory_read; esp->dma_memory_write = espdma_memory_write; diff --git a/hw/dma/xilinx_axidma.c b/hw/dma/xilinx_axidma.c index a4812e480a..498fc17d8a 100644 --- a/hw/dma/xilinx_axidma.c +++ b/hw/dma/xilinx_axidma.c @@ -35,6 +35,7 @@ #include "sysemu/dma.h" #include "hw/stream.h" +#include "qom/object.h" #define D(x) @@ -42,16 +43,16 @@ #define TYPE_XILINX_AXI_DMA_DATA_STREAM "xilinx-axi-dma-data-stream" #define TYPE_XILINX_AXI_DMA_CONTROL_STREAM "xilinx-axi-dma-control-stream" -#define XILINX_AXI_DMA(obj) \ - OBJECT_CHECK(XilinxAXIDMA, (obj), TYPE_XILINX_AXI_DMA) +typedef struct XilinxAXIDMA XilinxAXIDMA; +DECLARE_INSTANCE_CHECKER(XilinxAXIDMA, XILINX_AXI_DMA, + TYPE_XILINX_AXI_DMA) -#define XILINX_AXI_DMA_DATA_STREAM(obj) \ - OBJECT_CHECK(XilinxAXIDMAStreamSlave, (obj),\ - TYPE_XILINX_AXI_DMA_DATA_STREAM) +typedef struct XilinxAXIDMAStreamSlave XilinxAXIDMAStreamSlave; +DECLARE_INSTANCE_CHECKER(XilinxAXIDMAStreamSlave, XILINX_AXI_DMA_DATA_STREAM, + TYPE_XILINX_AXI_DMA_DATA_STREAM) -#define XILINX_AXI_DMA_CONTROL_STREAM(obj) \ - OBJECT_CHECK(XilinxAXIDMAStreamSlave, (obj),\ - TYPE_XILINX_AXI_DMA_CONTROL_STREAM) +DECLARE_INSTANCE_CHECKER(XilinxAXIDMAStreamSlave, XILINX_AXI_DMA_CONTROL_STREAM, + TYPE_XILINX_AXI_DMA_CONTROL_STREAM) #define R_DMACR (0x00 / 4) #define R_DMASR (0x04 / 4) @@ -62,8 +63,6 @@ #define CONTROL_PAYLOAD_WORDS 5 #define CONTROL_PAYLOAD_SIZE (CONTROL_PAYLOAD_WORDS * (sizeof(uint32_t))) -typedef struct XilinxAXIDMA XilinxAXIDMA; -typedef struct XilinxAXIDMAStreamSlave XilinxAXIDMAStreamSlave; enum { DMACR_RUNSTOP = 1, @@ -634,7 +633,7 @@ static const TypeInfo axidma_info = { static const TypeInfo xilinx_axidma_data_stream_info = { .name = TYPE_XILINX_AXI_DMA_DATA_STREAM, .parent = TYPE_OBJECT, - .instance_size = sizeof(struct XilinxAXIDMAStreamSlave), + .instance_size = sizeof(XilinxAXIDMAStreamSlave), .class_init = xilinx_axidma_stream_class_init, .class_data = &xilinx_axidma_data_stream_class, .interfaces = (InterfaceInfo[]) { @@ -646,7 +645,7 @@ static const TypeInfo xilinx_axidma_data_stream_info = { static const TypeInfo xilinx_axidma_control_stream_info = { .name = TYPE_XILINX_AXI_DMA_CONTROL_STREAM, .parent = TYPE_OBJECT, - .instance_size = sizeof(struct XilinxAXIDMAStreamSlave), + .instance_size = sizeof(XilinxAXIDMAStreamSlave), .class_init = xilinx_axidma_stream_class_init, .class_data = &xilinx_axidma_control_stream_class, .interfaces = (InterfaceInfo[]) { diff --git a/hw/gpio/gpio_key.c b/hw/gpio/gpio_key.c index 46bbd42772..86aa78aae4 100644 --- a/hw/gpio/gpio_key.c +++ b/hw/gpio/gpio_key.c @@ -28,17 +28,20 @@ #include "migration/vmstate.h" #include "qemu/module.h" #include "qemu/timer.h" +#include "qom/object.h" #define TYPE_GPIOKEY "gpio-key" -#define GPIOKEY(obj) OBJECT_CHECK(GPIOKEYState, (obj), TYPE_GPIOKEY) +typedef struct GPIOKEYState GPIOKEYState; +DECLARE_INSTANCE_CHECKER(GPIOKEYState, GPIOKEY, + TYPE_GPIOKEY) #define GPIO_KEY_LATENCY 100 /* 100ms */ -typedef struct GPIOKEYState { +struct GPIOKEYState { SysBusDevice parent_obj; QEMUTimer *timer; qemu_irq irq; -} GPIOKEYState; +}; static const VMStateDescription vmstate_gpio_key = { .name = "gpio-key", diff --git a/hw/gpio/max7310.c b/hw/gpio/max7310.c index 3e298c2d34..2888d071ac 100644 --- a/hw/gpio/max7310.c +++ b/hw/gpio/max7310.c @@ -15,11 +15,14 @@ #include "migration/vmstate.h" #include "qemu/log.h" #include "qemu/module.h" +#include "qom/object.h" #define TYPE_MAX7310 "max7310" -#define MAX7310(obj) OBJECT_CHECK(MAX7310State, (obj), TYPE_MAX7310) +typedef struct MAX7310State MAX7310State; +DECLARE_INSTANCE_CHECKER(MAX7310State, MAX7310, + TYPE_MAX7310) -typedef struct MAX7310State { +struct MAX7310State { I2CSlave parent_obj; int i2c_command_byte; @@ -32,7 +35,7 @@ typedef struct MAX7310State { uint8_t command; qemu_irq handler[8]; qemu_irq *gpio_in; -} MAX7310State; +}; static void max7310_reset(DeviceState *dev) { diff --git a/hw/gpio/mpc8xxx.c b/hw/gpio/mpc8xxx.c index 1d99667094..dac8b1be38 100644 --- a/hw/gpio/mpc8xxx.c +++ b/hw/gpio/mpc8xxx.c @@ -24,11 +24,14 @@ #include "hw/sysbus.h" #include "migration/vmstate.h" #include "qemu/module.h" +#include "qom/object.h" #define TYPE_MPC8XXX_GPIO "mpc8xxx_gpio" -#define MPC8XXX_GPIO(obj) OBJECT_CHECK(MPC8XXXGPIOState, (obj), TYPE_MPC8XXX_GPIO) +typedef struct MPC8XXXGPIOState MPC8XXXGPIOState; +DECLARE_INSTANCE_CHECKER(MPC8XXXGPIOState, MPC8XXX_GPIO, + TYPE_MPC8XXX_GPIO) -typedef struct MPC8XXXGPIOState { +struct MPC8XXXGPIOState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -41,7 +44,7 @@ typedef struct MPC8XXXGPIOState { uint32_t ier; uint32_t imr; uint32_t icr; -} MPC8XXXGPIOState; +}; static const VMStateDescription vmstate_mpc8xxx_gpio = { .name = "mpc8xxx_gpio", diff --git a/hw/gpio/pl061.c b/hw/gpio/pl061.c index 6d3c36bc16..3420df0d1f 100644 --- a/hw/gpio/pl061.c +++ b/hw/gpio/pl061.c @@ -14,6 +14,7 @@ #include "migration/vmstate.h" #include "qemu/log.h" #include "qemu/module.h" +#include "qom/object.h" //#define DEBUG_PL061 1 @@ -34,11 +35,13 @@ static const uint8_t pl061_id_luminary[12] = { 0x00, 0x00, 0x00, 0x00, 0x61, 0x00, 0x18, 0x01, 0x0d, 0xf0, 0x05, 0xb1 }; #define TYPE_PL061 "pl061" -#define PL061(obj) OBJECT_CHECK(PL061State, (obj), TYPE_PL061) +typedef struct PL061State PL061State; +DECLARE_INSTANCE_CHECKER(PL061State, PL061, + TYPE_PL061) #define N_GPIOS 8 -typedef struct PL061State { +struct PL061State { SysBusDevice parent_obj; MemoryRegion iomem; @@ -67,7 +70,7 @@ typedef struct PL061State { qemu_irq out[N_GPIOS]; const unsigned char *id; uint32_t rsvd_start; /* reserved area: [rsvd_start, 0xfcc] */ -} PL061State; +}; static const VMStateDescription vmstate_pl061 = { .name = "pl061", diff --git a/hw/gpio/puv3_gpio.c b/hw/gpio/puv3_gpio.c index 7362b6715f..98ea2b4c2e 100644 --- a/hw/gpio/puv3_gpio.c +++ b/hw/gpio/puv3_gpio.c @@ -11,6 +11,7 @@ #include "qemu/osdep.h" #include "hw/sysbus.h" +#include "qom/object.h" #undef DEBUG_PUV3 #include "hw/unicore32/puv3.h" @@ -18,9 +19,11 @@ #include "qemu/log.h" #define TYPE_PUV3_GPIO "puv3_gpio" -#define PUV3_GPIO(obj) OBJECT_CHECK(PUV3GPIOState, (obj), TYPE_PUV3_GPIO) +typedef struct PUV3GPIOState PUV3GPIOState; +DECLARE_INSTANCE_CHECKER(PUV3GPIOState, PUV3_GPIO, + TYPE_PUV3_GPIO) -typedef struct PUV3GPIOState { +struct PUV3GPIOState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -29,7 +32,7 @@ typedef struct PUV3GPIOState { uint32_t reg_GPLR; uint32_t reg_GPDR; uint32_t reg_GPIR; -} PUV3GPIOState; +}; static uint64_t puv3_gpio_read(void *opaque, hwaddr offset, unsigned size) diff --git a/hw/gpio/zaurus.c b/hw/gpio/zaurus.c index 258e926493..3d25c55d06 100644 --- a/hw/gpio/zaurus.c +++ b/hw/gpio/zaurus.c @@ -23,13 +23,15 @@ #include "migration/vmstate.h" #include "qemu/module.h" #include "qemu/log.h" +#include "qom/object.h" /* SCOOP devices */ #define TYPE_SCOOP "scoop" -#define SCOOP(obj) OBJECT_CHECK(ScoopInfo, (obj), TYPE_SCOOP) - typedef struct ScoopInfo ScoopInfo; +DECLARE_INSTANCE_CHECKER(ScoopInfo, SCOOP, + TYPE_SCOOP) + struct ScoopInfo { SysBusDevice parent_obj; diff --git a/hw/hppa/dino.c b/hw/hppa/dino.c index 7f0c6223a8..c0c9b8a2b8 100644 --- a/hw/hppa/dino.c +++ b/hw/hppa/dino.c @@ -22,6 +22,7 @@ #include "hppa_sys.h" #include "exec/address-spaces.h" #include "trace.h" +#include "qom/object.h" #define TYPE_DINO_PCI_HOST_BRIDGE "dino-pcihost" @@ -80,8 +81,9 @@ #define DINO_MEM_CHUNK_SIZE (8 * MiB) -#define DINO_PCI_HOST_BRIDGE(obj) \ - OBJECT_CHECK(DinoState, (obj), TYPE_DINO_PCI_HOST_BRIDGE) +typedef struct DinoState DinoState; +DECLARE_INSTANCE_CHECKER(DinoState, DINO_PCI_HOST_BRIDGE, + TYPE_DINO_PCI_HOST_BRIDGE) #define DINO800_REGS (1 + (DINO_TLTIM - DINO_GMASK) / 4) static const uint32_t reg800_keep_bits[DINO800_REGS] = { @@ -100,7 +102,7 @@ static const uint32_t reg800_keep_bits[DINO800_REGS] = { MAKE_64BIT_MASK(0, 9), /* TLTIM */ }; -typedef struct DinoState { +struct DinoState { PCIHostState parent_obj; /* PCI_CONFIG_ADDR is parent_obj.config_reg, via pci_host_conf_be_ops, @@ -129,7 +131,7 @@ typedef struct DinoState { MemoryRegion bm_ram_alias; MemoryRegion bm_pci_alias; MemoryRegion bm_cpu_alias; -} DinoState; +}; /* * Dino can forward memory accesses from the CPU in the range between diff --git a/hw/hppa/lasi.c b/hw/hppa/lasi.c index 194aa3e619..c0b970f55c 100644 --- a/hw/hppa/lasi.c +++ b/hw/hppa/lasi.c @@ -26,6 +26,7 @@ #include "hw/input/lasips2.h" #include "exec/address-spaces.h" #include "migration/vmstate.h" +#include "qom/object.h" #define TYPE_LASI_CHIP "lasi-chip" @@ -52,10 +53,11 @@ #define ICR_BUS_ERROR_BIT LASI_BIT(8) /* bit 8 in ICR */ #define ICR_TOC_BIT LASI_BIT(1) /* bit 1 in ICR */ -#define LASI_CHIP(obj) \ - OBJECT_CHECK(LasiState, (obj), TYPE_LASI_CHIP) +typedef struct LasiState LasiState; +DECLARE_INSTANCE_CHECKER(LasiState, LASI_CHIP, + TYPE_LASI_CHIP) -typedef struct LasiState { +struct LasiState { PCIHostState parent_obj; uint32_t irr; @@ -70,7 +72,7 @@ typedef struct LasiState { time_t rtc_ref; MemoryRegion this_mem; -} LasiState; +}; static bool lasi_chip_mem_valid(void *opaque, hwaddr addr, unsigned size, bool is_write, diff --git a/hw/hyperv/hyperv.c b/hw/hyperv/hyperv.c index 844d00776d..aa5a2a9bd8 100644 --- a/hw/hyperv/hyperv.c +++ b/hw/hyperv/hyperv.c @@ -20,8 +20,9 @@ #include "qemu/rcu.h" #include "qemu/rcu_queue.h" #include "hw/hyperv/hyperv.h" +#include "qom/object.h" -typedef struct SynICState { +struct SynICState { DeviceState parent_obj; CPUState *cs; @@ -33,10 +34,12 @@ typedef struct SynICState { MemoryRegion event_page_mr; struct hyperv_message_page *msg_page; struct hyperv_event_flags_page *event_page; -} SynICState; +}; +typedef struct SynICState SynICState; #define TYPE_SYNIC "hyperv-synic" -#define SYNIC(obj) OBJECT_CHECK(SynICState, (obj), TYPE_SYNIC) +DECLARE_INSTANCE_CHECKER(SynICState, SYNIC, + TYPE_SYNIC) static bool synic_enabled; diff --git a/hw/hyperv/hyperv_testdev.c b/hw/hyperv/hyperv_testdev.c index 88a5a63782..f6ee98e00c 100644 --- a/hw/hyperv/hyperv_testdev.c +++ b/hw/hyperv/hyperv_testdev.c @@ -17,6 +17,7 @@ #include "qemu/queue.h" #include "hw/isa/isa.h" #include "hw/hyperv/hyperv.h" +#include "qom/object.h" typedef struct TestSintRoute { QLIST_ENTRY(TestSintRoute) le; @@ -49,8 +50,8 @@ struct HypervTestDev { typedef struct HypervTestDev HypervTestDev; #define TYPE_HYPERV_TEST_DEV "hyperv-testdev" -#define HYPERV_TEST_DEV(obj) \ - OBJECT_CHECK(HypervTestDev, (obj), TYPE_HYPERV_TEST_DEV) +DECLARE_INSTANCE_CHECKER(HypervTestDev, HYPERV_TEST_DEV, + TYPE_HYPERV_TEST_DEV) enum { HV_TEST_DEV_SINT_ROUTE_CREATE = 1, diff --git a/hw/hyperv/trace-events b/hw/hyperv/trace-events index ba5bd62d61..b4c35ca8e3 100644 --- a/hw/hyperv/trace-events +++ b/hw/hyperv/trace-events @@ -1,4 +1,4 @@ -# vmbus +# vmbus.c vmbus_recv_message(uint32_t type, uint32_t size) "type %d size %d" vmbus_signal_event(void) "" vmbus_channel_notify_guest(uint32_t chan_id) "channel #%d" diff --git a/hw/i2c/bitbang_i2c.c b/hw/i2c/bitbang_i2c.c index b000952b98..c1b9f298d9 100644 --- a/hw/i2c/bitbang_i2c.c +++ b/hw/i2c/bitbang_i2c.c @@ -15,6 +15,7 @@ #include "hw/i2c/bitbang_i2c.h" #include "hw/sysbus.h" #include "qemu/module.h" +#include "qom/object.h" //#define DEBUG_BITBANG_I2C @@ -162,16 +163,18 @@ void bitbang_i2c_init(bitbang_i2c_interface *s, I2CBus *bus) /* GPIO interface. */ #define TYPE_GPIO_I2C "gpio_i2c" -#define GPIO_I2C(obj) OBJECT_CHECK(GPIOI2CState, (obj), TYPE_GPIO_I2C) +typedef struct GPIOI2CState GPIOI2CState; +DECLARE_INSTANCE_CHECKER(GPIOI2CState, GPIO_I2C, + TYPE_GPIO_I2C) -typedef struct GPIOI2CState { +struct GPIOI2CState { SysBusDevice parent_obj; MemoryRegion dummy_iomem; bitbang_i2c_interface bitbang; int last_level; qemu_irq out; -} GPIOI2CState; +}; static void bitbang_i2c_gpio_set(void *opaque, int irq, int level) { diff --git a/hw/i2c/exynos4210_i2c.c b/hw/i2c/exynos4210_i2c.c index a600f65560..ff82226e9f 100644 --- a/hw/i2c/exynos4210_i2c.c +++ b/hw/i2c/exynos4210_i2c.c @@ -27,14 +27,16 @@ #include "migration/vmstate.h" #include "hw/i2c/i2c.h" #include "hw/irq.h" +#include "qom/object.h" #ifndef EXYNOS4_I2C_DEBUG #define EXYNOS4_I2C_DEBUG 0 #endif #define TYPE_EXYNOS4_I2C "exynos4210.i2c" -#define EXYNOS4_I2C(obj) \ - OBJECT_CHECK(Exynos4210I2CState, (obj), TYPE_EXYNOS4_I2C) +typedef struct Exynos4210I2CState Exynos4210I2CState; +DECLARE_INSTANCE_CHECKER(Exynos4210I2CState, EXYNOS4_I2C, + TYPE_EXYNOS4_I2C) /* Exynos4210 I2C memory map */ #define EXYNOS4_I2C_MEM_SIZE 0x14 @@ -83,7 +85,7 @@ static const char *exynos4_i2c_get_regname(unsigned offset) #define DPRINT(fmt, args...) do { } while (0) #endif -typedef struct Exynos4210I2CState { +struct Exynos4210I2CState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -96,7 +98,7 @@ typedef struct Exynos4210I2CState { uint8_t i2cds; uint8_t i2clc; bool scl_free; -} Exynos4210I2CState; +}; static inline void exynos4210_i2c_raise_interrupt(Exynos4210I2CState *s) { diff --git a/hw/i2c/mpc_i2c.c b/hw/i2c/mpc_i2c.c index 9a724f3a3e..156a25a8e9 100644 --- a/hw/i2c/mpc_i2c.c +++ b/hw/i2c/mpc_i2c.c @@ -24,6 +24,7 @@ #include "qemu/module.h" #include "hw/sysbus.h" #include "migration/vmstate.h" +#include "qom/object.h" /* #define DEBUG_I2C */ @@ -36,8 +37,9 @@ #endif #define TYPE_MPC_I2C "mpc-i2c" -#define MPC_I2C(obj) \ - OBJECT_CHECK(MPCI2CState, (obj), TYPE_MPC_I2C) +typedef struct MPCI2CState MPCI2CState; +DECLARE_INSTANCE_CHECKER(MPCI2CState, MPC_I2C, + TYPE_MPC_I2C) #define MPC_I2C_ADR 0x00 #define MPC_I2C_FDR 0x04 @@ -70,7 +72,7 @@ #define CYCLE_RESET 0xFF -typedef struct MPCI2CState { +struct MPCI2CState { SysBusDevice parent_obj; I2CBus *bus; @@ -84,7 +86,7 @@ typedef struct MPCI2CState { uint8_t sr; uint8_t dr; uint8_t dfssr; -} MPCI2CState; +}; static bool mpc_i2c_is_enabled(MPCI2CState *s) { diff --git a/hw/i2c/smbus_eeprom.c b/hw/i2c/smbus_eeprom.c index b7def9eeb8..c6777844cf 100644 --- a/hw/i2c/smbus_eeprom.c +++ b/hw/i2c/smbus_eeprom.c @@ -31,23 +31,25 @@ #include "hw/qdev-properties.h" #include "migration/vmstate.h" #include "hw/i2c/smbus_eeprom.h" +#include "qom/object.h" //#define DEBUG #define TYPE_SMBUS_EEPROM "smbus-eeprom" -#define SMBUS_EEPROM(obj) \ - OBJECT_CHECK(SMBusEEPROMDevice, (obj), TYPE_SMBUS_EEPROM) +typedef struct SMBusEEPROMDevice SMBusEEPROMDevice; +DECLARE_INSTANCE_CHECKER(SMBusEEPROMDevice, SMBUS_EEPROM, + TYPE_SMBUS_EEPROM) #define SMBUS_EEPROM_SIZE 256 -typedef struct SMBusEEPROMDevice { +struct SMBusEEPROMDevice { SMBusDevice smbusdev; uint8_t data[SMBUS_EEPROM_SIZE]; uint8_t *init_data; uint8_t offset; bool accessed; -} SMBusEEPROMDevice; +}; static uint8_t eeprom_receive_byte(SMBusDevice *dev) { diff --git a/hw/i2c/smbus_ich9.c b/hw/i2c/smbus_ich9.c index 48f1ff4191..2d4578511d 100644 --- a/hw/i2c/smbus_ich9.c +++ b/hw/i2c/smbus_ich9.c @@ -28,17 +28,19 @@ #include "qemu/module.h" #include "hw/i386/ich9.h" +#include "qom/object.h" -#define ICH9_SMB_DEVICE(obj) \ - OBJECT_CHECK(ICH9SMBState, (obj), TYPE_ICH9_SMB_DEVICE) +typedef struct ICH9SMBState ICH9SMBState; +DECLARE_INSTANCE_CHECKER(ICH9SMBState, ICH9_SMB_DEVICE, + TYPE_ICH9_SMB_DEVICE) -typedef struct ICH9SMBState { +struct ICH9SMBState { PCIDevice dev; bool irq_enabled; PMSMBus smb; -} ICH9SMBState; +}; static bool ich9_vmstate_need_smbus(void *opaque, int version_id) { diff --git a/hw/i2c/versatile_i2c.c b/hw/i2c/versatile_i2c.c index da8cda2ec1..3a04ba3969 100644 --- a/hw/i2c/versatile_i2c.c +++ b/hw/i2c/versatile_i2c.c @@ -27,11 +27,12 @@ #include "hw/registerfields.h" #include "qemu/log.h" #include "qemu/module.h" - -#define VERSATILE_I2C(obj) \ - OBJECT_CHECK(VersatileI2CState, (obj), TYPE_VERSATILE_I2C) +#include "qom/object.h" typedef ArmSbconI2CState VersatileI2CState; +DECLARE_INSTANCE_CHECKER(VersatileI2CState, VERSATILE_I2C, + TYPE_VERSATILE_I2C) + REG32(CONTROL_GET, 0) diff --git a/hw/i386/amd_iommu.h b/hw/i386/amd_iommu.h index e05a4eff5d..fa5feb183c 100644 --- a/hw/i386/amd_iommu.h +++ b/hw/i386/amd_iommu.h @@ -23,6 +23,7 @@ #include "hw/pci/pci.h" #include "hw/i386/x86-iommu.h" +#include "qom/object.h" /* Capability registers */ #define AMDVI_CAPAB_BAR_LOW 0x04 @@ -296,8 +297,9 @@ struct irte_ga { }; #define TYPE_AMD_IOMMU_DEVICE "amd-iommu" -#define AMD_IOMMU_DEVICE(obj)\ - OBJECT_CHECK(AMDVIState, (obj), TYPE_AMD_IOMMU_DEVICE) +typedef struct AMDVIState AMDVIState; +DECLARE_INSTANCE_CHECKER(AMDVIState, AMD_IOMMU_DEVICE, + TYPE_AMD_IOMMU_DEVICE) #define TYPE_AMD_IOMMU_PCI "AMDVI-PCI" @@ -310,7 +312,7 @@ typedef struct AMDVIPCIState { PCIDevice dev; /* The PCI device itself */ } AMDVIPCIState; -typedef struct AMDVIState { +struct AMDVIState { X86IOMMUState iommu; /* IOMMU bus device */ AMDVIPCIState pci; /* IOMMU PCI device */ @@ -367,6 +369,6 @@ typedef struct AMDVIState { /* Interrupt remapping */ bool ga_enabled; -} AMDVIState; +}; #endif diff --git a/hw/i386/kvm/clock.c b/hw/i386/kvm/clock.c index 64283358f9..37f47540e5 100644 --- a/hw/i386/kvm/clock.c +++ b/hw/i386/kvm/clock.c @@ -29,11 +29,14 @@ #include <linux/kvm.h> #include "standard-headers/asm-x86/kvm_para.h" +#include "qom/object.h" #define TYPE_KVM_CLOCK "kvmclock" -#define KVM_CLOCK(obj) OBJECT_CHECK(KVMClockState, (obj), TYPE_KVM_CLOCK) +typedef struct KVMClockState KVMClockState; +DECLARE_INSTANCE_CHECKER(KVMClockState, KVM_CLOCK, + TYPE_KVM_CLOCK) -typedef struct KVMClockState { +struct KVMClockState { /*< private >*/ SysBusDevice busdev; /*< public >*/ @@ -50,7 +53,7 @@ typedef struct KVMClockState { /* whether the 'clock' value was obtained in a host with * reliable KVM_GET_CLOCK */ bool clock_is_reliable; -} KVMClockState; +}; struct pvclock_vcpu_time_info { uint32_t version; diff --git a/hw/i386/kvm/i8254.c b/hw/i386/kvm/i8254.c index 876f5aa6fa..e18fd337fa 100644 --- a/hw/i386/kvm/i8254.c +++ b/hw/i386/kvm/i8254.c @@ -33,30 +33,30 @@ #include "hw/timer/i8254.h" #include "hw/timer/i8254_internal.h" #include "sysemu/kvm.h" +#include "qom/object.h" #define KVM_PIT_REINJECT_BIT 0 #define CALIBRATION_ROUNDS 3 -#define KVM_PIT(obj) OBJECT_CHECK(KVMPITState, (obj), TYPE_KVM_I8254) -#define KVM_PIT_CLASS(class) \ - OBJECT_CLASS_CHECK(KVMPITClass, (class), TYPE_KVM_I8254) -#define KVM_PIT_GET_CLASS(obj) \ - OBJECT_GET_CLASS(KVMPITClass, (obj), TYPE_KVM_I8254) +typedef struct KVMPITClass KVMPITClass; +typedef struct KVMPITState KVMPITState; +DECLARE_OBJ_CHECKERS(KVMPITState, KVMPITClass, + KVM_PIT, TYPE_KVM_I8254) -typedef struct KVMPITState { +struct KVMPITState { PITCommonState parent_obj; LostTickPolicy lost_tick_policy; bool vm_stopped; int64_t kernel_clock_offset; -} KVMPITState; +}; -typedef struct KVMPITClass { +struct KVMPITClass { PITCommonClass parent_class; DeviceRealize parent_realize; -} KVMPITClass; +}; static int64_t abs64(int64_t v) { diff --git a/hw/i386/kvm/i8259.c b/hw/i386/kvm/i8259.c index e404fdcdac..3f8bf69e9c 100644 --- a/hw/i386/kvm/i8259.c +++ b/hw/i386/kvm/i8259.c @@ -17,22 +17,22 @@ #include "hw/i386/apic_internal.h" #include "hw/irq.h" #include "sysemu/kvm.h" +#include "qom/object.h" #define TYPE_KVM_I8259 "kvm-i8259" -#define KVM_PIC_CLASS(class) \ - OBJECT_CLASS_CHECK(KVMPICClass, (class), TYPE_KVM_I8259) -#define KVM_PIC_GET_CLASS(obj) \ - OBJECT_GET_CLASS(KVMPICClass, (obj), TYPE_KVM_I8259) +typedef struct KVMPICClass KVMPICClass; +DECLARE_CLASS_CHECKERS(KVMPICClass, KVM_PIC, + TYPE_KVM_I8259) /** * KVMPICClass: * @parent_realize: The parent's realizefn. */ -typedef struct KVMPICClass { +struct KVMPICClass { PICCommonClass parent_class; DeviceRealize parent_realize; -} KVMPICClass; +}; static void kvm_pic_get(PICCommonState *s) { diff --git a/hw/i386/kvmvapic.c b/hw/i386/kvmvapic.c index 51639202c2..a4e05f086e 100644 --- a/hw/i386/kvmvapic.c +++ b/hw/i386/kvmvapic.c @@ -22,6 +22,7 @@ #include "hw/boards.h" #include "migration/vmstate.h" #include "tcg/tcg.h" +#include "qom/object.h" #define VAPIC_IO_PORT 0x7e @@ -56,7 +57,7 @@ typedef struct GuestROMState { VAPICHandlers mp; } QEMU_PACKED GuestROMState; -typedef struct VAPICROMState { +struct VAPICROMState { SysBusDevice busdev; MemoryRegion io; MemoryRegion rom; @@ -69,10 +70,12 @@ typedef struct VAPICROMState { size_t rom_size; bool rom_mapped_writable; VMChangeStateEntry *vmsentry; -} VAPICROMState; +}; +typedef struct VAPICROMState VAPICROMState; #define TYPE_VAPIC "kvmvapic" -#define VAPIC(obj) OBJECT_CHECK(VAPICROMState, (obj), TYPE_VAPIC) +DECLARE_INSTANCE_CHECKER(VAPICROMState, VAPIC, + TYPE_VAPIC) #define TPR_INSTR_ABS_MODRM 0x1 #define TPR_INSTR_MATCH_MODRM_REG 0x2 diff --git a/hw/i386/port92.c b/hw/i386/port92.c index 19866c44ef..c00dcb261b 100644 --- a/hw/i386/port92.c +++ b/hw/i386/port92.c @@ -12,16 +12,19 @@ #include "hw/irq.h" #include "hw/i386/pc.h" #include "trace.h" +#include "qom/object.h" -#define PORT92(obj) OBJECT_CHECK(Port92State, (obj), TYPE_PORT92) +typedef struct Port92State Port92State; +DECLARE_INSTANCE_CHECKER(Port92State, PORT92, + TYPE_PORT92) -typedef struct Port92State { +struct Port92State { ISADevice parent_obj; MemoryRegion io; uint8_t outport; qemu_irq a20_out; -} Port92State; +}; static void port92_write(void *opaque, hwaddr addr, uint64_t val, unsigned size) diff --git a/hw/i386/vmmouse.c b/hw/i386/vmmouse.c index ba5c987bd2..ae4cbc7add 100644 --- a/hw/i386/vmmouse.c +++ b/hw/i386/vmmouse.c @@ -30,6 +30,7 @@ #include "hw/qdev-properties.h" #include "migration/vmstate.h" #include "cpu.h" +#include "qom/object.h" /* debug only vmmouse */ //#define DEBUG_VMMOUSE @@ -50,10 +51,11 @@ #endif #define TYPE_VMMOUSE "vmmouse" -#define VMMOUSE(obj) OBJECT_CHECK(VMMouseState, (obj), TYPE_VMMOUSE) +typedef struct VMMouseState VMMouseState; +DECLARE_INSTANCE_CHECKER(VMMouseState, VMMOUSE, + TYPE_VMMOUSE) -typedef struct VMMouseState -{ +struct VMMouseState { ISADevice parent_obj; uint32_t queue[VMMOUSE_QUEUE_SIZE]; @@ -63,7 +65,7 @@ typedef struct VMMouseState uint8_t absolute; QEMUPutMouseEntry *entry; ISAKBDState *i8042; -} VMMouseState; +}; static void vmmouse_get_data(uint32_t *data) { diff --git a/hw/i386/vmport.c b/hw/i386/vmport.c index 89bda9108e..df52b6f903 100644 --- a/hw/i386/vmport.c +++ b/hw/i386/vmport.c @@ -38,6 +38,7 @@ #include "qemu/log.h" #include "cpu.h" #include "trace.h" +#include "qom/object.h" #define VMPORT_MAGIC 0x564D5868 @@ -62,9 +63,11 @@ #define VCPU_INFO_LEGACY_X2APIC_BIT 3 #define VCPU_INFO_RESERVED_BIT 31 -#define VMPORT(obj) OBJECT_CHECK(VMPortState, (obj), TYPE_VMPORT) +typedef struct VMPortState VMPortState; +DECLARE_INSTANCE_CHECKER(VMPortState, VMPORT, + TYPE_VMPORT) -typedef struct VMPortState { +struct VMPortState { ISADevice parent_obj; MemoryRegion io; @@ -75,7 +78,7 @@ typedef struct VMPortState { uint8_t vmware_vmx_type; uint32_t compat_flags; -} VMPortState; +}; static VMPortState *port_state; diff --git a/hw/i386/xen/xen_platform.c b/hw/i386/xen/xen_platform.c index a1492fdecd..a8bbe8c833 100644 --- a/hw/i386/xen/xen_platform.c +++ b/hw/i386/xen/xen_platform.c @@ -39,6 +39,7 @@ #include "qemu/module.h" #include <xenguest.h> +#include "qom/object.h" //#define DEBUG_PLATFORM @@ -52,7 +53,7 @@ #define PFFLAG_ROM_LOCK 1 /* Sets whether ROM memory area is RW or RO */ -typedef struct PCIXenPlatformState { +struct PCIXenPlatformState { /*< private >*/ PCIDevice parent_obj; /*< public >*/ @@ -67,11 +68,12 @@ typedef struct PCIXenPlatformState { /* Log from guest drivers */ char log_buffer[4096]; int log_buffer_off; -} PCIXenPlatformState; +}; +typedef struct PCIXenPlatformState PCIXenPlatformState; #define TYPE_XEN_PLATFORM "xen-platform" -#define XEN_PLATFORM(obj) \ - OBJECT_CHECK(PCIXenPlatformState, (obj), TYPE_XEN_PLATFORM) +DECLARE_INSTANCE_CHECKER(PCIXenPlatformState, XEN_PLATFORM, + TYPE_XEN_PLATFORM) #define XEN_PLATFORM_IOPORT 0x10 diff --git a/hw/i386/xen/xen_pvdevice.c b/hw/i386/xen/xen_pvdevice.c index ee2610c7a0..67f83616d3 100644 --- a/hw/i386/xen/xen_pvdevice.c +++ b/hw/i386/xen/xen_pvdevice.c @@ -36,13 +36,15 @@ #include "hw/qdev-properties.h" #include "migration/vmstate.h" #include "trace.h" +#include "qom/object.h" #define TYPE_XEN_PV_DEVICE "xen-pvdevice" -#define XEN_PV_DEVICE(obj) \ - OBJECT_CHECK(XenPVDevice, (obj), TYPE_XEN_PV_DEVICE) +typedef struct XenPVDevice XenPVDevice; +DECLARE_INSTANCE_CHECKER(XenPVDevice, XEN_PV_DEVICE, + TYPE_XEN_PV_DEVICE) -typedef struct XenPVDevice { +struct XenPVDevice { /*< private >*/ PCIDevice parent_obj; /*< public >*/ @@ -51,7 +53,7 @@ typedef struct XenPVDevice { uint8_t revision; uint32_t size; MemoryRegion mmio; -} XenPVDevice; +}; static uint64_t xen_pv_mmio_read(void *opaque, hwaddr addr, unsigned size) diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c index b696c6291a..ee1d47ff75 100644 --- a/hw/ide/ahci.c +++ b/hw/ide/ahci.c @@ -1819,7 +1819,7 @@ type_init(sysbus_ahci_register_types) int32_t ahci_get_num_ports(PCIDevice *dev) { - AHCIPCIState *d = ICH_AHCI(dev); + AHCIPCIState *d = ICH9_AHCI(dev); AHCIState *ahci = &d->ahci; return ahci->ports; @@ -1827,7 +1827,7 @@ int32_t ahci_get_num_ports(PCIDevice *dev) void ahci_ide_create_devs(PCIDevice *dev, DriveInfo **hd) { - AHCIPCIState *d = ICH_AHCI(dev); + AHCIPCIState *d = ICH9_AHCI(dev); AHCIState *ahci = &d->ahci; int i; diff --git a/hw/ide/ich.c b/hw/ide/ich.c index eff3188fff..51cd2f38b7 100644 --- a/hw/ide/ich.c +++ b/hw/ide/ich.c @@ -91,14 +91,14 @@ static const VMStateDescription vmstate_ich9_ahci = { static void pci_ich9_reset(DeviceState *dev) { - AHCIPCIState *d = ICH_AHCI(dev); + AHCIPCIState *d = ICH9_AHCI(dev); ahci_reset(&d->ahci); } static void pci_ich9_ahci_init(Object *obj) { - struct AHCIPCIState *d = ICH_AHCI(obj); + struct AHCIPCIState *d = ICH9_AHCI(obj); ahci_init(&d->ahci, DEVICE(obj)); } @@ -108,7 +108,7 @@ static void pci_ich9_ahci_realize(PCIDevice *dev, Error **errp) struct AHCIPCIState *d; int sata_cap_offset; uint8_t *sata_cap; - d = ICH_AHCI(dev); + d = ICH9_AHCI(dev); int ret; ahci_realize(&d->ahci, DEVICE(dev), pci_get_address_space(dev), 6); @@ -154,7 +154,7 @@ static void pci_ich9_ahci_realize(PCIDevice *dev, Error **errp) static void pci_ich9_uninit(PCIDevice *dev) { struct AHCIPCIState *d; - d = ICH_AHCI(dev); + d = ICH9_AHCI(dev); msi_uninit(dev); ahci_uninit(&d->ahci); diff --git a/hw/ide/isa.c b/hw/ide/isa.c index f28c8fba6c..9a3489691b 100644 --- a/hw/ide/isa.c +++ b/hw/ide/isa.c @@ -32,14 +32,17 @@ #include "sysemu/dma.h" #include "hw/ide/internal.h" +#include "qom/object.h" /***********************************************************/ /* ISA IDE definitions */ #define TYPE_ISA_IDE "isa-ide" -#define ISA_IDE(obj) OBJECT_CHECK(ISAIDEState, (obj), TYPE_ISA_IDE) +typedef struct ISAIDEState ISAIDEState; +DECLARE_INSTANCE_CHECKER(ISAIDEState, ISA_IDE, + TYPE_ISA_IDE) -typedef struct ISAIDEState { +struct ISAIDEState { ISADevice parent_obj; IDEBus bus; @@ -47,7 +50,7 @@ typedef struct ISAIDEState { uint32_t iobase2; uint32_t isairq; qemu_irq irq; -} ISAIDEState; +}; static void isa_ide_reset(DeviceState *d) { diff --git a/hw/ide/microdrive.c b/hw/ide/microdrive.c index c4cc0a84eb..6e7f5df901 100644 --- a/hw/ide/microdrive.c +++ b/hw/ide/microdrive.c @@ -31,9 +31,12 @@ #include "sysemu/dma.h" #include "hw/ide/internal.h" +#include "qom/object.h" #define TYPE_MICRODRIVE "microdrive" -#define MICRODRIVE(obj) OBJECT_CHECK(MicroDriveState, (obj), TYPE_MICRODRIVE) +typedef struct MicroDriveState MicroDriveState; +DECLARE_INSTANCE_CHECKER(MicroDriveState, MICRODRIVE, + TYPE_MICRODRIVE) /***********************************************************/ /* CF-ATA Microdrive */ @@ -42,7 +45,7 @@ /* DSCM-1XXXX Microdrive hard disk with CF+ II / PCMCIA interface. */ -typedef struct MicroDriveState { +struct MicroDriveState { /*< private >*/ PCMCIACardState parent_obj; /*< public >*/ @@ -59,7 +62,7 @@ typedef struct MicroDriveState { uint8_t ctrl; uint16_t io; uint8_t cycle; -} MicroDriveState; +}; /* Register bitfields */ enum md_opt { diff --git a/hw/ide/mmio.c b/hw/ide/mmio.c index d233bd8c01..4bf6e3a8b7 100644 --- a/hw/ide/mmio.c +++ b/hw/ide/mmio.c @@ -31,6 +31,7 @@ #include "hw/ide/internal.h" #include "hw/qdev-properties.h" +#include "qom/object.h" /***********************************************************/ /* MMIO based ide port @@ -39,9 +40,11 @@ */ #define TYPE_MMIO_IDE "mmio-ide" -#define MMIO_IDE(obj) OBJECT_CHECK(MMIOState, (obj), TYPE_MMIO_IDE) +typedef struct MMIOIDEState MMIOState; +DECLARE_INSTANCE_CHECKER(MMIOState, MMIO_IDE, + TYPE_MMIO_IDE) -typedef struct MMIOIDEState { +struct MMIOIDEState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -51,7 +54,7 @@ typedef struct MMIOIDEState { uint32_t shift; qemu_irq irq; MemoryRegion iomem1, iomem2; -} MMIOState; +}; static void mmio_ide_reset(DeviceState *dev) { diff --git a/hw/ide/sii3112.c b/hw/ide/sii3112.c index 94d2b57f95..968c239ab8 100644 --- a/hw/ide/sii3112.c +++ b/hw/ide/sii3112.c @@ -16,9 +16,11 @@ #include "hw/ide/pci.h" #include "qemu/module.h" #include "trace.h" +#include "qom/object.h" #define TYPE_SII3112_PCI "sii3112" -#define SII3112_PCI(obj) OBJECT_CHECK(SiI3112PCIState, (obj), \ +typedef struct SiI3112PCIState SiI3112PCIState; +DECLARE_INSTANCE_CHECKER(SiI3112PCIState, SII3112_PCI, TYPE_SII3112_PCI) typedef struct SiI3112Regs { @@ -28,11 +30,11 @@ typedef struct SiI3112Regs { uint8_t swdata; } SiI3112Regs; -typedef struct SiI3112PCIState { +struct SiI3112PCIState { PCIIDEState i; MemoryRegion mmio; SiI3112Regs regs[2]; -} SiI3112PCIState; +}; /* The sii3112_reg_read and sii3112_reg_write functions implement the * Internal Register Space - BAR5 (section 6.7 of the data sheet). diff --git a/hw/input/adb-kbd.c b/hw/input/adb-kbd.c index 3cfb6a7a20..fe0c363d64 100644 --- a/hw/input/adb-kbd.c +++ b/hw/input/adb-kbd.c @@ -30,30 +30,30 @@ #include "hw/input/adb-keys.h" #include "adb-internal.h" #include "trace.h" +#include "qom/object.h" -#define ADB_KEYBOARD(obj) OBJECT_CHECK(KBDState, (obj), TYPE_ADB_KEYBOARD) +typedef struct ADBKeyboardClass ADBKeyboardClass; +typedef struct KBDState KBDState; +DECLARE_OBJ_CHECKERS(KBDState, ADBKeyboardClass, + ADB_KEYBOARD, TYPE_ADB_KEYBOARD) -typedef struct KBDState { +struct KBDState { /*< private >*/ ADBDevice parent_obj; /*< public >*/ uint8_t data[128]; int rptr, wptr, count; -} KBDState; +}; -#define ADB_KEYBOARD_CLASS(class) \ - OBJECT_CLASS_CHECK(ADBKeyboardClass, (class), TYPE_ADB_KEYBOARD) -#define ADB_KEYBOARD_GET_CLASS(obj) \ - OBJECT_GET_CLASS(ADBKeyboardClass, (obj), TYPE_ADB_KEYBOARD) -typedef struct ADBKeyboardClass { +struct ADBKeyboardClass { /*< private >*/ ADBDeviceClass parent_class; /*< public >*/ DeviceRealize parent_realize; -} ADBKeyboardClass; +}; /* The adb keyboard doesn't have every key imaginable */ #define NO_KEY 0xff diff --git a/hw/input/adb-mouse.c b/hw/input/adb-mouse.c index 577a38ff2e..f5750909b4 100644 --- a/hw/input/adb-mouse.c +++ b/hw/input/adb-mouse.c @@ -29,30 +29,30 @@ #include "qemu/module.h" #include "adb-internal.h" #include "trace.h" +#include "qom/object.h" -#define ADB_MOUSE(obj) OBJECT_CHECK(MouseState, (obj), TYPE_ADB_MOUSE) +typedef struct ADBMouseClass ADBMouseClass; +typedef struct MouseState MouseState; +DECLARE_OBJ_CHECKERS(MouseState, ADBMouseClass, + ADB_MOUSE, TYPE_ADB_MOUSE) -typedef struct MouseState { +struct MouseState { /*< public >*/ ADBDevice parent_obj; /*< private >*/ int buttons_state, last_buttons_state; int dx, dy, dz; -} MouseState; +}; -#define ADB_MOUSE_CLASS(class) \ - OBJECT_CLASS_CHECK(ADBMouseClass, (class), TYPE_ADB_MOUSE) -#define ADB_MOUSE_GET_CLASS(obj) \ - OBJECT_GET_CLASS(ADBMouseClass, (obj), TYPE_ADB_MOUSE) -typedef struct ADBMouseClass { +struct ADBMouseClass { /*< public >*/ ADBDeviceClass parent_class; /*< private >*/ DeviceRealize parent_realize; -} ADBMouseClass; +}; static void adb_mouse_event(void *opaque, int dx1, int dy1, int dz1, int buttons_state) diff --git a/hw/input/lm832x.c b/hw/input/lm832x.c index aa629ddbf1..70245fd817 100644 --- a/hw/input/lm832x.c +++ b/hw/input/lm832x.c @@ -25,11 +25,14 @@ #include "qemu/module.h" #include "qemu/timer.h" #include "ui/console.h" +#include "qom/object.h" #define TYPE_LM8323 "lm8323" -#define LM8323(obj) OBJECT_CHECK(LM823KbdState, (obj), TYPE_LM8323) +typedef struct LM823KbdState LM823KbdState; +DECLARE_INSTANCE_CHECKER(LM823KbdState, LM8323, + TYPE_LM8323) -typedef struct { +struct LM823KbdState { I2CSlave parent_obj; uint8_t i2c_dir; @@ -72,7 +75,7 @@ typedef struct { uint8_t addr[3]; QEMUTimer *tm[3]; } pwm; -} LM823KbdState; +}; #define INT_KEYPAD (1 << 0) #define INT_ERROR (1 << 3) diff --git a/hw/input/milkymist-softusb.c b/hw/input/milkymist-softusb.c index 3e0a7eb0bd..eaaf8adde4 100644 --- a/hw/input/milkymist-softusb.c +++ b/hw/input/milkymist-softusb.c @@ -32,6 +32,7 @@ #include "hw/qdev-properties.h" #include "qemu/error-report.h" #include "qemu/module.h" +#include "qom/object.h" enum { R_CTRL = 0, @@ -50,8 +51,9 @@ enum { #define COMLOC_KEVT_BASE 0x1143 #define TYPE_MILKYMIST_SOFTUSB "milkymist-softusb" -#define MILKYMIST_SOFTUSB(obj) \ - OBJECT_CHECK(MilkymistSoftUsbState, (obj), TYPE_MILKYMIST_SOFTUSB) +typedef struct MilkymistSoftUsbState MilkymistSoftUsbState; +DECLARE_INSTANCE_CHECKER(MilkymistSoftUsbState, MILKYMIST_SOFTUSB, + TYPE_MILKYMIST_SOFTUSB) struct MilkymistSoftUsbState { SysBusDevice parent_obj; @@ -80,7 +82,6 @@ struct MilkymistSoftUsbState { /* keyboard state */ uint8_t kbd_hid_buffer[8]; }; -typedef struct MilkymistSoftUsbState MilkymistSoftUsbState; static uint64_t softusb_read(void *opaque, hwaddr addr, unsigned size) diff --git a/hw/input/pl050.c b/hw/input/pl050.c index 1123037b38..7c53ae97da 100644 --- a/hw/input/pl050.c +++ b/hw/input/pl050.c @@ -14,11 +14,14 @@ #include "hw/irq.h" #include "qemu/log.h" #include "qemu/module.h" +#include "qom/object.h" #define TYPE_PL050 "pl050" -#define PL050(obj) OBJECT_CHECK(PL050State, (obj), TYPE_PL050) +typedef struct PL050State PL050State; +DECLARE_INSTANCE_CHECKER(PL050State, PL050, + TYPE_PL050) -typedef struct PL050State { +struct PL050State { SysBusDevice parent_obj; MemoryRegion iomem; @@ -29,7 +32,7 @@ typedef struct PL050State { int pending; qemu_irq irq; bool is_mouse; -} PL050State; +}; static const VMStateDescription vmstate_pl050 = { .name = "pl050", diff --git a/hw/intc/apic.c b/hw/intc/apic.c index 38aabd60cd..b6a05e5439 100644 --- a/hw/intc/apic.c +++ b/hw/intc/apic.c @@ -28,6 +28,7 @@ #include "trace.h" #include "hw/i386/apic-msidef.h" #include "qapi/error.h" +#include "qom/object.h" #define MAX_APICS 255 #define MAX_APIC_WORDS 8 @@ -39,8 +40,9 @@ static APICCommonState *local_apics[MAX_APICS + 1]; #define TYPE_APIC "apic" -#define APIC(obj) \ - OBJECT_CHECK(APICCommonState, (obj), TYPE_APIC) +/*This is reusing the APICCommonState typedef from APIC_COMMON */ +DECLARE_INSTANCE_CHECKER(APICCommonState, APIC, + TYPE_APIC) static void apic_set_irq(APICCommonState *s, int vector_num, int trigger_mode); static void apic_update_irq(APICCommonState *s); diff --git a/hw/intc/arm_gic_kvm.c b/hw/intc/arm_gic_kvm.c index 07b95143c9..9494185cf4 100644 --- a/hw/intc/arm_gic_kvm.c +++ b/hw/intc/arm_gic_kvm.c @@ -29,20 +29,19 @@ #include "kvm_arm.h" #include "gic_internal.h" #include "vgic_common.h" +#include "qom/object.h" #define TYPE_KVM_ARM_GIC "kvm-arm-gic" -#define KVM_ARM_GIC(obj) \ - OBJECT_CHECK(GICState, (obj), TYPE_KVM_ARM_GIC) -#define KVM_ARM_GIC_CLASS(klass) \ - OBJECT_CLASS_CHECK(KVMARMGICClass, (klass), TYPE_KVM_ARM_GIC) -#define KVM_ARM_GIC_GET_CLASS(obj) \ - OBJECT_GET_CLASS(KVMARMGICClass, (obj), TYPE_KVM_ARM_GIC) - -typedef struct KVMARMGICClass { +typedef struct KVMARMGICClass KVMARMGICClass; +/* This is reusing the GICState typedef from ARM_GIC_COMMON */ +DECLARE_OBJ_CHECKERS(GICState, KVMARMGICClass, + KVM_ARM_GIC, TYPE_KVM_ARM_GIC) + +struct KVMARMGICClass { ARMGICCommonClass parent_class; DeviceRealize parent_realize; void (*parent_reset)(DeviceState *dev); -} KVMARMGICClass; +}; void kvm_arm_gic_set_irq(uint32_t num_irq, int irq, int level) { diff --git a/hw/intc/arm_gicv2m.c b/hw/intc/arm_gicv2m.c index 0b7e2b4f84..04d7a6d68b 100644 --- a/hw/intc/arm_gicv2m.c +++ b/hw/intc/arm_gicv2m.c @@ -34,9 +34,12 @@ #include "sysemu/kvm.h" #include "qemu/log.h" #include "qemu/module.h" +#include "qom/object.h" #define TYPE_ARM_GICV2M "arm-gicv2m" -#define ARM_GICV2M(obj) OBJECT_CHECK(ARMGICv2mState, (obj), TYPE_ARM_GICV2M) +typedef struct ARMGICv2mState ARMGICv2mState; +DECLARE_INSTANCE_CHECKER(ARMGICv2mState, ARM_GICV2M, + TYPE_ARM_GICV2M) #define GICV2M_NUM_SPI_MAX 128 @@ -48,7 +51,7 @@ #define PRODUCT_ID_QEMU 0x51 /* ASCII code Q */ -typedef struct ARMGICv2mState { +struct ARMGICv2mState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -56,7 +59,7 @@ typedef struct ARMGICv2mState { uint32_t base_spi; uint32_t num_spi; -} ARMGICv2mState; +}; static void gicv2m_set_irq(void *opaque, int irq) { diff --git a/hw/intc/arm_gicv3_its_kvm.c b/hw/intc/arm_gicv3_its_kvm.c index 46835ed085..4ee9875ecc 100644 --- a/hw/intc/arm_gicv3_its_kvm.c +++ b/hw/intc/arm_gicv3_its_kvm.c @@ -27,18 +27,18 @@ #include "sysemu/kvm.h" #include "kvm_arm.h" #include "migration/blocker.h" +#include "qom/object.h" #define TYPE_KVM_ARM_ITS "arm-its-kvm" -#define KVM_ARM_ITS(obj) OBJECT_CHECK(GICv3ITSState, (obj), TYPE_KVM_ARM_ITS) -#define KVM_ARM_ITS_CLASS(klass) \ - OBJECT_CLASS_CHECK(KVMARMITSClass, (klass), TYPE_KVM_ARM_ITS) -#define KVM_ARM_ITS_GET_CLASS(obj) \ - OBJECT_GET_CLASS(KVMARMITSClass, (obj), TYPE_KVM_ARM_ITS) +typedef struct KVMARMITSClass KVMARMITSClass; +/* This is reusing the GICv3ITSState typedef from ARM_GICV3_ITS_COMMON */ +DECLARE_OBJ_CHECKERS(GICv3ITSState, KVMARMITSClass, + KVM_ARM_ITS, TYPE_KVM_ARM_ITS) -typedef struct KVMARMITSClass { +struct KVMARMITSClass { GICv3ITSCommonClass parent_class; void (*parent_reset)(DeviceState *dev); -} KVMARMITSClass; +}; static int kvm_its_send_msi(GICv3ITSState *s, uint32_t value, uint16_t devid) diff --git a/hw/intc/arm_gicv3_kvm.c b/hw/intc/arm_gicv3_kvm.c index eddd07c743..187eb054e0 100644 --- a/hw/intc/arm_gicv3_kvm.c +++ b/hw/intc/arm_gicv3_kvm.c @@ -31,6 +31,7 @@ #include "gicv3_internal.h" #include "vgic_common.h" #include "migration/blocker.h" +#include "qom/object.h" #ifdef DEBUG_GICV3_KVM #define DPRINTF(fmt, ...) \ @@ -41,12 +42,10 @@ #endif #define TYPE_KVM_ARM_GICV3 "kvm-arm-gicv3" -#define KVM_ARM_GICV3(obj) \ - OBJECT_CHECK(GICv3State, (obj), TYPE_KVM_ARM_GICV3) -#define KVM_ARM_GICV3_CLASS(klass) \ - OBJECT_CLASS_CHECK(KVMARMGICv3Class, (klass), TYPE_KVM_ARM_GICV3) -#define KVM_ARM_GICV3_GET_CLASS(obj) \ - OBJECT_GET_CLASS(KVMARMGICv3Class, (obj), TYPE_KVM_ARM_GICV3) +typedef struct KVMARMGICv3Class KVMARMGICv3Class; +/* This is reusing the GICv3State typedef from ARM_GICV3_ITS_COMMON */ +DECLARE_OBJ_CHECKERS(GICv3State, KVMARMGICv3Class, + KVM_ARM_GICV3, TYPE_KVM_ARM_GICV3) #define KVM_DEV_ARM_VGIC_SYSREG(op0, op1, crn, crm, op2) \ (ARM64_SYS_REG_SHIFT_MASK(op0, OP0) | \ @@ -74,11 +73,11 @@ #define ICC_IGRPEN1_EL1 \ KVM_DEV_ARM_VGIC_SYSREG(3, 0, 12, 12, 7) -typedef struct KVMARMGICv3Class { +struct KVMARMGICv3Class { ARMGICv3CommonClass parent_class; DeviceRealize parent_realize; void (*parent_reset)(DeviceState *dev); -} KVMARMGICv3Class; +}; static void kvm_arm_gicv3_set_irq(void *opaque, int irq, int level) { diff --git a/hw/intc/etraxfs_pic.c b/hw/intc/etraxfs_pic.c index 12988c7aa9..54ed4c77f7 100644 --- a/hw/intc/etraxfs_pic.c +++ b/hw/intc/etraxfs_pic.c @@ -27,6 +27,7 @@ #include "qemu/module.h" #include "hw/irq.h" #include "hw/qdev-properties.h" +#include "qom/object.h" #define D(x) @@ -38,8 +39,8 @@ #define R_MAX 5 #define TYPE_ETRAX_FS_PIC "etraxfs,pic" -#define ETRAX_FS_PIC(obj) \ - OBJECT_CHECK(struct etrax_pic, (obj), TYPE_ETRAX_FS_PIC) +DECLARE_INSTANCE_CHECKER(struct etrax_pic, ETRAX_FS_PIC, + TYPE_ETRAX_FS_PIC) struct etrax_pic { diff --git a/hw/intc/exynos4210_combiner.c b/hw/intc/exynos4210_combiner.c index 59dd27fb16..7b01481ab8 100644 --- a/hw/intc/exynos4210_combiner.c +++ b/hw/intc/exynos4210_combiner.c @@ -36,6 +36,7 @@ #include "hw/hw.h" #include "hw/irq.h" #include "hw/qdev-properties.h" +#include "qom/object.h" //#define DEBUG_COMBINER @@ -63,10 +64,11 @@ typedef struct CombinerGroupState { } CombinerGroupState; #define TYPE_EXYNOS4210_COMBINER "exynos4210.combiner" -#define EXYNOS4210_COMBINER(obj) \ - OBJECT_CHECK(Exynos4210CombinerState, (obj), TYPE_EXYNOS4210_COMBINER) +typedef struct Exynos4210CombinerState Exynos4210CombinerState; +DECLARE_INSTANCE_CHECKER(Exynos4210CombinerState, EXYNOS4210_COMBINER, + TYPE_EXYNOS4210_COMBINER) -typedef struct Exynos4210CombinerState { +struct Exynos4210CombinerState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -77,7 +79,7 @@ typedef struct Exynos4210CombinerState { uint32_t external; /* 1 means that this combiner is external */ qemu_irq output_irq[IIC_NGRP]; -} Exynos4210CombinerState; +}; static const VMStateDescription vmstate_exynos4210_combiner_group_state = { .name = "exynos4210.combiner.groupstate", diff --git a/hw/intc/exynos4210_gic.c b/hw/intc/exynos4210_gic.c index 0aa3b843a9..f9487673fc 100644 --- a/hw/intc/exynos4210_gic.c +++ b/hw/intc/exynos4210_gic.c @@ -28,6 +28,7 @@ #include "hw/irq.h" #include "hw/qdev-properties.h" #include "hw/arm/exynos4210.h" +#include "qom/object.h" enum ExtGicId { EXT_GIC_ID_MDMA_LCD0 = 66, @@ -264,10 +265,11 @@ uint32_t exynos4210_get_irq(uint32_t grp, uint32_t bit) /********* GIC part *********/ #define TYPE_EXYNOS4210_GIC "exynos4210.gic" -#define EXYNOS4210_GIC(obj) \ - OBJECT_CHECK(Exynos4210GicState, (obj), TYPE_EXYNOS4210_GIC) +typedef struct Exynos4210GicState Exynos4210GicState; +DECLARE_INSTANCE_CHECKER(Exynos4210GicState, EXYNOS4210_GIC, + TYPE_EXYNOS4210_GIC) -typedef struct { +struct Exynos4210GicState { SysBusDevice parent_obj; MemoryRegion cpu_container; @@ -276,7 +278,7 @@ typedef struct { MemoryRegion dist_alias[EXYNOS4210_NCPUS]; uint32_t num_cpu; DeviceState *gic; -} Exynos4210GicState; +}; static void exynos4210_gic_set_irq(void *opaque, int irq, int level) { @@ -382,16 +384,17 @@ type_init(exynos4210_gic_register_types) */ #define TYPE_EXYNOS4210_IRQ_GATE "exynos4210.irq_gate" -#define EXYNOS4210_IRQ_GATE(obj) \ - OBJECT_CHECK(Exynos4210IRQGateState, (obj), TYPE_EXYNOS4210_IRQ_GATE) +typedef struct Exynos4210IRQGateState Exynos4210IRQGateState; +DECLARE_INSTANCE_CHECKER(Exynos4210IRQGateState, EXYNOS4210_IRQ_GATE, + TYPE_EXYNOS4210_IRQ_GATE) -typedef struct Exynos4210IRQGateState { +struct Exynos4210IRQGateState { SysBusDevice parent_obj; uint32_t n_in; /* inputs amount */ uint32_t *level; /* input levels */ qemu_irq out; /* output IRQ */ -} Exynos4210IRQGateState; +}; static Property exynos4210_irq_gate_properties[] = { DEFINE_PROP_UINT32("n_in", Exynos4210IRQGateState, n_in, 1), diff --git a/hw/intc/grlib_irqmp.c b/hw/intc/grlib_irqmp.c index 794c643af2..9b34a8ae03 100644 --- a/hw/intc/grlib_irqmp.c +++ b/hw/intc/grlib_irqmp.c @@ -35,6 +35,7 @@ #include "trace.h" #include "qapi/error.h" #include "qemu/module.h" +#include "qom/object.h" #define IRQMP_MAX_CPU 16 #define IRQMP_REG_SIZE 256 /* Size of memory mapped registers */ @@ -50,18 +51,20 @@ #define FORCE_OFFSET 0x80 #define EXTENDED_OFFSET 0xC0 -#define GRLIB_IRQMP(obj) OBJECT_CHECK(IRQMP, (obj), TYPE_GRLIB_IRQMP) +typedef struct IRQMP IRQMP; +DECLARE_INSTANCE_CHECKER(IRQMP, GRLIB_IRQMP, + TYPE_GRLIB_IRQMP) typedef struct IRQMPState IRQMPState; -typedef struct IRQMP { +struct IRQMP { SysBusDevice parent_obj; MemoryRegion iomem; IRQMPState *state; qemu_irq irq; -} IRQMP; +}; struct IRQMPState { uint32_t level; diff --git a/hw/intc/i8259.c b/hw/intc/i8259.c index 51b27f6a34..344fd04db1 100644 --- a/hw/intc/i8259.c +++ b/hw/intc/i8259.c @@ -30,6 +30,7 @@ #include "qemu/log.h" #include "hw/isa/i8259_internal.h" #include "trace.h" +#include "qom/object.h" /* debug PIC */ //#define DEBUG_PIC @@ -37,18 +38,19 @@ //#define DEBUG_IRQ_LATENCY #define TYPE_I8259 "isa-i8259" -#define PIC_CLASS(class) OBJECT_CLASS_CHECK(PICClass, (class), TYPE_I8259) -#define PIC_GET_CLASS(obj) OBJECT_GET_CLASS(PICClass, (obj), TYPE_I8259) +typedef struct PICClass PICClass; +DECLARE_CLASS_CHECKERS(PICClass, PIC, + TYPE_I8259) /** * PICClass: * @parent_realize: The parent's realizefn. */ -typedef struct PICClass { +struct PICClass { PICCommonClass parent_class; DeviceRealize parent_realize; -} PICClass; +}; #ifdef DEBUG_IRQ_LATENCY static int64_t irq_time[16]; diff --git a/hw/intc/lm32_pic.c b/hw/intc/lm32_pic.c index 36de670c9e..e8b4015efd 100644 --- a/hw/intc/lm32_pic.c +++ b/hw/intc/lm32_pic.c @@ -27,9 +27,12 @@ #include "hw/lm32/lm32_pic.h" #include "hw/intc/intc.h" #include "hw/irq.h" +#include "qom/object.h" #define TYPE_LM32_PIC "lm32-pic" -#define LM32_PIC(obj) OBJECT_CHECK(LM32PicState, (obj), TYPE_LM32_PIC) +typedef struct LM32PicState LM32PicState; +DECLARE_INSTANCE_CHECKER(LM32PicState, LM32_PIC, + TYPE_LM32_PIC) struct LM32PicState { SysBusDevice parent_obj; @@ -42,7 +45,6 @@ struct LM32PicState { /* statistics */ uint64_t stats_irq_count[32]; }; -typedef struct LM32PicState LM32PicState; static void update_irq(LM32PicState *s) { diff --git a/hw/intc/loongson_liointc.c b/hw/intc/loongson_liointc.c index 23ca51cc2e..30fb375b72 100644 --- a/hw/intc/loongson_liointc.c +++ b/hw/intc/loongson_liointc.c @@ -23,6 +23,7 @@ #include "qemu/module.h" #include "hw/irq.h" #include "hw/qdev-properties.h" +#include "qom/object.h" #define D(x) @@ -43,8 +44,8 @@ #define R_END 0x64 #define TYPE_LOONGSON_LIOINTC "loongson.liointc" -#define LOONGSON_LIOINTC(obj) \ - OBJECT_CHECK(struct loongson_liointc, (obj), TYPE_LOONGSON_LIOINTC) +DECLARE_INSTANCE_CHECKER(struct loongson_liointc, LOONGSON_LIOINTC, + TYPE_LOONGSON_LIOINTC) struct loongson_liointc { SysBusDevice parent_obj; diff --git a/hw/intc/nios2_iic.c b/hw/intc/nios2_iic.c index 86d088f9b5..aa26f059a1 100644 --- a/hw/intc/nios2_iic.c +++ b/hw/intc/nios2_iic.c @@ -25,16 +25,18 @@ #include "hw/irq.h" #include "hw/sysbus.h" #include "cpu.h" +#include "qom/object.h" #define TYPE_ALTERA_IIC "altera,iic" -#define ALTERA_IIC(obj) \ - OBJECT_CHECK(AlteraIIC, (obj), TYPE_ALTERA_IIC) +typedef struct AlteraIIC AlteraIIC; +DECLARE_INSTANCE_CHECKER(AlteraIIC, ALTERA_IIC, + TYPE_ALTERA_IIC) -typedef struct AlteraIIC { +struct AlteraIIC { SysBusDevice parent_obj; void *cpu; qemu_irq parent_irq; -} AlteraIIC; +}; static void update_irq(AlteraIIC *pv) { diff --git a/hw/intc/omap_intc.c b/hw/intc/omap_intc.c index b8a1d1fd7d..d7183d035e 100644 --- a/hw/intc/omap_intc.c +++ b/hw/intc/omap_intc.c @@ -676,7 +676,7 @@ static const TypeInfo omap2_intc_info = { static const TypeInfo omap_intc_type_info = { .name = TYPE_OMAP_INTC, .parent = TYPE_SYS_BUS_DEVICE, - .instance_size = sizeof(struct omap_intr_handler_s), + .instance_size = sizeof(omap_intr_handler), .abstract = true, }; diff --git a/hw/intc/ompic.c b/hw/intc/ompic.c index c354427a61..a8ea621d9e 100644 --- a/hw/intc/ompic.c +++ b/hw/intc/ompic.c @@ -15,9 +15,12 @@ #include "hw/sysbus.h" #include "migration/vmstate.h" #include "exec/memory.h" +#include "qom/object.h" #define TYPE_OR1K_OMPIC "or1k-ompic" -#define OR1K_OMPIC(obj) OBJECT_CHECK(OR1KOMPICState, (obj), TYPE_OR1K_OMPIC) +typedef struct OR1KOMPICState OR1KOMPICState; +DECLARE_INSTANCE_CHECKER(OR1KOMPICState, OR1K_OMPIC, + TYPE_OR1K_OMPIC) #define OMPIC_CTRL_IRQ_ACK (1 << 31) #define OMPIC_CTRL_IRQ_GEN (1 << 30) @@ -37,7 +40,6 @@ #define OMPIC_MAX_CPUS 4 /* Real max is much higher, but dont waste memory */ #define OMPIC_ADDRSPACE_SZ (OMPIC_MAX_CPUS * 2 * 4) /* 2 32-bit regs per cpu */ -typedef struct OR1KOMPICState OR1KOMPICState; typedef struct OR1KOMPICCPUState OR1KOMPICCPUState; struct OR1KOMPICCPUState { diff --git a/hw/intc/openpic_kvm.c b/hw/intc/openpic_kvm.c index e4bf47d885..8c8fbeddfe 100644 --- a/hw/intc/openpic_kvm.c +++ b/hw/intc/openpic_kvm.c @@ -35,13 +35,15 @@ #include "sysemu/kvm.h" #include "qemu/log.h" #include "qemu/module.h" +#include "qom/object.h" #define GCR_RESET 0x80000000 -#define KVM_OPENPIC(obj) \ - OBJECT_CHECK(KVMOpenPICState, (obj), TYPE_KVM_OPENPIC) +typedef struct KVMOpenPICState KVMOpenPICState; +DECLARE_INSTANCE_CHECKER(KVMOpenPICState, KVM_OPENPIC, + TYPE_KVM_OPENPIC) -typedef struct KVMOpenPICState { +struct KVMOpenPICState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -51,7 +53,7 @@ typedef struct KVMOpenPICState { uint32_t fd; uint32_t model; hwaddr mapped; -} KVMOpenPICState; +}; static void kvm_openpic_set_irq(void *opaque, int n_IRQ, int level) { diff --git a/hw/intc/pl190.c b/hw/intc/pl190.c index e3bd3dd121..ee3206132f 100644 --- a/hw/intc/pl190.c +++ b/hw/intc/pl190.c @@ -13,6 +13,7 @@ #include "migration/vmstate.h" #include "qemu/log.h" #include "qemu/module.h" +#include "qom/object.h" /* The number of virtual priority levels. 16 user vectors plus the unvectored IRQ. Chained interrupts would require an additional level @@ -21,9 +22,11 @@ #define PL190_NUM_PRIO 17 #define TYPE_PL190 "pl190" -#define PL190(obj) OBJECT_CHECK(PL190State, (obj), TYPE_PL190) +typedef struct PL190State PL190State; +DECLARE_INSTANCE_CHECKER(PL190State, PL190, + TYPE_PL190) -typedef struct PL190State { +struct PL190State { SysBusDevice parent_obj; MemoryRegion iomem; @@ -41,7 +44,7 @@ typedef struct PL190State { int prev_prio[PL190_NUM_PRIO]; qemu_irq irq; qemu_irq fiq; -} PL190State; +}; static const unsigned char pl190_id[] = { 0x90, 0x11, 0x04, 0x00, 0x0D, 0xf0, 0x05, 0xb1 }; diff --git a/hw/intc/puv3_intc.c b/hw/intc/puv3_intc.c index 090d4839d1..8bceede256 100644 --- a/hw/intc/puv3_intc.c +++ b/hw/intc/puv3_intc.c @@ -12,6 +12,7 @@ #include "qemu/osdep.h" #include "hw/irq.h" #include "hw/sysbus.h" +#include "qom/object.h" #undef DEBUG_PUV3 #include "hw/unicore32/puv3.h" @@ -19,9 +20,11 @@ #include "qemu/log.h" #define TYPE_PUV3_INTC "puv3_intc" -#define PUV3_INTC(obj) OBJECT_CHECK(PUV3INTCState, (obj), TYPE_PUV3_INTC) +typedef struct PUV3INTCState PUV3INTCState; +DECLARE_INSTANCE_CHECKER(PUV3INTCState, PUV3_INTC, + TYPE_PUV3_INTC) -typedef struct PUV3INTCState { +struct PUV3INTCState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -29,7 +32,7 @@ typedef struct PUV3INTCState { uint32_t reg_ICMR; uint32_t reg_ICPR; -} PUV3INTCState; +}; /* Update interrupt status after enabled or pending bits have been changed. */ static void puv3_intc_update(PUV3INTCState *s) diff --git a/hw/intc/s390_flic_kvm.c b/hw/intc/s390_flic_kvm.c index dbd4e682ce..35d91afa55 100644 --- a/hw/intc/s390_flic_kvm.c +++ b/hw/intc/s390_flic_kvm.c @@ -24,6 +24,7 @@ #include "hw/s390x/css.h" #include "migration/qemu-file-types.h" #include "trace.h" +#include "qom/object.h" #define FLIC_SAVE_INITIAL_SIZE qemu_real_host_page_size #define FLIC_FAILED (-1UL) @@ -569,16 +570,15 @@ static const VMStateDescription kvm_s390_flic_vmstate = { } }; -typedef struct KVMS390FLICStateClass { +struct KVMS390FLICStateClass { S390FLICStateClass parent_class; DeviceRealize parent_realize; -} KVMS390FLICStateClass; +}; +typedef struct KVMS390FLICStateClass KVMS390FLICStateClass; -#define KVM_S390_FLIC_GET_CLASS(obj) \ - OBJECT_GET_CLASS(KVMS390FLICStateClass, (obj), TYPE_KVM_S390_FLIC) +DECLARE_CLASS_CHECKERS(KVMS390FLICStateClass, KVM_S390_FLIC, + TYPE_KVM_S390_FLIC) -#define KVM_S390_FLIC_CLASS(klass) \ - OBJECT_CLASS_CHECK(KVMS390FLICStateClass, (klass), TYPE_KVM_S390_FLIC) static void kvm_s390_flic_realize(DeviceState *dev, Error **errp) { diff --git a/hw/intc/slavio_intctl.c b/hw/intc/slavio_intctl.c index c4cf9096eb..4a72ef5d0d 100644 --- a/hw/intc/slavio_intctl.c +++ b/hw/intc/slavio_intctl.c @@ -30,6 +30,7 @@ #include "hw/intc/intc.h" #include "hw/irq.h" #include "trace.h" +#include "qom/object.h" //#define DEBUG_IRQ_COUNT @@ -58,10 +59,11 @@ typedef struct SLAVIO_CPUINTCTLState { } SLAVIO_CPUINTCTLState; #define TYPE_SLAVIO_INTCTL "slavio_intctl" -#define SLAVIO_INTCTL(obj) \ - OBJECT_CHECK(SLAVIO_INTCTLState, (obj), TYPE_SLAVIO_INTCTL) +typedef struct SLAVIO_INTCTLState SLAVIO_INTCTLState; +DECLARE_INSTANCE_CHECKER(SLAVIO_INTCTLState, SLAVIO_INTCTL, + TYPE_SLAVIO_INTCTL) -typedef struct SLAVIO_INTCTLState { +struct SLAVIO_INTCTLState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -73,7 +75,7 @@ typedef struct SLAVIO_INTCTLState { uint32_t intregm_pending; uint32_t intregm_disabled; uint32_t target_cpu; -} SLAVIO_INTCTLState; +}; #define INTCTL_MAXADDR 0xf #define INTCTL_SIZE (INTCTL_MAXADDR + 1) diff --git a/hw/intc/xilinx_intc.c b/hw/intc/xilinx_intc.c index 3e65e68619..4c4397b3d2 100644 --- a/hw/intc/xilinx_intc.c +++ b/hw/intc/xilinx_intc.c @@ -27,6 +27,7 @@ #include "qemu/module.h" #include "hw/irq.h" #include "hw/qdev-properties.h" +#include "qom/object.h" #define D(x) @@ -41,7 +42,8 @@ #define R_MAX 8 #define TYPE_XILINX_INTC "xlnx.xps-intc" -#define XILINX_INTC(obj) OBJECT_CHECK(struct xlx_pic, (obj), TYPE_XILINX_INTC) +DECLARE_INSTANCE_CHECKER(struct xlx_pic, XILINX_INTC, + TYPE_XILINX_INTC) struct xlx_pic { diff --git a/hw/ipack/tpci200.c b/hw/ipack/tpci200.c index f931d4df62..b35e1d2ac4 100644 --- a/hw/ipack/tpci200.c +++ b/hw/ipack/tpci200.c @@ -16,6 +16,7 @@ #include "migration/vmstate.h" #include "qemu/bitops.h" #include "qemu/module.h" +#include "qom/object.h" /* #define DEBUG_TPCI */ @@ -54,7 +55,7 @@ #define REG_STATUS 0x0C #define IP_N_FROM_REG(REG) ((REG) / 2 - 1) -typedef struct { +struct TPCI200State { PCIDevice dev; IPackBus bus; MemoryRegion mmio; @@ -67,12 +68,13 @@ typedef struct { uint8_t ctrl[N_MODULES]; uint16_t status; uint8_t int_set; -} TPCI200State; +}; +typedef struct TPCI200State TPCI200State; #define TYPE_TPCI200 "tpci200" -#define TPCI200(obj) \ - OBJECT_CHECK(TPCI200State, (obj), TYPE_TPCI200) +DECLARE_INSTANCE_CHECKER(TPCI200State, TPCI200, + TYPE_TPCI200) static const uint8_t local_config_regs[] = { 0x00, 0xFF, 0xFF, 0x0F, 0x00, 0xFC, 0xFF, 0x0F, 0x00, 0x00, 0x00, diff --git a/hw/ipmi/ipmi_bmc_extern.c b/hw/ipmi/ipmi_bmc_extern.c index f9a13e0a44..159831cbc5 100644 --- a/hw/ipmi/ipmi_bmc_extern.c +++ b/hw/ipmi/ipmi_bmc_extern.c @@ -36,6 +36,7 @@ #include "hw/ipmi/ipmi.h" #include "hw/qdev-properties.h" #include "migration/vmstate.h" +#include "qom/object.h" #define VM_MSG_CHAR 0xA0 /* Marks end of message */ #define VM_CMD_CHAR 0xA1 /* Marks end of a command */ @@ -61,9 +62,10 @@ #define VM_CMD_GRACEFUL_SHUTDOWN 0x09 #define TYPE_IPMI_BMC_EXTERN "ipmi-bmc-extern" -#define IPMI_BMC_EXTERN(obj) OBJECT_CHECK(IPMIBmcExtern, (obj), \ - TYPE_IPMI_BMC_EXTERN) -typedef struct IPMIBmcExtern { +typedef struct IPMIBmcExtern IPMIBmcExtern; +DECLARE_INSTANCE_CHECKER(IPMIBmcExtern, IPMI_BMC_EXTERN, + TYPE_IPMI_BMC_EXTERN) +struct IPMIBmcExtern { IPMIBmc parent; CharBackend chr; @@ -85,7 +87,7 @@ typedef struct IPMIBmcExtern { /* A reset event is pending to be sent upstream. */ bool send_reset; -} IPMIBmcExtern; +}; static unsigned char ipmb_checksum(const unsigned char *data, int size, unsigned char start) diff --git a/hw/ipmi/isa_ipmi_bt.c b/hw/ipmi/isa_ipmi_bt.c index c8dc0a09dc..0b69acc2e9 100644 --- a/hw/ipmi/isa_ipmi_bt.c +++ b/hw/ipmi/isa_ipmi_bt.c @@ -31,18 +31,20 @@ #include "hw/isa/isa.h" #include "hw/qdev-properties.h" #include "migration/vmstate.h" +#include "qom/object.h" #define TYPE_ISA_IPMI_BT "isa-ipmi-bt" -#define ISA_IPMI_BT(obj) OBJECT_CHECK(ISAIPMIBTDevice, (obj), \ - TYPE_ISA_IPMI_BT) +typedef struct ISAIPMIBTDevice ISAIPMIBTDevice; +DECLARE_INSTANCE_CHECKER(ISAIPMIBTDevice, ISA_IPMI_BT, + TYPE_ISA_IPMI_BT) -typedef struct ISAIPMIBTDevice { +struct ISAIPMIBTDevice { ISADevice dev; int32_t isairq; qemu_irq irq; IPMIBT bt; uint32_t uuid; -} ISAIPMIBTDevice; +}; static void isa_ipmi_bt_get_fwinfo(struct IPMIInterface *ii, IPMIFwInfo *info) { diff --git a/hw/ipmi/isa_ipmi_kcs.c b/hw/ipmi/isa_ipmi_kcs.c index 4b421c33f4..af69e9a008 100644 --- a/hw/ipmi/isa_ipmi_kcs.c +++ b/hw/ipmi/isa_ipmi_kcs.c @@ -31,18 +31,20 @@ #include "hw/isa/isa.h" #include "hw/qdev-properties.h" #include "migration/vmstate.h" +#include "qom/object.h" #define TYPE_ISA_IPMI_KCS "isa-ipmi-kcs" -#define ISA_IPMI_KCS(obj) OBJECT_CHECK(ISAIPMIKCSDevice, (obj), \ - TYPE_ISA_IPMI_KCS) +typedef struct ISAIPMIKCSDevice ISAIPMIKCSDevice; +DECLARE_INSTANCE_CHECKER(ISAIPMIKCSDevice, ISA_IPMI_KCS, + TYPE_ISA_IPMI_KCS) -typedef struct ISAIPMIKCSDevice { +struct ISAIPMIKCSDevice { ISADevice dev; int32_t isairq; qemu_irq irq; IPMIKCS kcs; uint32_t uuid; -} ISAIPMIKCSDevice; +}; static void isa_ipmi_kcs_get_fwinfo(IPMIInterface *ii, IPMIFwInfo *info) { diff --git a/hw/ipmi/pci_ipmi_bt.c b/hw/ipmi/pci_ipmi_bt.c index ba9cf016b5..7e5ecea6cc 100644 --- a/hw/ipmi/pci_ipmi_bt.c +++ b/hw/ipmi/pci_ipmi_bt.c @@ -26,17 +26,19 @@ #include "qapi/error.h" #include "hw/ipmi/ipmi_bt.h" #include "hw/pci/pci.h" +#include "qom/object.h" #define TYPE_PCI_IPMI_BT "pci-ipmi-bt" -#define PCI_IPMI_BT(obj) OBJECT_CHECK(PCIIPMIBTDevice, (obj), \ - TYPE_PCI_IPMI_BT) +typedef struct PCIIPMIBTDevice PCIIPMIBTDevice; +DECLARE_INSTANCE_CHECKER(PCIIPMIBTDevice, PCI_IPMI_BT, + TYPE_PCI_IPMI_BT) -typedef struct PCIIPMIBTDevice { +struct PCIIPMIBTDevice { PCIDevice dev; IPMIBT bt; bool irq_enabled; uint32_t uuid; -} PCIIPMIBTDevice; +}; static void pci_ipmi_raise_irq(IPMIBT *ik) { diff --git a/hw/ipmi/pci_ipmi_kcs.c b/hw/ipmi/pci_ipmi_kcs.c index 99f46152f4..c2a283a982 100644 --- a/hw/ipmi/pci_ipmi_kcs.c +++ b/hw/ipmi/pci_ipmi_kcs.c @@ -26,17 +26,19 @@ #include "qapi/error.h" #include "hw/ipmi/ipmi_kcs.h" #include "hw/pci/pci.h" +#include "qom/object.h" #define TYPE_PCI_IPMI_KCS "pci-ipmi-kcs" -#define PCI_IPMI_KCS(obj) OBJECT_CHECK(PCIIPMIKCSDevice, (obj), \ - TYPE_PCI_IPMI_KCS) +typedef struct PCIIPMIKCSDevice PCIIPMIKCSDevice; +DECLARE_INSTANCE_CHECKER(PCIIPMIKCSDevice, PCI_IPMI_KCS, + TYPE_PCI_IPMI_KCS) -typedef struct PCIIPMIKCSDevice { +struct PCIIPMIKCSDevice { PCIDevice dev; IPMIKCS kcs; bool irq_enabled; uint32_t uuid; -} PCIIPMIKCSDevice; +}; static void pci_ipmi_raise_irq(IPMIKCS *ik) { diff --git a/hw/ipmi/smbus_ipmi.c b/hw/ipmi/smbus_ipmi.c index f1a0148755..cd4c05dd1b 100644 --- a/hw/ipmi/smbus_ipmi.c +++ b/hw/ipmi/smbus_ipmi.c @@ -27,9 +27,12 @@ #include "qapi/error.h" #include "qemu/error-report.h" #include "hw/ipmi/ipmi.h" +#include "qom/object.h" #define TYPE_SMBUS_IPMI "smbus-ipmi" -#define SMBUS_IPMI(obj) OBJECT_CHECK(SMBusIPMIDevice, (obj), TYPE_SMBUS_IPMI) +typedef struct SMBusIPMIDevice SMBusIPMIDevice; +DECLARE_INSTANCE_CHECKER(SMBusIPMIDevice, SMBUS_IPMI, + TYPE_SMBUS_IPMI) #define SSIF_IPMI_REQUEST 2 #define SSIF_IPMI_MULTI_PART_REQUEST_START 6 @@ -44,7 +47,7 @@ #define IPMI_GET_SYS_INTF_CAP_CMD 0x57 -typedef struct SMBusIPMIDevice { +struct SMBusIPMIDevice { SMBusDevice parent; IPMIBmc *bmc; @@ -67,7 +70,7 @@ typedef struct SMBusIPMIDevice { uint8_t waiting_rsp; uint32_t uuid; -} SMBusIPMIDevice; +}; static void smbus_ipmi_handle_event(IPMIInterface *ii) { diff --git a/hw/isa/i82378.c b/hw/isa/i82378.c index 75a2da2881..1dcf525f3f 100644 --- a/hw/isa/i82378.c +++ b/hw/isa/i82378.c @@ -24,18 +24,20 @@ #include "hw/timer/i8254.h" #include "migration/vmstate.h" #include "hw/audio/pcspk.h" +#include "qom/object.h" #define TYPE_I82378 "i82378" -#define I82378(obj) \ - OBJECT_CHECK(I82378State, (obj), TYPE_I82378) +typedef struct I82378State I82378State; +DECLARE_INSTANCE_CHECKER(I82378State, I82378, + TYPE_I82378) -typedef struct I82378State { +struct I82378State { PCIDevice parent_obj; qemu_irq out[2]; qemu_irq *i8259; MemoryRegion io; -} I82378State; +}; static const VMStateDescription vmstate_i82378 = { .name = "pci-i82378", diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c index cd6e169d47..3303d2eab6 100644 --- a/hw/isa/lpc_ich9.c +++ b/hw/isa/lpc_ich9.c @@ -792,7 +792,7 @@ static void ich9_lpc_class_init(ObjectClass *klass, void *data) static const TypeInfo ich9_lpc_info = { .name = TYPE_ICH9_LPC_DEVICE, .parent = TYPE_PCI_DEVICE, - .instance_size = sizeof(struct ICH9LPCState), + .instance_size = sizeof(ICH9LPCState), .instance_init = ich9_lpc_initfn, .class_init = ich9_lpc_class_init, .interfaces = (InterfaceInfo[]) { diff --git a/hw/isa/pc87312.c b/hw/isa/pc87312.c index 0cacbbc91b..8d7b8d3db2 100644 --- a/hw/isa/pc87312.c +++ b/hw/isa/pc87312.c @@ -371,7 +371,7 @@ static void pc87312_class_init(ObjectClass *klass, void *data) } static const TypeInfo pc87312_type_info = { - .name = TYPE_PC87312_SUPERIO, + .name = TYPE_PC87312, .parent = TYPE_ISA_SUPERIO, .instance_size = sizeof(PC87312State), .instance_init = pc87312_initfn, diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index ac044afa95..8e3ac845b8 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -38,10 +38,11 @@ #include "migration/vmstate.h" #include "sysemu/reset.h" #include "sysemu/runstate.h" +#include "qom/object.h" PCIDevice *piix4_dev; -typedef struct PIIX4State { +struct PIIX4State { PCIDevice dev; qemu_irq cpu_intr; qemu_irq *isa; @@ -50,10 +51,11 @@ typedef struct PIIX4State { /* Reset Control Register */ MemoryRegion rcr_mem; uint8_t rcr; -} PIIX4State; +}; +typedef struct PIIX4State PIIX4State; -#define PIIX4_PCI_DEVICE(obj) \ - OBJECT_CHECK(PIIX4State, (obj), TYPE_PIIX4_PCI_DEVICE) +DECLARE_INSTANCE_CHECKER(PIIX4State, PIIX4_PCI_DEVICE, + TYPE_PIIX4_PCI_DEVICE) static void piix4_isa_reset(DeviceState *dev) { diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c index 18160ca445..1e6b48b2a2 100644 --- a/hw/isa/vt82c686.c +++ b/hw/isa/vt82c686.c @@ -27,6 +27,7 @@ #include "qemu/module.h" #include "qemu/timer.h" #include "exec/address-spaces.h" +#include "qom/object.h" /* #define DEBUG_VT82C686B */ @@ -42,15 +43,16 @@ typedef struct SuperIOConfig { uint8_t data; } SuperIOConfig; -typedef struct VT82C686BState { +struct VT82C686BState { PCIDevice dev; MemoryRegion superio; SuperIOConfig superio_conf; -} VT82C686BState; +}; +typedef struct VT82C686BState VT82C686BState; #define TYPE_VT82C686B_DEVICE "VT82C686B" -#define VT82C686B_DEVICE(obj) \ - OBJECT_CHECK(VT82C686BState, (obj), TYPE_VT82C686B_DEVICE) +DECLARE_INSTANCE_CHECKER(VT82C686BState, VT82C686B_DEVICE, + TYPE_VT82C686B_DEVICE) static void superio_ioport_writeb(void *opaque, hwaddr addr, uint64_t data, unsigned size) @@ -159,34 +161,37 @@ static void vt82c686b_write_config(PCIDevice *d, uint32_t address, #define ACPI_DBG_IO_ADDR 0xb044 -typedef struct VT686PMState { +struct VT686PMState { PCIDevice dev; MemoryRegion io; ACPIREGS ar; APMState apm; PMSMBus smb; uint32_t smb_io_base; -} VT686PMState; +}; +typedef struct VT686PMState VT686PMState; -typedef struct VT686AC97State { +struct VT686AC97State { PCIDevice dev; -} VT686AC97State; +}; +typedef struct VT686AC97State VT686AC97State; -typedef struct VT686MC97State { +struct VT686MC97State { PCIDevice dev; -} VT686MC97State; +}; +typedef struct VT686MC97State VT686MC97State; #define TYPE_VT82C686B_PM_DEVICE "VT82C686B_PM" -#define VT82C686B_PM_DEVICE(obj) \ - OBJECT_CHECK(VT686PMState, (obj), TYPE_VT82C686B_PM_DEVICE) +DECLARE_INSTANCE_CHECKER(VT686PMState, VT82C686B_PM_DEVICE, + TYPE_VT82C686B_PM_DEVICE) #define TYPE_VT82C686B_MC97_DEVICE "VT82C686B_MC97" -#define VT82C686B_MC97_DEVICE(obj) \ - OBJECT_CHECK(VT686MC97State, (obj), TYPE_VT82C686B_MC97_DEVICE) +DECLARE_INSTANCE_CHECKER(VT686MC97State, VT82C686B_MC97_DEVICE, + TYPE_VT82C686B_MC97_DEVICE) #define TYPE_VT82C686B_AC97_DEVICE "VT82C686B_AC97" -#define VT82C686B_AC97_DEVICE(obj) \ - OBJECT_CHECK(VT686AC97State, (obj), TYPE_VT82C686B_AC97_DEVICE) +DECLARE_INSTANCE_CHECKER(VT686AC97State, VT82C686B_AC97_DEVICE, + TYPE_VT82C686B_AC97_DEVICE) static void pm_update_sci(VT686PMState *s) { diff --git a/hw/m68k/mcf_intc.c b/hw/m68k/mcf_intc.c index e01e2e111b..7ee447240b 100644 --- a/hw/m68k/mcf_intc.c +++ b/hw/m68k/mcf_intc.c @@ -15,11 +15,14 @@ #include "hw/irq.h" #include "hw/sysbus.h" #include "hw/m68k/mcf.h" +#include "qom/object.h" #define TYPE_MCF_INTC "mcf-intc" -#define MCF_INTC(obj) OBJECT_CHECK(mcf_intc_state, (obj), TYPE_MCF_INTC) +typedef struct mcf_intc_state mcf_intc_state; +DECLARE_INSTANCE_CHECKER(mcf_intc_state, MCF_INTC, + TYPE_MCF_INTC) -typedef struct { +struct mcf_intc_state { SysBusDevice parent_obj; MemoryRegion iomem; @@ -30,7 +33,7 @@ typedef struct { uint8_t icr[64]; M68kCPU *cpu; int active_vector; -} mcf_intc_state; +}; static void mcf_intc_update(mcf_intc_state *s) { diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c index d3f25cd6d7..cbd913b0a2 100644 --- a/hw/m68k/next-cube.c +++ b/hw/m68k/next-cube.c @@ -21,6 +21,7 @@ #include "hw/loader.h" #include "hw/scsi/esp.h" #include "hw/sysbus.h" +#include "qom/object.h" #include "hw/char/escc.h" /* ZILOG 8530 Serial Emulation */ #include "hw/block/fdc.h" #include "hw/qdev-properties.h" @@ -37,7 +38,9 @@ #endif #define TYPE_NEXT_MACHINE MACHINE_TYPE_NAME("next-cube") -#define NEXT_MACHINE(obj) OBJECT_CHECK(NeXTState, (obj), TYPE_NEXT_MACHINE) +typedef struct NeXTState NeXTState; +DECLARE_INSTANCE_CHECKER(NeXTState, NEXT_MACHINE, + TYPE_NEXT_MACHINE) #define ENTRY 0x0100001e #define RAM_SIZE 0x4000000 @@ -69,7 +72,7 @@ typedef struct NextRtc { uint8_t retval; } NextRtc; -typedef struct { +struct NeXTState { MachineState parent; uint32_t int_mask; @@ -87,7 +90,7 @@ typedef struct { uint32_t scr2; NextRtc rtc; -} NeXTState; +}; /* Thanks to NeXT forums for this */ /* diff --git a/hw/m68k/next-kbd.c b/hw/m68k/next-kbd.c index 2dff87be15..c7ca3fbbc9 100644 --- a/hw/m68k/next-kbd.c +++ b/hw/m68k/next-kbd.c @@ -36,8 +36,11 @@ #include "ui/console.h" #include "sysemu/sysemu.h" #include "migration/vmstate.h" +#include "qom/object.h" -#define NEXTKBD(obj) OBJECT_CHECK(NextKBDState, (obj), TYPE_NEXTKBD) +typedef struct NextKBDState NextKBDState; +DECLARE_INSTANCE_CHECKER(NextKBDState, NEXTKBD, + TYPE_NEXTKBD) /* following defintions from next68k netbsd */ #define CSR_INT 0x00800000 @@ -63,12 +66,12 @@ typedef struct { } KBDQueue; -typedef struct NextKBDState { +struct NextKBDState { SysBusDevice sbd; MemoryRegion mr; KBDQueue queue; uint16_t shift; -} NextKBDState; +}; static void queue_code(void *opaque, int code); diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c index 1ca482ad81..ce4b47c3e3 100644 --- a/hw/m68k/q800.c +++ b/hw/m68k/q800.c @@ -290,7 +290,7 @@ static void q800_init(MachineState *machine) /* SCSI */ dev = qdev_new(TYPE_ESP); - sysbus_esp = ESP_STATE(dev); + sysbus_esp = ESP(dev); esp = &sysbus_esp->esp; esp->dma_memory_read = NULL; esp->dma_memory_write = NULL; diff --git a/hw/microblaze/xlnx-zynqmp-pmu.c b/hw/microblaze/xlnx-zynqmp-pmu.c index 5f994547f7..ab9924bf20 100644 --- a/hw/microblaze/xlnx-zynqmp-pmu.c +++ b/hw/microblaze/xlnx-zynqmp-pmu.c @@ -24,12 +24,14 @@ #include "hw/intc/xlnx-zynqmp-ipi.h" #include "hw/intc/xlnx-pmu-iomod-intc.h" +#include "qom/object.h" /* Define the PMU device */ #define TYPE_XLNX_ZYNQMP_PMU_SOC "xlnx,zynqmp-pmu-soc" -#define XLNX_ZYNQMP_PMU_SOC(obj) OBJECT_CHECK(XlnxZynqMPPMUSoCState, (obj), \ - TYPE_XLNX_ZYNQMP_PMU_SOC) +typedef struct XlnxZynqMPPMUSoCState XlnxZynqMPPMUSoCState; +DECLARE_INSTANCE_CHECKER(XlnxZynqMPPMUSoCState, XLNX_ZYNQMP_PMU_SOC, + TYPE_XLNX_ZYNQMP_PMU_SOC) #define XLNX_ZYNQMP_PMU_ROM_SIZE 0x8000 #define XLNX_ZYNQMP_PMU_ROM_ADDR 0xFFD00000 @@ -46,7 +48,7 @@ static const uint64_t ipi_irq[XLNX_ZYNQMP_PMU_NUM_IPIS] = { 19, 20, 21, 22, }; -typedef struct XlnxZynqMPPMUSoCState { +struct XlnxZynqMPPMUSoCState { /*< private >*/ DeviceState parent_obj; @@ -54,7 +56,7 @@ typedef struct XlnxZynqMPPMUSoCState { MicroBlazeCPU cpu; XlnxPMUIOIntc intc; XlnxZynqMPIPI ipi[XLNX_ZYNQMP_PMU_NUM_IPIS]; -} XlnxZynqMPPMUSoCState; +}; static void xlnx_zynqmp_pmu_soc_init(Object *obj) diff --git a/hw/mips/boston.c b/hw/mips/boston.c index 766458c015..1b3f69e949 100644 --- a/hw/mips/boston.c +++ b/hw/mips/boston.c @@ -41,11 +41,14 @@ #include "sysemu/runstate.h" #include <libfdt.h> +#include "qom/object.h" #define TYPE_MIPS_BOSTON "mips-boston" -#define BOSTON(obj) OBJECT_CHECK(BostonState, (obj), TYPE_MIPS_BOSTON) +typedef struct BostonState BostonState; +DECLARE_INSTANCE_CHECKER(BostonState, BOSTON, + TYPE_MIPS_BOSTON) -typedef struct { +struct BostonState { SysBusDevice parent_obj; MachineState *mach; @@ -58,7 +61,7 @@ typedef struct { hwaddr kernel_entry; hwaddr fdt_base; -} BostonState; +}; enum boston_plat_reg { PLAT_FPGA_BUILD = 0x00, diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index 756ac9ae12..b613e1e011 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -35,6 +35,7 @@ #include "hw/irq.h" #include "exec/address-spaces.h" #include "trace.h" +#include "qom/object.h" #define GT_REGS (0x1000 >> 2) @@ -230,10 +231,11 @@ #define TYPE_GT64120_PCI_HOST_BRIDGE "gt64120" -#define GT64120_PCI_HOST_BRIDGE(obj) \ - OBJECT_CHECK(GT64120State, (obj), TYPE_GT64120_PCI_HOST_BRIDGE) +typedef struct GT64120State GT64120State; +DECLARE_INSTANCE_CHECKER(GT64120State, GT64120_PCI_HOST_BRIDGE, + TYPE_GT64120_PCI_HOST_BRIDGE) -typedef struct GT64120State { +struct GT64120State { PCIHostState parent_obj; uint32_t regs[GT_REGS]; @@ -243,7 +245,7 @@ typedef struct GT64120State { PCI_MAPPING_ENTRY(ISD); MemoryRegion pci0_mem; AddressSpace pci0_mem_as; -} GT64120State; +}; /* Adjust range to avoid touching space which isn't mappable via PCI */ /* diff --git a/hw/mips/jazz.c b/hw/mips/jazz.c index 82a6e3220e..47723093b6 100644 --- a/hw/mips/jazz.c +++ b/hw/mips/jazz.c @@ -309,7 +309,7 @@ static void mips_jazz_init(MachineState *machine, /* SCSI adapter */ dev = qdev_new(TYPE_ESP); - sysbus_esp = ESP_STATE(dev); + sysbus_esp = ESP(dev); esp = &sysbus_esp->esp; esp->dma_memory_read = rc4030_dma_read; esp->dma_memory_write = rc4030_dma_write; diff --git a/hw/mips/malta.c b/hw/mips/malta.c index a59e20c81c..5b73ea4692 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -45,6 +45,7 @@ #include "hw/loader.h" #include "elf.h" #include "exec/address-spaces.h" +#include "qom/object.h" #include "hw/sysbus.h" /* SysBusDevice */ #include "qemu/host-utils.h" #include "sysemu/qtest.h" @@ -88,14 +89,16 @@ typedef struct { } MaltaFPGAState; #define TYPE_MIPS_MALTA "mips-malta" -#define MIPS_MALTA(obj) OBJECT_CHECK(MaltaState, (obj), TYPE_MIPS_MALTA) +typedef struct MaltaState MaltaState; +DECLARE_INSTANCE_CHECKER(MaltaState, MIPS_MALTA, + TYPE_MIPS_MALTA) -typedef struct { +struct MaltaState { SysBusDevice parent_obj; MIPSCPSState cps; qemu_irq i8259[ISA_NUM_IRQS]; -} MaltaState; +}; static struct _loaderparams { int ram_size, ram_low_size; diff --git a/hw/mips/trace-events b/hw/mips/trace-events index 321933283f..915139d981 100644 --- a/hw/mips/trace-events +++ b/hw/mips/trace-events @@ -1,4 +1,4 @@ -# gt64xxx.c +# gt64xxx_pci.c gt64120_read(const char *regname, unsigned size, uint64_t value) "gt64120 read %s size:%u value:0x%08" PRIx64 gt64120_write(const char *regname, unsigned size, uint64_t value) "gt64120 write %s size:%u value:0x%08" PRIx64 gt64120_isd_remap(uint64_t from_length, uint64_t from_addr, uint64_t to_length, uint64_t to_addr) "ISD: 0x%08" PRIx64 "@0x%08" PRIx64 " -> 0x%08" PRIx64 "@0x%08" PRIx64 diff --git a/hw/misc/applesmc.c b/hw/misc/applesmc.c index 1c4addb201..dca3fba028 100644 --- a/hw/misc/applesmc.c +++ b/hw/misc/applesmc.c @@ -36,6 +36,7 @@ #include "ui/console.h" #include "qemu/module.h" #include "qemu/timer.h" +#include "qom/object.h" /* #define DEBUG_SMC */ @@ -89,9 +90,10 @@ struct AppleSMCData { QLIST_ENTRY(AppleSMCData) node; }; -#define APPLE_SMC(obj) OBJECT_CHECK(AppleSMCState, (obj), TYPE_APPLE_SMC) - typedef struct AppleSMCState AppleSMCState; +DECLARE_INSTANCE_CHECKER(AppleSMCState, APPLE_SMC, + TYPE_APPLE_SMC) + struct AppleSMCState { ISADevice parent_obj; diff --git a/hw/misc/arm_integrator_debug.c b/hw/misc/arm_integrator_debug.c index 3e23201ae6..822deffc0c 100644 --- a/hw/misc/arm_integrator_debug.c +++ b/hw/misc/arm_integrator_debug.c @@ -19,15 +19,17 @@ #include "hw/misc/arm_integrator_debug.h" #include "qemu/log.h" #include "qemu/module.h" +#include "qom/object.h" -#define INTEGRATOR_DEBUG(obj) \ - OBJECT_CHECK(IntegratorDebugState, (obj), TYPE_INTEGRATOR_DEBUG) +typedef struct IntegratorDebugState IntegratorDebugState; +DECLARE_INSTANCE_CHECKER(IntegratorDebugState, INTEGRATOR_DEBUG, + TYPE_INTEGRATOR_DEBUG) -typedef struct { +struct IntegratorDebugState { SysBusDevice parent_obj; MemoryRegion iomem; -} IntegratorDebugState; +}; static uint64_t intdbg_control_read(void *opaque, hwaddr offset, unsigned size) diff --git a/hw/misc/arm_l2x0.c b/hw/misc/arm_l2x0.c index 2066c97f5f..93948c3bd8 100644 --- a/hw/misc/arm_l2x0.c +++ b/hw/misc/arm_l2x0.c @@ -24,14 +24,17 @@ #include "migration/vmstate.h" #include "qemu/log.h" #include "qemu/module.h" +#include "qom/object.h" /* L2C-310 r3p2 */ #define CACHE_ID 0x410000c8 #define TYPE_ARM_L2X0 "l2x0" -#define ARM_L2X0(obj) OBJECT_CHECK(L2x0State, (obj), TYPE_ARM_L2X0) +typedef struct L2x0State L2x0State; +DECLARE_INSTANCE_CHECKER(L2x0State, ARM_L2X0, + TYPE_ARM_L2X0) -typedef struct L2x0State { +struct L2x0State { SysBusDevice parent_obj; MemoryRegion iomem; @@ -42,7 +45,7 @@ typedef struct L2x0State { uint32_t tag_ctrl; uint32_t filter_start; uint32_t filter_end; -} L2x0State; +}; static const VMStateDescription vmstate_l2x0 = { .name = "l2x0", diff --git a/hw/misc/arm_sysctl.c b/hw/misc/arm_sysctl.c index a474bbdd19..f0f49e76e8 100644 --- a/hw/misc/arm_sysctl.c +++ b/hw/misc/arm_sysctl.c @@ -18,14 +18,16 @@ #include "hw/arm/primecell.h" #include "qemu/log.h" #include "qemu/module.h" +#include "qom/object.h" #define LOCK_VALUE 0xa05f #define TYPE_ARM_SYSCTL "realview_sysctl" -#define ARM_SYSCTL(obj) \ - OBJECT_CHECK(arm_sysctl_state, (obj), TYPE_ARM_SYSCTL) +typedef struct arm_sysctl_state arm_sysctl_state; +DECLARE_INSTANCE_CHECKER(arm_sysctl_state, ARM_SYSCTL, + TYPE_ARM_SYSCTL) -typedef struct { +struct arm_sysctl_state { SysBusDevice parent_obj; MemoryRegion iomem; @@ -51,7 +53,7 @@ typedef struct { uint32_t *db_voltage; uint32_t db_num_clocks; uint32_t *db_clock_reset; -} arm_sysctl_state; +}; static const VMStateDescription vmstate_arm_sysctl = { .name = "realview_sysctl", diff --git a/hw/misc/debugexit.c b/hw/misc/debugexit.c index 99a814f10c..c6b0cffd77 100644 --- a/hw/misc/debugexit.c +++ b/hw/misc/debugexit.c @@ -11,18 +11,20 @@ #include "hw/isa/isa.h" #include "hw/qdev-properties.h" #include "qemu/module.h" +#include "qom/object.h" #define TYPE_ISA_DEBUG_EXIT_DEVICE "isa-debug-exit" -#define ISA_DEBUG_EXIT_DEVICE(obj) \ - OBJECT_CHECK(ISADebugExitState, (obj), TYPE_ISA_DEBUG_EXIT_DEVICE) +typedef struct ISADebugExitState ISADebugExitState; +DECLARE_INSTANCE_CHECKER(ISADebugExitState, ISA_DEBUG_EXIT_DEVICE, + TYPE_ISA_DEBUG_EXIT_DEVICE) -typedef struct ISADebugExitState { +struct ISADebugExitState { ISADevice parent_obj; uint32_t iobase; uint32_t iosize; MemoryRegion io; -} ISADebugExitState; +}; static uint64_t debug_exit_read(void *opaque, hwaddr addr, unsigned size) { diff --git a/hw/misc/eccmemctl.c b/hw/misc/eccmemctl.c index aec447368e..468c2a491d 100644 --- a/hw/misc/eccmemctl.c +++ b/hw/misc/eccmemctl.c @@ -29,6 +29,7 @@ #include "migration/vmstate.h" #include "qemu/module.h" #include "trace.h" +#include "qom/object.h" /* There are 3 versions of this chip used in SMP sun4m systems: * MCC (version 0, implementation 0) SS-600MP @@ -126,9 +127,11 @@ #define ECC_DIAG_MASK (ECC_DIAG_SIZE - 1) #define TYPE_ECC_MEMCTL "eccmemctl" -#define ECC_MEMCTL(obj) OBJECT_CHECK(ECCState, (obj), TYPE_ECC_MEMCTL) +typedef struct ECCState ECCState; +DECLARE_INSTANCE_CHECKER(ECCState, ECC_MEMCTL, + TYPE_ECC_MEMCTL) -typedef struct ECCState { +struct ECCState { SysBusDevice parent_obj; MemoryRegion iomem, iomem_diag; @@ -136,7 +139,7 @@ typedef struct ECCState { uint32_t regs[ECC_NREGS]; uint8_t diag[ECC_DIAG_SIZE]; uint32_t version; -} ECCState; +}; static void ecc_mem_write(void *opaque, hwaddr addr, uint64_t val, unsigned size) diff --git a/hw/misc/edu.c b/hw/misc/edu.c index ec617e63f3..0ff9d1ac78 100644 --- a/hw/misc/edu.c +++ b/hw/misc/edu.c @@ -28,12 +28,15 @@ #include "hw/hw.h" #include "hw/pci/msi.h" #include "qemu/timer.h" +#include "qom/object.h" #include "qemu/main-loop.h" /* iothread mutex */ #include "qemu/module.h" #include "qapi/visitor.h" #define TYPE_PCI_EDU_DEVICE "edu" -#define EDU(obj) OBJECT_CHECK(EduState, obj, TYPE_PCI_EDU_DEVICE) +typedef struct EduState EduState; +DECLARE_INSTANCE_CHECKER(EduState, EDU, + TYPE_PCI_EDU_DEVICE) #define FACT_IRQ 0x00000001 #define DMA_IRQ 0x00000100 @@ -41,7 +44,7 @@ #define DMA_START 0x40000 #define DMA_SIZE 4096 -typedef struct { +struct EduState { PCIDevice pdev; MemoryRegion mmio; @@ -72,7 +75,7 @@ typedef struct { QEMUTimer dma_timer; char dma_buf[DMA_SIZE]; uint64_t dma_mask; -} EduState; +}; static bool edu_msi_enabled(EduState *edu) { diff --git a/hw/misc/empty_slot.c b/hw/misc/empty_slot.c index 9a011b1c11..57dcdfbe14 100644 --- a/hw/misc/empty_slot.c +++ b/hw/misc/empty_slot.c @@ -15,17 +15,20 @@ #include "hw/misc/empty_slot.h" #include "qapi/error.h" #include "trace.h" +#include "qom/object.h" #define TYPE_EMPTY_SLOT "empty_slot" -#define EMPTY_SLOT(obj) OBJECT_CHECK(EmptySlot, (obj), TYPE_EMPTY_SLOT) +typedef struct EmptySlot EmptySlot; +DECLARE_INSTANCE_CHECKER(EmptySlot, EMPTY_SLOT, + TYPE_EMPTY_SLOT) -typedef struct EmptySlot { +struct EmptySlot { SysBusDevice parent_obj; MemoryRegion iomem; char *name; uint64_t size; -} EmptySlot; +}; static uint64_t empty_slot_read(void *opaque, hwaddr addr, unsigned size) diff --git a/hw/misc/exynos4210_clk.c b/hw/misc/exynos4210_clk.c index bc1463ff89..4b469f6419 100644 --- a/hw/misc/exynos4210_clk.c +++ b/hw/misc/exynos4210_clk.c @@ -22,10 +22,12 @@ #include "migration/vmstate.h" #include "qemu/log.h" #include "qemu/module.h" +#include "qom/object.h" #define TYPE_EXYNOS4210_CLK "exynos4210.clk" -#define EXYNOS4210_CLK(obj) \ - OBJECT_CHECK(Exynos4210ClkState, (obj), TYPE_EXYNOS4210_CLK) +typedef struct Exynos4210ClkState Exynos4210ClkState; +DECLARE_INSTANCE_CHECKER(Exynos4210ClkState, EXYNOS4210_CLK, + TYPE_EXYNOS4210_CLK) #define CLK_PLL_LOCKED BIT(29) @@ -55,12 +57,12 @@ static const Exynos4210Reg exynos4210_clk_regs[] = { #define EXYNOS4210_REGS_NUM ARRAY_SIZE(exynos4210_clk_regs) -typedef struct Exynos4210ClkState { +struct Exynos4210ClkState { SysBusDevice parent_obj; MemoryRegion iomem; uint32_t reg[EXYNOS4210_REGS_NUM]; -} Exynos4210ClkState; +}; static uint64_t exynos4210_clk_read(void *opaque, hwaddr offset, unsigned size) diff --git a/hw/misc/exynos4210_pmu.c b/hw/misc/exynos4210_pmu.c index 500f28343f..b19b82a88c 100644 --- a/hw/misc/exynos4210_pmu.c +++ b/hw/misc/exynos4210_pmu.c @@ -29,6 +29,7 @@ #include "migration/vmstate.h" #include "qemu/module.h" #include "sysemu/runstate.h" +#include "qom/object.h" #ifndef DEBUG_PMU #define DEBUG_PMU 0 @@ -394,15 +395,16 @@ static const Exynos4210PmuReg exynos4210_pmu_regs[] = { #define PMU_NUM_OF_REGISTERS ARRAY_SIZE(exynos4210_pmu_regs) #define TYPE_EXYNOS4210_PMU "exynos4210.pmu" -#define EXYNOS4210_PMU(obj) \ - OBJECT_CHECK(Exynos4210PmuState, (obj), TYPE_EXYNOS4210_PMU) +typedef struct Exynos4210PmuState Exynos4210PmuState; +DECLARE_INSTANCE_CHECKER(Exynos4210PmuState, EXYNOS4210_PMU, + TYPE_EXYNOS4210_PMU) -typedef struct Exynos4210PmuState { +struct Exynos4210PmuState { SysBusDevice parent_obj; MemoryRegion iomem; uint32_t reg[PMU_NUM_OF_REGISTERS]; -} Exynos4210PmuState; +}; static void exynos4210_pmu_poweroff(void) { diff --git a/hw/misc/exynos4210_rng.c b/hw/misc/exynos4210_rng.c index 38cd61c7ea..13ec6e188b 100644 --- a/hw/misc/exynos4210_rng.c +++ b/hw/misc/exynos4210_rng.c @@ -24,6 +24,7 @@ #include "qemu/log.h" #include "qemu/guest-random.h" #include "qemu/module.h" +#include "qom/object.h" #define DEBUG_EXYNOS_RNG 0 @@ -35,8 +36,9 @@ } while (0) #define TYPE_EXYNOS4210_RNG "exynos4210.rng" -#define EXYNOS4210_RNG(obj) \ - OBJECT_CHECK(Exynos4210RngState, (obj), TYPE_EXYNOS4210_RNG) +typedef struct Exynos4210RngState Exynos4210RngState; +DECLARE_INSTANCE_CHECKER(Exynos4210RngState, EXYNOS4210_RNG, + TYPE_EXYNOS4210_RNG) /* * Exynos4220, PRNG, only polling mode is supported. @@ -68,7 +70,7 @@ #define EXYNOS4210_RNG_REGS_MEM_SIZE 0x200 -typedef struct Exynos4210RngState { +struct Exynos4210RngState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -79,7 +81,7 @@ typedef struct Exynos4210RngState { /* Register values */ uint32_t reg_control; uint32_t reg_status; -} Exynos4210RngState; +}; static bool exynos4210_rng_seed_ready(const Exynos4210RngState *s) { diff --git a/hw/misc/ivshmem.c b/hw/misc/ivshmem.c index 2b6882face..e321e5cb69 100644 --- a/hw/misc/ivshmem.c +++ b/hw/misc/ivshmem.c @@ -38,6 +38,7 @@ #include "qapi/visitor.h" #include "hw/misc/ivshmem.h" +#include "qom/object.h" #define PCI_VENDOR_ID_IVSHMEM PCI_VENDOR_ID_REDHAT_QUMRANET #define PCI_DEVICE_ID_IVSHMEM 0x1110 @@ -57,20 +58,21 @@ } while (0) #define TYPE_IVSHMEM_COMMON "ivshmem-common" -#define IVSHMEM_COMMON(obj) \ - OBJECT_CHECK(IVShmemState, (obj), TYPE_IVSHMEM_COMMON) +typedef struct IVShmemState IVShmemState; +DECLARE_INSTANCE_CHECKER(IVShmemState, IVSHMEM_COMMON, + TYPE_IVSHMEM_COMMON) #define TYPE_IVSHMEM_PLAIN "ivshmem-plain" -#define IVSHMEM_PLAIN(obj) \ - OBJECT_CHECK(IVShmemState, (obj), TYPE_IVSHMEM_PLAIN) +DECLARE_INSTANCE_CHECKER(IVShmemState, IVSHMEM_PLAIN, + TYPE_IVSHMEM_PLAIN) #define TYPE_IVSHMEM_DOORBELL "ivshmem-doorbell" -#define IVSHMEM_DOORBELL(obj) \ - OBJECT_CHECK(IVShmemState, (obj), TYPE_IVSHMEM_DOORBELL) +DECLARE_INSTANCE_CHECKER(IVShmemState, IVSHMEM_DOORBELL, + TYPE_IVSHMEM_DOORBELL) #define TYPE_IVSHMEM "ivshmem" -#define IVSHMEM(obj) \ - OBJECT_CHECK(IVShmemState, (obj), TYPE_IVSHMEM) +DECLARE_INSTANCE_CHECKER(IVShmemState, IVSHMEM, + TYPE_IVSHMEM) typedef struct Peer { int nb_eventfds; @@ -83,7 +85,7 @@ typedef struct MSIVector { bool unmasked; } MSIVector; -typedef struct IVShmemState { +struct IVShmemState { /*< private >*/ PCIDevice parent_obj; /*< public >*/ @@ -115,7 +117,7 @@ typedef struct IVShmemState { /* migration stuff */ OnOffAuto master; Error *migration_blocker; -} IVShmemState; +}; /* registers for the Inter-VM shared memory device */ enum ivshmem_registers { diff --git a/hw/misc/milkymist-hpdmc.c b/hw/misc/milkymist-hpdmc.c index 61e86e6b34..f25715e09e 100644 --- a/hw/misc/milkymist-hpdmc.c +++ b/hw/misc/milkymist-hpdmc.c @@ -27,6 +27,7 @@ #include "trace.h" #include "qemu/error-report.h" #include "qemu/module.h" +#include "qom/object.h" enum { R_SYSTEM = 0, @@ -43,8 +44,9 @@ enum { }; #define TYPE_MILKYMIST_HPDMC "milkymist-hpdmc" -#define MILKYMIST_HPDMC(obj) \ - OBJECT_CHECK(MilkymistHpdmcState, (obj), TYPE_MILKYMIST_HPDMC) +typedef struct MilkymistHpdmcState MilkymistHpdmcState; +DECLARE_INSTANCE_CHECKER(MilkymistHpdmcState, MILKYMIST_HPDMC, + TYPE_MILKYMIST_HPDMC) struct MilkymistHpdmcState { SysBusDevice parent_obj; @@ -53,7 +55,6 @@ struct MilkymistHpdmcState { uint32_t regs[R_MAX]; }; -typedef struct MilkymistHpdmcState MilkymistHpdmcState; static uint64_t hpdmc_read(void *opaque, hwaddr addr, unsigned size) diff --git a/hw/misc/milkymist-pfpu.c b/hw/misc/milkymist-pfpu.c index 516825e83d..489bb8873f 100644 --- a/hw/misc/milkymist-pfpu.c +++ b/hw/misc/milkymist-pfpu.c @@ -31,6 +31,7 @@ #include "qemu/module.h" #include "qemu/error-report.h" #include <math.h> +#include "qom/object.h" /* #define TRACE_EXEC */ @@ -120,8 +121,9 @@ static const char *opcode_to_str[] = { #endif #define TYPE_MILKYMIST_PFPU "milkymist-pfpu" -#define MILKYMIST_PFPU(obj) \ - OBJECT_CHECK(MilkymistPFPUState, (obj), TYPE_MILKYMIST_PFPU) +typedef struct MilkymistPFPUState MilkymistPFPUState; +DECLARE_INSTANCE_CHECKER(MilkymistPFPUState, MILKYMIST_PFPU, + TYPE_MILKYMIST_PFPU) struct MilkymistPFPUState { SysBusDevice parent_obj; @@ -137,7 +139,6 @@ struct MilkymistPFPUState { int output_queue_pos; uint32_t output_queue[MAX_LATENCY]; }; -typedef struct MilkymistPFPUState MilkymistPFPUState; static inline uint32_t get_dma_address(uint32_t base, uint32_t x, uint32_t y) diff --git a/hw/misc/mst_fpga.c b/hw/misc/mst_fpga.c index 81abdf8ede..f74d8cdd4a 100644 --- a/hw/misc/mst_fpga.c +++ b/hw/misc/mst_fpga.c @@ -16,6 +16,7 @@ #include "hw/sysbus.h" #include "migration/vmstate.h" #include "qemu/module.h" +#include "qom/object.h" /* Mainstone FPGA for extern irqs */ #define FPGA_GPIO_PIN 0 @@ -40,10 +41,11 @@ #define MST_PCMCIA_CD1_IRQ 13 #define TYPE_MAINSTONE_FPGA "mainstone-fpga" -#define MAINSTONE_FPGA(obj) \ - OBJECT_CHECK(mst_irq_state, (obj), TYPE_MAINSTONE_FPGA) +typedef struct mst_irq_state mst_irq_state; +DECLARE_INSTANCE_CHECKER(mst_irq_state, MAINSTONE_FPGA, + TYPE_MAINSTONE_FPGA) -typedef struct mst_irq_state{ +struct mst_irq_state { SysBusDevice parent_obj; MemoryRegion iomem; @@ -63,7 +65,7 @@ typedef struct mst_irq_state{ uint32_t intsetclr; uint32_t pcmcia0; uint32_t pcmcia1; -}mst_irq_state; +}; static void mst_fpga_set_irq(void *opaque, int irq, int level) diff --git a/hw/misc/pc-testdev.c b/hw/misc/pc-testdev.c index 8aa8e6549f..577a15bf58 100644 --- a/hw/misc/pc-testdev.c +++ b/hw/misc/pc-testdev.c @@ -39,10 +39,11 @@ #include "qemu/module.h" #include "hw/irq.h" #include "hw/isa/isa.h" +#include "qom/object.h" #define IOMEM_LEN 0x10000 -typedef struct PCTestdev { +struct PCTestdev { ISADevice parent_obj; MemoryRegion ioport; @@ -52,11 +53,12 @@ typedef struct PCTestdev { MemoryRegion iomem; uint32_t ioport_data; char iomem_buf[IOMEM_LEN]; -} PCTestdev; +}; +typedef struct PCTestdev PCTestdev; #define TYPE_TESTDEV "pc-testdev" -#define TESTDEV(obj) \ - OBJECT_CHECK(PCTestdev, (obj), TYPE_TESTDEV) +DECLARE_INSTANCE_CHECKER(PCTestdev, TESTDEV, + TYPE_TESTDEV) static uint64_t test_irq_line_read(void *opaque, hwaddr addr, unsigned size) { diff --git a/hw/misc/pca9552.c b/hw/misc/pca9552.c index e4ccdeaf78..b7686e27d7 100644 --- a/hw/misc/pca9552.c +++ b/hw/misc/pca9552.c @@ -22,20 +22,20 @@ #include "qapi/error.h" #include "qapi/visitor.h" #include "trace.h" +#include "qom/object.h" -typedef struct PCA955xClass { +struct PCA955xClass { /*< private >*/ I2CSlaveClass parent_class; /*< public >*/ uint8_t pin_count; uint8_t max_reg; -} PCA955xClass; +}; +typedef struct PCA955xClass PCA955xClass; -#define PCA955X_CLASS(klass) \ - OBJECT_CLASS_CHECK(PCA955xClass, (klass), TYPE_PCA955X) -#define PCA955X_GET_CLASS(obj) \ - OBJECT_GET_CLASS(PCA955xClass, (obj), TYPE_PCA955X) +DECLARE_CLASS_CHECKERS(PCA955xClass, PCA955X, + TYPE_PCA955X) #define PCA9552_LED_ON 0x0 #define PCA9552_LED_OFF 0x1 diff --git a/hw/misc/pci-testdev.c b/hw/misc/pci-testdev.c index 188de4d9cc..86d4816769 100644 --- a/hw/misc/pci-testdev.c +++ b/hw/misc/pci-testdev.c @@ -24,6 +24,7 @@ #include "qemu/event_notifier.h" #include "qemu/module.h" #include "sysemu/kvm.h" +#include "qom/object.h" typedef struct PCITestDevHdr { uint8_t test; @@ -78,7 +79,7 @@ enum { #define IOTEST_ACCESS_TYPE uint8_t #define IOTEST_ACCESS_WIDTH (sizeof(uint8_t)) -typedef struct PCITestDevState { +struct PCITestDevState { /*< private >*/ PCIDevice parent_obj; /*< public >*/ @@ -90,12 +91,13 @@ typedef struct PCITestDevState { uint64_t membar_size; MemoryRegion membar; -} PCITestDevState; +}; +typedef struct PCITestDevState PCITestDevState; #define TYPE_PCI_TEST_DEV "pci-testdev" -#define PCI_TEST_DEV(obj) \ - OBJECT_CHECK(PCITestDevState, (obj), TYPE_PCI_TEST_DEV) +DECLARE_INSTANCE_CHECKER(PCITestDevState, PCI_TEST_DEV, + TYPE_PCI_TEST_DEV) #define IOTEST_IS_MEM(i) (strcmp(IOTEST_TYPE(i), "portio")) #define IOTEST_REGION(d, i) (IOTEST_IS_MEM(i) ? &(d)->mmio : &(d)->portio) diff --git a/hw/misc/puv3_pm.c b/hw/misc/puv3_pm.c index 8989d363cd..cac8497f81 100644 --- a/hw/misc/puv3_pm.c +++ b/hw/misc/puv3_pm.c @@ -11,6 +11,7 @@ #include "qemu/osdep.h" #include "hw/sysbus.h" +#include "qom/object.h" #undef DEBUG_PUV3 #include "hw/unicore32/puv3.h" @@ -18,9 +19,11 @@ #include "qemu/log.h" #define TYPE_PUV3_PM "puv3_pm" -#define PUV3_PM(obj) OBJECT_CHECK(PUV3PMState, (obj), TYPE_PUV3_PM) +typedef struct PUV3PMState PUV3PMState; +DECLARE_INSTANCE_CHECKER(PUV3PMState, PUV3_PM, + TYPE_PUV3_PM) -typedef struct PUV3PMState { +struct PUV3PMState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -31,7 +34,7 @@ typedef struct PUV3PMState { uint32_t reg_PLL_DDR_CFG; uint32_t reg_PLL_VGA_CFG; uint32_t reg_DIVCFG; -} PUV3PMState; +}; static uint64_t puv3_pm_read(void *opaque, hwaddr offset, unsigned size) diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c index abb10bbcaf..598d5471a4 100644 --- a/hw/misc/pvpanic.c +++ b/hw/misc/pvpanic.c @@ -20,6 +20,7 @@ #include "hw/nvram/fw_cfg.h" #include "hw/qdev-properties.h" #include "hw/misc/pvpanic.h" +#include "qom/object.h" /* The bit of supported pv event, TODO: include uapi header and remove this */ #define PVPANIC_F_PANICKED 0 @@ -29,8 +30,9 @@ #define PVPANIC_PANICKED (1 << PVPANIC_F_PANICKED) #define PVPANIC_CRASHLOADED (1 << PVPANIC_F_CRASHLOADED) -#define ISA_PVPANIC_DEVICE(obj) \ - OBJECT_CHECK(PVPanicState, (obj), TYPE_PVPANIC) +typedef struct PVPanicState PVPanicState; +DECLARE_INSTANCE_CHECKER(PVPanicState, ISA_PVPANIC_DEVICE, + TYPE_PVPANIC) static void handle_event(int event) { @@ -54,12 +56,12 @@ static void handle_event(int event) #include "hw/isa/isa.h" -typedef struct PVPanicState { +struct PVPanicState { ISADevice parent_obj; MemoryRegion io; uint16_t ioport; -} PVPanicState; +}; /* return supported events on read */ static uint64_t pvpanic_ioport_read(void *opaque, hwaddr addr, unsigned size) diff --git a/hw/misc/sga.c b/hw/misc/sga.c index 6866bf72cb..477f587ef3 100644 --- a/hw/misc/sga.c +++ b/hw/misc/sga.c @@ -29,15 +29,18 @@ #include "hw/isa/isa.h" #include "hw/loader.h" #include "qemu/module.h" +#include "qom/object.h" #define SGABIOS_FILENAME "sgabios.bin" #define TYPE_SGA "sga" -#define SGA(obj) OBJECT_CHECK(ISASGAState, (obj), TYPE_SGA) +typedef struct ISASGAState ISASGAState; +DECLARE_INSTANCE_CHECKER(ISASGAState, SGA, + TYPE_SGA) -typedef struct ISASGAState { +struct ISASGAState { ISADevice parent_obj; -} ISASGAState; +}; static void sga_realizefn(DeviceState *dev, Error **errp) { diff --git a/hw/misc/slavio_misc.c b/hw/misc/slavio_misc.c index 279b38dfc7..ab27ad462e 100644 --- a/hw/misc/slavio_misc.c +++ b/hw/misc/slavio_misc.c @@ -29,6 +29,7 @@ #include "qemu/module.h" #include "sysemu/runstate.h" #include "trace.h" +#include "qom/object.h" /* * This is the auxio port, chip control and system control part of @@ -39,9 +40,11 @@ */ #define TYPE_SLAVIO_MISC "slavio_misc" -#define SLAVIO_MISC(obj) OBJECT_CHECK(MiscState, (obj), TYPE_SLAVIO_MISC) +typedef struct MiscState MiscState; +DECLARE_INSTANCE_CHECKER(MiscState, SLAVIO_MISC, + TYPE_SLAVIO_MISC) -typedef struct MiscState { +struct MiscState { SysBusDevice parent_obj; MemoryRegion cfg_iomem; @@ -59,17 +62,19 @@ typedef struct MiscState { uint8_t diag, mctrl; uint8_t sysctrl; uint16_t leds; -} MiscState; +}; #define TYPE_APC "apc" -#define APC(obj) OBJECT_CHECK(APCState, (obj), TYPE_APC) +typedef struct APCState APCState; +DECLARE_INSTANCE_CHECKER(APCState, APC, + TYPE_APC) -typedef struct APCState { +struct APCState { SysBusDevice parent_obj; MemoryRegion iomem; qemu_irq cpu_halt; -} APCState; +}; #define MISC_SIZE 1 #define LED_SIZE 2 diff --git a/hw/misc/tmp105.h b/hw/misc/tmp105.h index 9ba05ecc9c..7ee8a496ff 100644 --- a/hw/misc/tmp105.h +++ b/hw/misc/tmp105.h @@ -16,9 +16,12 @@ #include "hw/i2c/i2c.h" #include "hw/misc/tmp105_regs.h" +#include "qom/object.h" #define TYPE_TMP105 "tmp105" -#define TMP105(obj) OBJECT_CHECK(TMP105State, (obj), TYPE_TMP105) +typedef struct TMP105State TMP105State; +DECLARE_INSTANCE_CHECKER(TMP105State, TMP105, + TYPE_TMP105) /** * TMP105State: @@ -27,7 +30,7 @@ * * @see_also: http://www.ti.com/lit/gpn/tmp105 */ -typedef struct TMP105State { +struct TMP105State { /*< private >*/ I2CSlave i2c; /*< public >*/ @@ -42,6 +45,6 @@ typedef struct TMP105State { int16_t limit[2]; int faults; uint8_t alarm; -} TMP105State; +}; #endif diff --git a/hw/misc/tmp421.c b/hw/misc/tmp421.c index 49abe2d246..212d6e0e83 100644 --- a/hw/misc/tmp421.c +++ b/hw/misc/tmp421.c @@ -30,6 +30,7 @@ #include "qapi/error.h" #include "qapi/visitor.h" #include "qemu/module.h" +#include "qom/object.h" /* Manufacturer / Device ID's */ #define TMP421_MANUFACTURER_ID 0x55 @@ -48,7 +49,7 @@ static const DeviceInfo devices[] = { { TMP423_DEVICE_ID, "tmp423" }, }; -typedef struct TMP421State { +struct TMP421State { /*< private >*/ I2CSlave i2c; /*< public >*/ @@ -63,20 +64,19 @@ typedef struct TMP421State { uint8_t buf[2]; uint8_t pointer; -} TMP421State; +}; +typedef struct TMP421State TMP421State; -typedef struct TMP421Class { +struct TMP421Class { I2CSlaveClass parent_class; DeviceInfo *dev; -} TMP421Class; +}; +typedef struct TMP421Class TMP421Class; #define TYPE_TMP421 "tmp421-generic" -#define TMP421(obj) OBJECT_CHECK(TMP421State, (obj), TYPE_TMP421) +DECLARE_OBJ_CHECKERS(TMP421State, TMP421Class, + TMP421, TYPE_TMP421) -#define TMP421_CLASS(klass) \ - OBJECT_CLASS_CHECK(TMP421Class, (klass), TYPE_TMP421) -#define TMP421_GET_CLASS(obj) \ - OBJECT_GET_CLASS(TMP421Class, (obj), TYPE_TMP421) /* the TMP421 registers */ #define TMP421_STATUS_REG 0x08 diff --git a/hw/misc/trace-events b/hw/misc/trace-events index 066752aa90..56a622d1e9 100644 --- a/hw/misc/trace-events +++ b/hw/misc/trace-events @@ -44,7 +44,6 @@ ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = 0 ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= 0x%02x" # empty_slot.c -empty_slot_read(uint64_t addr, unsigned width, uint64_t value, unsigned size, const char *name) "rd addr:0x%04"PRIx64" data:0x%0*"PRIx64" size %u [%s]" empty_slot_write(uint64_t addr, unsigned width, uint64_t value, unsigned size, const char *name) "wr addr:0x%04"PRIx64" data:0x%0*"PRIx64" size %u [%s]" # slavio_misc.c @@ -111,13 +110,13 @@ mos6522_set_sr_int(void) "set sr_int" mos6522_write(uint64_t addr, uint64_t val) "reg=0x%"PRIx64 " val=0x%"PRIx64 mos6522_read(uint64_t addr, unsigned val) "reg=0x%"PRIx64 " val=0x%x" -# stm32f4xx_syscfg +# stm32f4xx_syscfg.c stm32f4xx_syscfg_set_irq(int gpio, int line, int level) "Interupt: GPIO: %d, Line: %d; Level: %d" stm32f4xx_pulse_exti(int irq) "Pulse EXTI: %d" stm32f4xx_syscfg_read(uint64_t addr) "reg read: addr: 0x%" PRIx64 " " stm32f4xx_syscfg_write(uint64_t addr, uint64_t data) "reg write: addr: 0x%" PRIx64 " val: 0x%" PRIx64 "" -# stm32f4xx_exti +# stm32f4xx_exti.c stm32f4xx_exti_set_irq(int irq, int leve) "Set EXTI: %d to %d" stm32f4xx_exti_read(uint64_t addr) "reg read: addr: 0x%" PRIx64 " " stm32f4xx_exti_write(uint64_t addr, uint64_t data) "reg write: addr: 0x%" PRIx64 " val: 0x%" PRIx64 "" @@ -182,11 +181,13 @@ armsse_mhu_write(uint64_t offset, uint64_t data, unsigned size) "SSE-200 MHU wri # aspeed_xdma.c aspeed_xdma_write(uint64_t offset, uint64_t data) "XDMA write: offset 0x%" PRIx64 " data 0x%" PRIx64 +# bcm2835_property.c +bcm2835_mbox_property(uint32_t tag, uint32_t bufsize, size_t resplen) "mbox property tag:0x%08x in_sz:%u out_sz:%zu" + # bcm2835_mbox.c bcm2835_mbox_write(unsigned int size, uint64_t addr, uint64_t value) "mbox write sz:%u addr:0x%"PRIx64" data:0x%"PRIx64 bcm2835_mbox_read(unsigned int size, uint64_t addr, uint64_t value) "mbox read sz:%u addr:0x%"PRIx64" data:0x%"PRIx64 bcm2835_mbox_irq(unsigned level) "mbox irq:ARM level:%u" -bcm2835_mbox_property(uint32_t tag, uint32_t bufsize, size_t resplen) "mbox property tag:0x%08x in_sz:%u out_sz:%zu" # mac_via.c via1_rtc_update_data_out(int count, int value) "count=%d value=0x%02x" diff --git a/hw/misc/zynq_slcr.c b/hw/misc/zynq_slcr.c index f7472d1f3c..bedf09a6f5 100644 --- a/hw/misc/zynq_slcr.c +++ b/hw/misc/zynq_slcr.c @@ -23,6 +23,7 @@ #include "qemu/module.h" #include "hw/registerfields.h" #include "hw/qdev-clock.h" +#include "qom/object.h" #ifndef ZYNQ_SLCR_ERR_DEBUG #define ZYNQ_SLCR_ERR_DEBUG 0 @@ -182,9 +183,11 @@ REG32(DDRIOB, 0xb40) #define ZYNQ_SLCR_NUM_REGS (ZYNQ_SLCR_MMIO_SIZE / 4) #define TYPE_ZYNQ_SLCR "xilinx,zynq_slcr" -#define ZYNQ_SLCR(obj) OBJECT_CHECK(ZynqSLCRState, (obj), TYPE_ZYNQ_SLCR) +typedef struct ZynqSLCRState ZynqSLCRState; +DECLARE_INSTANCE_CHECKER(ZynqSLCRState, ZYNQ_SLCR, + TYPE_ZYNQ_SLCR) -typedef struct ZynqSLCRState { +struct ZynqSLCRState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -194,7 +197,7 @@ typedef struct ZynqSLCRState { Clock *ps_clk; Clock *uart0_ref_clk; Clock *uart1_ref_clk; -} ZynqSLCRState; +}; /* * return the output frequency of ARM/DDR/IO pll diff --git a/hw/net/can/can_kvaser_pci.c b/hw/net/can/can_kvaser_pci.c index 4b941370d0..168b3a620d 100644 --- a/hw/net/can/can_kvaser_pci.c +++ b/hw/net/can/can_kvaser_pci.c @@ -43,11 +43,13 @@ #include "net/can_emu.h" #include "can_sja1000.h" +#include "qom/object.h" #define TYPE_CAN_PCI_DEV "kvaser_pci" -#define KVASER_PCI_DEV(obj) \ - OBJECT_CHECK(KvaserPCIState, (obj), TYPE_CAN_PCI_DEV) +typedef struct KvaserPCIState KvaserPCIState; +DECLARE_INSTANCE_CHECKER(KvaserPCIState, KVASER_PCI_DEV, + TYPE_CAN_PCI_DEV) #ifndef KVASER_PCI_VENDOR_ID1 #define KVASER_PCI_VENDOR_ID1 0x10e8 /* the PCI device and vendor IDs */ @@ -78,7 +80,7 @@ #define KVASER_PCI_XILINX_VERSION_NUMBER 13 -typedef struct KvaserPCIState { +struct KvaserPCIState { /*< private >*/ PCIDevice dev; /*< public >*/ @@ -93,7 +95,7 @@ typedef struct KvaserPCIState { uint32_t s5920_irqstate; CanBusState *canbus; -} KvaserPCIState; +}; static void kvaser_pci_irq_handler(void *opaque, int irq_num, int level) { diff --git a/hw/net/can/can_mioe3680_pci.c b/hw/net/can/can_mioe3680_pci.c index 695e762a8d..7a79e2605a 100644 --- a/hw/net/can/can_mioe3680_pci.c +++ b/hw/net/can/can_mioe3680_pci.c @@ -39,11 +39,13 @@ #include "net/can_emu.h" #include "can_sja1000.h" +#include "qom/object.h" #define TYPE_CAN_PCI_DEV "mioe3680_pci" -#define MIOe3680_PCI_DEV(obj) \ - OBJECT_CHECK(Mioe3680PCIState, (obj), TYPE_CAN_PCI_DEV) +typedef struct Mioe3680PCIState Mioe3680PCIState; +DECLARE_INSTANCE_CHECKER(Mioe3680PCIState, MIOe3680_PCI_DEV, + TYPE_CAN_PCI_DEV) /* the PCI device and vendor IDs */ #ifndef MIOe3680_PCI_VENDOR_ID1 @@ -59,7 +61,7 @@ #define MIOe3680_PCI_BYTES_PER_SJA 0x80 -typedef struct Mioe3680PCIState { +struct Mioe3680PCIState { /*< private >*/ PCIDevice dev; /*< public >*/ @@ -70,7 +72,7 @@ typedef struct Mioe3680PCIState { char *model; /* The model that support, only SJA1000 now. */ CanBusState *canbus[MIOe3680_PCI_SJA_COUNT]; -} Mioe3680PCIState; +}; static void mioe3680_pci_reset(DeviceState *dev) { diff --git a/hw/net/can/can_pcm3680_pci.c b/hw/net/can/can_pcm3680_pci.c index 4218e63eb2..8ef4e74af0 100644 --- a/hw/net/can/can_pcm3680_pci.c +++ b/hw/net/can/can_pcm3680_pci.c @@ -39,11 +39,13 @@ #include "net/can_emu.h" #include "can_sja1000.h" +#include "qom/object.h" #define TYPE_CAN_PCI_DEV "pcm3680_pci" -#define PCM3680i_PCI_DEV(obj) \ - OBJECT_CHECK(Pcm3680iPCIState, (obj), TYPE_CAN_PCI_DEV) +typedef struct Pcm3680iPCIState Pcm3680iPCIState; +DECLARE_INSTANCE_CHECKER(Pcm3680iPCIState, PCM3680i_PCI_DEV, + TYPE_CAN_PCI_DEV) /* the PCI device and vendor IDs */ #ifndef PCM3680i_PCI_VENDOR_ID1 @@ -59,7 +61,7 @@ #define PCM3680i_PCI_BYTES_PER_SJA 0x20 -typedef struct Pcm3680iPCIState { +struct Pcm3680iPCIState { /*< private >*/ PCIDevice dev; /*< public >*/ @@ -70,7 +72,7 @@ typedef struct Pcm3680iPCIState { char *model; /* The model that support, only SJA1000 now. */ CanBusState *canbus[PCM3680i_PCI_SJA_COUNT]; -} Pcm3680iPCIState; +}; static void pcm3680i_pci_reset(DeviceState *dev) { diff --git a/hw/net/dp8393x.c b/hw/net/dp8393x.c index c54db0d62d..56b96e9b0f 100644 --- a/hw/net/dp8393x.c +++ b/hw/net/dp8393x.c @@ -27,6 +27,7 @@ #include "qemu/module.h" #include "qemu/timer.h" #include <zlib.h> +#include "qom/object.h" //#define DEBUG_SONIC @@ -150,9 +151,11 @@ do { printf("sonic ERROR: %s: " fmt, __func__ , ## __VA_ARGS__); } while (0) #define SONIC_DESC_ADDR 0xFFFE #define TYPE_DP8393X "dp8393x" -#define DP8393X(obj) OBJECT_CHECK(dp8393xState, (obj), TYPE_DP8393X) +typedef struct dp8393xState dp8393xState; +DECLARE_INSTANCE_CHECKER(dp8393xState, DP8393X, + TYPE_DP8393X) -typedef struct dp8393xState { +struct dp8393xState { SysBusDevice parent_obj; /* Hardware */ @@ -182,7 +185,7 @@ typedef struct dp8393xState { /* Memory access */ MemoryRegion *dma_mr; AddressSpace as; -} dp8393xState; +}; /* Accessor functions for values which are formed by * concatenating two 16 bit device registers. By putting these diff --git a/hw/net/e1000.c b/hw/net/e1000.c index c4d896a9e6..83347cbd87 100644 --- a/hw/net/e1000.c +++ b/hw/net/e1000.c @@ -39,6 +39,7 @@ #include "e1000x_common.h" #include "trace.h" +#include "qom/object.h" static const uint8_t bcast[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; @@ -76,7 +77,7 @@ static int debugflags = DBGBIT(TXERR) | DBGBIT(GENERAL); * Others never tested */ -typedef struct E1000State_st { +struct E1000State_st { /*< private >*/ PCIDevice parent_obj; /*< public >*/ @@ -137,24 +138,22 @@ typedef struct E1000State_st { bool received_tx_tso; bool use_tso_for_migration; e1000x_txd_props mig_props; -} E1000State; +}; +typedef struct E1000State_st E1000State; #define chkflag(x) (s->compat_flags & E1000_FLAG_##x) -typedef struct E1000BaseClass { +struct E1000BaseClass { PCIDeviceClass parent_class; uint16_t phy_id2; -} E1000BaseClass; +}; +typedef struct E1000BaseClass E1000BaseClass; #define TYPE_E1000_BASE "e1000-base" -#define E1000(obj) \ - OBJECT_CHECK(E1000State, (obj), TYPE_E1000_BASE) +DECLARE_OBJ_CHECKERS(E1000State, E1000BaseClass, + E1000, TYPE_E1000_BASE) -#define E1000_CLASS(klass) \ - OBJECT_CLASS_CHECK(E1000BaseClass, (klass), TYPE_E1000_BASE) -#define E1000_GET_CLASS(obj) \ - OBJECT_GET_CLASS(E1000BaseClass, (obj), TYPE_E1000_BASE) static void e1000_link_up(E1000State *s) diff --git a/hw/net/e1000e.c b/hw/net/e1000e.c index fda34518c9..938d44f198 100644 --- a/hw/net/e1000e.c +++ b/hw/net/e1000e.c @@ -53,11 +53,14 @@ #include "trace.h" #include "qapi/error.h" +#include "qom/object.h" #define TYPE_E1000E "e1000e" -#define E1000E(obj) OBJECT_CHECK(E1000EState, (obj), TYPE_E1000E) +typedef struct E1000EState E1000EState; +DECLARE_INSTANCE_CHECKER(E1000EState, E1000E, + TYPE_E1000E) -typedef struct E1000EState { +struct E1000EState { PCIDevice parent_obj; NICState *nic; NICConf conf; @@ -79,7 +82,7 @@ typedef struct E1000EState { E1000ECore core; -} E1000EState; +}; #define E1000E_MMIO_IDX 0 #define E1000E_FLASH_IDX 1 diff --git a/hw/net/etraxfs_eth.c b/hw/net/etraxfs_eth.c index 3408ceacb5..36d898ad16 100644 --- a/hw/net/etraxfs_eth.c +++ b/hw/net/etraxfs_eth.c @@ -30,6 +30,7 @@ #include "qemu/error-report.h" #include "qemu/module.h" #include "trace.h" +#include "qom/object.h" #define D(x) @@ -323,11 +324,11 @@ static void mdio_cycle(struct qemu_mdio *bus) #define FS_ETH_MAX_REGS 0x17 #define TYPE_ETRAX_FS_ETH "etraxfs-eth" -#define ETRAX_FS_ETH(obj) \ - OBJECT_CHECK(ETRAXFSEthState, (obj), TYPE_ETRAX_FS_ETH) +typedef struct ETRAXFSEthState ETRAXFSEthState; +DECLARE_INSTANCE_CHECKER(ETRAXFSEthState, ETRAX_FS_ETH, + TYPE_ETRAX_FS_ETH) -typedef struct ETRAXFSEthState -{ +struct ETRAXFSEthState { SysBusDevice parent_obj; MemoryRegion mmio; @@ -348,7 +349,7 @@ typedef struct ETRAXFSEthState /* PHY. */ struct qemu_phy phy; -} ETRAXFSEthState; +}; static void eth_validate_duplex(ETRAXFSEthState *eth) { diff --git a/hw/net/fsl_etsec/etsec.h b/hw/net/fsl_etsec/etsec.h index 7951c3ad65..0c929d9afd 100644 --- a/hw/net/fsl_etsec/etsec.h +++ b/hw/net/fsl_etsec/etsec.h @@ -28,6 +28,7 @@ #include "hw/sysbus.h" #include "net/net.h" #include "hw/ptimer.h" +#include "qom/object.h" /* Buffer Descriptors */ @@ -104,7 +105,7 @@ typedef struct eTSEC_Register { uint32_t value; } eTSEC_Register; -typedef struct eTSEC { +struct eTSEC { SysBusDevice busdev; MemoryRegion io_area; @@ -145,11 +146,12 @@ typedef struct eTSEC { /* Whether we should flush the rx queue when buffer becomes available. */ bool need_flush; -} eTSEC; +}; +typedef struct eTSEC eTSEC; #define TYPE_ETSEC_COMMON "eTSEC" -#define ETSEC_COMMON(obj) \ - OBJECT_CHECK(eTSEC, (obj), TYPE_ETSEC_COMMON) +DECLARE_INSTANCE_CHECKER(eTSEC, ETSEC_COMMON, + TYPE_ETSEC_COMMON) #define eTSEC_TRANSMIT 1 #define eTSEC_RECEIVE 2 diff --git a/hw/net/lan9118.c b/hw/net/lan9118.c index e35f00fb9f..57a59accd0 100644 --- a/hw/net/lan9118.c +++ b/hw/net/lan9118.c @@ -25,6 +25,7 @@ #include "qemu/module.h" /* For crc32 */ #include <zlib.h> +#include "qom/object.h" //#define DEBUG_LAN9118 @@ -180,9 +181,11 @@ static const VMStateDescription vmstate_lan9118_packet = { } }; -#define LAN9118(obj) OBJECT_CHECK(lan9118_state, (obj), TYPE_LAN9118) +typedef struct lan9118_state lan9118_state; +DECLARE_INSTANCE_CHECKER(lan9118_state, LAN9118, + TYPE_LAN9118) -typedef struct { +struct lan9118_state { SysBusDevice parent_obj; NICState *nic; @@ -258,7 +261,7 @@ typedef struct { uint32_t read_long; uint32_t mode_16bit; -} lan9118_state; +}; static const VMStateDescription vmstate_lan9118 = { .name = "lan9118", diff --git a/hw/net/milkymist-minimac2.c b/hw/net/milkymist-minimac2.c index 1ba01754ee..41a8543edf 100644 --- a/hw/net/milkymist-minimac2.c +++ b/hw/net/milkymist-minimac2.c @@ -24,6 +24,7 @@ #include "qemu/osdep.h" #include "qapi/error.h" +#include "qom/object.h" #include "cpu.h" /* FIXME: why does this use TARGET_PAGE_ALIGN? */ #include "hw/irq.h" #include "hw/qdev-properties.h" @@ -98,8 +99,9 @@ struct MilkymistMinimac2MdioState { typedef struct MilkymistMinimac2MdioState MilkymistMinimac2MdioState; #define TYPE_MILKYMIST_MINIMAC2 "milkymist-minimac2" -#define MILKYMIST_MINIMAC2(obj) \ - OBJECT_CHECK(MilkymistMinimac2State, (obj), TYPE_MILKYMIST_MINIMAC2) +typedef struct MilkymistMinimac2State MilkymistMinimac2State; +DECLARE_INSTANCE_CHECKER(MilkymistMinimac2State, MILKYMIST_MINIMAC2, + TYPE_MILKYMIST_MINIMAC2) struct MilkymistMinimac2State { SysBusDevice parent_obj; @@ -123,7 +125,6 @@ struct MilkymistMinimac2State { uint8_t *rx1_buf; uint8_t *tx_buf; }; -typedef struct MilkymistMinimac2State MilkymistMinimac2State; static const uint8_t preamble_sfd[] = { 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0xd5 diff --git a/hw/net/mipsnet.c b/hw/net/mipsnet.c index 0c578c430c..61dbd575da 100644 --- a/hw/net/mipsnet.c +++ b/hw/net/mipsnet.c @@ -6,6 +6,7 @@ #include "trace.h" #include "hw/sysbus.h" #include "migration/vmstate.h" +#include "qom/object.h" /* MIPSnet register offsets */ @@ -24,9 +25,11 @@ #define MAX_ETH_FRAME_SIZE 1514 #define TYPE_MIPS_NET "mipsnet" -#define MIPS_NET(obj) OBJECT_CHECK(MIPSnetState, (obj), TYPE_MIPS_NET) +typedef struct MIPSnetState MIPSnetState; +DECLARE_INSTANCE_CHECKER(MIPSnetState, MIPS_NET, + TYPE_MIPS_NET) -typedef struct MIPSnetState { +struct MIPSnetState { SysBusDevice parent_obj; uint32_t busy; @@ -41,7 +44,7 @@ typedef struct MIPSnetState { qemu_irq irq; NICState *nic; NICConf conf; -} MIPSnetState; +}; static void mipsnet_reset(MIPSnetState *s) { diff --git a/hw/net/ne2000-isa.c b/hw/net/ne2000-isa.c index a878056426..688a0cc4f6 100644 --- a/hw/net/ne2000-isa.c +++ b/hw/net/ne2000-isa.c @@ -31,16 +31,19 @@ #include "qapi/error.h" #include "qapi/visitor.h" #include "qemu/module.h" +#include "qom/object.h" -#define ISA_NE2000(obj) OBJECT_CHECK(ISANE2000State, (obj), TYPE_ISA_NE2000) +typedef struct ISANE2000State ISANE2000State; +DECLARE_INSTANCE_CHECKER(ISANE2000State, ISA_NE2000, + TYPE_ISA_NE2000) -typedef struct ISANE2000State { +struct ISANE2000State { ISADevice parent_obj; uint32_t iobase; uint32_t isairq; NE2000State ne2000; -} ISANE2000State; +}; static NetClientInfo net_ne2000_isa_info = { .type = NET_CLIENT_DRIVER_NIC, diff --git a/hw/net/opencores_eth.c b/hw/net/opencores_eth.c index 2ba0dc8c2f..5cd204c30c 100644 --- a/hw/net/opencores_eth.c +++ b/hw/net/opencores_eth.c @@ -40,6 +40,7 @@ #include "qemu/module.h" #include "net/eth.h" #include "trace.h" +#include "qom/object.h" /* RECSMALL is not used because it breaks tap networking in linux: * incoming ARP responses are too short @@ -271,9 +272,11 @@ typedef struct desc { #define DEFAULT_PHY 1 #define TYPE_OPEN_ETH "open_eth" -#define OPEN_ETH(obj) OBJECT_CHECK(OpenEthState, (obj), TYPE_OPEN_ETH) +typedef struct OpenEthState OpenEthState; +DECLARE_INSTANCE_CHECKER(OpenEthState, OPEN_ETH, + TYPE_OPEN_ETH) -typedef struct OpenEthState { +struct OpenEthState { SysBusDevice parent_obj; NICState *nic; @@ -287,7 +290,7 @@ typedef struct OpenEthState { unsigned tx_desc; unsigned rx_desc; desc desc[128]; -} OpenEthState; +}; static desc *rx_desc(OpenEthState *s) { diff --git a/hw/net/pcnet-pci.c b/hw/net/pcnet-pci.c index 49d3e42e83..449970bc52 100644 --- a/hw/net/pcnet-pci.c +++ b/hw/net/pcnet-pci.c @@ -40,6 +40,7 @@ #include "trace.h" #include "pcnet.h" +#include "qom/object.h" //#define PCNET_DEBUG //#define PCNET_DEBUG_IO @@ -51,17 +52,18 @@ #define TYPE_PCI_PCNET "pcnet" -#define PCI_PCNET(obj) \ - OBJECT_CHECK(PCIPCNetState, (obj), TYPE_PCI_PCNET) +typedef struct PCIPCNetState PCIPCNetState; +DECLARE_INSTANCE_CHECKER(PCIPCNetState, PCI_PCNET, + TYPE_PCI_PCNET) -typedef struct { +struct PCIPCNetState { /*< private >*/ PCIDevice parent_obj; /*< public >*/ PCNetState state; MemoryRegion io_bar; -} PCIPCNetState; +}; static void pcnet_aprom_writeb(void *opaque, uint32_t addr, uint32_t val) { diff --git a/hw/net/rocker/rocker.h b/hw/net/rocker/rocker.h index e4c22db4ff..941c932265 100644 --- a/hw/net/rocker/rocker.h +++ b/hw/net/rocker/rocker.h @@ -20,6 +20,7 @@ #define ROCKER_H #include "qemu/sockets.h" +#include "qom/object.h" #if defined(DEBUG_ROCKER) # define DPRINTF(fmt, ...) \ @@ -72,8 +73,8 @@ typedef struct desc_ring DescRing; #define TYPE_ROCKER "rocker" typedef struct rocker Rocker; -#define ROCKER(obj) \ - OBJECT_CHECK(Rocker, (obj), TYPE_ROCKER) +DECLARE_INSTANCE_CHECKER(Rocker, ROCKER, + TYPE_ROCKER) Rocker *rocker_find(const char *name); uint32_t rocker_fp_ports(Rocker *r); diff --git a/hw/net/rtl8139.c b/hw/net/rtl8139.c index ab93d78ab3..9246388f58 100644 --- a/hw/net/rtl8139.c +++ b/hw/net/rtl8139.c @@ -62,6 +62,7 @@ #include "net/net.h" #include "net/eth.h" #include "sysemu/sysemu.h" +#include "qom/object.h" /* debug RTL8139 card */ //#define DEBUG_RTL8139 1 @@ -93,8 +94,9 @@ static inline GCC_FMT_ATTR(1, 2) int DPRINTF(const char *fmt, ...) #define TYPE_RTL8139 "rtl8139" -#define RTL8139(obj) \ - OBJECT_CHECK(RTL8139State, (obj), TYPE_RTL8139) +typedef struct RTL8139State RTL8139State; +DECLARE_INSTANCE_CHECKER(RTL8139State, RTL8139, + TYPE_RTL8139) /* Symbolic offsets to registers. */ enum RTL8139_registers { @@ -431,7 +433,7 @@ typedef struct RTL8139TallyCounters /* Clears all tally counters */ static void RTL8139TallyCounters_clear(RTL8139TallyCounters* counters); -typedef struct RTL8139State { +struct RTL8139State { /*< private >*/ PCIDevice parent_obj; /*< public >*/ @@ -513,7 +515,7 @@ typedef struct RTL8139State { /* Support migration to/from old versions */ int rtl8139_mmio_io_addr_dummy; -} RTL8139State; +}; /* Writes tally counters to memory via DMA */ static void RTL8139TallyCounters_dma_write(RTL8139State *s, dma_addr_t tc_addr); diff --git a/hw/net/smc91c111.c b/hw/net/smc91c111.c index a347b6a4d5..9fad904321 100644 --- a/hw/net/smc91c111.c +++ b/hw/net/smc91c111.c @@ -19,14 +19,17 @@ #include "qemu/module.h" /* For crc32 */ #include <zlib.h> +#include "qom/object.h" /* Number of 2k memory pages available. */ #define NUM_PACKETS 4 #define TYPE_SMC91C111 "smc91c111" -#define SMC91C111(obj) OBJECT_CHECK(smc91c111_state, (obj), TYPE_SMC91C111) +typedef struct smc91c111_state smc91c111_state; +DECLARE_INSTANCE_CHECKER(smc91c111_state, SMC91C111, + TYPE_SMC91C111) -typedef struct { +struct smc91c111_state { SysBusDevice parent_obj; NICState *nic; @@ -55,7 +58,7 @@ typedef struct { uint8_t int_level; uint8_t int_mask; MemoryRegion mmio; -} smc91c111_state; +}; static const VMStateDescription vmstate_smc91c111 = { .name = "smc91c111", diff --git a/hw/net/spapr_llan.c b/hw/net/spapr_llan.c index 4cd02dda01..d34cb29607 100644 --- a/hw/net/spapr_llan.c +++ b/hw/net/spapr_llan.c @@ -38,6 +38,7 @@ #include "trace.h" #include <libfdt.h> +#include "qom/object.h" #define ETH_ALEN 6 #define MAX_PACKET_SIZE 65536 @@ -84,8 +85,9 @@ typedef uint64_t vlan_bd_t; #define VLAN_MAX_BUFS (VLAN_RX_BDS_LEN / 8) #define TYPE_VIO_SPAPR_VLAN_DEVICE "spapr-vlan" -#define VIO_SPAPR_VLAN_DEVICE(obj) \ - OBJECT_CHECK(SpaprVioVlan, (obj), TYPE_VIO_SPAPR_VLAN_DEVICE) +typedef struct SpaprVioVlan SpaprVioVlan; +DECLARE_INSTANCE_CHECKER(SpaprVioVlan, VIO_SPAPR_VLAN_DEVICE, + TYPE_VIO_SPAPR_VLAN_DEVICE) #define RX_POOL_MAX_BDS 4096 #define RX_MAX_POOLS 5 @@ -96,7 +98,7 @@ typedef struct { vlan_bd_t bds[RX_POOL_MAX_BDS]; } RxBufPool; -typedef struct SpaprVioVlan { +struct SpaprVioVlan { SpaprVioDevice sdev; NICConf nicconf; NICState *nic; @@ -108,7 +110,7 @@ typedef struct SpaprVioVlan { QEMUTimer *rxp_timer; uint32_t compat_flags; /* Compatibility flags for migration */ RxBufPool *rx_pool[RX_MAX_POOLS]; /* Receive buffer descriptor pools */ -} SpaprVioVlan; +}; static bool spapr_vlan_can_receive(NetClientState *nc) { diff --git a/hw/net/stellaris_enet.c b/hw/net/stellaris_enet.c index cb6e2509ea..9f13afa4e4 100644 --- a/hw/net/stellaris_enet.c +++ b/hw/net/stellaris_enet.c @@ -16,6 +16,7 @@ #include "qemu/log.h" #include "qemu/module.h" #include <zlib.h> +#include "qom/object.h" //#define DEBUG_STELLARIS_ENET 1 @@ -50,15 +51,16 @@ do { fprintf(stderr, "stellaris_enet: error: " fmt , ## __VA_ARGS__);} while (0) #define SE_TCTL_DUPLEX 0x08 #define TYPE_STELLARIS_ENET "stellaris_enet" -#define STELLARIS_ENET(obj) \ - OBJECT_CHECK(stellaris_enet_state, (obj), TYPE_STELLARIS_ENET) +typedef struct stellaris_enet_state stellaris_enet_state; +DECLARE_INSTANCE_CHECKER(stellaris_enet_state, STELLARIS_ENET, + TYPE_STELLARIS_ENET) typedef struct { uint8_t data[2048]; uint32_t len; } StellarisEnetRxFrame; -typedef struct { +struct stellaris_enet_state { SysBusDevice parent_obj; uint32_t ris; @@ -82,7 +84,7 @@ typedef struct { NICConf conf; qemu_irq irq; MemoryRegion mmio; -} stellaris_enet_state; +}; static const VMStateDescription vmstate_rx_frame = { .name = "stellaris_enet/rx_frame", diff --git a/hw/net/sungem.c b/hw/net/sungem.c index e4b7b57704..91753830a7 100644 --- a/hw/net/sungem.c +++ b/hw/net/sungem.c @@ -19,10 +19,13 @@ #include "hw/net/mii.h" #include "sysemu/sysemu.h" #include "trace.h" +#include "qom/object.h" #define TYPE_SUNGEM "sungem" -#define SUNGEM(obj) OBJECT_CHECK(SunGEMState, (obj), TYPE_SUNGEM) +typedef struct SunGEMState SunGEMState; +DECLARE_INSTANCE_CHECKER(SunGEMState, SUNGEM, + TYPE_SUNGEM) #define MAX_PACKET_SIZE 9016 @@ -192,7 +195,7 @@ struct gem_rxd { #define RXDCTRL_ALTMAC 0x2000000000000000ULL /* Matched ALT MAC */ -typedef struct { +struct SunGEMState { PCIDevice pdev; MemoryRegion sungem; @@ -221,7 +224,7 @@ typedef struct { uint8_t tx_data[MAX_PACKET_SIZE]; uint32_t tx_size; uint64_t tx_first_ctl; -} SunGEMState; +}; static void sungem_eval_irq(SunGEMState *s) diff --git a/hw/net/sunhme.c b/hw/net/sunhme.c index bc48d46b9f..7364ba1019 100644 --- a/hw/net/sunhme.c +++ b/hw/net/sunhme.c @@ -33,6 +33,7 @@ #include "net/eth.h" #include "sysemu/sysemu.h" #include "trace.h" +#include "qom/object.h" #define HME_REG_SIZE 0x8000 @@ -129,7 +130,9 @@ #define MII_COMMAND_WRITE 0x1 #define TYPE_SUNHME "sunhme" -#define SUNHME(obj) OBJECT_CHECK(SunHMEState, (obj), TYPE_SUNHME) +typedef struct SunHMEState SunHMEState; +DECLARE_INSTANCE_CHECKER(SunHMEState, SUNHME, + TYPE_SUNHME) /* Maximum size of buffer */ #define HME_FIFO_SIZE 0x800 @@ -153,7 +156,7 @@ #define HME_MII_REGS_SIZE 0x20 -typedef struct SunHMEState { +struct SunHMEState { /*< private >*/ PCIDevice parent_obj; @@ -174,7 +177,7 @@ typedef struct SunHMEState { uint32_t mifregs[HME_MIF_REG_SIZE >> 2]; uint16_t miiregs[HME_MII_REGS_SIZE]; -} SunHMEState; +}; static Property sunhme_properties[] = { DEFINE_NIC_PROPERTIES(SunHMEState, conf), diff --git a/hw/net/tulip.h b/hw/net/tulip.h index c3fcd4d4e1..87e3ab79bc 100644 --- a/hw/net/tulip.h +++ b/hw/net/tulip.h @@ -3,10 +3,12 @@ #include "qemu/units.h" #include "net/net.h" +#include "qom/object.h" #define TYPE_TULIP "tulip" typedef struct TULIPState TULIPState; -#define TULIP(obj) OBJECT_CHECK(TULIPState, (obj), TYPE_TULIP) +DECLARE_INSTANCE_CHECKER(TULIPState, TULIP, + TYPE_TULIP) #define CSR(_x) ((_x) << 3) diff --git a/hw/net/vmxnet3.c b/hw/net/vmxnet3.c index 7a6ca4ec35..eff299f629 100644 --- a/hw/net/vmxnet3.c +++ b/hw/net/vmxnet3.c @@ -35,6 +35,7 @@ #include "vmware_utils.h" #include "net_tx_pkt.h" #include "net_rx_pkt.h" +#include "qom/object.h" #define PCI_DEVICE_ID_VMWARE_VMXNET3_REVISION 0x1 #define VMXNET3_MSIX_BAR_SIZE 0x2000 @@ -128,15 +129,14 @@ #define VMXNET_FLAG_IS_SET(field, flag) (((field) & (flag)) == (flag)) -typedef struct VMXNET3Class { +struct VMXNET3Class { PCIDeviceClass parent_class; DeviceRealize parent_dc_realize; -} VMXNET3Class; +}; +typedef struct VMXNET3Class VMXNET3Class; -#define VMXNET3_DEVICE_CLASS(klass) \ - OBJECT_CLASS_CHECK(VMXNET3Class, (klass), TYPE_VMXNET3) -#define VMXNET3_DEVICE_GET_CLASS(obj) \ - OBJECT_GET_CLASS(VMXNET3Class, (obj), TYPE_VMXNET3) +DECLARE_CLASS_CHECKERS(VMXNET3Class, VMXNET3_DEVICE, + TYPE_VMXNET3) static inline void vmxnet3_ring_init(PCIDevice *d, Vmxnet3Ring *ring, diff --git a/hw/net/vmxnet3_defs.h b/hw/net/vmxnet3_defs.h index 65780c576d..71440509ca 100644 --- a/hw/net/vmxnet3_defs.h +++ b/hw/net/vmxnet3_defs.h @@ -19,9 +19,12 @@ #include "net/net.h" #include "hw/net/vmxnet3.h" +#include "qom/object.h" #define TYPE_VMXNET3 "vmxnet3" -#define VMXNET3(obj) OBJECT_CHECK(VMXNET3State, (obj), TYPE_VMXNET3) +typedef struct VMXNET3State VMXNET3State; +DECLARE_INSTANCE_CHECKER(VMXNET3State, VMXNET3, + TYPE_VMXNET3) /* Device state and helper functions */ #define VMXNET3_RX_RINGS_PER_QUEUE (2) @@ -58,7 +61,7 @@ typedef struct { bool is_asserted; } Vmxnet3IntState; -typedef struct { +struct VMXNET3State { PCIDevice parent_obj; NICState *nic; NICConf conf; @@ -132,6 +135,6 @@ typedef struct { /* Compatibility flags for migration */ uint32_t compat_flags; -} VMXNET3State; +}; #endif diff --git a/hw/net/xgmac.c b/hw/net/xgmac.c index 5bf1b61012..a066550023 100644 --- a/hw/net/xgmac.c +++ b/hw/net/xgmac.c @@ -32,6 +32,7 @@ #include "qemu/log.h" #include "qemu/module.h" #include "net/net.h" +#include "qom/object.h" #ifdef DEBUG_XGMAC #define DEBUGF_BRK(message, args...) do { \ @@ -139,9 +140,11 @@ typedef struct RxTxStats { } RxTxStats; #define TYPE_XGMAC "xgmac" -#define XGMAC(obj) OBJECT_CHECK(XgmacState, (obj), TYPE_XGMAC) +typedef struct XgmacState XgmacState; +DECLARE_INSTANCE_CHECKER(XgmacState, XGMAC, + TYPE_XGMAC) -typedef struct XgmacState { +struct XgmacState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -153,7 +156,7 @@ typedef struct XgmacState { struct RxTxStats stats; uint32_t regs[R_MAX]; -} XgmacState; +}; static const VMStateDescription vmstate_rxtx_stats = { .name = "xgmac_stats", diff --git a/hw/net/xilinx_axienet.c b/hw/net/xilinx_axienet.c index 2e89f236b4..4e13786e50 100644 --- a/hw/net/xilinx_axienet.c +++ b/hw/net/xilinx_axienet.c @@ -35,6 +35,7 @@ #include "hw/irq.h" #include "hw/qdev-properties.h" #include "hw/stream.h" +#include "qom/object.h" #define DPHY(x) @@ -42,16 +43,16 @@ #define TYPE_XILINX_AXI_ENET_DATA_STREAM "xilinx-axienet-data-stream" #define TYPE_XILINX_AXI_ENET_CONTROL_STREAM "xilinx-axienet-control-stream" -#define XILINX_AXI_ENET(obj) \ - OBJECT_CHECK(XilinxAXIEnet, (obj), TYPE_XILINX_AXI_ENET) +typedef struct XilinxAXIEnet XilinxAXIEnet; +DECLARE_INSTANCE_CHECKER(XilinxAXIEnet, XILINX_AXI_ENET, + TYPE_XILINX_AXI_ENET) -#define XILINX_AXI_ENET_DATA_STREAM(obj) \ - OBJECT_CHECK(XilinxAXIEnetStreamSlave, (obj),\ - TYPE_XILINX_AXI_ENET_DATA_STREAM) +typedef struct XilinxAXIEnetStreamSlave XilinxAXIEnetStreamSlave; +DECLARE_INSTANCE_CHECKER(XilinxAXIEnetStreamSlave, XILINX_AXI_ENET_DATA_STREAM, + TYPE_XILINX_AXI_ENET_DATA_STREAM) -#define XILINX_AXI_ENET_CONTROL_STREAM(obj) \ - OBJECT_CHECK(XilinxAXIEnetStreamSlave, (obj),\ - TYPE_XILINX_AXI_ENET_CONTROL_STREAM) +DECLARE_INSTANCE_CHECKER(XilinxAXIEnetStreamSlave, XILINX_AXI_ENET_CONTROL_STREAM, + TYPE_XILINX_AXI_ENET_CONTROL_STREAM) /* Advertisement control register. */ #define ADVERTISE_10FULL 0x0040 /* Try for 10mbps full-duplex */ @@ -310,8 +311,6 @@ struct TEMAC { void *parent; }; -typedef struct XilinxAXIEnetStreamSlave XilinxAXIEnetStreamSlave; -typedef struct XilinxAXIEnet XilinxAXIEnet; struct XilinxAXIEnetStreamSlave { Object parent; @@ -1046,7 +1045,7 @@ static const TypeInfo xilinx_enet_info = { static const TypeInfo xilinx_enet_data_stream_info = { .name = TYPE_XILINX_AXI_ENET_DATA_STREAM, .parent = TYPE_OBJECT, - .instance_size = sizeof(struct XilinxAXIEnetStreamSlave), + .instance_size = sizeof(XilinxAXIEnetStreamSlave), .class_init = xilinx_enet_data_stream_class_init, .interfaces = (InterfaceInfo[]) { { TYPE_STREAM_SLAVE }, @@ -1057,7 +1056,7 @@ static const TypeInfo xilinx_enet_data_stream_info = { static const TypeInfo xilinx_enet_control_stream_info = { .name = TYPE_XILINX_AXI_ENET_CONTROL_STREAM, .parent = TYPE_OBJECT, - .instance_size = sizeof(struct XilinxAXIEnetStreamSlave), + .instance_size = sizeof(XilinxAXIEnetStreamSlave), .class_init = xilinx_enet_control_stream_class_init, .interfaces = (InterfaceInfo[]) { { TYPE_STREAM_SLAVE }, diff --git a/hw/net/xilinx_ethlite.c b/hw/net/xilinx_ethlite.c index 71d16fef3d..6e09f7e422 100644 --- a/hw/net/xilinx_ethlite.c +++ b/hw/net/xilinx_ethlite.c @@ -24,6 +24,7 @@ #include "qemu/osdep.h" #include "qemu/module.h" +#include "qom/object.h" #include "cpu.h" /* FIXME should not use tswap* */ #include "hw/sysbus.h" #include "hw/irq.h" @@ -52,8 +53,8 @@ #define CTRL_S 0x1 #define TYPE_XILINX_ETHLITE "xlnx.xps-ethernetlite" -#define XILINX_ETHLITE(obj) \ - OBJECT_CHECK(struct xlx_ethlite, (obj), TYPE_XILINX_ETHLITE) +DECLARE_INSTANCE_CHECKER(struct xlx_ethlite, XILINX_ETHLITE, + TYPE_XILINX_ETHLITE) struct xlx_ethlite { diff --git a/hw/nvram/ds1225y.c b/hw/nvram/ds1225y.c index d5cb922287..44fb7a94d3 100644 --- a/hw/nvram/ds1225y.c +++ b/hw/nvram/ds1225y.c @@ -29,6 +29,7 @@ #include "trace.h" #include "qemu/error-report.h" #include "qemu/module.h" +#include "qom/object.h" typedef struct { MemoryRegion iomem; @@ -109,13 +110,15 @@ static const VMStateDescription vmstate_nvram = { }; #define TYPE_DS1225Y "ds1225y" -#define DS1225Y(obj) OBJECT_CHECK(SysBusNvRamState, (obj), TYPE_DS1225Y) +typedef struct SysBusNvRamState SysBusNvRamState; +DECLARE_INSTANCE_CHECKER(SysBusNvRamState, DS1225Y, + TYPE_DS1225Y) -typedef struct { +struct SysBusNvRamState { SysBusDevice parent_obj; NvRamState nvram; -} SysBusNvRamState; +}; static void nvram_sysbus_realize(DeviceState *dev, Error **errp) { diff --git a/hw/nvram/eeprom_at24c.c b/hw/nvram/eeprom_at24c.c index d46a2bec3f..3e93dbbffb 100644 --- a/hw/nvram/eeprom_at24c.c +++ b/hw/nvram/eeprom_at24c.c @@ -14,6 +14,7 @@ #include "hw/i2c/i2c.h" #include "hw/qdev-properties.h" #include "sysemu/block-backend.h" +#include "qom/object.h" /* #define DEBUG_AT24C */ @@ -27,9 +28,11 @@ ## __VA_ARGS__) #define TYPE_AT24C_EE "at24c-eeprom" -#define AT24C_EE(obj) OBJECT_CHECK(EEPROMState, (obj), TYPE_AT24C_EE) +typedef struct EEPROMState EEPROMState; +DECLARE_INSTANCE_CHECKER(EEPROMState, AT24C_EE, + TYPE_AT24C_EE) -typedef struct EEPROMState { +struct EEPROMState { I2CSlave parent_obj; /* address counter */ @@ -45,7 +48,7 @@ typedef struct EEPROMState { uint8_t *mem; BlockBackend *blk; -} EEPROMState; +}; static int at24c_eeprom_event(I2CSlave *s, enum i2c_event event) diff --git a/hw/nvram/spapr_nvram.c b/hw/nvram/spapr_nvram.c index 386513499f..57ccc174f2 100644 --- a/hw/nvram/spapr_nvram.c +++ b/hw/nvram/spapr_nvram.c @@ -39,18 +39,20 @@ #include "hw/ppc/spapr.h" #include "hw/ppc/spapr_vio.h" #include "hw/qdev-properties.h" +#include "qom/object.h" -typedef struct SpaprNvram { +struct SpaprNvram { SpaprVioDevice sdev; uint32_t size; uint8_t *buf; BlockBackend *blk; VMChangeStateEntry *vmstate; -} SpaprNvram; +}; +typedef struct SpaprNvram SpaprNvram; #define TYPE_VIO_SPAPR_NVRAM "spapr-nvram" -#define VIO_SPAPR_NVRAM(obj) \ - OBJECT_CHECK(SpaprNvram, (obj), TYPE_VIO_SPAPR_NVRAM) +DECLARE_INSTANCE_CHECKER(SpaprNvram, VIO_SPAPR_NVRAM, + TYPE_VIO_SPAPR_NVRAM) #define MIN_NVRAM_SIZE (8 * KiB) #define DEFAULT_NVRAM_SIZE (64 * KiB) diff --git a/hw/pci-bridge/dec.c b/hw/pci-bridge/dec.c index 677a310b96..e88998d88c 100644 --- a/hw/pci-bridge/dec.c +++ b/hw/pci-bridge/dec.c @@ -32,12 +32,15 @@ #include "hw/pci/pci_host.h" #include "hw/pci/pci_bridge.h" #include "hw/pci/pci_bus.h" +#include "qom/object.h" -#define DEC_21154(obj) OBJECT_CHECK(DECState, (obj), TYPE_DEC_21154) +typedef struct DECState DECState; +DECLARE_INSTANCE_CHECKER(DECState, DEC_21154, + TYPE_DEC_21154) -typedef struct DECState { +struct DECState { PCIHostState parent_obj; -} DECState; +}; static int dec_map_irq(PCIDevice *pci_dev, int irq_num) { diff --git a/hw/pci-bridge/gen_pcie_root_port.c b/hw/pci-bridge/gen_pcie_root_port.c index bb26e272c1..67c71d566b 100644 --- a/hw/pci-bridge/gen_pcie_root_port.c +++ b/hw/pci-bridge/gen_pcie_root_port.c @@ -17,10 +17,12 @@ #include "hw/pci/pcie_port.h" #include "hw/qdev-properties.h" #include "migration/vmstate.h" +#include "qom/object.h" #define TYPE_GEN_PCIE_ROOT_PORT "pcie-root-port" -#define GEN_PCIE_ROOT_PORT(obj) \ - OBJECT_CHECK(GenPCIERootPort, (obj), TYPE_GEN_PCIE_ROOT_PORT) +typedef struct GenPCIERootPort GenPCIERootPort; +DECLARE_INSTANCE_CHECKER(GenPCIERootPort, GEN_PCIE_ROOT_PORT, + TYPE_GEN_PCIE_ROOT_PORT) #define GEN_PCIE_ROOT_PORT_AER_OFFSET 0x100 #define GEN_PCIE_ROOT_PORT_ACS_OFFSET \ @@ -28,7 +30,7 @@ #define GEN_PCIE_ROOT_PORT_MSIX_NR_VECTOR 1 -typedef struct GenPCIERootPort { +struct GenPCIERootPort { /*< private >*/ PCIESlot parent_obj; /*< public >*/ @@ -37,7 +39,7 @@ typedef struct GenPCIERootPort { /* additional resources to reserve */ PCIResReserve res_reserve; -} GenPCIERootPort; +}; static uint8_t gen_rp_aer_vector(const PCIDevice *d) { diff --git a/hw/pci-bridge/pci_bridge_dev.c b/hw/pci-bridge/pci_bridge_dev.c index 4a080b7c7b..b86d76caf3 100644 --- a/hw/pci-bridge/pci_bridge_dev.c +++ b/hw/pci-bridge/pci_bridge_dev.c @@ -31,11 +31,13 @@ #include "exec/memory.h" #include "hw/pci/pci_bus.h" #include "hw/hotplug.h" +#include "qom/object.h" #define TYPE_PCI_BRIDGE_DEV "pci-bridge" #define TYPE_PCI_BRIDGE_SEAT_DEV "pci-bridge-seat" -#define PCI_BRIDGE_DEV(obj) \ - OBJECT_CHECK(PCIBridgeDev, (obj), TYPE_PCI_BRIDGE_DEV) +typedef struct PCIBridgeDev PCIBridgeDev; +DECLARE_INSTANCE_CHECKER(PCIBridgeDev, PCI_BRIDGE_DEV, + TYPE_PCI_BRIDGE_DEV) struct PCIBridgeDev { /*< private >*/ @@ -52,7 +54,6 @@ struct PCIBridgeDev { /* additional resources to reserve */ PCIResReserve res_reserve; }; -typedef struct PCIBridgeDev PCIBridgeDev; static void pci_bridge_dev_realize(PCIDevice *dev, Error **errp) { diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c index 22f9fc223b..aedded1064 100644 --- a/hw/pci-bridge/pci_expander_bridge.c +++ b/hw/pci-bridge/pci_expander_bridge.c @@ -22,35 +22,42 @@ #include "qemu/module.h" #include "sysemu/numa.h" #include "hw/boards.h" +#include "qom/object.h" #define TYPE_PXB_BUS "pxb-bus" -#define PXB_BUS(obj) OBJECT_CHECK(PXBBus, (obj), TYPE_PXB_BUS) +typedef struct PXBBus PXBBus; +DECLARE_INSTANCE_CHECKER(PXBBus, PXB_BUS, + TYPE_PXB_BUS) #define TYPE_PXB_PCIE_BUS "pxb-pcie-bus" -#define PXB_PCIE_BUS(obj) OBJECT_CHECK(PXBBus, (obj), TYPE_PXB_PCIE_BUS) +DECLARE_INSTANCE_CHECKER(PXBBus, PXB_PCIE_BUS, + TYPE_PXB_PCIE_BUS) -typedef struct PXBBus { +struct PXBBus { /*< private >*/ PCIBus parent_obj; /*< public >*/ char bus_path[8]; -} PXBBus; +}; #define TYPE_PXB_DEVICE "pxb" -#define PXB_DEV(obj) OBJECT_CHECK(PXBDev, (obj), TYPE_PXB_DEVICE) +typedef struct PXBDev PXBDev; +DECLARE_INSTANCE_CHECKER(PXBDev, PXB_DEV, + TYPE_PXB_DEVICE) #define TYPE_PXB_PCIE_DEVICE "pxb-pcie" -#define PXB_PCIE_DEV(obj) OBJECT_CHECK(PXBDev, (obj), TYPE_PXB_PCIE_DEVICE) +DECLARE_INSTANCE_CHECKER(PXBDev, PXB_PCIE_DEV, + TYPE_PXB_PCIE_DEVICE) -typedef struct PXBDev { +struct PXBDev { /*< private >*/ PCIDevice parent_obj; /*< public >*/ uint8_t bus_nr; uint16_t numa_node; -} PXBDev; +}; static PXBDev *convert_to_pxb(PCIDevice *dev) { diff --git a/hw/pci-bridge/pcie_pci_bridge.c b/hw/pci-bridge/pcie_pci_bridge.c index eade133968..abc98f8cd9 100644 --- a/hw/pci-bridge/pcie_pci_bridge.c +++ b/hw/pci-bridge/pcie_pci_bridge.c @@ -17,19 +17,21 @@ #include "hw/pci/shpc.h" #include "hw/pci/slotid_cap.h" #include "hw/qdev-properties.h" +#include "qom/object.h" -typedef struct PCIEPCIBridge { +struct PCIEPCIBridge { /*< private >*/ PCIBridge parent_obj; OnOffAuto msi; MemoryRegion shpc_bar; /*< public >*/ -} PCIEPCIBridge; +}; +typedef struct PCIEPCIBridge PCIEPCIBridge; #define TYPE_PCIE_PCI_BRIDGE_DEV "pcie-pci-bridge" -#define PCIE_PCI_BRIDGE_DEV(obj) \ - OBJECT_CHECK(PCIEPCIBridge, (obj), TYPE_PCIE_PCI_BRIDGE_DEV) +DECLARE_INSTANCE_CHECKER(PCIEPCIBridge, PCIE_PCI_BRIDGE_DEV, + TYPE_PCIE_PCI_BRIDGE_DEV) static void pcie_pci_bridge_realize(PCIDevice *d, Error **errp) { diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c index 1405b3fc70..d10fbd39d3 100644 --- a/hw/pci-host/bonito.c +++ b/hw/pci-host/bonito.c @@ -52,6 +52,7 @@ #include "exec/address-spaces.h" #include "hw/misc/unimp.h" #include "hw/registerfields.h" +#include "qom/object.h" /* #define DEBUG_BONITO */ @@ -200,7 +201,7 @@ FIELD(BONGENCFG, PCIQUEUE, 12, 1) typedef struct BonitoState BonitoState; -typedef struct PCIBonitoState { +struct PCIBonitoState { PCIDevice dev; BonitoState *pcihost; @@ -228,7 +229,8 @@ typedef struct PCIBonitoState { MemoryRegion bonito_pciio; MemoryRegion bonito_localio; -} PCIBonitoState; +}; +typedef struct PCIBonitoState PCIBonitoState; struct BonitoState { PCIHostState parent_obj; @@ -238,12 +240,12 @@ struct BonitoState { }; #define TYPE_BONITO_PCI_HOST_BRIDGE "Bonito-pcihost" -#define BONITO_PCI_HOST_BRIDGE(obj) \ - OBJECT_CHECK(BonitoState, (obj), TYPE_BONITO_PCI_HOST_BRIDGE) +DECLARE_INSTANCE_CHECKER(BonitoState, BONITO_PCI_HOST_BRIDGE, + TYPE_BONITO_PCI_HOST_BRIDGE) #define TYPE_PCI_BONITO "Bonito" -#define PCI_BONITO(obj) \ - OBJECT_CHECK(PCIBonitoState, (obj), TYPE_PCI_BONITO) +DECLARE_INSTANCE_CHECKER(PCIBonitoState, PCI_BONITO, + TYPE_PCI_BONITO) static void bonito_writel(void *opaque, hwaddr addr, uint64_t val, unsigned size) diff --git a/hw/pci-host/grackle.c b/hw/pci-host/grackle.c index 4b3af0c704..fd7d6dcc06 100644 --- a/hw/pci-host/grackle.c +++ b/hw/pci-host/grackle.c @@ -33,11 +33,13 @@ #include "qapi/error.h" #include "qemu/module.h" #include "trace.h" +#include "qom/object.h" -#define GRACKLE_PCI_HOST_BRIDGE(obj) \ - OBJECT_CHECK(GrackleState, (obj), TYPE_GRACKLE_PCI_HOST_BRIDGE) +typedef struct GrackleState GrackleState; +DECLARE_INSTANCE_CHECKER(GrackleState, GRACKLE_PCI_HOST_BRIDGE, + TYPE_GRACKLE_PCI_HOST_BRIDGE) -typedef struct GrackleState { +struct GrackleState { PCIHostState parent_obj; uint32_t ofw_addr; @@ -46,7 +48,7 @@ typedef struct GrackleState { MemoryRegion pci_mmio; MemoryRegion pci_hole; MemoryRegion pci_io; -} GrackleState; +}; /* Don't know if this matches real hardware, but it agrees with OHW. */ static int pci_grackle_map_irq(PCIDevice *pci_dev, int irq_num) diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c index 8ed2417f0c..93c62235ca 100644 --- a/hw/pci-host/i440fx.c +++ b/hw/pci-host/i440fx.c @@ -35,22 +35,24 @@ #include "migration/vmstate.h" #include "qapi/visitor.h" #include "qemu/error-report.h" +#include "qom/object.h" /* * I440FX chipset data sheet. * https://wiki.qemu.org/File:29054901.pdf */ -#define I440FX_PCI_HOST_BRIDGE(obj) \ - OBJECT_CHECK(I440FXState, (obj), TYPE_I440FX_PCI_HOST_BRIDGE) +typedef struct I440FXState I440FXState; +DECLARE_INSTANCE_CHECKER(I440FXState, I440FX_PCI_HOST_BRIDGE, + TYPE_I440FX_PCI_HOST_BRIDGE) -typedef struct I440FXState { +struct I440FXState { PCIHostState parent_obj; Range pci_hole; uint64_t pci_hole64_size; bool pci_hole64_fix; uint32_t short_root_bus; -} I440FXState; +}; #define I440FX_PAM 0x59 #define I440FX_PAM_SIZE 7 diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c index 82132c12ca..a7f9685005 100644 --- a/hw/pci-host/pnv_phb3.c +++ b/hw/pci-host/pnv_phb3.c @@ -18,6 +18,7 @@ #include "hw/ppc/pnv.h" #include "hw/irq.h" #include "hw/qdev-properties.h" +#include "qom/object.h" #define phb3_error(phb, fmt, ...) \ qemu_log_mask(LOG_GUEST_ERROR, "phb3[%d:%d]: " fmt "\n", \ @@ -877,8 +878,8 @@ static IOMMUTLBEntry pnv_phb3_translate_iommu(IOMMUMemoryRegion *iommu, } #define TYPE_PNV_PHB3_IOMMU_MEMORY_REGION "pnv-phb3-iommu-memory-region" -#define PNV_PHB3_IOMMU_MEMORY_REGION(obj) \ - OBJECT_CHECK(IOMMUMemoryRegion, (obj), TYPE_PNV_PHB3_IOMMU_MEMORY_REGION) +DECLARE_INSTANCE_CHECKER(IOMMUMemoryRegion, PNV_PHB3_IOMMU_MEMORY_REGION, + TYPE_PNV_PHB3_IOMMU_MEMORY_REGION) static void pnv_phb3_iommu_memory_region_class_init(ObjectClass *klass, void *data) diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c index 75ad766fe0..03daf40a23 100644 --- a/hw/pci-host/pnv_phb4.c +++ b/hw/pci-host/pnv_phb4.c @@ -21,6 +21,7 @@ #include "hw/ppc/pnv_xscom.h" #include "hw/irq.h" #include "hw/qdev-properties.h" +#include "qom/object.h" #define phb_error(phb, fmt, ...) \ qemu_log_mask(LOG_GUEST_ERROR, "phb4[%d:%d]: " fmt "\n", \ @@ -1042,8 +1043,8 @@ static IOMMUTLBEntry pnv_phb4_translate_iommu(IOMMUMemoryRegion *iommu, } #define TYPE_PNV_PHB4_IOMMU_MEMORY_REGION "pnv-phb4-iommu-memory-region" -#define PNV_PHB4_IOMMU_MEMORY_REGION(obj) \ - OBJECT_CHECK(IOMMUMemoryRegion, (obj), TYPE_PNV_PHB4_IOMMU_MEMORY_REGION) +DECLARE_INSTANCE_CHECKER(IOMMUMemoryRegion, PNV_PHB4_IOMMU_MEMORY_REGION, + TYPE_PNV_PHB4_IOMMU_MEMORY_REGION) static void pnv_phb4_iommu_memory_region_class_init(ObjectClass *klass, void *data) diff --git a/hw/pci-host/ppce500.c b/hw/pci-host/ppce500.c index 1a62b2f8cc..f376374e24 100644 --- a/hw/pci-host/ppce500.c +++ b/hw/pci-host/ppce500.c @@ -24,6 +24,7 @@ #include "qemu/bswap.h" #include "qemu/module.h" #include "hw/pci-host/ppce500.h" +#include "qom/object.h" #ifdef DEBUG_PCI #define pci_debug(fmt, ...) fprintf(stderr, fmt, ## __VA_ARGS__) @@ -91,8 +92,9 @@ struct pci_inbound { #define TYPE_PPC_E500_PCI_HOST_BRIDGE "e500-pcihost" -#define PPC_E500_PCI_HOST_BRIDGE(obj) \ - OBJECT_CHECK(PPCE500PCIState, (obj), TYPE_PPC_E500_PCI_HOST_BRIDGE) +typedef struct PPCE500PCIState PPCE500PCIState; +DECLARE_INSTANCE_CHECKER(PPCE500PCIState, PPC_E500_PCI_HOST_BRIDGE, + TYPE_PPC_E500_PCI_HOST_BRIDGE) struct PPCE500PCIState { PCIHostState parent_obj; @@ -114,8 +116,9 @@ struct PPCE500PCIState { }; #define TYPE_PPC_E500_PCI_BRIDGE "e500-host-bridge" -#define PPC_E500_PCI_BRIDGE(obj) \ - OBJECT_CHECK(PPCE500PCIBridgeState, (obj), TYPE_PPC_E500_PCI_BRIDGE) +typedef struct PPCE500PCIBridgeState PPCE500PCIBridgeState; +DECLARE_INSTANCE_CHECKER(PPCE500PCIBridgeState, PPC_E500_PCI_BRIDGE, + TYPE_PPC_E500_PCI_BRIDGE) struct PPCE500PCIBridgeState { /*< private >*/ @@ -125,8 +128,6 @@ struct PPCE500PCIBridgeState { MemoryRegion bar0; }; -typedef struct PPCE500PCIBridgeState PPCE500PCIBridgeState; -typedef struct PPCE500PCIState PPCE500PCIState; static uint64_t pci_reg_read4(void *opaque, hwaddr addr, unsigned size) diff --git a/hw/pci-host/prep.c b/hw/pci-host/prep.c index 4b93fd2b01..b234fd7c8a 100644 --- a/hw/pci-host/prep.c +++ b/hw/pci-host/prep.c @@ -38,25 +38,28 @@ #include "hw/or-irq.h" #include "exec/address-spaces.h" #include "elf.h" +#include "qom/object.h" #define TYPE_RAVEN_PCI_DEVICE "raven" #define TYPE_RAVEN_PCI_HOST_BRIDGE "raven-pcihost" -#define RAVEN_PCI_DEVICE(obj) \ - OBJECT_CHECK(RavenPCIState, (obj), TYPE_RAVEN_PCI_DEVICE) +typedef struct RavenPCIState RavenPCIState; +DECLARE_INSTANCE_CHECKER(RavenPCIState, RAVEN_PCI_DEVICE, + TYPE_RAVEN_PCI_DEVICE) -typedef struct RavenPCIState { +struct RavenPCIState { PCIDevice dev; uint32_t elf_machine; char *bios_name; MemoryRegion bios; -} RavenPCIState; +}; -#define RAVEN_PCI_HOST_BRIDGE(obj) \ - OBJECT_CHECK(PREPPCIState, (obj), TYPE_RAVEN_PCI_HOST_BRIDGE) +typedef struct PRePPCIState PREPPCIState; +DECLARE_INSTANCE_CHECKER(PREPPCIState, RAVEN_PCI_HOST_BRIDGE, + TYPE_RAVEN_PCI_HOST_BRIDGE) -typedef struct PRePPCIState { +struct PRePPCIState { PCIHostState parent_obj; qemu_or_irq *or_irq; @@ -75,7 +78,7 @@ typedef struct PRePPCIState { int contiguous_map; bool is_legacy_prep; -} PREPPCIState; +}; #define BIOS_SIZE (1 * MiB) diff --git a/hw/pci-host/sabre.c b/hw/pci-host/sabre.c index 0cc68585f8..5ac6283623 100644 --- a/hw/pci-host/sabre.c +++ b/hw/pci-host/sabre.c @@ -338,7 +338,7 @@ static void pci_sabre_set_irq(void *opaque, int irq_num, int level) static void sabre_reset(DeviceState *d) { - SabreState *s = SABRE_DEVICE(d); + SabreState *s = SABRE(d); PCIDevice *pci_dev; unsigned int i; uint16_t cmd; @@ -376,7 +376,7 @@ static const MemoryRegionOps pci_config_ops = { static void sabre_realize(DeviceState *dev, Error **errp) { - SabreState *s = SABRE_DEVICE(dev); + SabreState *s = SABRE(dev); PCIHostState *phb = PCI_HOST_BRIDGE(dev); SysBusDevice *sbd = SYS_BUS_DEVICE(s); PCIDevice *pci_dev; @@ -421,7 +421,7 @@ static void sabre_realize(DeviceState *dev, Error **errp) static void sabre_init(Object *obj) { - SabreState *s = SABRE_DEVICE(obj); + SabreState *s = SABRE(obj); SysBusDevice *sbd = SYS_BUS_DEVICE(obj); unsigned int i; @@ -502,7 +502,7 @@ static const TypeInfo sabre_pci_info = { static char *sabre_ofw_unit_address(const SysBusDevice *dev) { - SabreState *s = SABRE_DEVICE(dev); + SabreState *s = SABRE(dev); return g_strdup_printf("%x,%x", (uint32_t)((s->special_base >> 32) & 0xffffffff), diff --git a/hw/pci-host/versatile.c b/hw/pci-host/versatile.c index 7e4aa467a2..3553277f94 100644 --- a/hw/pci-host/versatile.c +++ b/hw/pci-host/versatile.c @@ -18,6 +18,7 @@ #include "hw/qdev-properties.h" #include "qemu/log.h" #include "qemu/module.h" +#include "qom/object.h" /* Old and buggy versions of QEMU used the wrong mapping from * PCI IRQs to system interrupt lines. Unfortunately the Linux @@ -71,7 +72,7 @@ enum { PCI_VPB_IRQMAP_FORCE_OK, }; -typedef struct { +struct PCIVPBState { PCIHostState parent_obj; qemu_irq irq[4]; @@ -100,7 +101,8 @@ typedef struct { uint32_t selfid; uint32_t flags; uint8_t irq_mapping; -} PCIVPBState; +}; +typedef struct PCIVPBState PCIVPBState; static void pci_vpb_update_window(PCIVPBState *s, int i) { @@ -156,12 +158,12 @@ static const VMStateDescription pci_vpb_vmstate = { }; #define TYPE_VERSATILE_PCI "versatile_pci" -#define PCI_VPB(obj) \ - OBJECT_CHECK(PCIVPBState, (obj), TYPE_VERSATILE_PCI) +DECLARE_INSTANCE_CHECKER(PCIVPBState, PCI_VPB, + TYPE_VERSATILE_PCI) #define TYPE_VERSATILE_PCI_HOST "versatile_pci_host" -#define PCI_VPB_HOST(obj) \ - OBJECT_CHECK(PCIDevice, (obj), TYPE_VERSATILE_PCI_HOST) +DECLARE_INSTANCE_CHECKER(PCIDevice, PCI_VPB_HOST, + TYPE_VERSATILE_PCI_HOST) typedef enum { PCI_IMAP0 = 0x0, diff --git a/hw/ppc/e500-ccsr.h b/hw/ppc/e500-ccsr.h index 12a2ba4b97..de4b9d2bc3 100644 --- a/hw/ppc/e500-ccsr.h +++ b/hw/ppc/e500-ccsr.h @@ -2,16 +2,19 @@ #define E500_CCSR_H #include "hw/sysbus.h" +#include "qom/object.h" -typedef struct PPCE500CCSRState { +struct PPCE500CCSRState { /*< private >*/ SysBusDevice parent; /*< public >*/ MemoryRegion ccsr_space; -} PPCE500CCSRState; +}; +typedef struct PPCE500CCSRState PPCE500CCSRState; #define TYPE_CCSR "e500-ccsr" -#define CCSR(obj) OBJECT_CHECK(PPCE500CCSRState, (obj), TYPE_CCSR) +DECLARE_INSTANCE_CHECKER(PPCE500CCSRState, CCSR, + TYPE_CCSR) #endif /* E500_CCSR_H */ diff --git a/hw/ppc/e500.h b/hw/ppc/e500.h index 3fd9f825ca..63870751ff 100644 --- a/hw/ppc/e500.h +++ b/hw/ppc/e500.h @@ -3,8 +3,9 @@ #include "hw/boards.h" #include "hw/platform-bus.h" +#include "qom/object.h" -typedef struct PPCE500MachineState { +struct PPCE500MachineState { /*< private >*/ MachineState parent_obj; @@ -12,9 +13,10 @@ typedef struct PPCE500MachineState { * board supports dynamic sysbus devices */ PlatformBusDevice *pbus_dev; -} PPCE500MachineState; +}; +typedef struct PPCE500MachineState PPCE500MachineState; -typedef struct PPCE500MachineClass { +struct PPCE500MachineClass { /*< private >*/ MachineClass parent_class; @@ -36,18 +38,15 @@ typedef struct PPCE500MachineClass { hwaddr pci_mmio_base; hwaddr pci_mmio_bus_base; hwaddr spin_base; -} PPCE500MachineClass; +}; +typedef struct PPCE500MachineClass PPCE500MachineClass; void ppce500_init(MachineState *machine); hwaddr booke206_page_size_to_tlb(uint64_t size); #define TYPE_PPCE500_MACHINE "ppce500-base-machine" -#define PPCE500_MACHINE(obj) \ - OBJECT_CHECK(PPCE500MachineState, (obj), TYPE_PPCE500_MACHINE) -#define PPCE500_MACHINE_GET_CLASS(obj) \ - OBJECT_GET_CLASS(PPCE500MachineClass, obj, TYPE_PPCE500_MACHINE) -#define PPCE500_MACHINE_CLASS(klass) \ - OBJECT_CLASS_CHECK(PPCE500MachineClass, klass, TYPE_PPCE500_MACHINE) +DECLARE_OBJ_CHECKERS(PPCE500MachineState, PPCE500MachineClass, + PPCE500_MACHINE, TYPE_PPCE500_MACHINE) #endif diff --git a/hw/ppc/mac.h b/hw/ppc/mac.h index 6af87d1fa0..2b6425f600 100644 --- a/hw/ppc/mac.h +++ b/hw/ppc/mac.h @@ -34,6 +34,7 @@ #include "hw/misc/mos6522.h" #include "hw/pci/pci_host.h" #include "hw/pci-host/uninorth.h" +#include "qom/object.h" /* SMP is not enabled, for now */ #define MAX_CPUS 1 @@ -71,29 +72,31 @@ /* Core99 machine */ #define TYPE_CORE99_MACHINE MACHINE_TYPE_NAME("mac99") -#define CORE99_MACHINE(obj) OBJECT_CHECK(Core99MachineState, (obj), \ - TYPE_CORE99_MACHINE) +typedef struct Core99MachineState Core99MachineState; +DECLARE_INSTANCE_CHECKER(Core99MachineState, CORE99_MACHINE, + TYPE_CORE99_MACHINE) #define CORE99_VIA_CONFIG_CUDA 0x0 #define CORE99_VIA_CONFIG_PMU 0x1 #define CORE99_VIA_CONFIG_PMU_ADB 0x2 -typedef struct Core99MachineState { +struct Core99MachineState { /*< private >*/ MachineState parent; uint8_t via_config; -} Core99MachineState; +}; /* Grackle PCI */ #define TYPE_GRACKLE_PCI_HOST_BRIDGE "grackle-pcihost" /* Mac NVRAM */ #define TYPE_MACIO_NVRAM "macio-nvram" -#define MACIO_NVRAM(obj) \ - OBJECT_CHECK(MacIONVRAMState, (obj), TYPE_MACIO_NVRAM) +typedef struct MacIONVRAMState MacIONVRAMState; +DECLARE_INSTANCE_CHECKER(MacIONVRAMState, MACIO_NVRAM, + TYPE_MACIO_NVRAM) -typedef struct MacIONVRAMState { +struct MacIONVRAMState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -103,7 +106,7 @@ typedef struct MacIONVRAMState { MemoryRegion mem; uint8_t *data; -} MacIONVRAMState; +}; void pmac_format_nvram_partition (MacIONVRAMState *nvr, int len); #endif /* PPC_MAC_H */ diff --git a/hw/ppc/mpc8544_guts.c b/hw/ppc/mpc8544_guts.c index b96ea36f98..b76b5e4701 100644 --- a/hw/ppc/mpc8544_guts.c +++ b/hw/ppc/mpc8544_guts.c @@ -22,6 +22,7 @@ #include "sysemu/runstate.h" #include "cpu.h" #include "hw/sysbus.h" +#include "qom/object.h" #define MPC8544_GUTS_MMIO_SIZE 0x1000 #define MPC8544_GUTS_RSTCR_RESET 0x02 @@ -54,7 +55,9 @@ #define MPC8544_GUTS_ADDR_SRDS2CR3 0xF18 #define TYPE_MPC8544_GUTS "mpc8544-guts" -#define MPC8544_GUTS(obj) OBJECT_CHECK(GutsState, (obj), TYPE_MPC8544_GUTS) +typedef struct GutsState GutsState; +DECLARE_INSTANCE_CHECKER(GutsState, MPC8544_GUTS, + TYPE_MPC8544_GUTS) struct GutsState { /*< private >*/ @@ -64,7 +67,6 @@ struct GutsState { MemoryRegion iomem; }; -typedef struct GutsState GutsState; static uint64_t mpc8544_guts_read(void *opaque, hwaddr addr, unsigned size) diff --git a/hw/ppc/ppc440_pcix.c b/hw/ppc/ppc440_pcix.c index 2ee2d4f4fc..a564fcd600 100644 --- a/hw/ppc/ppc440_pcix.c +++ b/hw/ppc/ppc440_pcix.c @@ -30,6 +30,7 @@ #include "hw/pci/pci_host.h" #include "exec/address-spaces.h" #include "trace.h" +#include "qom/object.h" struct PLBOutMap { uint64_t la; @@ -45,13 +46,14 @@ struct PLBInMap { }; #define TYPE_PPC440_PCIX_HOST_BRIDGE "ppc440-pcix-host" -#define PPC440_PCIX_HOST_BRIDGE(obj) \ - OBJECT_CHECK(PPC440PCIXState, (obj), TYPE_PPC440_PCIX_HOST_BRIDGE) +typedef struct PPC440PCIXState PPC440PCIXState; +DECLARE_INSTANCE_CHECKER(PPC440PCIXState, PPC440_PCIX_HOST_BRIDGE, + TYPE_PPC440_PCIX_HOST_BRIDGE) #define PPC440_PCIX_NR_POMS 3 #define PPC440_PCIX_NR_PIMS 3 -typedef struct PPC440PCIXState { +struct PPC440PCIXState { PCIHostState parent_obj; PCIDevice *dev; @@ -65,7 +67,7 @@ typedef struct PPC440PCIXState { MemoryRegion container; MemoryRegion iomem; MemoryRegion busmem; -} PPC440PCIXState; +}; #define PPC440_REG_BASE 0x80000 #define PPC440_REG_SIZE 0xff diff --git a/hw/ppc/ppc440_uc.c b/hw/ppc/ppc440_uc.c index 38fc392438..d9ca6bba9b 100644 --- a/hw/ppc/ppc440_uc.c +++ b/hw/ppc/ppc440_uc.c @@ -24,6 +24,7 @@ #include "sysemu/block-backend.h" #include "sysemu/reset.h" #include "ppc440.h" +#include "qom/object.h" /*****************************************************************************/ /* L2 Cache as SRAM */ @@ -1032,10 +1033,11 @@ void ppc4xx_dma_init(CPUPPCState *env, int dcr_base) #include "hw/pci/pcie_host.h" #define TYPE_PPC460EX_PCIE_HOST "ppc460ex-pcie-host" -#define PPC460EX_PCIE_HOST(obj) \ - OBJECT_CHECK(PPC460EXPCIEState, (obj), TYPE_PPC460EX_PCIE_HOST) +typedef struct PPC460EXPCIEState PPC460EXPCIEState; +DECLARE_INSTANCE_CHECKER(PPC460EXPCIEState, PPC460EX_PCIE_HOST, + TYPE_PPC460EX_PCIE_HOST) -typedef struct PPC460EXPCIEState { +struct PPC460EXPCIEState { PCIExpressHost host; MemoryRegion iomem; @@ -1056,7 +1058,7 @@ typedef struct PPC460EXPCIEState { uint32_t reg_mask; uint32_t special; uint32_t cfg; -} PPC460EXPCIEState; +}; #define DCRN_PCIE0_BASE 0x100 #define DCRN_PCIE1_BASE 0x120 diff --git a/hw/ppc/ppc4xx_pci.c b/hw/ppc/ppc4xx_pci.c index 503ef46b39..c24bac96c3 100644 --- a/hw/ppc/ppc4xx_pci.c +++ b/hw/ppc/ppc4xx_pci.c @@ -30,6 +30,7 @@ #include "hw/pci/pci_host.h" #include "exec/address-spaces.h" #include "trace.h" +#include "qom/object.h" struct PCIMasterMap { uint32_t la; @@ -43,8 +44,9 @@ struct PCITargetMap { uint32_t la; }; -#define PPC4xx_PCI_HOST_BRIDGE(obj) \ - OBJECT_CHECK(PPC4xxPCIState, (obj), TYPE_PPC4xx_PCI_HOST_BRIDGE) +typedef struct PPC4xxPCIState PPC4xxPCIState; +DECLARE_INSTANCE_CHECKER(PPC4xxPCIState, PPC4xx_PCI_HOST_BRIDGE, + TYPE_PPC4xx_PCI_HOST_BRIDGE) #define PPC4xx_PCI_NR_PMMS 3 #define PPC4xx_PCI_NR_PTMS 2 @@ -59,7 +61,6 @@ struct PPC4xxPCIState { MemoryRegion container; MemoryRegion iomem; }; -typedef struct PPC4xxPCIState PPC4xxPCIState; #define PCIC0_CFGADDR 0x0 #define PCIC0_CFGDATA 0x4 diff --git a/hw/ppc/ppce500_spin.c b/hw/ppc/ppce500_spin.c index 66c1065db2..cd8000ad73 100644 --- a/hw/ppc/ppce500_spin.c +++ b/hw/ppc/ppce500_spin.c @@ -34,6 +34,7 @@ #include "hw/sysbus.h" #include "sysemu/hw_accel.h" #include "e500.h" +#include "qom/object.h" #define MAX_CPUS 32 @@ -46,14 +47,16 @@ typedef struct spin_info { } QEMU_PACKED SpinInfo; #define TYPE_E500_SPIN "e500-spin" -#define E500_SPIN(obj) OBJECT_CHECK(SpinState, (obj), TYPE_E500_SPIN) +typedef struct SpinState SpinState; +DECLARE_INSTANCE_CHECKER(SpinState, E500_SPIN, + TYPE_E500_SPIN) -typedef struct SpinState { +struct SpinState { SysBusDevice parent_obj; MemoryRegion iomem; SpinInfo spin[MAX_CPUS]; -} SpinState; +}; static void spin_reset(DeviceState *dev) { diff --git a/hw/ppc/prep_systemio.c b/hw/ppc/prep_systemio.c index bbc51b6e9a..d1e2fb3f8b 100644 --- a/hw/ppc/prep_systemio.c +++ b/hw/ppc/prep_systemio.c @@ -28,6 +28,7 @@ #include "hw/qdev-properties.h" #include "migration/vmstate.h" #include "exec/address-spaces.h" +#include "qom/object.h" #include "qemu/error-report.h" /* for error_report() */ #include "qemu/module.h" #include "sysemu/runstate.h" @@ -35,13 +36,14 @@ #include "trace.h" #define TYPE_PREP_SYSTEMIO "prep-systemio" -#define PREP_SYSTEMIO(obj) \ - OBJECT_CHECK(PrepSystemIoState, (obj), TYPE_PREP_SYSTEMIO) +typedef struct PrepSystemIoState PrepSystemIoState; +DECLARE_INSTANCE_CHECKER(PrepSystemIoState, PREP_SYSTEMIO, + TYPE_PREP_SYSTEMIO) /* Bit as defined in PowerPC Reference Plaform v1.1, sect. 6.1.5, p. 132 */ #define PREP_BIT(n) (1 << (7 - (n))) -typedef struct PrepSystemIoState { +struct PrepSystemIoState { ISADevice parent_obj; MemoryRegion ppc_parity_mem; @@ -53,7 +55,7 @@ typedef struct PrepSystemIoState { uint8_t ibm_planar_id; /* 0x0852 */ qemu_irq softreset_irq; PortioList portio; -} PrepSystemIoState; +}; /* PORT 0092 -- Special Port 92 (Read/Write) */ diff --git a/hw/ppc/rs6000_mc.c b/hw/ppc/rs6000_mc.c index ce97365f5e..8611ffa96d 100644 --- a/hw/ppc/rs6000_mc.c +++ b/hw/ppc/rs6000_mc.c @@ -26,12 +26,14 @@ #include "hw/boards.h" #include "qapi/error.h" #include "trace.h" +#include "qom/object.h" #define TYPE_RS6000MC "rs6000-mc" -#define RS6000MC_DEVICE(obj) \ - OBJECT_CHECK(RS6000MCState, (obj), TYPE_RS6000MC) +typedef struct RS6000MCState RS6000MCState; +DECLARE_INSTANCE_CHECKER(RS6000MCState, RS6000MC, + TYPE_RS6000MC) -typedef struct RS6000MCState { +struct RS6000MCState { ISADevice parent_obj; /* see US patent 5,684,979 for details (expired 2001-11-04) */ uint32_t ram_size; @@ -41,7 +43,7 @@ typedef struct RS6000MCState { uint32_t end_address[8]; uint8_t port0820_index; PortioList portio; -} RS6000MCState; +}; /* P0RT 0803 -- SIMM ID Register (32/8 MB) (Read Only) */ @@ -141,7 +143,7 @@ static const MemoryRegionPortio rs6000mc_port_list[] = { static void rs6000mc_realize(DeviceState *dev, Error **errp) { - RS6000MCState *s = RS6000MC_DEVICE(dev); + RS6000MCState *s = RS6000MC(dev); int socket = 0; unsigned int ram_size = s->ram_size / MiB; Error *local_err = NULL; diff --git a/hw/ppc/spapr_rng.c b/hw/ppc/spapr_rng.c index 85bf64d68e..6c99633faa 100644 --- a/hw/ppc/spapr_rng.c +++ b/hw/ppc/spapr_rng.c @@ -28,9 +28,11 @@ #include "hw/ppc/spapr.h" #include "hw/qdev-properties.h" #include "kvm_ppc.h" +#include "qom/object.h" -#define SPAPR_RNG(obj) \ - OBJECT_CHECK(SpaprRngState, (obj), TYPE_SPAPR_RNG) +typedef struct SpaprRngState SpaprRngState; +DECLARE_INSTANCE_CHECKER(SpaprRngState, SPAPR_RNG, + TYPE_SPAPR_RNG) struct SpaprRngState { /*< private >*/ @@ -38,7 +40,6 @@ struct SpaprRngState { RngBackend *backend; bool use_kvm; }; -typedef struct SpaprRngState SpaprRngState; struct HRandomData { QemuSemaphore sem; diff --git a/hw/ppc/trace-events b/hw/ppc/trace-events index 7c0be4102e..dcc06d49b5 100644 --- a/hw/ppc/trace-events +++ b/hw/ppc/trace-events @@ -9,11 +9,8 @@ spapr_pci_msi_write(uint64_t addr, uint64_t data, uint32_t dt_irq) "@0x%"PRIx64" spapr_pci_lsi_set(const char *busname, int pin, uint32_t irq) "%s PIN%d IRQ %u" spapr_pci_msi_retry(unsigned config_addr, unsigned req_num, unsigned max_irqs) "Guest device at 0x%x asked %u, have only %u" -# spapr.c -spapr_cas_failed(unsigned long n) "DT diff buffer is too small: %ld bytes" -spapr_cas_continue(unsigned long n) "Copy changes to the guest: %ld bytes" - # spapr_hcall.c +spapr_cas_continue(unsigned long n) "Copy changes to the guest: %ld bytes" spapr_cas_pvr(uint32_t cur_pvr, bool explicit_match, uint32_t new_pvr) "current=0x%x, explicit_match=%u, new=0x%x" spapr_h_resize_hpt_prepare(uint64_t flags, uint64_t shift) "flags=0x%"PRIx64", shift=%"PRIu64 spapr_h_resize_hpt_commit(uint64_t flags, uint64_t shift) "flags=0x%"PRIx64", shift=%"PRIu64 @@ -21,7 +18,7 @@ spapr_update_dt(unsigned cb) "New blob %u bytes" spapr_update_dt_failed_size(unsigned cbold, unsigned cbnew, unsigned magic) "Old blob %u bytes, new blob %u bytes, magic 0x%x" spapr_update_dt_failed_check(unsigned cbold, unsigned cbnew, unsigned magic) "Old blob %u bytes, new blob %u bytes, magic 0x%x" -# spapr_hcall_tpm.c +# spapr_tpm_proxy.c spapr_h_tpm_comm(const char *device_path, uint64_t operation) "tpm_device_path=%s operation=0x%"PRIu64 spapr_tpm_execute(uint64_t data_in, uint64_t data_in_sz, uint64_t data_out, uint64_t data_out_sz) "data_in=0x%"PRIx64", data_in_sz=%"PRIu64", data_out=0x%"PRIx64", data_out_sz=%"PRIu64 @@ -77,9 +74,6 @@ spapr_vio_free_crq(uint32_t reg) "CRQ for dev 0x%" PRIx32 " freed" # ppc.c ppc_tb_adjust(uint64_t offs1, uint64_t offs2, int64_t diff, int64_t seconds) "adjusted from 0x%"PRIx64" to 0x%"PRIx64", diff %"PRId64" (%"PRId64"s)" -# prep.c -prep_io_800_writeb(uint32_t addr, uint32_t val) "0x%08" PRIx32 " => 0x%02" PRIx32 -prep_io_800_readb(uint32_t addr, uint32_t retval) "0x%08" PRIx32 " <= 0x%02" PRIx32 # prep_systemio.c prep_systemio_read(uint32_t addr, uint32_t val) "read addr=0x%x val=0x%x" diff --git a/hw/rdma/vmw/pvrdma.h b/hw/rdma/vmw/pvrdma.h index a8a04a253c..1d36a76f1e 100644 --- a/hw/rdma/vmw/pvrdma.h +++ b/hw/rdma/vmw/pvrdma.h @@ -29,6 +29,7 @@ #include "standard-headers/drivers/infiniband/hw/vmw_pvrdma/pvrdma_ring.h" #include "standard-headers/drivers/infiniband/hw/vmw_pvrdma/pvrdma_dev_api.h" #include "pvrdma_dev_ring.h" +#include "qom/object.h" /* BARs */ #define RDMA_MSIX_BAR_IDX 0 @@ -78,7 +79,7 @@ typedef struct PVRDMADevStats { uint64_t interrupts; } PVRDMADevStats; -typedef struct PVRDMADev { +struct PVRDMADev { PCIDevice parent_obj; MemoryRegion msix; MemoryRegion regs; @@ -98,8 +99,10 @@ typedef struct PVRDMADev { VMXNET3State *func0; Notifier shutdown_notifier; PVRDMADevStats stats; -} PVRDMADev; -#define PVRDMA_DEV(dev) OBJECT_CHECK(PVRDMADev, (dev), PVRDMA_HW_NAME) +}; +typedef struct PVRDMADev PVRDMADev; +DECLARE_INSTANCE_CHECKER(PVRDMADev, PVRDMA_DEV, + PVRDMA_HW_NAME) static inline int get_reg_val(PVRDMADev *dev, hwaddr addr, uint32_t *val) { diff --git a/hw/riscv/trace-events b/hw/riscv/trace-events index 6d59233e23..b819878963 100644 --- a/hw/riscv/trace-events +++ b/hw/riscv/trace-events @@ -1,6 +1,6 @@ # See docs/devel/tracing.txt for syntax documentation. -# hw/gpio/sifive_gpio.c +# sifive_gpio.c sifive_gpio_read(uint64_t offset, uint64_t r) "offset 0x%" PRIx64 " value 0x%" PRIx64 sifive_gpio_write(uint64_t offset, uint64_t value) "offset 0x%" PRIx64 " value 0x%" PRIx64 sifive_gpio_set(int64_t line, int64_t value) "line %" PRIi64 " value %" PRIi64 diff --git a/hw/rtc/ds1338.c b/hw/rtc/ds1338.c index 588a9ba9be..10fac3d9c9 100644 --- a/hw/rtc/ds1338.c +++ b/hw/rtc/ds1338.c @@ -16,6 +16,7 @@ #include "migration/vmstate.h" #include "qemu/bcd.h" #include "qemu/module.h" +#include "qom/object.h" /* Size of NVRAM including both the user-accessible area and the * secondary register area. @@ -29,9 +30,11 @@ #define CTRL_OSF 0x20 #define TYPE_DS1338 "ds1338" -#define DS1338(obj) OBJECT_CHECK(DS1338State, (obj), TYPE_DS1338) +typedef struct DS1338State DS1338State; +DECLARE_INSTANCE_CHECKER(DS1338State, DS1338, + TYPE_DS1338) -typedef struct DS1338State { +struct DS1338State { I2CSlave parent_obj; int64_t offset; @@ -39,7 +42,7 @@ typedef struct DS1338State { uint8_t nvram[NVRAM_SIZE]; int32_t ptr; bool addr_byte; -} DS1338State; +}; static const VMStateDescription vmstate_ds1338 = { .name = "ds1338", diff --git a/hw/rtc/exynos4210_rtc.c b/hw/rtc/exynos4210_rtc.c index f85483a07f..f8a4fe8a47 100644 --- a/hw/rtc/exynos4210_rtc.c +++ b/hw/rtc/exynos4210_rtc.c @@ -38,6 +38,7 @@ #include "hw/irq.h" #include "hw/arm/exynos4210.h" +#include "qom/object.h" #define DEBUG_RTC 0 @@ -84,10 +85,11 @@ #define RTC_BASE_FREQ 32768 #define TYPE_EXYNOS4210_RTC "exynos4210.rtc" -#define EXYNOS4210_RTC(obj) \ - OBJECT_CHECK(Exynos4210RTCState, (obj), TYPE_EXYNOS4210_RTC) +typedef struct Exynos4210RTCState Exynos4210RTCState; +DECLARE_INSTANCE_CHECKER(Exynos4210RTCState, EXYNOS4210_RTC, + TYPE_EXYNOS4210_RTC) -typedef struct Exynos4210RTCState { +struct Exynos4210RTCState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -113,7 +115,7 @@ typedef struct Exynos4210RTCState { qemu_irq alm_irq; /* alarm irq */ struct tm current_tm; /* current time */ -} Exynos4210RTCState; +}; #define TICCKSEL(value) ((value & (0x0F << 4)) >> 4) diff --git a/hw/rtc/m41t80.c b/hw/rtc/m41t80.c index 914ecac8f4..0b7048c3f4 100644 --- a/hw/rtc/m41t80.c +++ b/hw/rtc/m41t80.c @@ -14,14 +14,17 @@ #include "qemu/timer.h" #include "qemu/bcd.h" #include "hw/i2c/i2c.h" +#include "qom/object.h" #define TYPE_M41T80 "m41t80" -#define M41T80(obj) OBJECT_CHECK(M41t80State, (obj), TYPE_M41T80) +typedef struct M41t80State M41t80State; +DECLARE_INSTANCE_CHECKER(M41t80State, M41T80, + TYPE_M41T80) -typedef struct M41t80State { +struct M41t80State { I2CSlave parent_obj; int8_t addr; -} M41t80State; +}; static void m41t80_realize(DeviceState *dev, Error **errp) { diff --git a/hw/rtc/m48t59-isa.c b/hw/rtc/m48t59-isa.c index 50430b7a85..cae315e488 100644 --- a/hw/rtc/m48t59-isa.c +++ b/hw/rtc/m48t59-isa.c @@ -30,26 +30,25 @@ #include "m48t59-internal.h" #include "qapi/error.h" #include "qemu/module.h" +#include "qom/object.h" #define TYPE_M48TXX_ISA "isa-m48txx" -#define M48TXX_ISA_GET_CLASS(obj) \ - OBJECT_GET_CLASS(M48txxISADeviceClass, (obj), TYPE_M48TXX_ISA) -#define M48TXX_ISA_CLASS(klass) \ - OBJECT_CLASS_CHECK(M48txxISADeviceClass, (klass), TYPE_M48TXX_ISA) -#define M48TXX_ISA(obj) \ - OBJECT_CHECK(M48txxISAState, (obj), TYPE_M48TXX_ISA) - -typedef struct M48txxISAState { +typedef struct M48txxISADeviceClass M48txxISADeviceClass; +typedef struct M48txxISAState M48txxISAState; +DECLARE_OBJ_CHECKERS(M48txxISAState, M48txxISADeviceClass, + M48TXX_ISA, TYPE_M48TXX_ISA) + +struct M48txxISAState { ISADevice parent_obj; M48t59State state; uint32_t io_base; MemoryRegion io; -} M48txxISAState; +}; -typedef struct M48txxISADeviceClass { +struct M48txxISADeviceClass { ISADeviceClass parent_class; M48txxInfo info; -} M48txxISADeviceClass; +}; static M48txxInfo m48txx_isa_info[] = { { diff --git a/hw/rtc/m48t59.c b/hw/rtc/m48t59.c index b428a06045..6525206976 100644 --- a/hw/rtc/m48t59.c +++ b/hw/rtc/m48t59.c @@ -40,14 +40,13 @@ #include "m48t59-internal.h" #include "migration/vmstate.h" +#include "qom/object.h" #define TYPE_M48TXX_SYS_BUS "sysbus-m48txx" -#define M48TXX_SYS_BUS_GET_CLASS(obj) \ - OBJECT_GET_CLASS(M48txxSysBusDeviceClass, (obj), TYPE_M48TXX_SYS_BUS) -#define M48TXX_SYS_BUS_CLASS(klass) \ - OBJECT_CLASS_CHECK(M48txxSysBusDeviceClass, (klass), TYPE_M48TXX_SYS_BUS) -#define M48TXX_SYS_BUS(obj) \ - OBJECT_CHECK(M48txxSysBusState, (obj), TYPE_M48TXX_SYS_BUS) +typedef struct M48txxSysBusDeviceClass M48txxSysBusDeviceClass; +typedef struct M48txxSysBusState M48txxSysBusState; +DECLARE_OBJ_CHECKERS(M48txxSysBusState, M48txxSysBusDeviceClass, + M48TXX_SYS_BUS, TYPE_M48TXX_SYS_BUS) /* * Chipset docs: @@ -56,16 +55,16 @@ * http://www.st.com/stonline/products/literature/od/7001/m48t59y.pdf */ -typedef struct M48txxSysBusState { +struct M48txxSysBusState { SysBusDevice parent_obj; M48t59State state; MemoryRegion io; -} M48txxSysBusState; +}; -typedef struct M48txxSysBusDeviceClass { +struct M48txxSysBusDeviceClass { SysBusDeviceClass parent_class; M48txxInfo info; -} M48txxSysBusDeviceClass; +}; static M48txxInfo m48txx_sysbus_info[] = { { diff --git a/hw/rtc/sun4v-rtc.c b/hw/rtc/sun4v-rtc.c index 52caea8654..18979d25d0 100644 --- a/hw/rtc/sun4v-rtc.c +++ b/hw/rtc/sun4v-rtc.c @@ -16,16 +16,19 @@ #include "qemu/timer.h" #include "hw/rtc/sun4v-rtc.h" #include "trace.h" +#include "qom/object.h" #define TYPE_SUN4V_RTC "sun4v_rtc" -#define SUN4V_RTC(obj) OBJECT_CHECK(Sun4vRtc, (obj), TYPE_SUN4V_RTC) +typedef struct Sun4vRtc Sun4vRtc; +DECLARE_INSTANCE_CHECKER(Sun4vRtc, SUN4V_RTC, + TYPE_SUN4V_RTC) -typedef struct Sun4vRtc { +struct Sun4vRtc { SysBusDevice parent_obj; MemoryRegion iomem; -} Sun4vRtc; +}; static uint64_t sun4v_rtc_read(void *opaque, hwaddr addr, unsigned size) diff --git a/hw/rtc/trace-events b/hw/rtc/trace-events index 1bc7147d0e..8bdcf74264 100644 --- a/hw/rtc/trace-events +++ b/hw/rtc/trace-events @@ -18,7 +18,7 @@ pl031_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" pl031_alarm_raised(void) "alarm raised" pl031_set_alarm(uint32_t ticks) "alarm set for %u ticks" -# aspeed-rtc.c +# aspeed_rtc.c aspeed_rtc_read(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 0x%08" PRIx64 aspeed_rtc_write(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 0x%08" PRIx64 diff --git a/hw/rtc/twl92230.c b/hw/rtc/twl92230.c index d0011be89e..4f83eff5c3 100644 --- a/hw/rtc/twl92230.c +++ b/hw/rtc/twl92230.c @@ -29,13 +29,16 @@ #include "sysemu/sysemu.h" #include "qemu/bcd.h" #include "qemu/module.h" +#include "qom/object.h" #define VERBOSE 1 #define TYPE_TWL92230 "twl92230" -#define TWL92230(obj) OBJECT_CHECK(MenelausState, (obj), TYPE_TWL92230) +typedef struct MenelausState MenelausState; +DECLARE_INSTANCE_CHECKER(MenelausState, TWL92230, + TYPE_TWL92230) -typedef struct MenelausState { +struct MenelausState { I2CSlave parent_obj; int firstbyte; @@ -71,7 +74,7 @@ typedef struct MenelausState { uint16_t rtc_next_vmstate; qemu_irq out[4]; uint8_t pwrbtn_state; -} MenelausState; +}; static inline void menelaus_update(MenelausState *s) { diff --git a/hw/rx/rx-gdbsim.c b/hw/rx/rx-gdbsim.c index 6914de2e59..417ec0564b 100644 --- a/hw/rx/rx-gdbsim.c +++ b/hw/rx/rx-gdbsim.c @@ -30,34 +30,33 @@ #include "sysemu/qtest.h" #include "sysemu/device_tree.h" #include "hw/boards.h" +#include "qom/object.h" /* Same address of GDB integrated simulator */ #define SDRAM_BASE EXT_CS_BASE -typedef struct RxGdbSimMachineClass { +struct RxGdbSimMachineClass { /*< private >*/ MachineClass parent_class; /*< public >*/ const char *mcu_name; uint32_t xtal_freq_hz; -} RxGdbSimMachineClass; +}; +typedef struct RxGdbSimMachineClass RxGdbSimMachineClass; -typedef struct RxGdbSimMachineState { +struct RxGdbSimMachineState { /*< private >*/ MachineState parent_obj; /*< public >*/ RX62NState mcu; -} RxGdbSimMachineState; +}; +typedef struct RxGdbSimMachineState RxGdbSimMachineState; #define TYPE_RX_GDBSIM_MACHINE MACHINE_TYPE_NAME("rx62n-common") -#define RX_GDBSIM_MACHINE(obj) \ - OBJECT_CHECK(RxGdbSimMachineState, (obj), TYPE_RX_GDBSIM_MACHINE) +DECLARE_OBJ_CHECKERS(RxGdbSimMachineState, RxGdbSimMachineClass, + RX_GDBSIM_MACHINE, TYPE_RX_GDBSIM_MACHINE) -#define RX_GDBSIM_MACHINE_CLASS(klass) \ - OBJECT_CLASS_CHECK(RxGdbSimMachineClass, (klass), TYPE_RX_GDBSIM_MACHINE) -#define RX_GDBSIM_MACHINE_GET_CLASS(obj) \ - OBJECT_GET_CLASS(RxGdbSimMachineClass, (obj), TYPE_RX_GDBSIM_MACHINE) static void rx_load_image(RXCPU *cpu, const char *filename, uint32_t start, uint32_t size) diff --git a/hw/rx/rx62n.c b/hw/rx/rx62n.c index b9c217ebfa..6eb4eea700 100644 --- a/hw/rx/rx62n.c +++ b/hw/rx/rx62n.c @@ -31,6 +31,7 @@ #include "sysemu/sysemu.h" #include "sysemu/qtest.h" #include "cpu.h" +#include "qom/object.h" /* * RX62N Internal Memory @@ -60,7 +61,7 @@ #define RX62N_XTAL_MAX_HZ (14 * 1000 * 1000) #define RX62N_PCLK_MAX_HZ (50 * 1000 * 1000) -typedef struct RX62NClass { +struct RX62NClass { /*< private >*/ DeviceClass parent_class; /*< public >*/ @@ -68,12 +69,11 @@ typedef struct RX62NClass { uint64_t ram_size; uint64_t rom_flash_size; uint64_t data_flash_size; -} RX62NClass; +}; +typedef struct RX62NClass RX62NClass; -#define RX62N_MCU_CLASS(klass) \ - OBJECT_CLASS_CHECK(RX62NClass, (klass), TYPE_RX62N_MCU) -#define RX62N_MCU_GET_CLASS(obj) \ - OBJECT_GET_CLASS(RX62NClass, (obj), TYPE_RX62N_MCU) +DECLARE_CLASS_CHECKERS(RX62NClass, RX62N_MCU, + TYPE_RX62N_MCU) /* * IRQ -> IPR mapping table diff --git a/hw/s390x/ap-device.c b/hw/s390x/ap-device.c index fc0b41e937..237d1f19c5 100644 --- a/hw/s390x/ap-device.c +++ b/hw/s390x/ap-device.c @@ -21,7 +21,7 @@ static void ap_class_init(ObjectClass *klass, void *data) } static const TypeInfo ap_device_info = { - .name = AP_DEVICE_TYPE, + .name = TYPE_AP_DEVICE, .parent = TYPE_DEVICE, .instance_size = sizeof(APDevice), .class_size = sizeof(DeviceClass), diff --git a/hw/s390x/ccw-device.h b/hw/s390x/ccw-device.h index 4e6af287e7..cf7d492084 100644 --- a/hw/s390x/ccw-device.h +++ b/hw/s390x/ccw-device.h @@ -15,7 +15,7 @@ #include "hw/qdev-core.h" #include "hw/s390x/css.h" -typedef struct CcwDevice { +struct CcwDevice { DeviceState parent_obj; SubchDev *sch; /* <cssid>.<ssid>.<device number> */ @@ -25,18 +25,20 @@ typedef struct CcwDevice { CssDevId dev_id; /* The actual busid of the virtual subchannel. */ CssDevId subch_id; -} CcwDevice; +}; +typedef struct CcwDevice CcwDevice; extern const VMStateDescription vmstate_ccw_dev; #define VMSTATE_CCW_DEVICE(_field, _state) \ VMSTATE_STRUCT(_field, _state, 1, vmstate_ccw_dev, CcwDevice) -typedef struct CCWDeviceClass { +struct CCWDeviceClass { DeviceClass parent_class; void (*unplug)(HotplugHandler *, DeviceState *, Error **); void (*realize)(CcwDevice *, Error **); void (*refill_ids)(CcwDevice *); -} CCWDeviceClass; +}; +typedef struct CCWDeviceClass CCWDeviceClass; static inline CcwDevice *to_ccw_dev_fast(DeviceState *d) { @@ -45,10 +47,7 @@ static inline CcwDevice *to_ccw_dev_fast(DeviceState *d) #define TYPE_CCW_DEVICE "ccw-device" -#define CCW_DEVICE(obj) OBJECT_CHECK(CcwDevice, (obj), TYPE_CCW_DEVICE) -#define CCW_DEVICE_GET_CLASS(obj) \ - OBJECT_GET_CLASS(CCWDeviceClass, (obj), TYPE_CCW_DEVICE) -#define CCW_DEVICE_CLASS(klass) \ - OBJECT_CLASS_CHECK(CCWDeviceClass, (klass), TYPE_CCW_DEVICE) +DECLARE_OBJ_CHECKERS(CcwDevice, CCWDeviceClass, + CCW_DEVICE, TYPE_CCW_DEVICE) #endif diff --git a/hw/s390x/ipl.h b/hw/s390x/ipl.h index 53cc9eb5ac..9e6061a043 100644 --- a/hw/s390x/ipl.h +++ b/hw/s390x/ipl.h @@ -16,6 +16,7 @@ #include "cpu.h" #include "exec/address-spaces.h" #include "hw/qdev-core.h" +#include "qom/object.h" struct IPLBlockPVComp { uint64_t tweak_pref; @@ -152,7 +153,9 @@ struct QemuIplParameters { typedef struct QemuIplParameters QemuIplParameters; #define TYPE_S390_IPL "s390-ipl" -#define S390_IPL(obj) OBJECT_CHECK(S390IPLState, (obj), TYPE_S390_IPL) +typedef struct S390IPLState S390IPLState; +DECLARE_INSTANCE_CHECKER(S390IPLState, S390_IPL, + TYPE_S390_IPL) struct S390IPLState { /*< private >*/ @@ -183,7 +186,6 @@ struct S390IPLState { uint16_t devno; bool iplbext_migration; }; -typedef struct S390IPLState S390IPLState; QEMU_BUILD_BUG_MSG(offsetof(S390IPLState, iplb) & 3, "alignment of iplb wrong"); #define DIAG_308_RC_OK 0x0001 diff --git a/hw/s390x/s390-pci-bus.h b/hw/s390x/s390-pci-bus.h index 550f3cc5e9..045805980f 100644 --- a/hw/s390x/s390-pci-bus.h +++ b/hw/s390x/s390-pci-bus.h @@ -19,6 +19,7 @@ #include "hw/s390x/sclp.h" #include "hw/s390x/s390_flic.h" #include "hw/s390x/css.h" +#include "qom/object.h" #define TYPE_S390_PCI_HOST_BRIDGE "s390-pcihost" #define TYPE_S390_PCI_BUS "s390-pcibus" @@ -36,14 +37,18 @@ #define UID_UNDEFINED 0 #define UID_CHECKING_ENABLED 0x01 -#define S390_PCI_HOST_BRIDGE(obj) \ - OBJECT_CHECK(S390pciState, (obj), TYPE_S390_PCI_HOST_BRIDGE) -#define S390_PCI_BUS(obj) \ - OBJECT_CHECK(S390PCIBus, (obj), TYPE_S390_PCI_BUS) -#define S390_PCI_DEVICE(obj) \ - OBJECT_CHECK(S390PCIBusDevice, (obj), TYPE_S390_PCI_DEVICE) -#define S390_PCI_IOMMU(obj) \ - OBJECT_CHECK(S390PCIIOMMU, (obj), TYPE_S390_PCI_IOMMU) +typedef struct S390pciState S390pciState; +DECLARE_INSTANCE_CHECKER(S390pciState, S390_PCI_HOST_BRIDGE, + TYPE_S390_PCI_HOST_BRIDGE) +typedef struct S390PCIBus S390PCIBus; +DECLARE_INSTANCE_CHECKER(S390PCIBus, S390_PCI_BUS, + TYPE_S390_PCI_BUS) +typedef struct S390PCIBusDevice S390PCIBusDevice; +DECLARE_INSTANCE_CHECKER(S390PCIBusDevice, S390_PCI_DEVICE, + TYPE_S390_PCI_DEVICE) +typedef struct S390PCIIOMMU S390PCIIOMMU; +DECLARE_INSTANCE_CHECKER(S390PCIIOMMU, S390_PCI_IOMMU, + TYPE_S390_PCI_IOMMU) #define HP_EVENT_TO_CONFIGURED 0x0301 #define HP_EVENT_RESERVED_TO_STANDBY 0x0302 @@ -265,8 +270,7 @@ typedef struct S390IOTLBEntry { uint64_t perm; } S390IOTLBEntry; -typedef struct S390PCIBusDevice S390PCIBusDevice; -typedef struct S390PCIIOMMU { +struct S390PCIIOMMU { Object parent_obj; S390PCIBusDevice *pbdev; AddressSpace as; @@ -277,7 +281,7 @@ typedef struct S390PCIIOMMU { uint64_t pba; uint64_t pal; GHashTable *iotlb; -} S390PCIIOMMU; +}; typedef struct S390PCIIOMMUTable { uint64_t key; @@ -339,11 +343,11 @@ struct S390PCIBusDevice { QTAILQ_ENTRY(S390PCIBusDevice) link; }; -typedef struct S390PCIBus { +struct S390PCIBus { BusState qbus; -} S390PCIBus; +}; -typedef struct S390pciState { +struct S390pciState { PCIHostState parent_obj; uint32_t next_idx; int bus_no; @@ -352,7 +356,7 @@ typedef struct S390pciState { GHashTable *zpci_table; QTAILQ_HEAD(, SeiContainer) pending_sei; QTAILQ_HEAD(, S390PCIBusDevice) zpci_devs; -} S390pciState; +}; S390pciState *s390_get_phb(void); int pci_chsc_sei_nt2_get_event(void *res); diff --git a/hw/s390x/virtio-ccw.h b/hw/s390x/virtio-ccw.h index b281896f7d..cea259685d 100644 --- a/hw/s390x/virtio-ccw.h +++ b/hw/s390x/virtio-ccw.h @@ -17,6 +17,7 @@ #include "hw/virtio/virtio-net.h" #include "hw/virtio/virtio-serial.h" #include "hw/virtio/virtio-scsi.h" +#include "qom/object.h" #ifdef CONFIG_VHOST_SCSI #include "hw/virtio/vhost-scsi.h" #endif @@ -53,32 +54,25 @@ #define CCW_CMD_SET_VIRTIO_REV 0x83 #define TYPE_VIRTIO_CCW_DEVICE "virtio-ccw-device" -#define VIRTIO_CCW_DEVICE(obj) \ - OBJECT_CHECK(VirtioCcwDevice, (obj), TYPE_VIRTIO_CCW_DEVICE) -#define VIRTIO_CCW_DEVICE_CLASS(klass) \ - OBJECT_CLASS_CHECK(VirtIOCCWDeviceClass, (klass), TYPE_VIRTIO_CCW_DEVICE) -#define VIRTIO_CCW_DEVICE_GET_CLASS(obj) \ - OBJECT_GET_CLASS(VirtIOCCWDeviceClass, (obj), TYPE_VIRTIO_CCW_DEVICE) +typedef struct VirtIOCCWDeviceClass VirtIOCCWDeviceClass; +typedef struct VirtioCcwDevice VirtioCcwDevice; +DECLARE_OBJ_CHECKERS(VirtioCcwDevice, VirtIOCCWDeviceClass, + VIRTIO_CCW_DEVICE, TYPE_VIRTIO_CCW_DEVICE) typedef struct VirtioBusState VirtioCcwBusState; typedef struct VirtioBusClass VirtioCcwBusClass; #define TYPE_VIRTIO_CCW_BUS "virtio-ccw-bus" -#define VIRTIO_CCW_BUS(obj) \ - OBJECT_CHECK(VirtioCcwBusState, (obj), TYPE_VIRTIO_CCW_BUS) -#define VIRTIO_CCW_BUS_GET_CLASS(obj) \ - OBJECT_GET_CLASS(VirtioCcwBusClass, (obj), TYPE_VIRTIO_CCW_BUS) -#define VIRTIO_CCW_BUS_CLASS(klass) \ - OBJECT_CLASS_CHECK(VirtioCcwBusClass, klass, TYPE_VIRTIO_CCW_BUS) +DECLARE_OBJ_CHECKERS(VirtioCcwBusState, VirtioCcwBusClass, + VIRTIO_CCW_BUS, TYPE_VIRTIO_CCW_BUS) -typedef struct VirtioCcwDevice VirtioCcwDevice; -typedef struct VirtIOCCWDeviceClass { +struct VirtIOCCWDeviceClass { CCWDeviceClass parent_class; void (*realize)(VirtioCcwDevice *dev, Error **errp); void (*unrealize)(VirtioCcwDevice *dev); void (*parent_reset)(DeviceState *dev); -} VirtIOCCWDeviceClass; +}; /* Performance improves when virtqueue kick processing is decoupled from the * vcpu thread using ioeventfd for some devices. */ @@ -111,92 +105,100 @@ static inline int virtio_ccw_rev_max(VirtioCcwDevice *dev) /* virtio-scsi-ccw */ #define TYPE_VIRTIO_SCSI_CCW "virtio-scsi-ccw" -#define VIRTIO_SCSI_CCW(obj) \ - OBJECT_CHECK(VirtIOSCSICcw, (obj), TYPE_VIRTIO_SCSI_CCW) +typedef struct VirtIOSCSICcw VirtIOSCSICcw; +DECLARE_INSTANCE_CHECKER(VirtIOSCSICcw, VIRTIO_SCSI_CCW, + TYPE_VIRTIO_SCSI_CCW) -typedef struct VirtIOSCSICcw { +struct VirtIOSCSICcw { VirtioCcwDevice parent_obj; VirtIOSCSI vdev; -} VirtIOSCSICcw; +}; #ifdef CONFIG_VHOST_SCSI /* vhost-scsi-ccw */ #define TYPE_VHOST_SCSI_CCW "vhost-scsi-ccw" -#define VHOST_SCSI_CCW(obj) \ - OBJECT_CHECK(VHostSCSICcw, (obj), TYPE_VHOST_SCSI_CCW) +typedef struct VHostSCSICcw VHostSCSICcw; +DECLARE_INSTANCE_CHECKER(VHostSCSICcw, VHOST_SCSI_CCW, + TYPE_VHOST_SCSI_CCW) -typedef struct VHostSCSICcw { +struct VHostSCSICcw { VirtioCcwDevice parent_obj; VHostSCSI vdev; -} VHostSCSICcw; +}; #endif /* virtio-blk-ccw */ #define TYPE_VIRTIO_BLK_CCW "virtio-blk-ccw" -#define VIRTIO_BLK_CCW(obj) \ - OBJECT_CHECK(VirtIOBlkCcw, (obj), TYPE_VIRTIO_BLK_CCW) +typedef struct VirtIOBlkCcw VirtIOBlkCcw; +DECLARE_INSTANCE_CHECKER(VirtIOBlkCcw, VIRTIO_BLK_CCW, + TYPE_VIRTIO_BLK_CCW) -typedef struct VirtIOBlkCcw { +struct VirtIOBlkCcw { VirtioCcwDevice parent_obj; VirtIOBlock vdev; -} VirtIOBlkCcw; +}; /* virtio-balloon-ccw */ #define TYPE_VIRTIO_BALLOON_CCW "virtio-balloon-ccw" -#define VIRTIO_BALLOON_CCW(obj) \ - OBJECT_CHECK(VirtIOBalloonCcw, (obj), TYPE_VIRTIO_BALLOON_CCW) +typedef struct VirtIOBalloonCcw VirtIOBalloonCcw; +DECLARE_INSTANCE_CHECKER(VirtIOBalloonCcw, VIRTIO_BALLOON_CCW, + TYPE_VIRTIO_BALLOON_CCW) -typedef struct VirtIOBalloonCcw { +struct VirtIOBalloonCcw { VirtioCcwDevice parent_obj; VirtIOBalloon vdev; -} VirtIOBalloonCcw; +}; /* virtio-serial-ccw */ #define TYPE_VIRTIO_SERIAL_CCW "virtio-serial-ccw" -#define VIRTIO_SERIAL_CCW(obj) \ - OBJECT_CHECK(VirtioSerialCcw, (obj), TYPE_VIRTIO_SERIAL_CCW) +typedef struct VirtioSerialCcw VirtioSerialCcw; +DECLARE_INSTANCE_CHECKER(VirtioSerialCcw, VIRTIO_SERIAL_CCW, + TYPE_VIRTIO_SERIAL_CCW) -typedef struct VirtioSerialCcw { +struct VirtioSerialCcw { VirtioCcwDevice parent_obj; VirtIOSerial vdev; -} VirtioSerialCcw; +}; /* virtio-net-ccw */ #define TYPE_VIRTIO_NET_CCW "virtio-net-ccw" -#define VIRTIO_NET_CCW(obj) \ - OBJECT_CHECK(VirtIONetCcw, (obj), TYPE_VIRTIO_NET_CCW) +typedef struct VirtIONetCcw VirtIONetCcw; +DECLARE_INSTANCE_CHECKER(VirtIONetCcw, VIRTIO_NET_CCW, + TYPE_VIRTIO_NET_CCW) -typedef struct VirtIONetCcw { +struct VirtIONetCcw { VirtioCcwDevice parent_obj; VirtIONet vdev; -} VirtIONetCcw; +}; /* virtio-rng-ccw */ #define TYPE_VIRTIO_RNG_CCW "virtio-rng-ccw" -#define VIRTIO_RNG_CCW(obj) \ - OBJECT_CHECK(VirtIORNGCcw, (obj), TYPE_VIRTIO_RNG_CCW) +typedef struct VirtIORNGCcw VirtIORNGCcw; +DECLARE_INSTANCE_CHECKER(VirtIORNGCcw, VIRTIO_RNG_CCW, + TYPE_VIRTIO_RNG_CCW) -typedef struct VirtIORNGCcw { +struct VirtIORNGCcw { VirtioCcwDevice parent_obj; VirtIORNG vdev; -} VirtIORNGCcw; +}; /* virtio-crypto-ccw */ #define TYPE_VIRTIO_CRYPTO_CCW "virtio-crypto-ccw" -#define VIRTIO_CRYPTO_CCW(obj) \ - OBJECT_CHECK(VirtIOCryptoCcw, (obj), TYPE_VIRTIO_CRYPTO_CCW) +typedef struct VirtIOCryptoCcw VirtIOCryptoCcw; +DECLARE_INSTANCE_CHECKER(VirtIOCryptoCcw, VIRTIO_CRYPTO_CCW, + TYPE_VIRTIO_CRYPTO_CCW) -typedef struct VirtIOCryptoCcw { +struct VirtIOCryptoCcw { VirtioCcwDevice parent_obj; VirtIOCrypto vdev; -} VirtIOCryptoCcw; +}; VirtIODevice *virtio_ccw_get_vdev(SubchDev *sch); @@ -204,56 +206,61 @@ VirtIODevice *virtio_ccw_get_vdev(SubchDev *sch); #include "hw/9pfs/virtio-9p.h" #define TYPE_VIRTIO_9P_CCW "virtio-9p-ccw" -#define VIRTIO_9P_CCW(obj) \ - OBJECT_CHECK(V9fsCCWState, (obj), TYPE_VIRTIO_9P_CCW) +typedef struct V9fsCCWState V9fsCCWState; +DECLARE_INSTANCE_CHECKER(V9fsCCWState, VIRTIO_9P_CCW, + TYPE_VIRTIO_9P_CCW) -typedef struct V9fsCCWState { +struct V9fsCCWState { VirtioCcwDevice parent_obj; V9fsVirtioState vdev; -} V9fsCCWState; +}; #endif /* CONFIG_VIRTFS */ #ifdef CONFIG_VHOST_VSOCK #define TYPE_VHOST_VSOCK_CCW "vhost-vsock-ccw" -#define VHOST_VSOCK_CCW(obj) \ - OBJECT_CHECK(VHostVSockCCWState, (obj), TYPE_VHOST_VSOCK_CCW) +typedef struct VHostVSockCCWState VHostVSockCCWState; +DECLARE_INSTANCE_CHECKER(VHostVSockCCWState, VHOST_VSOCK_CCW, + TYPE_VHOST_VSOCK_CCW) -typedef struct VHostVSockCCWState { +struct VHostVSockCCWState { VirtioCcwDevice parent_obj; VHostVSock vdev; -} VHostVSockCCWState; +}; #endif /* CONFIG_VHOST_VSOCK */ #define TYPE_VIRTIO_GPU_CCW "virtio-gpu-ccw" -#define VIRTIO_GPU_CCW(obj) \ - OBJECT_CHECK(VirtIOGPUCcw, (obj), TYPE_VIRTIO_GPU_CCW) +typedef struct VirtIOGPUCcw VirtIOGPUCcw; +DECLARE_INSTANCE_CHECKER(VirtIOGPUCcw, VIRTIO_GPU_CCW, + TYPE_VIRTIO_GPU_CCW) -typedef struct VirtIOGPUCcw { +struct VirtIOGPUCcw { VirtioCcwDevice parent_obj; VirtIOGPU vdev; -} VirtIOGPUCcw; +}; #define TYPE_VIRTIO_INPUT_CCW "virtio-input-ccw" -#define VIRTIO_INPUT_CCW(obj) \ - OBJECT_CHECK(VirtIOInputCcw, (obj), TYPE_VIRTIO_INPUT_CCW) +typedef struct VirtIOInputCcw VirtIOInputCcw; +DECLARE_INSTANCE_CHECKER(VirtIOInputCcw, VIRTIO_INPUT_CCW, + TYPE_VIRTIO_INPUT_CCW) -typedef struct VirtIOInputCcw { +struct VirtIOInputCcw { VirtioCcwDevice parent_obj; VirtIOInput vdev; -} VirtIOInputCcw; +}; #define TYPE_VIRTIO_INPUT_HID_CCW "virtio-input-hid-ccw" #define TYPE_VIRTIO_KEYBOARD_CCW "virtio-keyboard-ccw" #define TYPE_VIRTIO_MOUSE_CCW "virtio-mouse-ccw" #define TYPE_VIRTIO_TABLET_CCW "virtio-tablet-ccw" -#define VIRTIO_INPUT_HID_CCW(obj) \ - OBJECT_CHECK(VirtIOInputHIDCcw, (obj), TYPE_VIRTIO_INPUT_HID_CCW) +typedef struct VirtIOInputHIDCcw VirtIOInputHIDCcw; +DECLARE_INSTANCE_CHECKER(VirtIOInputHIDCcw, VIRTIO_INPUT_HID_CCW, + TYPE_VIRTIO_INPUT_HID_CCW) -typedef struct VirtIOInputHIDCcw { +struct VirtIOInputHIDCcw { VirtioCcwDevice parent_obj; VirtIOInputHID vdev; -} VirtIOInputHIDCcw; +}; #endif diff --git a/hw/scsi/esp-pci.c b/hw/scsi/esp-pci.c index 90432ef107..2ce96dc56e 100644 --- a/hw/scsi/esp-pci.c +++ b/hw/scsi/esp-pci.c @@ -33,11 +33,13 @@ #include "qapi/error.h" #include "qemu/log.h" #include "qemu/module.h" +#include "qom/object.h" #define TYPE_AM53C974_DEVICE "am53c974" -#define PCI_ESP(obj) \ - OBJECT_CHECK(PCIESPState, (obj), TYPE_AM53C974_DEVICE) +typedef struct PCIESPState PCIESPState; +DECLARE_INSTANCE_CHECKER(PCIESPState, PCI_ESP, + TYPE_AM53C974_DEVICE) #define DMA_CMD 0x0 #define DMA_STC 0x1 @@ -64,7 +66,7 @@ #define SBAC_STATUS (1 << 24) -typedef struct PCIESPState { +struct PCIESPState { /*< private >*/ PCIDevice parent_obj; /*< public >*/ @@ -73,7 +75,7 @@ typedef struct PCIESPState { uint32_t dma_regs[8]; uint32_t sbac; ESPState esp; -} PCIESPState; +}; static void esp_pci_handle_idle(PCIESPState *pci, uint32_t val) { @@ -408,14 +410,15 @@ static const TypeInfo esp_pci_info = { }, }; -typedef struct { +struct DC390State { PCIESPState pci; eeprom_t *eeprom; -} DC390State; +}; +typedef struct DC390State DC390State; #define TYPE_DC390_DEVICE "dc390" -#define DC390(obj) \ - OBJECT_CHECK(DC390State, obj, TYPE_DC390_DEVICE) +DECLARE_INSTANCE_CHECKER(DC390State, DC390, + TYPE_DC390_DEVICE) #define EE_ADAPT_SCSI_ID 64 #define EE_MODE2 65 diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c index 405f8b7cbc..b84e0fe33e 100644 --- a/hw/scsi/esp.c +++ b/hw/scsi/esp.c @@ -929,7 +929,7 @@ static const struct SCSIBusInfo esp_scsi_info = { static void sysbus_esp_gpio_demux(void *opaque, int irq, int level) { - SysBusESPState *sysbus = ESP_STATE(opaque); + SysBusESPState *sysbus = ESP(opaque); ESPState *s = &sysbus->esp; switch (irq) { @@ -945,7 +945,7 @@ static void sysbus_esp_gpio_demux(void *opaque, int irq, int level) static void sysbus_esp_realize(DeviceState *dev, Error **errp) { SysBusDevice *sbd = SYS_BUS_DEVICE(dev); - SysBusESPState *sysbus = ESP_STATE(dev); + SysBusESPState *sysbus = ESP(dev); ESPState *s = &sysbus->esp; sysbus_init_irq(sbd, &s->irq); @@ -967,7 +967,7 @@ static void sysbus_esp_realize(DeviceState *dev, Error **errp) static void sysbus_esp_hard_reset(DeviceState *dev) { - SysBusESPState *sysbus = ESP_STATE(dev); + SysBusESPState *sysbus = ESP(dev); esp_hard_reset(&sysbus->esp); } diff --git a/hw/scsi/lsi53c895a.c b/hw/scsi/lsi53c895a.c index 63ff4181de..e8354a47da 100644 --- a/hw/scsi/lsi53c895a.c +++ b/hw/scsi/lsi53c895a.c @@ -23,6 +23,7 @@ #include "qemu/log.h" #include "qemu/module.h" #include "trace.h" +#include "qom/object.h" static const char *names[] = { "SCNTL0", "SCNTL1", "SCNTL2", "SCNTL3", "SCID", "SXFER", "SDID", "GPREG", @@ -213,7 +214,7 @@ enum { LSI_MSG_ACTION_DIN = 3, }; -typedef struct { +struct LSIState { /*< private >*/ PCIDevice parent_obj; /*< public >*/ @@ -303,13 +304,14 @@ typedef struct { uint32_t adder; uint8_t script_ram[2048 * sizeof(uint32_t)]; -} LSIState; +}; +typedef struct LSIState LSIState; #define TYPE_LSI53C810 "lsi53c810" #define TYPE_LSI53C895A "lsi53c895a" -#define LSI53C895A(obj) \ - OBJECT_CHECK(LSIState, (obj), TYPE_LSI53C895A) +DECLARE_INSTANCE_CHECKER(LSIState, LSI53C895A, + TYPE_LSI53C895A) static const char *scsi_phases[] = { "DOUT", diff --git a/hw/scsi/megasas.c b/hw/scsi/megasas.c index 390c2f2edb..e90c00823a 100644 --- a/hw/scsi/megasas.c +++ b/hw/scsi/megasas.c @@ -34,6 +34,7 @@ #include "qapi/error.h" #include "mfi.h" #include "migration/vmstate.h" +#include "qom/object.h" #define MEGASAS_VERSION_GEN1 "1.70" #define MEGASAS_VERSION_GEN2 "1.80" @@ -72,7 +73,7 @@ typedef struct MegasasCmd { struct MegasasState *state; } MegasasCmd; -typedef struct MegasasState { +struct MegasasState { /*< private >*/ PCIDevice parent_obj; /*< public >*/ @@ -116,28 +117,26 @@ typedef struct MegasasState { MegasasCmd frames[MEGASAS_MAX_FRAMES]; DECLARE_BITMAP(frame_map, MEGASAS_MAX_FRAMES); SCSIBus bus; -} MegasasState; +}; +typedef struct MegasasState MegasasState; -typedef struct MegasasBaseClass { +struct MegasasBaseClass { PCIDeviceClass parent_class; const char *product_name; const char *product_version; int mmio_bar; int ioport_bar; int osts; -} MegasasBaseClass; +}; +typedef struct MegasasBaseClass MegasasBaseClass; #define TYPE_MEGASAS_BASE "megasas-base" #define TYPE_MEGASAS_GEN1 "megasas" #define TYPE_MEGASAS_GEN2 "megasas-gen2" -#define MEGASAS(obj) \ - OBJECT_CHECK(MegasasState, (obj), TYPE_MEGASAS_BASE) +DECLARE_OBJ_CHECKERS(MegasasState, MegasasBaseClass, + MEGASAS, TYPE_MEGASAS_BASE) -#define MEGASAS_CLASS(oc) \ - OBJECT_CLASS_CHECK(MegasasBaseClass, (oc), TYPE_MEGASAS_BASE) -#define MEGASAS_GET_CLASS(oc) \ - OBJECT_GET_CLASS(MegasasBaseClass, (oc), TYPE_MEGASAS_BASE) #define MEGASAS_INTR_DISABLED_MASK 0xFFFFFFFF diff --git a/hw/scsi/mptsas.h b/hw/scsi/mptsas.h index 9ac98fc20e..b85ac1a5fc 100644 --- a/hw/scsi/mptsas.h +++ b/hw/scsi/mptsas.h @@ -2,6 +2,7 @@ #define MPTSAS_H #include "mpi.h" +#include "qom/object.h" #define MPTSAS_NUM_PORTS 8 #define MPTSAS_MAX_FRAMES 2048 /* Firmware limit at 65535 */ @@ -15,8 +16,8 @@ typedef struct MPTSASRequest MPTSASRequest; #define TYPE_MPTSAS1068 "mptsas1068" typedef struct MPTSASState MPTSASState; -#define MPT_SAS(obj) \ - OBJECT_CHECK(MPTSASState, (obj), TYPE_MPTSAS1068) +DECLARE_INSTANCE_CHECKER(MPTSASState, MPT_SAS, + TYPE_MPTSAS1068) enum { DOORBELL_NONE, diff --git a/hw/scsi/scsi-disk.c b/hw/scsi/scsi-disk.c index 7612035a4e..1f0388a755 100644 --- a/hw/scsi/scsi-disk.c +++ b/hw/scsi/scsi-disk.c @@ -38,6 +38,7 @@ #include "sysemu/sysemu.h" #include "qemu/cutils.h" #include "trace.h" +#include "qom/object.h" #ifdef __linux #include <scsi/sg.h> @@ -54,20 +55,18 @@ #define TYPE_SCSI_DISK_BASE "scsi-disk-base" -#define SCSI_DISK_BASE(obj) \ - OBJECT_CHECK(SCSIDiskState, (obj), TYPE_SCSI_DISK_BASE) -#define SCSI_DISK_BASE_CLASS(klass) \ - OBJECT_CLASS_CHECK(SCSIDiskClass, (klass), TYPE_SCSI_DISK_BASE) -#define SCSI_DISK_BASE_GET_CLASS(obj) \ - OBJECT_GET_CLASS(SCSIDiskClass, (obj), TYPE_SCSI_DISK_BASE) +typedef struct SCSIDiskClass SCSIDiskClass; +typedef struct SCSIDiskState SCSIDiskState; +DECLARE_OBJ_CHECKERS(SCSIDiskState, SCSIDiskClass, + SCSI_DISK_BASE, TYPE_SCSI_DISK_BASE) -typedef struct SCSIDiskClass { +struct SCSIDiskClass { SCSIDeviceClass parent_class; DMAIOFunc *dma_readv; DMAIOFunc *dma_writev; bool (*need_fua_emulation)(SCSICommand *cmd); void (*update_sense)(SCSIRequest *r); -} SCSIDiskClass; +}; typedef struct SCSIDiskReq { SCSIRequest req; @@ -87,8 +86,7 @@ typedef struct SCSIDiskReq { #define SCSI_DISK_F_DPOFUA 1 #define SCSI_DISK_F_NO_REMOVABLE_DEVOPS 2 -typedef struct SCSIDiskState -{ +struct SCSIDiskState { SCSIDevice qdev; uint32_t features; bool media_changed; @@ -113,7 +111,7 @@ typedef struct SCSIDiskState * 0xffff - reserved */ uint16_t rotation_rate; -} SCSIDiskState; +}; static bool scsi_handle_rw_error(SCSIDiskReq *r, int error, bool acct_failed); diff --git a/hw/scsi/spapr_vscsi.c b/hw/scsi/spapr_vscsi.c index 57f0a1336f..c3e6d1ecef 100644 --- a/hw/scsi/spapr_vscsi.c +++ b/hw/scsi/spapr_vscsi.c @@ -46,6 +46,7 @@ #include "trace.h" #include <libfdt.h> +#include "qom/object.h" /* * Virtual SCSI device @@ -90,14 +91,15 @@ typedef struct vscsi_req { } vscsi_req; #define TYPE_VIO_SPAPR_VSCSI_DEVICE "spapr-vscsi" -#define VIO_SPAPR_VSCSI_DEVICE(obj) \ - OBJECT_CHECK(VSCSIState, (obj), TYPE_VIO_SPAPR_VSCSI_DEVICE) +typedef struct VSCSIState VSCSIState; +DECLARE_INSTANCE_CHECKER(VSCSIState, VIO_SPAPR_VSCSI_DEVICE, + TYPE_VIO_SPAPR_VSCSI_DEVICE) -typedef struct { +struct VSCSIState { SpaprVioDevice vdev; SCSIBus bus; vscsi_req reqs[VSCSI_REQ_LIMIT]; -} VSCSIState; +}; static union viosrp_iu *req_iu(vscsi_req *req) { diff --git a/hw/scsi/vmw_pvscsi.c b/hw/scsi/vmw_pvscsi.c index c071e0c7aa..40095bed09 100644 --- a/hw/scsi/vmw_pvscsi.c +++ b/hw/scsi/vmw_pvscsi.c @@ -36,6 +36,7 @@ #include "hw/qdev-properties.h" #include "vmw_pvscsi.h" #include "trace.h" +#include "qom/object.h" #define PVSCSI_USE_64BIT (true) @@ -56,18 +57,17 @@ (stl_le_pci_dma(&container_of(m, PVSCSIState, rings)->parent_obj, \ (m)->rs_pa + offsetof(struct PVSCSIRingsState, field), val)) -typedef struct PVSCSIClass { +struct PVSCSIClass { PCIDeviceClass parent_class; DeviceRealize parent_dc_realize; -} PVSCSIClass; +}; +typedef struct PVSCSIClass PVSCSIClass; #define TYPE_PVSCSI "pvscsi" -#define PVSCSI(obj) OBJECT_CHECK(PVSCSIState, (obj), TYPE_PVSCSI) +typedef struct PVSCSIState PVSCSIState; +DECLARE_OBJ_CHECKERS(PVSCSIState, PVSCSIClass, + PVSCSI, TYPE_PVSCSI) -#define PVSCSI_CLASS(klass) \ - OBJECT_CLASS_CHECK(PVSCSIClass, (klass), TYPE_PVSCSI) -#define PVSCSI_GET_CLASS(obj) \ - OBJECT_GET_CLASS(PVSCSIClass, (obj), TYPE_PVSCSI) /* Compatibility flags for migration */ #define PVSCSI_COMPAT_OLD_PCI_CONFIGURATION_BIT 0 @@ -104,7 +104,7 @@ typedef struct PVSCSISGState { typedef QTAILQ_HEAD(, PVSCSIRequest) PVSCSIRequestList; -typedef struct { +struct PVSCSIState { PCIDevice parent_obj; MemoryRegion io_space; SCSIBus bus; @@ -132,7 +132,7 @@ typedef struct { uint32_t resetting; /* Reset in progress */ uint32_t compat_flags; -} PVSCSIState; +}; typedef struct PVSCSIRequest { SCSIRequest *sreq; diff --git a/hw/sd/allwinner-sdhost.c b/hw/sd/allwinner-sdhost.c index e82afb75eb..bea6d97ef8 100644 --- a/hw/sd/allwinner-sdhost.c +++ b/hw/sd/allwinner-sdhost.c @@ -29,10 +29,12 @@ #include "hw/sd/allwinner-sdhost.h" #include "migration/vmstate.h" #include "trace.h" +#include "qom/object.h" #define TYPE_AW_SDHOST_BUS "allwinner-sdhost-bus" -#define AW_SDHOST_BUS(obj) \ - OBJECT_CHECK(SDBus, (obj), TYPE_AW_SDHOST_BUS) +/* This is reusing the SDBus typedef from SD_BUS */ +DECLARE_INSTANCE_CHECKER(SDBus, AW_SDHOST_BUS, + TYPE_AW_SDHOST_BUS) /* SD Host register offsets */ enum { diff --git a/hw/sd/bcm2835_sdhost.c b/hw/sd/bcm2835_sdhost.c index 2c7a675a2d..50f5fdb88b 100644 --- a/hw/sd/bcm2835_sdhost.c +++ b/hw/sd/bcm2835_sdhost.c @@ -19,10 +19,12 @@ #include "hw/sd/bcm2835_sdhost.h" #include "migration/vmstate.h" #include "trace.h" +#include "qom/object.h" #define TYPE_BCM2835_SDHOST_BUS "bcm2835-sdhost-bus" -#define BCM2835_SDHOST_BUS(obj) \ - OBJECT_CHECK(SDBus, (obj), TYPE_BCM2835_SDHOST_BUS) +/* This is reusing the SDBus typedef from SD_BUS */ +DECLARE_INSTANCE_CHECKER(SDBus, BCM2835_SDHOST_BUS, + TYPE_BCM2835_SDHOST_BUS) #define SDCMD 0x00 /* Command to SD card - 16 R/W */ #define SDARG 0x04 /* Argument to SD card - 32 R/W */ diff --git a/hw/sd/milkymist-memcard.c b/hw/sd/milkymist-memcard.c index be89a93876..4d3ec28f5d 100644 --- a/hw/sd/milkymist-memcard.c +++ b/hw/sd/milkymist-memcard.c @@ -32,6 +32,7 @@ #include "sysemu/blockdev.h" #include "hw/qdev-properties.h" #include "hw/sd/sd.h" +#include "qom/object.h" enum { ENABLE_CMD_TX = (1<<0), @@ -63,8 +64,9 @@ enum { }; #define TYPE_MILKYMIST_MEMCARD "milkymist-memcard" -#define MILKYMIST_MEMCARD(obj) \ - OBJECT_CHECK(MilkymistMemcardState, (obj), TYPE_MILKYMIST_MEMCARD) +typedef struct MilkymistMemcardState MilkymistMemcardState; +DECLARE_INSTANCE_CHECKER(MilkymistMemcardState, MILKYMIST_MEMCARD, + TYPE_MILKYMIST_MEMCARD) #define TYPE_MILKYMIST_SDBUS "milkymist-sdbus" @@ -83,7 +85,6 @@ struct MilkymistMemcardState { uint8_t response[17]; uint32_t regs[R_MAX]; }; -typedef struct MilkymistMemcardState MilkymistMemcardState; static void update_pending_bits(MilkymistMemcardState *s) { diff --git a/hw/sd/pl181.c b/hw/sd/pl181.c index 579d68ad83..7829e933a5 100644 --- a/hw/sd/pl181.c +++ b/hw/sd/pl181.c @@ -18,15 +18,18 @@ #include "qemu/error-report.h" #include "qapi/error.h" #include "trace.h" +#include "qom/object.h" #define PL181_FIFO_LEN 16 #define TYPE_PL181 "pl181" -#define PL181(obj) OBJECT_CHECK(PL181State, (obj), TYPE_PL181) +typedef struct PL181State PL181State; +DECLARE_INSTANCE_CHECKER(PL181State, PL181, + TYPE_PL181) #define TYPE_PL181_BUS "pl181-bus" -typedef struct PL181State { +struct PL181State { SysBusDevice parent_obj; MemoryRegion iomem; @@ -56,7 +59,7 @@ typedef struct PL181State { /* GPIO outputs for 'card is readonly' and 'card inserted' */ qemu_irq card_readonly; qemu_irq card_inserted; -} PL181State; +}; static const VMStateDescription vmstate_pl181 = { .name = "pl181", diff --git a/hw/sd/pxa2xx_mmci.c b/hw/sd/pxa2xx_mmci.c index 3a47b380dd..3dd2fc7a83 100644 --- a/hw/sd/pxa2xx_mmci.c +++ b/hw/sd/pxa2xx_mmci.c @@ -21,9 +21,12 @@ #include "qemu/log.h" #include "qemu/module.h" #include "trace.h" +#include "qom/object.h" #define TYPE_PXA2XX_MMCI_BUS "pxa2xx-mmci-bus" -#define PXA2XX_MMCI_BUS(obj) OBJECT_CHECK(SDBus, (obj), TYPE_PXA2XX_MMCI_BUS) +/* This is reusing the SDBus typedef from SD_BUS */ +DECLARE_INSTANCE_CHECKER(SDBus, PXA2XX_MMCI_BUS, + TYPE_PXA2XX_MMCI_BUS) struct PXA2xxMMCIState { SysBusDevice parent_obj; diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index 1785d7e1f7..6900213083 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -37,9 +37,12 @@ #include "qemu/log.h" #include "qemu/module.h" #include "trace.h" +#include "qom/object.h" #define TYPE_SDHCI_BUS "sdhci-bus" -#define SDHCI_BUS(obj) OBJECT_CHECK(SDBus, (obj), TYPE_SDHCI_BUS) +/* This is reusing the SDBus typedef from SD_BUS */ +DECLARE_INSTANCE_CHECKER(SDBus, SDHCI_BUS, + TYPE_SDHCI_BUS) #define MASKED_WRITE(reg, mask, val) (reg = (reg & (mask)) | (val)) diff --git a/hw/sd/ssi-sd.c b/hw/sd/ssi-sd.c index a7ef9cb922..dd07258d4e 100644 --- a/hw/sd/ssi-sd.c +++ b/hw/sd/ssi-sd.c @@ -18,6 +18,7 @@ #include "hw/sd/sd.h" #include "qapi/error.h" #include "qemu/module.h" +#include "qom/object.h" //#define DEBUG_SSI_SD 1 @@ -40,7 +41,7 @@ typedef enum { SSI_SD_DATA_READ, } ssi_sd_mode; -typedef struct { +struct ssi_sd_state { SSISlave ssidev; uint32_t mode; int cmd; @@ -50,10 +51,12 @@ typedef struct { int32_t response_pos; int32_t stopping; SDBus sdbus; -} ssi_sd_state; +}; +typedef struct ssi_sd_state ssi_sd_state; #define TYPE_SSI_SD "ssi-sd" -#define SSI_SD(obj) OBJECT_CHECK(ssi_sd_state, (obj), TYPE_SSI_SD) +DECLARE_INSTANCE_CHECKER(ssi_sd_state, SSI_SD, + TYPE_SSI_SD) /* State word bits. */ #define SSI_SDR_LOCKED 0x0001 diff --git a/hw/sh4/sh_pci.c b/hw/sh4/sh_pci.c index 0a3e86f949..dc73845125 100644 --- a/hw/sh4/sh_pci.c +++ b/hw/sh4/sh_pci.c @@ -31,13 +31,15 @@ #include "qemu/bswap.h" #include "qemu/module.h" #include "exec/address-spaces.h" +#include "qom/object.h" #define TYPE_SH_PCI_HOST_BRIDGE "sh_pci" -#define SH_PCI_HOST_BRIDGE(obj) \ - OBJECT_CHECK(SHPCIState, (obj), TYPE_SH_PCI_HOST_BRIDGE) +typedef struct SHPCIState SHPCIState; +DECLARE_INSTANCE_CHECKER(SHPCIState, SH_PCI_HOST_BRIDGE, + TYPE_SH_PCI_HOST_BRIDGE) -typedef struct SHPCIState { +struct SHPCIState { PCIHostState parent_obj; PCIDevice *dev; @@ -48,7 +50,7 @@ typedef struct SHPCIState { uint32_t par; uint32_t mbr; uint32_t iobr; -} SHPCIState; +}; static void sh_pci_reg_write (void *p, hwaddr addr, uint64_t val, unsigned size) diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c index 6bf9d27d8a..947b69d159 100644 --- a/hw/sparc/sun4m.c +++ b/hw/sparc/sun4m.c @@ -52,6 +52,7 @@ #include "hw/loader.h" #include "elf.h" #include "trace.h" +#include "qom/object.h" /* * Sun4m architecture was used in the following machines: @@ -334,7 +335,7 @@ static void *sparc32_dma_init(hwaddr dma_base, OBJECT(dma), "espdma")); sysbus_connect_irq(SYS_BUS_DEVICE(espdma), 0, espdma_irq); - esp = ESP_STATE(object_resolve_path_component(OBJECT(espdma), "esp")); + esp = ESP(object_resolve_path_component(OBJECT(espdma), "esp")); sysbus_mmio_map(SYS_BUS_DEVICE(esp), 0, esp_base); scsi_bus_legacy_handle_cmdline(&esp->esp.bus); @@ -581,14 +582,15 @@ static void idreg_init(hwaddr addr) idreg_data, sizeof(idreg_data)); } -#define MACIO_ID_REGISTER(obj) \ - OBJECT_CHECK(IDRegState, (obj), TYPE_MACIO_ID_REGISTER) +typedef struct IDRegState IDRegState; +DECLARE_INSTANCE_CHECKER(IDRegState, MACIO_ID_REGISTER, + TYPE_MACIO_ID_REGISTER) -typedef struct IDRegState { +struct IDRegState { SysBusDevice parent_obj; MemoryRegion mem; -} IDRegState; +}; static void idreg_realize(DeviceState *ds, Error **errp) { @@ -623,13 +625,15 @@ static const TypeInfo idreg_info = { }; #define TYPE_TCX_AFX "tcx_afx" -#define TCX_AFX(obj) OBJECT_CHECK(AFXState, (obj), TYPE_TCX_AFX) +typedef struct AFXState AFXState; +DECLARE_INSTANCE_CHECKER(AFXState, TCX_AFX, + TYPE_TCX_AFX) -typedef struct AFXState { +struct AFXState { SysBusDevice parent_obj; MemoryRegion mem; -} AFXState; +}; /* SS-5 TCX AFX register */ static void afx_init(hwaddr addr) @@ -676,13 +680,15 @@ static const TypeInfo afx_info = { }; #define TYPE_OPENPROM "openprom" -#define OPENPROM(obj) OBJECT_CHECK(PROMState, (obj), TYPE_OPENPROM) +typedef struct PROMState PROMState; +DECLARE_INSTANCE_CHECKER(PROMState, OPENPROM, + TYPE_OPENPROM) -typedef struct PROMState { +struct PROMState { SysBusDevice parent_obj; MemoryRegion prom; -} PROMState; +}; /* Boot PROM (OpenBIOS) */ static uint64_t translate_prom_address(void *opaque, uint64_t addr) @@ -764,12 +770,14 @@ static const TypeInfo prom_info = { }; #define TYPE_SUN4M_MEMORY "memory" -#define SUN4M_RAM(obj) OBJECT_CHECK(RamDevice, (obj), TYPE_SUN4M_MEMORY) +typedef struct RamDevice RamDevice; +DECLARE_INSTANCE_CHECKER(RamDevice, SUN4M_RAM, + TYPE_SUN4M_MEMORY) -typedef struct RamDevice { +struct RamDevice { SysBusDevice parent_obj; HostMemoryBackend *memdev; -} RamDevice; +}; /* System RAM */ static void ram_realize(DeviceState *dev, Error **errp) diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c index 37310b73e6..b4aabfc076 100644 --- a/hw/sparc64/sun4u.c +++ b/hw/sparc64/sun4u.c @@ -55,6 +55,7 @@ #include "hw/fw-path-provider.h" #include "elf.h" #include "trace.h" +#include "qom/object.h" #define KERNEL_LOAD_ADDR 0x00404000 #define CMDLINE_ADDR 0x003ff000 @@ -79,7 +80,7 @@ struct hwdef { uint64_t console_serial_base; }; -typedef struct EbusState { +struct EbusState { /*< private >*/ PCIDevice parent_obj; @@ -88,10 +89,12 @@ typedef struct EbusState { uint64_t console_serial_base; MemoryRegion bar0; MemoryRegion bar1; -} EbusState; +}; +typedef struct EbusState EbusState; #define TYPE_EBUS "ebus" -#define EBUS(obj) OBJECT_CHECK(EbusState, (obj), TYPE_EBUS) +DECLARE_INSTANCE_CHECKER(EbusState, EBUS, + TYPE_EBUS) const char *fw_cfg_arch_key_name(uint16_t key) { @@ -226,13 +229,15 @@ typedef struct ResetData { } ResetData; #define TYPE_SUN4U_POWER "power" -#define SUN4U_POWER(obj) OBJECT_CHECK(PowerDevice, (obj), TYPE_SUN4U_POWER) +typedef struct PowerDevice PowerDevice; +DECLARE_INSTANCE_CHECKER(PowerDevice, SUN4U_POWER, + TYPE_SUN4U_POWER) -typedef struct PowerDevice { +struct PowerDevice { SysBusDevice parent_obj; MemoryRegion power_mmio; -} PowerDevice; +}; /* Power */ static uint64_t power_mem_read(void *opaque, hwaddr addr, unsigned size) @@ -399,13 +404,15 @@ static const TypeInfo ebus_info = { }; #define TYPE_OPENPROM "openprom" -#define OPENPROM(obj) OBJECT_CHECK(PROMState, (obj), TYPE_OPENPROM) +typedef struct PROMState PROMState; +DECLARE_INSTANCE_CHECKER(PROMState, OPENPROM, + TYPE_OPENPROM) -typedef struct PROMState { +struct PROMState { SysBusDevice parent_obj; MemoryRegion prom; -} PROMState; +}; static uint64_t translate_prom_address(void *opaque, uint64_t addr) { @@ -487,14 +494,16 @@ static const TypeInfo prom_info = { #define TYPE_SUN4U_MEMORY "memory" -#define SUN4U_RAM(obj) OBJECT_CHECK(RamDevice, (obj), TYPE_SUN4U_MEMORY) +typedef struct RamDevice RamDevice; +DECLARE_INSTANCE_CHECKER(RamDevice, SUN4U_RAM, + TYPE_SUN4U_MEMORY) -typedef struct RamDevice { +struct RamDevice { SysBusDevice parent_obj; MemoryRegion ram; uint64_t size; -} RamDevice; +}; /* System RAM */ static void ram_realize(DeviceState *dev, Error **errp) @@ -576,7 +585,7 @@ static void sun4uv_init(MemoryRegion *address_space_mem, prom_init(hwdef->prom_addr, bios_name); /* Init sabre (PCI host bridge) */ - sabre = SABRE_DEVICE(qdev_new(TYPE_SABRE)); + sabre = SABRE(qdev_new(TYPE_SABRE)); qdev_prop_set_uint64(DEVICE(sabre), "special-base", PBM_SPECIAL_BASE); qdev_prop_set_uint64(DEVICE(sabre), "mem-base", PBM_MEM_BASE); object_property_set_link(OBJECT(sabre), "iommu", OBJECT(iommu), diff --git a/hw/ssi/ssi.c b/hw/ssi/ssi.c index a35d7ebb26..faf7633e70 100644 --- a/hw/ssi/ssi.c +++ b/hw/ssi/ssi.c @@ -17,13 +17,15 @@ #include "migration/vmstate.h" #include "qemu/module.h" #include "qapi/error.h" +#include "qom/object.h" struct SSIBus { BusState parent_obj; }; #define TYPE_SSI_BUS "SSI" -#define SSI_BUS(obj) OBJECT_CHECK(SSIBus, (obj), TYPE_SSI_BUS) +DECLARE_INSTANCE_CHECKER(SSIBus, SSI_BUS, + TYPE_SSI_BUS) static const TypeInfo ssi_bus_info = { .name = TYPE_SSI_BUS, diff --git a/hw/ssi/xilinx_spi.c b/hw/ssi/xilinx_spi.c index 80d1488dc7..34fc8da69a 100644 --- a/hw/ssi/xilinx_spi.c +++ b/hw/ssi/xilinx_spi.c @@ -34,6 +34,7 @@ #include "hw/irq.h" #include "hw/qdev-properties.h" #include "hw/ssi/ssi.h" +#include "qom/object.h" #ifdef XILINX_SPI_ERR_DEBUG #define DB_PRINT(...) do { \ @@ -78,9 +79,11 @@ #define FIFO_CAPACITY 256 #define TYPE_XILINX_SPI "xlnx.xps-spi" -#define XILINX_SPI(obj) OBJECT_CHECK(XilinxSPI, (obj), TYPE_XILINX_SPI) +typedef struct XilinxSPI XilinxSPI; +DECLARE_INSTANCE_CHECKER(XilinxSPI, XILINX_SPI, + TYPE_XILINX_SPI) -typedef struct XilinxSPI { +struct XilinxSPI { SysBusDevice parent_obj; MemoryRegion mmio; @@ -97,7 +100,7 @@ typedef struct XilinxSPI { Fifo8 tx_fifo; uint32_t regs[R_MAX]; -} XilinxSPI; +}; static void txfifo_reset(XilinxSPI *s) { diff --git a/hw/timer/altera_timer.c b/hw/timer/altera_timer.c index be81b7a518..c694c98d08 100644 --- a/hw/timer/altera_timer.c +++ b/hw/timer/altera_timer.c @@ -26,6 +26,7 @@ #include "hw/irq.h" #include "hw/ptimer.h" #include "hw/qdev-properties.h" +#include "qom/object.h" #define R_STATUS 0 #define R_CONTROL 1 @@ -44,17 +45,18 @@ #define CONTROL_STOP 0x0008 #define TYPE_ALTERA_TIMER "ALTR.timer" -#define ALTERA_TIMER(obj) \ - OBJECT_CHECK(AlteraTimer, (obj), TYPE_ALTERA_TIMER) +typedef struct AlteraTimer AlteraTimer; +DECLARE_INSTANCE_CHECKER(AlteraTimer, ALTERA_TIMER, + TYPE_ALTERA_TIMER) -typedef struct AlteraTimer { +struct AlteraTimer { SysBusDevice busdev; MemoryRegion mmio; qemu_irq irq; uint32_t freq_hz; ptimer_state *ptimer; uint32_t regs[R_MAX]; -} AlteraTimer; +}; static int timer_irq_state(AlteraTimer *t) { diff --git a/hw/timer/arm_timer.c b/hw/timer/arm_timer.c index 9607366d78..79117f45b0 100644 --- a/hw/timer/arm_timer.c +++ b/hw/timer/arm_timer.c @@ -16,6 +16,7 @@ #include "hw/qdev-properties.h" #include "qemu/module.h" #include "qemu/log.h" +#include "qom/object.h" /* Common timer implementation. */ @@ -190,9 +191,11 @@ static arm_timer_state *arm_timer_init(uint32_t freq) */ #define TYPE_SP804 "sp804" -#define SP804(obj) OBJECT_CHECK(SP804State, (obj), TYPE_SP804) +typedef struct SP804State SP804State; +DECLARE_INSTANCE_CHECKER(SP804State, SP804, + TYPE_SP804) -typedef struct SP804State { +struct SP804State { SysBusDevice parent_obj; MemoryRegion iomem; @@ -200,7 +203,7 @@ typedef struct SP804State { uint32_t freq0, freq1; int level[2]; qemu_irq irq; -} SP804State; +}; static const uint8_t sp804_ids[] = { /* Timer ID */ @@ -310,15 +313,16 @@ static void sp804_realize(DeviceState *dev, Error **errp) /* Integrator/CP timer module. */ #define TYPE_INTEGRATOR_PIT "integrator_pit" -#define INTEGRATOR_PIT(obj) \ - OBJECT_CHECK(icp_pit_state, (obj), TYPE_INTEGRATOR_PIT) +typedef struct icp_pit_state icp_pit_state; +DECLARE_INSTANCE_CHECKER(icp_pit_state, INTEGRATOR_PIT, + TYPE_INTEGRATOR_PIT) -typedef struct { +struct icp_pit_state { SysBusDevice parent_obj; MemoryRegion iomem; arm_timer_state *timer[3]; -} icp_pit_state; +}; static uint64_t icp_pit_read(void *opaque, hwaddr offset, unsigned size) diff --git a/hw/timer/cadence_ttc.c b/hw/timer/cadence_ttc.c index b0ba6b2bba..52e637545a 100644 --- a/hw/timer/cadence_ttc.c +++ b/hw/timer/cadence_ttc.c @@ -22,6 +22,7 @@ #include "migration/vmstate.h" #include "qemu/module.h" #include "qemu/timer.h" +#include "qom/object.h" #ifdef CADENCE_TTC_ERR_DEBUG #define DB_PRINT(...) do { \ @@ -69,15 +70,16 @@ typedef struct { } CadenceTimerState; #define TYPE_CADENCE_TTC "cadence_ttc" -#define CADENCE_TTC(obj) \ - OBJECT_CHECK(CadenceTTCState, (obj), TYPE_CADENCE_TTC) +typedef struct CadenceTTCState CadenceTTCState; +DECLARE_INSTANCE_CHECKER(CadenceTTCState, CADENCE_TTC, + TYPE_CADENCE_TTC) -typedef struct CadenceTTCState { +struct CadenceTTCState { SysBusDevice parent_obj; MemoryRegion iomem; CadenceTimerState timer[3]; -} CadenceTTCState; +}; static void cadence_timer_update(CadenceTimerState *s) { diff --git a/hw/timer/etraxfs_timer.c b/hw/timer/etraxfs_timer.c index afe3d30a8e..48f2e3ade2 100644 --- a/hw/timer/etraxfs_timer.c +++ b/hw/timer/etraxfs_timer.c @@ -30,6 +30,7 @@ #include "qemu/timer.h" #include "hw/irq.h" #include "hw/ptimer.h" +#include "qom/object.h" #define D(x) @@ -48,10 +49,11 @@ #define R_MASKED_INTR 0x54 #define TYPE_ETRAX_FS_TIMER "etraxfs,timer" -#define ETRAX_TIMER(obj) \ - OBJECT_CHECK(ETRAXTimerState, (obj), TYPE_ETRAX_FS_TIMER) +typedef struct ETRAXTimerState ETRAXTimerState; +DECLARE_INSTANCE_CHECKER(ETRAXTimerState, ETRAX_TIMER, + TYPE_ETRAX_FS_TIMER) -typedef struct ETRAXTimerState { +struct ETRAXTimerState { SysBusDevice parent_obj; MemoryRegion mmio; @@ -79,7 +81,7 @@ typedef struct ETRAXTimerState { uint32_t rw_ack_intr; uint32_t r_intr; uint32_t r_masked_intr; -} ETRAXTimerState; +}; static uint64_t timer_read(void *opaque, hwaddr addr, unsigned int size) diff --git a/hw/timer/exynos4210_mct.c b/hw/timer/exynos4210_mct.c index 29a4b10676..0329cae3d9 100644 --- a/hw/timer/exynos4210_mct.c +++ b/hw/timer/exynos4210_mct.c @@ -62,6 +62,7 @@ #include "hw/arm/exynos4210.h" #include "hw/irq.h" +#include "qom/object.h" //#define DEBUG_MCT @@ -242,10 +243,11 @@ typedef struct { } Exynos4210MCTLT; #define TYPE_EXYNOS4210_MCT "exynos4210.mct" -#define EXYNOS4210_MCT(obj) \ - OBJECT_CHECK(Exynos4210MCTState, (obj), TYPE_EXYNOS4210_MCT) +typedef struct Exynos4210MCTState Exynos4210MCTState; +DECLARE_INSTANCE_CHECKER(Exynos4210MCTState, EXYNOS4210_MCT, + TYPE_EXYNOS4210_MCT) -typedef struct Exynos4210MCTState { +struct Exynos4210MCTState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -257,7 +259,7 @@ typedef struct Exynos4210MCTState { Exynos4210MCTGT g_timer; uint32_t freq; /* all timers tick frequency, TCLK */ -} Exynos4210MCTState; +}; /*** VMState ***/ static const VMStateDescription vmstate_tick_timer = { diff --git a/hw/timer/exynos4210_pwm.c b/hw/timer/exynos4210_pwm.c index 59a8c08db0..5340fc0425 100644 --- a/hw/timer/exynos4210_pwm.c +++ b/hw/timer/exynos4210_pwm.c @@ -30,6 +30,7 @@ #include "hw/arm/exynos4210.h" #include "hw/irq.h" +#include "qom/object.h" //#define DEBUG_PWM @@ -102,10 +103,11 @@ typedef struct { } Exynos4210PWM; #define TYPE_EXYNOS4210_PWM "exynos4210.pwm" -#define EXYNOS4210_PWM(obj) \ - OBJECT_CHECK(Exynos4210PWMState, (obj), TYPE_EXYNOS4210_PWM) +typedef struct Exynos4210PWMState Exynos4210PWMState; +DECLARE_INSTANCE_CHECKER(Exynos4210PWMState, EXYNOS4210_PWM, + TYPE_EXYNOS4210_PWM) -typedef struct Exynos4210PWMState { +struct Exynos4210PWMState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -116,7 +118,7 @@ typedef struct Exynos4210PWMState { Exynos4210PWM timer[EXYNOS4210_PWM_TIMERS_NUM]; -} Exynos4210PWMState; +}; /*** VMState ***/ static const VMStateDescription vmstate_exynos4210_pwm = { diff --git a/hw/timer/grlib_gptimer.c b/hw/timer/grlib_gptimer.c index eff0ee3491..e539fc24f0 100644 --- a/hw/timer/grlib_gptimer.c +++ b/hw/timer/grlib_gptimer.c @@ -32,6 +32,7 @@ #include "qemu/module.h" #include "trace.h" +#include "qom/object.h" #define UNIT_REG_SIZE 16 /* Size of memory mapped regs for the unit */ #define GPTIMER_REG_SIZE 16 /* Size of memory mapped regs for a GPTimer */ @@ -55,11 +56,11 @@ #define COUNTER_RELOAD_OFFSET 0x04 #define TIMER_BASE 0x10 -#define GRLIB_GPTIMER(obj) \ - OBJECT_CHECK(GPTimerUnit, (obj), TYPE_GRLIB_GPTIMER) +typedef struct GPTimerUnit GPTimerUnit; +DECLARE_INSTANCE_CHECKER(GPTimerUnit, GRLIB_GPTIMER, + TYPE_GRLIB_GPTIMER) typedef struct GPTimer GPTimer; -typedef struct GPTimerUnit GPTimerUnit; struct GPTimer { struct ptimer_state *ptimer; diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c index 380acfa7c8..44bbe3a536 100644 --- a/hw/timer/hpet.c +++ b/hw/timer/hpet.c @@ -37,6 +37,7 @@ #include "migration/vmstate.h" #include "hw/timer/i8254.h" #include "exec/address-spaces.h" +#include "qom/object.h" //#define HPET_DEBUG #ifdef HPET_DEBUG @@ -47,7 +48,9 @@ #define HPET_MSI_SUPPORT 0 -#define HPET(obj) OBJECT_CHECK(HPETState, (obj), TYPE_HPET) +typedef struct HPETState HPETState; +DECLARE_INSTANCE_CHECKER(HPETState, HPET, + TYPE_HPET) struct HPETState; typedef struct HPETTimer { /* timers */ @@ -65,7 +68,7 @@ typedef struct HPETTimer { /* timers */ */ } HPETTimer; -typedef struct HPETState { +struct HPETState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -87,7 +90,7 @@ typedef struct HPETState { uint64_t isr; /* interrupt status reg */ uint64_t hpet_counter; /* main counter */ uint8_t hpet_id; /* instance id */ -} HPETState; +}; static uint32_t hpet_in_legacy_mode(HPETState *s) { diff --git a/hw/timer/i8254.c b/hw/timer/i8254.c index 29f62e5356..c01ee2c72a 100644 --- a/hw/timer/i8254.c +++ b/hw/timer/i8254.c @@ -28,6 +28,7 @@ #include "qemu/timer.h" #include "hw/timer/i8254.h" #include "hw/timer/i8254_internal.h" +#include "qom/object.h" //#define DEBUG_PIT @@ -36,14 +37,15 @@ #define RW_STATE_WORD0 3 #define RW_STATE_WORD1 4 -#define PIT_CLASS(class) OBJECT_CLASS_CHECK(PITClass, (class), TYPE_I8254) -#define PIT_GET_CLASS(obj) OBJECT_GET_CLASS(PITClass, (obj), TYPE_I8254) +typedef struct PITClass PITClass; +DECLARE_CLASS_CHECKERS(PITClass, PIT, + TYPE_I8254) -typedef struct PITClass { +struct PITClass { PITCommonClass parent_class; DeviceRealize parent_realize; -} PITClass; +}; static void pit_irq_timer_update(PITChannelState *s, int64_t current_time); diff --git a/hw/timer/lm32_timer.c b/hw/timer/lm32_timer.c index f703f407f5..93ecb51a97 100644 --- a/hw/timer/lm32_timer.c +++ b/hw/timer/lm32_timer.c @@ -31,6 +31,7 @@ #include "hw/qdev-properties.h" #include "qemu/error-report.h" #include "qemu/module.h" +#include "qom/object.h" #define DEFAULT_FREQUENCY (50*1000000) @@ -55,7 +56,9 @@ enum { }; #define TYPE_LM32_TIMER "lm32-timer" -#define LM32_TIMER(obj) OBJECT_CHECK(LM32TimerState, (obj), TYPE_LM32_TIMER) +typedef struct LM32TimerState LM32TimerState; +DECLARE_INSTANCE_CHECKER(LM32TimerState, LM32_TIMER, + TYPE_LM32_TIMER) struct LM32TimerState { SysBusDevice parent_obj; @@ -69,7 +72,6 @@ struct LM32TimerState { uint32_t regs[R_MAX]; }; -typedef struct LM32TimerState LM32TimerState; static void timer_update_irq(LM32TimerState *s) { diff --git a/hw/timer/milkymist-sysctl.c b/hw/timer/milkymist-sysctl.c index 94389820b2..29500e0457 100644 --- a/hw/timer/milkymist-sysctl.c +++ b/hw/timer/milkymist-sysctl.c @@ -32,6 +32,7 @@ #include "hw/qdev-properties.h" #include "qemu/error-report.h" #include "qemu/module.h" +#include "qom/object.h" enum { CTRL_ENABLE = (1<<0), @@ -62,8 +63,9 @@ enum { }; #define TYPE_MILKYMIST_SYSCTL "milkymist-sysctl" -#define MILKYMIST_SYSCTL(obj) \ - OBJECT_CHECK(MilkymistSysctlState, (obj), TYPE_MILKYMIST_SYSCTL) +typedef struct MilkymistSysctlState MilkymistSysctlState; +DECLARE_INSTANCE_CHECKER(MilkymistSysctlState, MILKYMIST_SYSCTL, + TYPE_MILKYMIST_SYSCTL) struct MilkymistSysctlState { SysBusDevice parent_obj; @@ -84,7 +86,6 @@ struct MilkymistSysctlState { qemu_irq timer0_irq; qemu_irq timer1_irq; }; -typedef struct MilkymistSysctlState MilkymistSysctlState; static void sysctl_icap_write(MilkymistSysctlState *s, uint32_t value) { diff --git a/hw/timer/puv3_ost.c b/hw/timer/puv3_ost.c index f76b0bb1ca..3a35ac2b0a 100644 --- a/hw/timer/puv3_ost.c +++ b/hw/timer/puv3_ost.c @@ -15,15 +15,18 @@ #include "hw/ptimer.h" #include "qemu/module.h" #include "qemu/log.h" +#include "qom/object.h" #undef DEBUG_PUV3 #include "hw/unicore32/puv3.h" #define TYPE_PUV3_OST "puv3_ost" -#define PUV3_OST(obj) OBJECT_CHECK(PUV3OSTState, (obj), TYPE_PUV3_OST) +typedef struct PUV3OSTState PUV3OSTState; +DECLARE_INSTANCE_CHECKER(PUV3OSTState, PUV3_OST, + TYPE_PUV3_OST) /* puv3 ostimer implementation. */ -typedef struct PUV3OSTState { +struct PUV3OSTState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -34,7 +37,7 @@ typedef struct PUV3OSTState { uint32_t reg_OSCR; uint32_t reg_OSSR; uint32_t reg_OIER; -} PUV3OSTState; +}; static uint64_t puv3_ost_read(void *opaque, hwaddr offset, unsigned size) diff --git a/hw/timer/pxa2xx_timer.c b/hw/timer/pxa2xx_timer.c index 944c165889..8c3a1f5489 100644 --- a/hw/timer/pxa2xx_timer.c +++ b/hw/timer/pxa2xx_timer.c @@ -17,6 +17,7 @@ #include "migration/vmstate.h" #include "qemu/log.h" #include "qemu/module.h" +#include "qom/object.h" #define OSMR0 0x00 #define OSMR1 0x04 @@ -66,10 +67,10 @@ static int pxa2xx_timer4_freq[8] = { }; #define TYPE_PXA2XX_TIMER "pxa2xx-timer" -#define PXA2XX_TIMER(obj) \ - OBJECT_CHECK(PXA2xxTimerInfo, (obj), TYPE_PXA2XX_TIMER) - typedef struct PXA2xxTimerInfo PXA2xxTimerInfo; +DECLARE_INSTANCE_CHECKER(PXA2xxTimerInfo, PXA2XX_TIMER, + TYPE_PXA2XX_TIMER) + typedef struct { uint32_t value; diff --git a/hw/timer/slavio_timer.c b/hw/timer/slavio_timer.c index 4c5d65e391..08d6888015 100644 --- a/hw/timer/slavio_timer.c +++ b/hw/timer/slavio_timer.c @@ -31,6 +31,7 @@ #include "migration/vmstate.h" #include "trace.h" #include "qemu/module.h" +#include "qom/object.h" /* * Registers of hardware timer in sun4m. @@ -59,16 +60,17 @@ typedef struct CPUTimerState { } CPUTimerState; #define TYPE_SLAVIO_TIMER "slavio_timer" -#define SLAVIO_TIMER(obj) \ - OBJECT_CHECK(SLAVIO_TIMERState, (obj), TYPE_SLAVIO_TIMER) +typedef struct SLAVIO_TIMERState SLAVIO_TIMERState; +DECLARE_INSTANCE_CHECKER(SLAVIO_TIMERState, SLAVIO_TIMER, + TYPE_SLAVIO_TIMER) -typedef struct SLAVIO_TIMERState { +struct SLAVIO_TIMERState { SysBusDevice parent_obj; uint32_t num_cpus; uint32_t cputimer_mode; CPUTimerState cputimer[MAX_CPUS + 1]; -} SLAVIO_TIMERState; +}; typedef struct TimerContext { MemoryRegion iomem; diff --git a/hw/timer/trace-events b/hw/timer/trace-events index 447b7c405b..1537c3e6ec 100644 --- a/hw/timer/trace-events +++ b/hw/timer/trace-events @@ -81,7 +81,6 @@ avr_timer16_read(uint8_t addr, uint8_t value) "timer16 read addr:%u value:%u" avr_timer16_read_ifr(uint8_t value) "timer16 read addr:ifr value:%u" avr_timer16_read_imsk(uint8_t value) "timer16 read addr:imsk value:%u" avr_timer16_write(uint8_t addr, uint8_t value) "timer16 write addr:%u value:%u" -avr_timer16_write_ifr(uint8_t value) "timer16 write addr:ifr value:%u" avr_timer16_write_imsk(uint8_t value) "timer16 write addr:imsk value:%u" avr_timer16_interrupt_count(uint8_t cnt) "count: %u" avr_timer16_interrupt_overflow(const char *reason) "overflow: %s" diff --git a/hw/timer/xilinx_timer.c b/hw/timer/xilinx_timer.c index 0190aa47d0..1eb927eb84 100644 --- a/hw/timer/xilinx_timer.c +++ b/hw/timer/xilinx_timer.c @@ -29,6 +29,7 @@ #include "hw/qdev-properties.h" #include "qemu/log.h" #include "qemu/module.h" +#include "qom/object.h" #define D(x) @@ -61,8 +62,8 @@ struct xlx_timer }; #define TYPE_XILINX_TIMER "xlnx.xps-timer" -#define XILINX_TIMER(obj) \ - OBJECT_CHECK(struct timerblock, (obj), TYPE_XILINX_TIMER) +DECLARE_INSTANCE_CHECKER(struct timerblock, XILINX_TIMER, + TYPE_XILINX_TIMER) struct timerblock { diff --git a/hw/tpm/tpm_crb.c b/hw/tpm/tpm_crb.c index 60247295d4..aa9c00aad3 100644 --- a/hw/tpm/tpm_crb.c +++ b/hw/tpm/tpm_crb.c @@ -29,8 +29,9 @@ #include "tpm_prop.h" #include "tpm_ppi.h" #include "trace.h" +#include "qom/object.h" -typedef struct CRBState { +struct CRBState { DeviceState parent_obj; TPMBackend *tpmbe; @@ -43,9 +44,11 @@ typedef struct CRBState { bool ppi_enabled; TPMPPI ppi; -} CRBState; +}; +typedef struct CRBState CRBState; -#define CRB(obj) OBJECT_CHECK(CRBState, (obj), TYPE_TPM_CRB) +DECLARE_INSTANCE_CHECKER(CRBState, CRB, + TYPE_TPM_CRB) #define CRB_INTF_TYPE_CRB_ACTIVE 0b1 #define CRB_INTF_VERSION_CRB 0b1 diff --git a/hw/tpm/tpm_spapr.c b/hw/tpm/tpm_spapr.c index 8288ab0a15..e3775adc57 100644 --- a/hw/tpm/tpm_spapr.c +++ b/hw/tpm/tpm_spapr.c @@ -26,11 +26,13 @@ #include "hw/ppc/spapr.h" #include "hw/ppc/spapr_vio.h" #include "trace.h" +#include "qom/object.h" #define DEBUG_SPAPR 0 -#define VIO_SPAPR_VTPM(obj) \ - OBJECT_CHECK(SpaprTpmState, (obj), TYPE_TPM_SPAPR) +typedef struct SpaprTpmState SpaprTpmState; +DECLARE_INSTANCE_CHECKER(SpaprTpmState, VIO_SPAPR_VTPM, + TYPE_TPM_SPAPR) typedef struct TpmCrq { uint8_t valid; /* 0x80: cmd; 0xc0: init crq */ @@ -64,7 +66,7 @@ typedef struct TpmCrq { #define TPM_SPAPR_BUFFER_MAX 4096 -typedef struct { +struct SpaprTpmState { SpaprVioDevice vdev; TpmCrq crq; /* track single TPM command */ @@ -84,7 +86,7 @@ typedef struct { TPMVersion be_tpm_version; size_t be_buffer_size; -} SpaprTpmState; +}; /* * Send a request to the TPM. diff --git a/hw/tpm/tpm_tis_isa.c b/hw/tpm/tpm_tis_isa.c index 5faf6231c0..fafdcffa9c 100644 --- a/hw/tpm/tpm_tis_isa.c +++ b/hw/tpm/tpm_tis_isa.c @@ -29,16 +29,19 @@ #include "hw/acpi/tpm.h" #include "tpm_prop.h" #include "tpm_tis.h" +#include "qom/object.h" -typedef struct TPMStateISA { +struct TPMStateISA { /*< private >*/ ISADevice parent_obj; /*< public >*/ TPMState state; /* not a QOM object */ -} TPMStateISA; +}; +typedef struct TPMStateISA TPMStateISA; -#define TPM_TIS_ISA(obj) OBJECT_CHECK(TPMStateISA, (obj), TYPE_TPM_TIS_ISA) +DECLARE_INSTANCE_CHECKER(TPMStateISA, TPM_TIS_ISA, + TYPE_TPM_TIS_ISA) static int tpm_tis_pre_save_isa(void *opaque) { diff --git a/hw/tpm/tpm_tis_sysbus.c b/hw/tpm/tpm_tis_sysbus.c index 4a3bc70625..20b28eeb28 100644 --- a/hw/tpm/tpm_tis_sysbus.c +++ b/hw/tpm/tpm_tis_sysbus.c @@ -29,16 +29,19 @@ #include "tpm_prop.h" #include "hw/sysbus.h" #include "tpm_tis.h" +#include "qom/object.h" -typedef struct TPMStateSysBus { +struct TPMStateSysBus { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ TPMState state; /* not a QOM object */ -} TPMStateSysBus; +}; +typedef struct TPMStateSysBus TPMStateSysBus; -#define TPM_TIS_SYSBUS(obj) OBJECT_CHECK(TPMStateSysBus, (obj), TYPE_TPM_TIS_SYSBUS) +DECLARE_INSTANCE_CHECKER(TPMStateSysBus, TPM_TIS_SYSBUS, + TYPE_TPM_TIS_SYSBUS) static int tpm_tis_pre_save_sysbus(void *opaque) { diff --git a/hw/tpm/trace-events b/hw/tpm/trace-events index de9bf1e01b..266de17d38 100644 --- a/hw/tpm/trace-events +++ b/hw/tpm/trace-events @@ -4,7 +4,7 @@ tpm_crb_mmio_read(uint64_t addr, unsigned size, uint32_t val) "CRB read 0x%016" PRIx64 " len:%u val: 0x%" PRIx32 tpm_crb_mmio_write(uint64_t addr, unsigned size, uint32_t val) "CRB write 0x%016" PRIx64 " len:%u val: 0x%" PRIx32 -# tpm_tis.c +# tpm_tis_common.c tpm_tis_raise_irq(uint32_t irqmask) "Raising IRQ for flag 0x%08x" tpm_tis_new_active_locality(uint8_t locty) "Active locality is now %d" tpm_tis_abort(uint8_t locty) "New active locality is %d" diff --git a/hw/usb/ccid-card-emulated.c b/hw/usb/ccid-card-emulated.c index 0f1afd66be..5e4649d367 100644 --- a/hw/usb/ccid-card-emulated.c +++ b/hw/usb/ccid-card-emulated.c @@ -35,6 +35,7 @@ #include "ccid.h" #include "hw/qdev-properties.h" #include "qapi/error.h" +#include "qom/object.h" #define DPRINTF(card, lvl, fmt, ...) \ do {\ @@ -45,8 +46,9 @@ do {\ #define TYPE_EMULATED_CCID "ccid-card-emulated" -#define EMULATED_CCID_CARD(obj) \ - OBJECT_CHECK(EmulatedState, (obj), TYPE_EMULATED_CCID) +typedef struct EmulatedState EmulatedState; +DECLARE_INSTANCE_CHECKER(EmulatedState, EMULATED_CCID_CARD, + TYPE_EMULATED_CCID) #define BACKEND_NSS_EMULATED_NAME "nss-emulated" #define BACKEND_CERTIFICATES_NAME "certificates" @@ -58,7 +60,6 @@ enum { #define DEFAULT_BACKEND BACKEND_NSS_EMULATED -typedef struct EmulatedState EmulatedState; enum { EMUL_READER_INSERT = 0, diff --git a/hw/usb/ccid-card-passthru.c b/hw/usb/ccid-card-passthru.c index bb325dbc4a..e8e9d37e88 100644 --- a/hw/usb/ccid-card-passthru.c +++ b/hw/usb/ccid-card-passthru.c @@ -20,6 +20,7 @@ #include "qemu/sockets.h" #include "ccid.h" #include "qapi/error.h" +#include "qom/object.h" #define DPRINTF(card, lvl, fmt, ...) \ do { \ @@ -64,8 +65,8 @@ struct PassthruState { }; #define TYPE_CCID_PASSTHRU "ccid-card-passthru" -#define PASSTHRU_CCID_CARD(obj) \ - OBJECT_CHECK(PassthruState, (obj), TYPE_CCID_PASSTHRU) +DECLARE_INSTANCE_CHECKER(PassthruState, PASSTHRU_CCID_CARD, + TYPE_CCID_PASSTHRU) /* * VSCard protocol over chardev diff --git a/hw/usb/ccid.h b/hw/usb/ccid.h index 531bf28fb0..ef2bb3462d 100644 --- a/hw/usb/ccid.h +++ b/hw/usb/ccid.h @@ -11,23 +11,21 @@ #define CCID_H #include "hw/qdev-core.h" +#include "qom/object.h" typedef struct CCIDCardState CCIDCardState; typedef struct CCIDCardInfo CCIDCardInfo; #define TYPE_CCID_CARD "ccid-card" -#define CCID_CARD(obj) \ - OBJECT_CHECK(CCIDCardState, (obj), TYPE_CCID_CARD) -#define CCID_CARD_CLASS(klass) \ - OBJECT_CLASS_CHECK(CCIDCardClass, (klass), TYPE_CCID_CARD) -#define CCID_CARD_GET_CLASS(obj) \ - OBJECT_GET_CLASS(CCIDCardClass, (obj), TYPE_CCID_CARD) +typedef struct CCIDCardClass CCIDCardClass; +DECLARE_OBJ_CHECKERS(CCIDCardState, CCIDCardClass, + CCID_CARD, TYPE_CCID_CARD) /* * callbacks to be used by the CCID device (hw/usb-ccid.c) to call * into the smartcard device (hw/ccid-card-*.c) */ -typedef struct CCIDCardClass { +struct CCIDCardClass { /*< private >*/ DeviceClass parent_class; /*< public >*/ @@ -37,7 +35,7 @@ typedef struct CCIDCardClass { uint32_t len); void (*realize)(CCIDCardState *card, Error **errp); void (*unrealize)(CCIDCardState *card); -} CCIDCardClass; +}; /* * state of the CCID Card device (i.e. hw/ccid-card-*.c) diff --git a/hw/usb/dev-audio.c b/hw/usb/dev-audio.c index 1371c44f48..65247ca799 100644 --- a/hw/usb/dev-audio.c +++ b/hw/usb/dev-audio.c @@ -36,6 +36,7 @@ #include "migration/vmstate.h" #include "desc.h" #include "audio/audio.h" +#include "qom/object.h" static void usb_audio_reinit(USBDevice *dev, unsigned channels); @@ -633,7 +634,7 @@ static uint8_t *streambuf_get(struct streambuf *buf, size_t *len) return data; } -typedef struct USBAudioState { +struct USBAudioState { /* qemu interfaces */ USBDevice dev; QEMUSoundCard card; @@ -652,10 +653,12 @@ typedef struct USBAudioState { uint32_t debug; uint32_t buffer_user, buffer; bool multi; -} USBAudioState; +}; +typedef struct USBAudioState USBAudioState; #define TYPE_USB_AUDIO "usb-audio" -#define USB_AUDIO(obj) OBJECT_CHECK(USBAudioState, (obj), TYPE_USB_AUDIO) +DECLARE_INSTANCE_CHECKER(USBAudioState, USB_AUDIO, + TYPE_USB_AUDIO) static void output_callback(void *opaque, int avail) { diff --git a/hw/usb/dev-hid.c b/hw/usb/dev-hid.c index c73f7b2fe2..05cfe6baca 100644 --- a/hw/usb/dev-hid.c +++ b/hw/usb/dev-hid.c @@ -34,18 +34,21 @@ #include "hw/input/hid.h" #include "hw/usb/hid.h" #include "hw/qdev-properties.h" +#include "qom/object.h" -typedef struct USBHIDState { +struct USBHIDState { USBDevice dev; USBEndpoint *intr; HIDState hid; uint32_t usb_version; char *display; uint32_t head; -} USBHIDState; +}; +typedef struct USBHIDState USBHIDState; #define TYPE_USB_HID "usb-hid" -#define USB_HID(obj) OBJECT_CHECK(USBHIDState, (obj), TYPE_USB_HID) +DECLARE_INSTANCE_CHECKER(USBHIDState, USB_HID, + TYPE_USB_HID) enum { STR_MANUFACTURER = 1, diff --git a/hw/usb/dev-hub.c b/hw/usb/dev-hub.c index 5f19dd9fb5..7a182f9bec 100644 --- a/hw/usb/dev-hub.c +++ b/hw/usb/dev-hub.c @@ -32,6 +32,7 @@ #include "desc.h" #include "qemu/error-report.h" #include "qemu/module.h" +#include "qom/object.h" #define MAX_PORTS 8 @@ -41,17 +42,19 @@ typedef struct USBHubPort { uint16_t wPortChange; } USBHubPort; -typedef struct USBHubState { +struct USBHubState { USBDevice dev; USBEndpoint *intr; uint32_t num_ports; bool port_power; QEMUTimer *port_timer; USBHubPort ports[MAX_PORTS]; -} USBHubState; +}; +typedef struct USBHubState USBHubState; #define TYPE_USB_HUB "usb-hub" -#define USB_HUB(obj) OBJECT_CHECK(USBHubState, (obj), TYPE_USB_HUB) +DECLARE_INSTANCE_CHECKER(USBHubState, USB_HUB, + TYPE_USB_HUB) #define ClearHubFeature (0x2000 | USB_REQ_CLEAR_FEATURE) #define ClearPortFeature (0x2300 | USB_REQ_CLEAR_FEATURE) diff --git a/hw/usb/dev-mtp.c b/hw/usb/dev-mtp.c index 15a2243101..c61c0e0878 100644 --- a/hw/usb/dev-mtp.c +++ b/hw/usb/dev-mtp.c @@ -28,6 +28,7 @@ #include "migration/vmstate.h" #include "desc.h" #include "qemu/units.h" +#include "qom/object.h" /* ----------------------------------------------------------------------- */ @@ -237,7 +238,8 @@ typedef struct { } QEMU_PACKED ObjectInfo; #define TYPE_USB_MTP "usb-mtp" -#define USB_MTP(obj) OBJECT_CHECK(MTPState, (obj), TYPE_USB_MTP) +DECLARE_INSTANCE_CHECKER(MTPState, USB_MTP, + TYPE_USB_MTP) #define QEMU_STORAGE_ID 0x00010001 diff --git a/hw/usb/dev-network.c b/hw/usb/dev-network.c index c69756709b..cd32f57685 100644 --- a/hw/usb/dev-network.c +++ b/hw/usb/dev-network.c @@ -37,6 +37,7 @@ #include "qemu/iov.h" #include "qemu/module.h" #include "qemu/cutils.h" +#include "qom/object.h" /*#define TRAFFIC_DEBUG*/ /* Thanks to NetChip Technologies for donating this product ID. @@ -629,7 +630,7 @@ struct rndis_response { uint8_t buf[]; }; -typedef struct USBNetState { +struct USBNetState { USBDevice dev; enum rndis_state rndis_state; @@ -651,10 +652,12 @@ typedef struct USBNetState { NICState *nic; NICConf conf; QTAILQ_HEAD(, rndis_response) rndis_resp; -} USBNetState; +}; +typedef struct USBNetState USBNetState; #define TYPE_USB_NET "usb-net" -#define USB_NET(obj) OBJECT_CHECK(USBNetState, (obj), TYPE_USB_NET) +DECLARE_INSTANCE_CHECKER(USBNetState, USB_NET, + TYPE_USB_NET) static int is_rndis(USBNetState *s) { diff --git a/hw/usb/dev-serial.c b/hw/usb/dev-serial.c index 7e50e3ba47..1a038a222e 100644 --- a/hw/usb/dev-serial.c +++ b/hw/usb/dev-serial.c @@ -19,6 +19,7 @@ #include "desc.h" #include "chardev/char-serial.h" #include "chardev/char-fe.h" +#include "qom/object.h" //#define DEBUG_Serial @@ -96,7 +97,7 @@ do { printf("usb-serial: " fmt , ## __VA_ARGS__); } while (0) #define FTDI_TEMT (1<<6) // Transmitter Empty #define FTDI_FIFO (1<<7) // Error in FIFO -typedef struct { +struct USBSerialState { USBDevice dev; USBEndpoint *intr; uint8_t recv_buf[RECV_BUF]; @@ -108,10 +109,12 @@ typedef struct { QEMUSerialSetParams params; int latency; /* ms */ CharBackend cs; -} USBSerialState; +}; +typedef struct USBSerialState USBSerialState; #define TYPE_USB_SERIAL "usb-serial-dev" -#define USB_SERIAL_DEV(obj) OBJECT_CHECK(USBSerialState, (obj), TYPE_USB_SERIAL) +DECLARE_INSTANCE_CHECKER(USBSerialState, USB_SERIAL, + TYPE_USB_SERIAL) enum { STR_MANUFACTURER = 1, @@ -514,7 +517,7 @@ static void usb_serial_event(void *opaque, QEMUChrEvent event) static void usb_serial_realize(USBDevice *dev, Error **errp) { - USBSerialState *s = USB_SERIAL_DEV(dev); + USBSerialState *s = USB_SERIAL(dev); Error *local_err = NULL; usb_desc_create_serial(dev); diff --git a/hw/usb/dev-smartcard-reader.c b/hw/usb/dev-smartcard-reader.c index fcfe216594..59b2248f34 100644 --- a/hw/usb/dev-smartcard-reader.c +++ b/hw/usb/dev-smartcard-reader.c @@ -46,6 +46,7 @@ #include "desc.h" #include "ccid.h" +#include "qom/object.h" #define DPRINTF(s, lvl, fmt, ...) \ do { \ @@ -59,8 +60,10 @@ do { \ #define D_MORE_INFO 3 #define D_VERBOSE 4 -#define CCID_DEV_NAME "usb-ccid" -#define USB_CCID_DEV(obj) OBJECT_CHECK(USBCCIDState, (obj), CCID_DEV_NAME) +#define TYPE_USB_CCID_DEV "usb-ccid" +typedef struct USBCCIDState USBCCIDState; +DECLARE_INSTANCE_CHECKER(USBCCIDState, USB_CCID_DEV, + TYPE_USB_CCID_DEV) /* * The two options for variable sized buffers: * make them constant size, for large enough constant, @@ -274,14 +277,15 @@ typedef struct BulkIn { uint32_t pos; } BulkIn; -typedef struct CCIDBus { +struct CCIDBus { BusState qbus; -} CCIDBus; +}; +typedef struct CCIDBus CCIDBus; /* * powered - defaults to true, changed by PowerOn/PowerOff messages */ -typedef struct USBCCIDState { +struct USBCCIDState { USBDevice dev; USBEndpoint *intr; USBEndpoint *bulk; @@ -309,7 +313,7 @@ typedef struct USBCCIDState { uint8_t powered; uint8_t notify_slot_change; uint8_t debug; -} USBCCIDState; +}; /* * CCID Spec chapter 4: CCID uses a standard device descriptor per Chapter 9, @@ -1173,7 +1177,8 @@ static Property ccid_props[] = { }; #define TYPE_CCID_BUS "ccid-bus" -#define CCID_BUS(obj) OBJECT_CHECK(CCIDBus, (obj), TYPE_CCID_BUS) +DECLARE_INSTANCE_CHECKER(CCIDBus, CCID_BUS, + TYPE_CCID_BUS) static const TypeInfo ccid_bus_info = { .name = TYPE_CCID_BUS, @@ -1457,7 +1462,7 @@ static void ccid_class_initfn(ObjectClass *klass, void *data) } static const TypeInfo ccid_info = { - .name = CCID_DEV_NAME, + .name = TYPE_USB_CCID_DEV, .parent = TYPE_USB_DEVICE, .instance_size = sizeof(USBCCIDState), .class_init = ccid_class_initfn, @@ -1490,7 +1495,7 @@ static void ccid_register_types(void) type_register_static(&ccid_bus_info); type_register_static(&ccid_card_type_info); type_register_static(&ccid_info); - usb_legacy_register(CCID_DEV_NAME, "ccid", NULL); + usb_legacy_register(TYPE_USB_CCID_DEV, "ccid", NULL); } type_init(ccid_register_types) diff --git a/hw/usb/dev-storage.c b/hw/usb/dev-storage.c index 405a4ccfe7..648340323f 100644 --- a/hw/usb/dev-storage.c +++ b/hw/usb/dev-storage.c @@ -22,6 +22,7 @@ #include "sysemu/block-backend.h" #include "qapi/visitor.h" #include "qemu/cutils.h" +#include "qom/object.h" //#define DEBUG_MSD @@ -50,7 +51,7 @@ struct usb_msd_csw { uint8_t status; }; -typedef struct { +struct MSDState { USBDevice dev; enum USBMSDMode mode; uint32_t scsi_off; @@ -65,10 +66,12 @@ typedef struct { BlockConf conf; uint32_t removable; SCSIDevice *scsi_dev; -} MSDState; +}; +typedef struct MSDState MSDState; #define TYPE_USB_STORAGE "usb-storage-dev" -#define USB_STORAGE_DEV(obj) OBJECT_CHECK(MSDState, (obj), TYPE_USB_STORAGE) +DECLARE_INSTANCE_CHECKER(MSDState, USB_STORAGE_DEV, + TYPE_USB_STORAGE) struct usb_msd_cbw { uint32_t sig; diff --git a/hw/usb/dev-uas.c b/hw/usb/dev-uas.c index a3a4d41c07..c36c8e7820 100644 --- a/hw/usb/dev-uas.c +++ b/hw/usb/dev-uas.c @@ -23,6 +23,7 @@ #include "hw/qdev-properties.h" #include "hw/scsi/scsi.h" #include "scsi/constants.h" +#include "qom/object.h" /* --------------------------------------------------------------------- */ @@ -132,7 +133,8 @@ struct UASDevice { }; #define TYPE_USB_UAS "usb-uas" -#define USB_UAS(obj) OBJECT_CHECK(UASDevice, (obj), TYPE_USB_UAS) +DECLARE_INSTANCE_CHECKER(UASDevice, USB_UAS, + TYPE_USB_UAS) struct UASRequest { uint16_t tag; diff --git a/hw/usb/dev-wacom.c b/hw/usb/dev-wacom.c index 76fc5a5dab..85c4d827bf 100644 --- a/hw/usb/dev-wacom.c +++ b/hw/usb/dev-wacom.c @@ -33,12 +33,13 @@ #include "migration/vmstate.h" #include "qemu/module.h" #include "desc.h" +#include "qom/object.h" /* Interface requests */ #define WACOM_GET_REPORT 0x2101 #define WACOM_SET_REPORT 0x2109 -typedef struct USBWacomState { +struct USBWacomState { USBDevice dev; USBEndpoint *intr; QEMUPutMouseEntry *eh_entry; @@ -51,10 +52,12 @@ typedef struct USBWacomState { } mode; uint8_t idle; int changed; -} USBWacomState; +}; +typedef struct USBWacomState USBWacomState; #define TYPE_USB_WACOM "usb-wacom-tablet" -#define USB_WACOM(obj) OBJECT_CHECK(USBWacomState, (obj), TYPE_USB_WACOM) +DECLARE_INSTANCE_CHECKER(USBWacomState, USB_WACOM, + TYPE_USB_WACOM) enum { STR_MANUFACTURER = 1, diff --git a/hw/usb/hcd-dwc2.h b/hw/usb/hcd-dwc2.h index 54111d835e..919e3e43b1 100644 --- a/hw/usb/hcd-dwc2.h +++ b/hw/usb/hcd-dwc2.h @@ -24,6 +24,7 @@ #include "hw/sysbus.h" #include "hw/usb.h" #include "sysemu/dma.h" +#include "qom/object.h" #define DWC2_MMIO_SIZE 0x11000 @@ -180,11 +181,7 @@ struct DWC2Class { }; #define TYPE_DWC2_USB "dwc2-usb" -#define DWC2_USB(obj) \ - OBJECT_CHECK(DWC2State, (obj), TYPE_DWC2_USB) -#define DWC2_USB_CLASS(klass) \ - OBJECT_CLASS_CHECK(DWC2Class, (klass), TYPE_DWC2_USB) -#define DWC2_USB_GET_CLASS(obj) \ - OBJECT_GET_CLASS(DWC2Class, (obj), TYPE_DWC2_USB) +DECLARE_OBJ_CHECKERS(DWC2State, DWC2Class, + DWC2_USB, TYPE_DWC2_USB) #endif diff --git a/hw/usb/hcd-ehci.h b/hw/usb/hcd-ehci.h index 57b38cfc05..1301ce0be7 100644 --- a/hw/usb/hcd-ehci.h +++ b/hw/usb/hcd-ehci.h @@ -23,6 +23,7 @@ #include "sysemu/dma.h" #include "hw/pci/pci.h" #include "hw/sysbus.h" +#include "qom/object.h" #ifndef EHCI_DEBUG #define EHCI_DEBUG 0 @@ -328,15 +329,17 @@ void usb_ehci_unrealize(EHCIState *s, DeviceState *dev); void ehci_reset(void *opaque); #define TYPE_PCI_EHCI "pci-ehci-usb" -#define PCI_EHCI(obj) OBJECT_CHECK(EHCIPCIState, (obj), TYPE_PCI_EHCI) +typedef struct EHCIPCIState EHCIPCIState; +DECLARE_INSTANCE_CHECKER(EHCIPCIState, PCI_EHCI, + TYPE_PCI_EHCI) -typedef struct EHCIPCIState { +struct EHCIPCIState { /*< private >*/ PCIDevice pcidev; /*< public >*/ EHCIState ehci; -} EHCIPCIState; +}; #define TYPE_SYS_BUS_EHCI "sysbus-ehci-usb" @@ -347,22 +350,20 @@ typedef struct EHCIPCIState { #define TYPE_PPC4xx_EHCI "ppc4xx-ehci-usb" #define TYPE_FUSBH200_EHCI "fusbh200-ehci-usb" -#define SYS_BUS_EHCI(obj) \ - OBJECT_CHECK(EHCISysBusState, (obj), TYPE_SYS_BUS_EHCI) -#define SYS_BUS_EHCI_CLASS(class) \ - OBJECT_CLASS_CHECK(SysBusEHCIClass, (class), TYPE_SYS_BUS_EHCI) -#define SYS_BUS_EHCI_GET_CLASS(obj) \ - OBJECT_GET_CLASS(SysBusEHCIClass, (obj), TYPE_SYS_BUS_EHCI) +typedef struct EHCISysBusState EHCISysBusState; +typedef struct SysBusEHCIClass SysBusEHCIClass; +DECLARE_OBJ_CHECKERS(EHCISysBusState, SysBusEHCIClass, + SYS_BUS_EHCI, TYPE_SYS_BUS_EHCI) -typedef struct EHCISysBusState { +struct EHCISysBusState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ EHCIState ehci; -} EHCISysBusState; +}; -typedef struct SysBusEHCIClass { +struct SysBusEHCIClass { /*< private >*/ SysBusDeviceClass parent_class; /*< public >*/ @@ -371,17 +372,18 @@ typedef struct SysBusEHCIClass { uint16_t opregbase; uint16_t portscbase; uint16_t portnr; -} SysBusEHCIClass; +}; -#define FUSBH200_EHCI(obj) \ - OBJECT_CHECK(FUSBH200EHCIState, (obj), TYPE_FUSBH200_EHCI) +typedef struct FUSBH200EHCIState FUSBH200EHCIState; +DECLARE_INSTANCE_CHECKER(FUSBH200EHCIState, FUSBH200_EHCI, + TYPE_FUSBH200_EHCI) -typedef struct FUSBH200EHCIState { +struct FUSBH200EHCIState { /*< private >*/ EHCISysBusState parent_obj; /*< public >*/ MemoryRegion mem_vendor; -} FUSBH200EHCIState; +}; #endif diff --git a/hw/usb/hcd-ohci-pci.c b/hw/usb/hcd-ohci-pci.c index a7fb1666af..f8168a06a3 100644 --- a/hw/usb/hcd-ohci-pci.c +++ b/hw/usb/hcd-ohci-pci.c @@ -29,11 +29,14 @@ #include "hw/qdev-properties.h" #include "trace.h" #include "hcd-ohci.h" +#include "qom/object.h" #define TYPE_PCI_OHCI "pci-ohci" -#define PCI_OHCI(obj) OBJECT_CHECK(OHCIPCIState, (obj), TYPE_PCI_OHCI) +typedef struct OHCIPCIState OHCIPCIState; +DECLARE_INSTANCE_CHECKER(OHCIPCIState, PCI_OHCI, + TYPE_PCI_OHCI) -typedef struct { +struct OHCIPCIState { /*< private >*/ PCIDevice parent_obj; /*< public >*/ @@ -42,7 +45,7 @@ typedef struct { char *masterbus; uint32_t num_ports; uint32_t firstport; -} OHCIPCIState; +}; /** * A typical PCI OHCI will additionally set PERR in its configspace to diff --git a/hw/usb/hcd-ohci.h b/hw/usb/hcd-ohci.h index 5c8819aedf..6e28e97839 100644 --- a/hw/usb/hcd-ohci.h +++ b/hw/usb/hcd-ohci.h @@ -23,6 +23,7 @@ #include "sysemu/dma.h" #include "hw/usb.h" +#include "qom/object.h" /* Number of Downstream Ports on the root hub: */ #define OHCI_MAX_PORTS 15 @@ -92,9 +93,11 @@ typedef struct OHCIState { } OHCIState; #define TYPE_SYSBUS_OHCI "sysbus-ohci" -#define SYSBUS_OHCI(obj) OBJECT_CHECK(OHCISysBusState, (obj), TYPE_SYSBUS_OHCI) +typedef struct OHCISysBusState OHCISysBusState; +DECLARE_INSTANCE_CHECKER(OHCISysBusState, SYSBUS_OHCI, + TYPE_SYSBUS_OHCI) -typedef struct { +struct OHCISysBusState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -104,7 +107,7 @@ typedef struct { uint32_t num_ports; uint32_t firstport; dma_addr_t dma_offset; -} OHCISysBusState; +}; extern const VMStateDescription vmstate_ohci_state; diff --git a/hw/usb/hcd-uhci.c b/hw/usb/hcd-uhci.c index 37f7beb3fa..27ca237d71 100644 --- a/hw/usb/hcd-uhci.c +++ b/hw/usb/hcd-uhci.c @@ -39,6 +39,7 @@ #include "trace.h" #include "qemu/main-loop.h" #include "qemu/module.h" +#include "qom/object.h" #define FRAME_TIMER_FREQ 1000 @@ -160,7 +161,8 @@ static void uhci_queue_fill(UHCIQueue *q, UHCI_TD *td); static void uhci_resume(void *opaque); #define TYPE_UHCI "pci-uhci-usb" -#define UHCI(obj) OBJECT_CHECK(UHCIState, (obj), TYPE_UHCI) +DECLARE_INSTANCE_CHECKER(UHCIState, UHCI, + TYPE_UHCI) static inline int32_t uhci_queue_token(UHCI_TD *td) { diff --git a/hw/usb/hcd-xhci.h b/hw/usb/hcd-xhci.h index 946af51fc2..2110c0399e 100644 --- a/hw/usb/hcd-xhci.h +++ b/hw/usb/hcd-xhci.h @@ -21,13 +21,15 @@ #ifndef HW_USB_HCD_XHCI_H #define HW_USB_HCD_XHCI_H +#include "qom/object.h" #define TYPE_XHCI "base-xhci" #define TYPE_NEC_XHCI "nec-usb-xhci" #define TYPE_QEMU_XHCI "qemu-xhci" -#define XHCI(obj) \ - OBJECT_CHECK(XHCIState, (obj), TYPE_XHCI) +typedef struct XHCIState XHCIState; +DECLARE_INSTANCE_CHECKER(XHCIState, XHCI, + TYPE_XHCI) #define MAXPORTS_2 15 #define MAXPORTS_3 15 @@ -39,7 +41,6 @@ /* Very pessimistic, let's hope it's enough for all cases */ #define EV_QUEUE (((3 * 24) + 16) * MAXSLOTS) -typedef struct XHCIState XHCIState; typedef struct XHCIStreamContext XHCIStreamContext; typedef struct XHCIEPContext XHCIEPContext; diff --git a/hw/usb/host-libusb.c b/hw/usb/host-libusb.c index 08604f787f..2ba1de68df 100644 --- a/hw/usb/host-libusb.c +++ b/hw/usb/host-libusb.c @@ -34,6 +34,7 @@ */ #include "qemu/osdep.h" +#include "qom/object.h" #ifndef CONFIG_WIN32 #include <poll.h> #endif @@ -60,10 +61,10 @@ /* ------------------------------------------------------------------------ */ #define TYPE_USB_HOST_DEVICE "usb-host" -#define USB_HOST_DEVICE(obj) \ - OBJECT_CHECK(USBHostDevice, (obj), TYPE_USB_HOST_DEVICE) - typedef struct USBHostDevice USBHostDevice; +DECLARE_INSTANCE_CHECKER(USBHostDevice, USB_HOST_DEVICE, + TYPE_USB_HOST_DEVICE) + typedef struct USBHostRequest USBHostRequest; typedef struct USBHostIsoXfer USBHostIsoXfer; typedef struct USBHostIsoRing USBHostIsoRing; diff --git a/hw/usb/redirect.c b/hw/usb/redirect.c index 48f38d3391..3238de6bb8 100644 --- a/hw/usb/redirect.c +++ b/hw/usb/redirect.c @@ -45,6 +45,7 @@ #include "hw/usb.h" #include "migration/qemu-file-types.h" #include "migration/vmstate.h" +#include "qom/object.h" /* ERROR is defined below. Remove any previous definition. */ #undef ERROR @@ -144,7 +145,8 @@ struct USBRedirDevice { }; #define TYPE_USB_REDIR "usb-redir" -#define USB_REDIRECT(obj) OBJECT_CHECK(USBRedirDevice, (obj), TYPE_USB_REDIR) +DECLARE_INSTANCE_CHECKER(USBRedirDevice, USB_REDIRECT, + TYPE_USB_REDIR) static void usbredir_hello(void *priv, struct usb_redir_hello_header *h); static void usbredir_device_connect(void *priv, diff --git a/hw/usb/trace-events b/hw/usb/trace-events index e9cdeeed14..72e4298780 100644 --- a/hw/usb/trace-events +++ b/hw/usb/trace-events @@ -10,6 +10,9 @@ usb_port_attach(int bus, const char *port, const char *devspeed, const char *por usb_port_detach(int bus, const char *port) "bus %d, port %s" usb_port_release(int bus, const char *port) "bus %d, port %s" +# hcd-ohci-pci.c +usb_ohci_exit(const char *s) "%s" + # hcd-ohci.c usb_ohci_iso_td_read_failed(uint32_t addr) "ISO_TD read error at 0x%x" usb_ohci_iso_td_head(uint32_t head, uint32_t tail, uint32_t flags, uint32_t bp, uint32_t next, uint32_t be, uint32_t framenum, uint32_t startframe, uint32_t framecount, int rel_frame_num) "ISO_TD ED head 0x%.8x tailp 0x%.8x\n0x%.8x 0x%.8x 0x%.8x 0x%.8x\nframe_number 0x%.8x starting_frame 0x%.8x\nframe_count 0x%.8x relative %d" @@ -35,7 +38,6 @@ usb_ohci_reset(const char *s) "%s" usb_ohci_start(const char *s) "%s: USB Operational" usb_ohci_resume(const char *s) "%s: USB Resume" usb_ohci_stop(const char *s) "%s: USB Suspended" -usb_ohci_exit(const char *s) "%s" usb_ohci_set_ctl(const char *s, uint32_t new_state) "%s: new state 0x%x" usb_ohci_td_underrun(void) "" usb_ohci_td_dev_error(void) "" diff --git a/hw/usb/tusb6010.c b/hw/usb/tusb6010.c index 27eb28d3e4..dd20996d13 100644 --- a/hw/usb/tusb6010.c +++ b/hw/usb/tusb6010.c @@ -28,11 +28,14 @@ #include "hw/hw.h" #include "hw/irq.h" #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_TUSB6010 "tusb6010" -#define TUSB(obj) OBJECT_CHECK(TUSBState, (obj), TYPE_TUSB6010) +typedef struct TUSBState TUSBState; +DECLARE_INSTANCE_CHECKER(TUSBState, TUSB6010, + TYPE_TUSB6010) -typedef struct TUSBState { +struct TUSBState { SysBusDevice parent_obj; MemoryRegion iomem[2]; @@ -68,7 +71,7 @@ typedef struct TUSBState { uint32_t pullup[2]; uint32_t control_config; uint32_t otg_timer_val; -} TUSBState; +}; #define TUSB_DEVCLOCK 60000000 /* 60 MHz */ @@ -776,7 +779,7 @@ static void tusb6010_irq(void *opaque, int source, int level) static void tusb6010_reset(DeviceState *dev) { - TUSBState *s = TUSB(dev); + TUSBState *s = TUSB6010(dev); int i; s->test_reset = TUSB_PROD_TEST_RESET_VAL; @@ -812,7 +815,7 @@ static void tusb6010_reset(DeviceState *dev) static void tusb6010_realize(DeviceState *dev, Error **errp) { - TUSBState *s = TUSB(dev); + TUSBState *s = TUSB6010(dev); SysBusDevice *sbd = SYS_BUS_DEVICE(dev); s->otg_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, tusb_otg_tick, s); diff --git a/hw/vfio/ap.c b/hw/vfio/ap.c index cec6fe1599..582c091a24 100644 --- a/hw/vfio/ap.c +++ b/hw/vfio/ap.c @@ -28,16 +28,18 @@ #include "hw/qdev-properties.h" #include "hw/s390x/ap-bridge.h" #include "exec/address-spaces.h" +#include "qom/object.h" -#define VFIO_AP_DEVICE_TYPE "vfio-ap" +#define TYPE_VFIO_AP_DEVICE "vfio-ap" -typedef struct VFIOAPDevice { +struct VFIOAPDevice { APDevice apdev; VFIODevice vdev; -} VFIOAPDevice; +}; +typedef struct VFIOAPDevice VFIOAPDevice; -#define VFIO_AP_DEVICE(obj) \ - OBJECT_CHECK(VFIOAPDevice, (obj), VFIO_AP_DEVICE_TYPE) +DECLARE_INSTANCE_CHECKER(VFIOAPDevice, VFIO_AP_DEVICE, + TYPE_VFIO_AP_DEVICE) static void vfio_ap_compute_needs_reset(VFIODevice *vdev) { @@ -70,7 +72,7 @@ static VFIOGroup *vfio_ap_get_group(VFIOAPDevice *vapdev, Error **errp) if (!group_path) { error_setg(errp, "%s: no iommu_group found for %s: %s", - VFIO_AP_DEVICE_TYPE, vapdev->vdev.sysfsdev, gerror->message); + TYPE_VFIO_AP_DEVICE, vapdev->vdev.sysfsdev, gerror->message); g_error_free(gerror); return NULL; } @@ -174,8 +176,8 @@ static void vfio_ap_class_init(ObjectClass *klass, void *data) } static const TypeInfo vfio_ap_info = { - .name = VFIO_AP_DEVICE_TYPE, - .parent = AP_DEVICE_TYPE, + .name = TYPE_VFIO_AP_DEVICE, + .parent = TYPE_AP_DEVICE, .instance_size = sizeof(VFIOAPDevice), .class_init = vfio_ap_class_init, }; diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c index 3611dcd38b..0d83eb0e47 100644 --- a/hw/vfio/pci.c +++ b/hw/vfio/pci.c @@ -230,7 +230,7 @@ static void vfio_intx_update(VFIOPCIDevice *vdev, PCIINTxRoute *route) static void vfio_intx_routing_notifier(PCIDevice *pdev) { - VFIOPCIDevice *vdev = PCI_VFIO(pdev); + VFIOPCIDevice *vdev = VFIO_PCI(pdev); PCIINTxRoute route; if (vdev->interrupt != VFIO_INT_INTx) { @@ -456,7 +456,7 @@ static void vfio_update_kvm_msi_virq(VFIOMSIVector *vector, MSIMessage msg, static int vfio_msix_vector_do_use(PCIDevice *pdev, unsigned int nr, MSIMessage *msg, IOHandler *handler) { - VFIOPCIDevice *vdev = PCI_VFIO(pdev); + VFIOPCIDevice *vdev = VFIO_PCI(pdev); VFIOMSIVector *vector; int ret; @@ -541,7 +541,7 @@ static int vfio_msix_vector_use(PCIDevice *pdev, static void vfio_msix_vector_release(PCIDevice *pdev, unsigned int nr) { - VFIOPCIDevice *vdev = PCI_VFIO(pdev); + VFIOPCIDevice *vdev = VFIO_PCI(pdev); VFIOMSIVector *vector = &vdev->msi_vectors[nr]; trace_vfio_msix_vector_release(vdev->vbasedev.name, nr); @@ -1048,7 +1048,7 @@ static const MemoryRegionOps vfio_vga_ops = { */ static void vfio_sub_page_bar_update_mapping(PCIDevice *pdev, int bar) { - VFIOPCIDevice *vdev = PCI_VFIO(pdev); + VFIOPCIDevice *vdev = VFIO_PCI(pdev); VFIORegion *region = &vdev->bars[bar].region; MemoryRegion *mmap_mr, *region_mr, *base_mr; PCIIORegion *r; @@ -1094,7 +1094,7 @@ static void vfio_sub_page_bar_update_mapping(PCIDevice *pdev, int bar) */ uint32_t vfio_pci_read_config(PCIDevice *pdev, uint32_t addr, int len) { - VFIOPCIDevice *vdev = PCI_VFIO(pdev); + VFIOPCIDevice *vdev = VFIO_PCI(pdev); uint32_t emu_bits = 0, emu_val = 0, phys_val = 0, val; memcpy(&emu_bits, vdev->emulated_config_bits + addr, len); @@ -1127,7 +1127,7 @@ uint32_t vfio_pci_read_config(PCIDevice *pdev, uint32_t addr, int len) void vfio_pci_write_config(PCIDevice *pdev, uint32_t addr, uint32_t val, int len) { - VFIOPCIDevice *vdev = PCI_VFIO(pdev); + VFIOPCIDevice *vdev = VFIO_PCI(pdev); uint32_t val_le = cpu_to_le32(val); trace_vfio_pci_write_config(vdev->vbasedev.name, addr, val, len); @@ -2701,7 +2701,7 @@ static void vfio_unregister_req_notifier(VFIOPCIDevice *vdev) static void vfio_realize(PCIDevice *pdev, Error **errp) { - VFIOPCIDevice *vdev = PCI_VFIO(pdev); + VFIOPCIDevice *vdev = VFIO_PCI(pdev); VFIODevice *vbasedev_iter; VFIOGroup *group; char *tmp, *subsys, group_path[PATH_MAX], *group_name; @@ -3033,7 +3033,7 @@ error: static void vfio_instance_finalize(Object *obj) { - VFIOPCIDevice *vdev = PCI_VFIO(obj); + VFIOPCIDevice *vdev = VFIO_PCI(obj); VFIOGroup *group = vdev->vbasedev.group; vfio_display_finalize(vdev); @@ -3057,7 +3057,7 @@ static void vfio_instance_finalize(Object *obj) static void vfio_exitfn(PCIDevice *pdev) { - VFIOPCIDevice *vdev = PCI_VFIO(pdev); + VFIOPCIDevice *vdev = VFIO_PCI(pdev); vfio_unregister_req_notifier(vdev); vfio_unregister_err_notifier(vdev); @@ -3075,7 +3075,7 @@ static void vfio_exitfn(PCIDevice *pdev) static void vfio_pci_reset(DeviceState *dev) { - VFIOPCIDevice *vdev = PCI_VFIO(dev); + VFIOPCIDevice *vdev = VFIO_PCI(dev); trace_vfio_pci_reset(vdev->vbasedev.name); @@ -3115,7 +3115,7 @@ post_reset: static void vfio_instance_init(Object *obj) { PCIDevice *pci_dev = PCI_DEVICE(obj); - VFIOPCIDevice *vdev = PCI_VFIO(obj); + VFIOPCIDevice *vdev = VFIO_PCI(obj); device_add_bootindex_property(obj, &vdev->bootindex, "bootindex", NULL, diff --git a/hw/vfio/pci.h b/hw/vfio/pci.h index 3c0dca024b..5e53d5b863 100644 --- a/hw/vfio/pci.h +++ b/hw/vfio/pci.h @@ -18,6 +18,7 @@ #include "qemu/event_notifier.h" #include "qemu/queue.h" #include "qemu/timer.h" +#include "qom/object.h" #define PCI_ANY_ID (~0) @@ -114,9 +115,11 @@ typedef struct VFIOMSIXInfo { } VFIOMSIXInfo; #define TYPE_VFIO_PCI "vfio-pci" -#define PCI_VFIO(obj) OBJECT_CHECK(VFIOPCIDevice, obj, TYPE_VFIO_PCI) +typedef struct VFIOPCIDevice VFIOPCIDevice; +DECLARE_INSTANCE_CHECKER(VFIOPCIDevice, VFIO_PCI, + TYPE_VFIO_PCI) -typedef struct VFIOPCIDevice { +struct VFIOPCIDevice { PCIDevice pdev; VFIODevice vbasedev; VFIOINTx intx; @@ -173,7 +176,7 @@ typedef struct VFIOPCIDevice { VFIODisplay *dpy; Error *migration_blocker; Notifier irqchip_change_notifier; -} VFIOPCIDevice; +}; /* Use uin32_t for vendor & device so PCI_ANY_ID expands and cannot match hw */ static inline bool vfio_pci_is(VFIOPCIDevice *vdev, uint32_t vendor, uint32_t device) diff --git a/hw/vfio/trace-events b/hw/vfio/trace-events index b1ef55a33f..93a0bc2522 100644 --- a/hw/vfio/trace-events +++ b/hw/vfio/trace-events @@ -80,16 +80,18 @@ vfio_quirk_ati_bonaire_reset(const char *name) "%s" vfio_ioeventfd_exit(const char *name, uint64_t addr, unsigned size, uint64_t data) "%s+0x%"PRIx64"[%d]:0x%"PRIx64 vfio_ioeventfd_handler(const char *name, uint64_t addr, unsigned size, uint64_t data) "%s+0x%"PRIx64"[%d] -> 0x%"PRIx64 vfio_ioeventfd_init(const char *name, uint64_t addr, unsigned size, uint64_t data, bool vfio) "%s+0x%"PRIx64"[%d]:0x%"PRIx64" vfio:%d" -vfio_pci_igd_bar4_write(const char *name, uint32_t index, uint32_t data, uint32_t base) "%s [0x%03x] 0x%08x -> 0x%08x" -vfio_pci_igd_bdsm_enabled(const char *name, int size) "%s %dMB" vfio_pci_igd_opregion_enabled(const char *name) "%s" -vfio_pci_igd_host_bridge_enabled(const char *name) "%s" -vfio_pci_igd_lpc_bridge_enabled(const char *name) "%s" vfio_pci_nvidia_gpu_setup_quirk(const char *name, uint64_t tgt, uint64_t size) "%s tgt=0x%"PRIx64" size=0x%"PRIx64 vfio_pci_nvlink2_setup_quirk_ssatgt(const char *name, uint64_t tgt, uint64_t size) "%s tgt=0x%"PRIx64" size=0x%"PRIx64 vfio_pci_nvlink2_setup_quirk_lnkspd(const char *name, uint32_t link_speed) "%s link_speed=0x%x" +# igd.c +vfio_pci_igd_bar4_write(const char *name, uint32_t index, uint32_t data, uint32_t base) "%s [0x%03x] 0x%08x -> 0x%08x" +vfio_pci_igd_bdsm_enabled(const char *name, int size) "%s %dMB" +vfio_pci_igd_host_bridge_enabled(const char *name) "%s" +vfio_pci_igd_lpc_bridge_enabled(const char *name) "%s" + # common.c vfio_region_write(const char *name, int index, uint64_t addr, uint64_t data, unsigned size) " (%s:region%d+0x%"PRIx64", 0x%"PRIx64 ", %d)" vfio_region_read(char *name, int index, uint64_t addr, unsigned size, uint64_t data) " (%s:region%d+0x%"PRIx64", %d) = 0x%"PRIx64 diff --git a/hw/virtio/trace-events b/hw/virtio/trace-events index 045e89cae6..845200bf10 100644 --- a/hw/virtio/trace-events +++ b/hw/virtio/trace-events @@ -55,7 +55,7 @@ virtio_mmio_guest_page(uint64_t size, int shift) "guest page size 0x%" PRIx64 " virtio_mmio_queue_write(uint64_t value, int max_size) "mmio_queue write 0x%" PRIx64 " max %d" virtio_mmio_setting_irq(int level) "virtio_mmio setting IRQ %d" -# hw/virtio/virtio-iommu.c +# virtio-iommu.c virtio_iommu_device_reset(void) "reset!" virtio_iommu_get_features(uint64_t features) "device supports features=0x%"PRIx64 virtio_iommu_device_status(uint8_t status) "driver status = %d" diff --git a/hw/virtio/vhost-scsi-pci.c b/hw/virtio/vhost-scsi-pci.c index a6bb0dc60d..cb71a294fa 100644 --- a/hw/virtio/vhost-scsi-pci.c +++ b/hw/virtio/vhost-scsi-pci.c @@ -22,6 +22,7 @@ #include "qapi/error.h" #include "qemu/module.h" #include "virtio-pci.h" +#include "qom/object.h" typedef struct VHostSCSIPCI VHostSCSIPCI; @@ -29,8 +30,8 @@ typedef struct VHostSCSIPCI VHostSCSIPCI; * vhost-scsi-pci: This extends VirtioPCIProxy. */ #define TYPE_VHOST_SCSI_PCI "vhost-scsi-pci-base" -#define VHOST_SCSI_PCI(obj) \ - OBJECT_CHECK(VHostSCSIPCI, (obj), TYPE_VHOST_SCSI_PCI) +DECLARE_INSTANCE_CHECKER(VHostSCSIPCI, VHOST_SCSI_PCI, + TYPE_VHOST_SCSI_PCI) struct VHostSCSIPCI { VirtIOPCIProxy parent_obj; diff --git a/hw/virtio/vhost-user-blk-pci.c b/hw/virtio/vhost-user-blk-pci.c index a62a71e067..33b404d8a2 100644 --- a/hw/virtio/vhost-user-blk-pci.c +++ b/hw/virtio/vhost-user-blk-pci.c @@ -27,6 +27,7 @@ #include "qemu/error-report.h" #include "qemu/module.h" #include "virtio-pci.h" +#include "qom/object.h" typedef struct VHostUserBlkPCI VHostUserBlkPCI; @@ -34,8 +35,8 @@ typedef struct VHostUserBlkPCI VHostUserBlkPCI; * vhost-user-blk-pci: This extends VirtioPCIProxy. */ #define TYPE_VHOST_USER_BLK_PCI "vhost-user-blk-pci-base" -#define VHOST_USER_BLK_PCI(obj) \ - OBJECT_CHECK(VHostUserBlkPCI, (obj), TYPE_VHOST_USER_BLK_PCI) +DECLARE_INSTANCE_CHECKER(VHostUserBlkPCI, VHOST_USER_BLK_PCI, + TYPE_VHOST_USER_BLK_PCI) struct VHostUserBlkPCI { VirtIOPCIProxy parent_obj; diff --git a/hw/virtio/vhost-user-fs-pci.c b/hw/virtio/vhost-user-fs-pci.c index e11c889d82..8bb389bd28 100644 --- a/hw/virtio/vhost-user-fs-pci.c +++ b/hw/virtio/vhost-user-fs-pci.c @@ -15,6 +15,7 @@ #include "hw/qdev-properties.h" #include "hw/virtio/vhost-user-fs.h" #include "virtio-pci.h" +#include "qom/object.h" struct VHostUserFSPCI { VirtIOPCIProxy parent_obj; @@ -25,8 +26,8 @@ typedef struct VHostUserFSPCI VHostUserFSPCI; #define TYPE_VHOST_USER_FS_PCI "vhost-user-fs-pci-base" -#define VHOST_USER_FS_PCI(obj) \ - OBJECT_CHECK(VHostUserFSPCI, (obj), TYPE_VHOST_USER_FS_PCI) +DECLARE_INSTANCE_CHECKER(VHostUserFSPCI, VHOST_USER_FS_PCI, + TYPE_VHOST_USER_FS_PCI) static Property vhost_user_fs_pci_properties[] = { DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, diff --git a/hw/virtio/vhost-user-input-pci.c b/hw/virtio/vhost-user-input-pci.c index 0a50015599..c9d3e9113a 100644 --- a/hw/virtio/vhost-user-input-pci.c +++ b/hw/virtio/vhost-user-input-pci.c @@ -10,13 +10,14 @@ #include "qapi/error.h" #include "qemu/error-report.h" #include "virtio-pci.h" +#include "qom/object.h" typedef struct VHostUserInputPCI VHostUserInputPCI; #define TYPE_VHOST_USER_INPUT_PCI "vhost-user-input-pci" -#define VHOST_USER_INPUT_PCI(obj) \ - OBJECT_CHECK(VHostUserInputPCI, (obj), TYPE_VHOST_USER_INPUT_PCI) +DECLARE_INSTANCE_CHECKER(VHostUserInputPCI, VHOST_USER_INPUT_PCI, + TYPE_VHOST_USER_INPUT_PCI) struct VHostUserInputPCI { VirtIOPCIProxy parent_obj; diff --git a/hw/virtio/vhost-user-scsi-pci.c b/hw/virtio/vhost-user-scsi-pci.c index 25e97ca54e..d5343412a1 100644 --- a/hw/virtio/vhost-user-scsi-pci.c +++ b/hw/virtio/vhost-user-scsi-pci.c @@ -31,12 +31,13 @@ #include "hw/loader.h" #include "sysemu/kvm.h" #include "virtio-pci.h" +#include "qom/object.h" typedef struct VHostUserSCSIPCI VHostUserSCSIPCI; #define TYPE_VHOST_USER_SCSI_PCI "vhost-user-scsi-pci-base" -#define VHOST_USER_SCSI_PCI(obj) \ - OBJECT_CHECK(VHostUserSCSIPCI, (obj), TYPE_VHOST_USER_SCSI_PCI) +DECLARE_INSTANCE_CHECKER(VHostUserSCSIPCI, VHOST_USER_SCSI_PCI, + TYPE_VHOST_USER_SCSI_PCI) struct VHostUserSCSIPCI { VirtIOPCIProxy parent_obj; diff --git a/hw/virtio/vhost-user-vsock-pci.c b/hw/virtio/vhost-user-vsock-pci.c index f4cf95873d..763f89984e 100644 --- a/hw/virtio/vhost-user-vsock-pci.c +++ b/hw/virtio/vhost-user-vsock-pci.c @@ -13,6 +13,7 @@ #include "virtio-pci.h" #include "hw/qdev-properties.h" #include "hw/virtio/vhost-user-vsock.h" +#include "qom/object.h" typedef struct VHostUserVSockPCI VHostUserVSockPCI; @@ -20,8 +21,8 @@ typedef struct VHostUserVSockPCI VHostUserVSockPCI; * vhost-user-vsock-pci: This extends VirtioPCIProxy. */ #define TYPE_VHOST_USER_VSOCK_PCI "vhost-user-vsock-pci-base" -#define VHOST_USER_VSOCK_PCI(obj) \ - OBJECT_CHECK(VHostUserVSockPCI, (obj), TYPE_VHOST_USER_VSOCK_PCI) +DECLARE_INSTANCE_CHECKER(VHostUserVSockPCI, VHOST_USER_VSOCK_PCI, + TYPE_VHOST_USER_VSOCK_PCI) struct VHostUserVSockPCI { VirtIOPCIProxy parent_obj; diff --git a/hw/virtio/vhost-vsock-pci.c b/hw/virtio/vhost-vsock-pci.c index a815278e69..e56067b427 100644 --- a/hw/virtio/vhost-vsock-pci.c +++ b/hw/virtio/vhost-vsock-pci.c @@ -17,6 +17,7 @@ #include "hw/qdev-properties.h" #include "hw/virtio/vhost-vsock.h" #include "qemu/module.h" +#include "qom/object.h" typedef struct VHostVSockPCI VHostVSockPCI; @@ -24,8 +25,8 @@ typedef struct VHostVSockPCI VHostVSockPCI; * vhost-vsock-pci: This extends VirtioPCIProxy. */ #define TYPE_VHOST_VSOCK_PCI "vhost-vsock-pci-base" -#define VHOST_VSOCK_PCI(obj) \ - OBJECT_CHECK(VHostVSockPCI, (obj), TYPE_VHOST_VSOCK_PCI) +DECLARE_INSTANCE_CHECKER(VHostVSockPCI, VHOST_VSOCK_PCI, + TYPE_VHOST_VSOCK_PCI) struct VHostVSockPCI { VirtIOPCIProxy parent_obj; diff --git a/hw/virtio/virtio-9p-pci.c b/hw/virtio/virtio-9p-pci.c index cbcb062faa..e07adcd9ea 100644 --- a/hw/virtio/virtio-9p-pci.c +++ b/hw/virtio/virtio-9p-pci.c @@ -19,19 +19,21 @@ #include "hw/9pfs/virtio-9p.h" #include "hw/qdev-properties.h" #include "qemu/module.h" +#include "qom/object.h" /* * virtio-9p-pci: This extends VirtioPCIProxy. */ #define TYPE_VIRTIO_9P_PCI "virtio-9p-pci-base" -#define VIRTIO_9P_PCI(obj) \ - OBJECT_CHECK(V9fsPCIState, (obj), TYPE_VIRTIO_9P_PCI) +typedef struct V9fsPCIState V9fsPCIState; +DECLARE_INSTANCE_CHECKER(V9fsPCIState, VIRTIO_9P_PCI, + TYPE_VIRTIO_9P_PCI) -typedef struct V9fsPCIState { +struct V9fsPCIState { VirtIOPCIProxy parent_obj; V9fsVirtioState vdev; -} V9fsPCIState; +}; static void virtio_9p_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) { diff --git a/hw/virtio/virtio-balloon-pci.c b/hw/virtio/virtio-balloon-pci.c index 5adc4e5819..a2c5cc7207 100644 --- a/hw/virtio/virtio-balloon-pci.c +++ b/hw/virtio/virtio-balloon-pci.c @@ -19,6 +19,7 @@ #include "hw/virtio/virtio-balloon.h" #include "qapi/error.h" #include "qemu/module.h" +#include "qom/object.h" typedef struct VirtIOBalloonPCI VirtIOBalloonPCI; @@ -26,8 +27,8 @@ typedef struct VirtIOBalloonPCI VirtIOBalloonPCI; * virtio-balloon-pci: This extends VirtioPCIProxy. */ #define TYPE_VIRTIO_BALLOON_PCI "virtio-balloon-pci-base" -#define VIRTIO_BALLOON_PCI(obj) \ - OBJECT_CHECK(VirtIOBalloonPCI, (obj), TYPE_VIRTIO_BALLOON_PCI) +DECLARE_INSTANCE_CHECKER(VirtIOBalloonPCI, VIRTIO_BALLOON_PCI, + TYPE_VIRTIO_BALLOON_PCI) struct VirtIOBalloonPCI { VirtIOPCIProxy parent_obj; diff --git a/hw/virtio/virtio-blk-pci.c b/hw/virtio/virtio-blk-pci.c index 37c6e0aeb4..9d5795810c 100644 --- a/hw/virtio/virtio-blk-pci.c +++ b/hw/virtio/virtio-blk-pci.c @@ -22,6 +22,7 @@ #include "virtio-pci.h" #include "qapi/error.h" #include "qemu/module.h" +#include "qom/object.h" typedef struct VirtIOBlkPCI VirtIOBlkPCI; @@ -29,8 +30,8 @@ typedef struct VirtIOBlkPCI VirtIOBlkPCI; * virtio-blk-pci: This extends VirtioPCIProxy. */ #define TYPE_VIRTIO_BLK_PCI "virtio-blk-pci-base" -#define VIRTIO_BLK_PCI(obj) \ - OBJECT_CHECK(VirtIOBlkPCI, (obj), TYPE_VIRTIO_BLK_PCI) +DECLARE_INSTANCE_CHECKER(VirtIOBlkPCI, VIRTIO_BLK_PCI, + TYPE_VIRTIO_BLK_PCI) struct VirtIOBlkPCI { VirtIOPCIProxy parent_obj; diff --git a/hw/virtio/virtio-crypto-pci.c b/hw/virtio/virtio-crypto-pci.c index 198f86e08c..0783dc2f7e 100644 --- a/hw/virtio/virtio-crypto-pci.c +++ b/hw/virtio/virtio-crypto-pci.c @@ -21,6 +21,7 @@ #include "hw/virtio/virtio-crypto.h" #include "qapi/error.h" #include "qemu/module.h" +#include "qom/object.h" typedef struct VirtIOCryptoPCI VirtIOCryptoPCI; @@ -28,8 +29,8 @@ typedef struct VirtIOCryptoPCI VirtIOCryptoPCI; * virtio-crypto-pci: This extends VirtioPCIProxy. */ #define TYPE_VIRTIO_CRYPTO_PCI "virtio-crypto-pci" -#define VIRTIO_CRYPTO_PCI(obj) \ - OBJECT_CHECK(VirtIOCryptoPCI, (obj), TYPE_VIRTIO_CRYPTO_PCI) +DECLARE_INSTANCE_CHECKER(VirtIOCryptoPCI, VIRTIO_CRYPTO_PCI, + TYPE_VIRTIO_CRYPTO_PCI) struct VirtIOCryptoPCI { VirtIOPCIProxy parent_obj; diff --git a/hw/virtio/virtio-input-host-pci.c b/hw/virtio/virtio-input-host-pci.c index a82eb5d914..0ac360de4f 100644 --- a/hw/virtio/virtio-input-host-pci.c +++ b/hw/virtio/virtio-input-host-pci.c @@ -11,12 +11,13 @@ #include "virtio-pci.h" #include "hw/virtio/virtio-input.h" #include "qemu/module.h" +#include "qom/object.h" typedef struct VirtIOInputHostPCI VirtIOInputHostPCI; #define TYPE_VIRTIO_INPUT_HOST_PCI "virtio-input-host-pci" -#define VIRTIO_INPUT_HOST_PCI(obj) \ - OBJECT_CHECK(VirtIOInputHostPCI, (obj), TYPE_VIRTIO_INPUT_HOST_PCI) +DECLARE_INSTANCE_CHECKER(VirtIOInputHostPCI, VIRTIO_INPUT_HOST_PCI, + TYPE_VIRTIO_INPUT_HOST_PCI) struct VirtIOInputHostPCI { VirtIOPCIProxy parent_obj; diff --git a/hw/virtio/virtio-input-pci.c b/hw/virtio/virtio-input-pci.c index 74651a42ea..85acd3d2eb 100644 --- a/hw/virtio/virtio-input-pci.c +++ b/hw/virtio/virtio-input-pci.c @@ -12,6 +12,7 @@ #include "hw/qdev-properties.h" #include "hw/virtio/virtio-input.h" #include "qemu/module.h" +#include "qom/object.h" typedef struct VirtIOInputPCI VirtIOInputPCI; typedef struct VirtIOInputHIDPCI VirtIOInputHIDPCI; @@ -19,8 +20,8 @@ typedef struct VirtIOInputHIDPCI VirtIOInputHIDPCI; /* * virtio-input-pci: This extends VirtioPCIProxy. */ -#define VIRTIO_INPUT_PCI(obj) \ - OBJECT_CHECK(VirtIOInputPCI, (obj), TYPE_VIRTIO_INPUT_PCI) +DECLARE_INSTANCE_CHECKER(VirtIOInputPCI, VIRTIO_INPUT_PCI, + TYPE_VIRTIO_INPUT_PCI) struct VirtIOInputPCI { VirtIOPCIProxy parent_obj; @@ -31,8 +32,8 @@ struct VirtIOInputPCI { #define TYPE_VIRTIO_KEYBOARD_PCI "virtio-keyboard-pci" #define TYPE_VIRTIO_MOUSE_PCI "virtio-mouse-pci" #define TYPE_VIRTIO_TABLET_PCI "virtio-tablet-pci" -#define VIRTIO_INPUT_HID_PCI(obj) \ - OBJECT_CHECK(VirtIOInputHIDPCI, (obj), TYPE_VIRTIO_INPUT_HID_PCI) +DECLARE_INSTANCE_CHECKER(VirtIOInputHIDPCI, VIRTIO_INPUT_HID_PCI, + TYPE_VIRTIO_INPUT_HID_PCI) struct VirtIOInputHIDPCI { VirtIOPCIProxy parent_obj; diff --git a/hw/virtio/virtio-iommu-pci.c b/hw/virtio/virtio-iommu-pci.c index ba62d60a0a..76540e57b1 100644 --- a/hw/virtio/virtio-iommu-pci.c +++ b/hw/virtio/virtio-iommu-pci.c @@ -16,6 +16,7 @@ #include "hw/qdev-properties.h" #include "qapi/error.h" #include "hw/boards.h" +#include "qom/object.h" typedef struct VirtIOIOMMUPCI VirtIOIOMMUPCI; @@ -23,8 +24,8 @@ typedef struct VirtIOIOMMUPCI VirtIOIOMMUPCI; * virtio-iommu-pci: This extends VirtioPCIProxy. * */ -#define VIRTIO_IOMMU_PCI(obj) \ - OBJECT_CHECK(VirtIOIOMMUPCI, (obj), TYPE_VIRTIO_IOMMU_PCI) +DECLARE_INSTANCE_CHECKER(VirtIOIOMMUPCI, VIRTIO_IOMMU_PCI, + TYPE_VIRTIO_IOMMU_PCI) struct VirtIOIOMMUPCI { VirtIOPCIProxy parent_obj; diff --git a/hw/virtio/virtio-mem-pci.h b/hw/virtio/virtio-mem-pci.h index b51a28b275..e636e1a48d 100644 --- a/hw/virtio/virtio-mem-pci.h +++ b/hw/virtio/virtio-mem-pci.h @@ -15,6 +15,7 @@ #include "hw/virtio/virtio-pci.h" #include "hw/virtio/virtio-mem.h" +#include "qom/object.h" typedef struct VirtIOMEMPCI VirtIOMEMPCI; @@ -22,8 +23,8 @@ typedef struct VirtIOMEMPCI VirtIOMEMPCI; * virtio-mem-pci: This extends VirtioPCIProxy. */ #define TYPE_VIRTIO_MEM_PCI "virtio-mem-pci-base" -#define VIRTIO_MEM_PCI(obj) \ - OBJECT_CHECK(VirtIOMEMPCI, (obj), TYPE_VIRTIO_MEM_PCI) +DECLARE_INSTANCE_CHECKER(VirtIOMEMPCI, VIRTIO_MEM_PCI, + TYPE_VIRTIO_MEM_PCI) struct VirtIOMEMPCI { VirtIOPCIProxy parent_obj; diff --git a/hw/virtio/virtio-net-pci.c b/hw/virtio/virtio-net-pci.c index 489b5dbad6..292d13d278 100644 --- a/hw/virtio/virtio-net-pci.c +++ b/hw/virtio/virtio-net-pci.c @@ -22,6 +22,7 @@ #include "virtio-pci.h" #include "qapi/error.h" #include "qemu/module.h" +#include "qom/object.h" typedef struct VirtIONetPCI VirtIONetPCI; @@ -29,8 +30,8 @@ typedef struct VirtIONetPCI VirtIONetPCI; * virtio-net-pci: This extends VirtioPCIProxy. */ #define TYPE_VIRTIO_NET_PCI "virtio-net-pci-base" -#define VIRTIO_NET_PCI(obj) \ - OBJECT_CHECK(VirtIONetPCI, (obj), TYPE_VIRTIO_NET_PCI) +DECLARE_INSTANCE_CHECKER(VirtIONetPCI, VIRTIO_NET_PCI, + TYPE_VIRTIO_NET_PCI) struct VirtIONetPCI { VirtIOPCIProxy parent_obj; diff --git a/hw/virtio/virtio-pci.h b/hw/virtio/virtio-pci.h index 91096f0291..47b6bb4e26 100644 --- a/hw/virtio/virtio-pci.h +++ b/hw/virtio/virtio-pci.h @@ -17,6 +17,7 @@ #include "hw/pci/msi.h" #include "hw/virtio/virtio-bus.h" +#include "qom/object.h" typedef struct VirtIOPCIProxy VirtIOPCIProxy; @@ -26,12 +27,8 @@ typedef struct VirtioBusState VirtioPCIBusState; typedef struct VirtioBusClass VirtioPCIBusClass; #define TYPE_VIRTIO_PCI_BUS "virtio-pci-bus" -#define VIRTIO_PCI_BUS(obj) \ - OBJECT_CHECK(VirtioPCIBusState, (obj), TYPE_VIRTIO_PCI_BUS) -#define VIRTIO_PCI_BUS_GET_CLASS(obj) \ - OBJECT_GET_CLASS(VirtioPCIBusClass, obj, TYPE_VIRTIO_PCI_BUS) -#define VIRTIO_PCI_BUS_CLASS(klass) \ - OBJECT_CLASS_CHECK(VirtioPCIBusClass, klass, TYPE_VIRTIO_PCI_BUS) +DECLARE_OBJ_CHECKERS(VirtioPCIBusState, VirtioPCIBusClass, + VIRTIO_PCI_BUS, TYPE_VIRTIO_PCI_BUS) enum { VIRTIO_PCI_FLAG_BUS_MASTER_BUG_MIGRATION_BIT, @@ -94,18 +91,15 @@ typedef struct { * virtio-pci: This is the PCIDevice which has a virtio-pci-bus. */ #define TYPE_VIRTIO_PCI "virtio-pci" -#define VIRTIO_PCI_GET_CLASS(obj) \ - OBJECT_GET_CLASS(VirtioPCIClass, obj, TYPE_VIRTIO_PCI) -#define VIRTIO_PCI_CLASS(klass) \ - OBJECT_CLASS_CHECK(VirtioPCIClass, klass, TYPE_VIRTIO_PCI) -#define VIRTIO_PCI(obj) \ - OBJECT_CHECK(VirtIOPCIProxy, (obj), TYPE_VIRTIO_PCI) - -typedef struct VirtioPCIClass { +typedef struct VirtioPCIClass VirtioPCIClass; +DECLARE_OBJ_CHECKERS(VirtIOPCIProxy, VirtioPCIClass, + VIRTIO_PCI, TYPE_VIRTIO_PCI) + +struct VirtioPCIClass { PCIDeviceClass parent_class; DeviceRealize parent_dc_realize; void (*realize)(VirtIOPCIProxy *vpci_dev, Error **errp); -} VirtioPCIClass; +}; typedef struct VirtIOPCIRegion { MemoryRegion mr; diff --git a/hw/virtio/virtio-pmem-pci.h b/hw/virtio/virtio-pmem-pci.h index 616abef093..63cfe727f7 100644 --- a/hw/virtio/virtio-pmem-pci.h +++ b/hw/virtio/virtio-pmem-pci.h @@ -16,6 +16,7 @@ #include "hw/virtio/virtio-pci.h" #include "hw/virtio/virtio-pmem.h" +#include "qom/object.h" typedef struct VirtIOPMEMPCI VirtIOPMEMPCI; @@ -23,8 +24,8 @@ typedef struct VirtIOPMEMPCI VirtIOPMEMPCI; * virtio-pmem-pci: This extends VirtioPCIProxy. */ #define TYPE_VIRTIO_PMEM_PCI "virtio-pmem-pci-base" -#define VIRTIO_PMEM_PCI(obj) \ - OBJECT_CHECK(VirtIOPMEMPCI, (obj), TYPE_VIRTIO_PMEM_PCI) +DECLARE_INSTANCE_CHECKER(VirtIOPMEMPCI, VIRTIO_PMEM_PCI, + TYPE_VIRTIO_PMEM_PCI) struct VirtIOPMEMPCI { VirtIOPCIProxy parent_obj; diff --git a/hw/virtio/virtio-rng-pci.c b/hw/virtio/virtio-rng-pci.c index 8afbb4c209..c1f916268b 100644 --- a/hw/virtio/virtio-rng-pci.c +++ b/hw/virtio/virtio-rng-pci.c @@ -15,6 +15,7 @@ #include "hw/virtio/virtio-rng.h" #include "qapi/error.h" #include "qemu/module.h" +#include "qom/object.h" typedef struct VirtIORngPCI VirtIORngPCI; @@ -22,8 +23,8 @@ typedef struct VirtIORngPCI VirtIORngPCI; * virtio-rng-pci: This extends VirtioPCIProxy. */ #define TYPE_VIRTIO_RNG_PCI "virtio-rng-pci-base" -#define VIRTIO_RNG_PCI(obj) \ - OBJECT_CHECK(VirtIORngPCI, (obj), TYPE_VIRTIO_RNG_PCI) +DECLARE_INSTANCE_CHECKER(VirtIORngPCI, VIRTIO_RNG_PCI, + TYPE_VIRTIO_RNG_PCI) struct VirtIORngPCI { VirtIOPCIProxy parent_obj; diff --git a/hw/virtio/virtio-scsi-pci.c b/hw/virtio/virtio-scsi-pci.c index fa4b3bfb50..97fab74236 100644 --- a/hw/virtio/virtio-scsi-pci.c +++ b/hw/virtio/virtio-scsi-pci.c @@ -19,6 +19,7 @@ #include "hw/virtio/virtio-scsi.h" #include "qemu/module.h" #include "virtio-pci.h" +#include "qom/object.h" typedef struct VirtIOSCSIPCI VirtIOSCSIPCI; @@ -26,8 +27,8 @@ typedef struct VirtIOSCSIPCI VirtIOSCSIPCI; * virtio-scsi-pci: This extends VirtioPCIProxy. */ #define TYPE_VIRTIO_SCSI_PCI "virtio-scsi-pci-base" -#define VIRTIO_SCSI_PCI(obj) \ - OBJECT_CHECK(VirtIOSCSIPCI, (obj), TYPE_VIRTIO_SCSI_PCI) +DECLARE_INSTANCE_CHECKER(VirtIOSCSIPCI, VIRTIO_SCSI_PCI, + TYPE_VIRTIO_SCSI_PCI) struct VirtIOSCSIPCI { VirtIOPCIProxy parent_obj; diff --git a/hw/virtio/virtio-serial-pci.c b/hw/virtio/virtio-serial-pci.c index 95d25d54da..35bcd961c9 100644 --- a/hw/virtio/virtio-serial-pci.c +++ b/hw/virtio/virtio-serial-pci.c @@ -21,6 +21,7 @@ #include "hw/virtio/virtio-serial.h" #include "qemu/module.h" #include "virtio-pci.h" +#include "qom/object.h" typedef struct VirtIOSerialPCI VirtIOSerialPCI; @@ -28,8 +29,8 @@ typedef struct VirtIOSerialPCI VirtIOSerialPCI; * virtio-serial-pci: This extends VirtioPCIProxy. */ #define TYPE_VIRTIO_SERIAL_PCI "virtio-serial-pci-base" -#define VIRTIO_SERIAL_PCI(obj) \ - OBJECT_CHECK(VirtIOSerialPCI, (obj), TYPE_VIRTIO_SERIAL_PCI) +DECLARE_INSTANCE_CHECKER(VirtIOSerialPCI, VIRTIO_SERIAL_PCI, + TYPE_VIRTIO_SERIAL_PCI) struct VirtIOSerialPCI { VirtIOPCIProxy parent_obj; diff --git a/hw/watchdog/wdt_i6300esb.c b/hw/watchdog/wdt_i6300esb.c index 370cf92e85..4f64899a56 100644 --- a/hw/watchdog/wdt_i6300esb.c +++ b/hw/watchdog/wdt_i6300esb.c @@ -26,6 +26,7 @@ #include "sysemu/watchdog.h" #include "hw/pci/pci.h" #include "migration/vmstate.h" +#include "qom/object.h" /*#define I6300ESB_DEBUG 1*/ @@ -104,8 +105,8 @@ struct I6300State { typedef struct I6300State I6300State; #define TYPE_WATCHDOG_I6300ESB_DEVICE "i6300esb" -#define WATCHDOG_I6300ESB_DEVICE(obj) \ - OBJECT_CHECK(I6300State, (obj), TYPE_WATCHDOG_I6300ESB_DEVICE) +DECLARE_INSTANCE_CHECKER(I6300State, WATCHDOG_I6300ESB_DEVICE, + TYPE_WATCHDOG_I6300ESB_DEVICE) /* This function is called when the watchdog has either been enabled * (hence it starts counting down) or has been keep-alived. diff --git a/hw/watchdog/wdt_ib700.c b/hw/watchdog/wdt_ib700.c index 985944a84a..177aaa503f 100644 --- a/hw/watchdog/wdt_ib700.c +++ b/hw/watchdog/wdt_ib700.c @@ -25,6 +25,7 @@ #include "sysemu/watchdog.h" #include "hw/isa/isa.h" #include "migration/vmstate.h" +#include "qom/object.h" /*#define IB700_DEBUG 1*/ @@ -36,15 +37,17 @@ #endif #define TYPE_IB700 "ib700" -#define IB700(obj) OBJECT_CHECK(IB700State, (obj), TYPE_IB700) +typedef struct IB700state IB700State; +DECLARE_INSTANCE_CHECKER(IB700State, IB700, + TYPE_IB700) -typedef struct IB700state { +struct IB700state { ISADevice parent_obj; QEMUTimer *timer; PortioList port_list; -} IB700State; +}; /* This is the timer. We use a global here because the watchdog * code ensures there is only one watchdog (it is located at a fixed, diff --git a/hw/xen/xen_pt.h b/hw/xen/xen_pt.h index 6e9cec95f3..f46971eac6 100644 --- a/hw/xen/xen_pt.h +++ b/hw/xen/xen_pt.h @@ -4,6 +4,7 @@ #include "hw/xen/xen_common.h" #include "hw/pci/pci.h" #include "xen-host-pci-device.h" +#include "qom/object.h" bool xen_igd_gfx_pt_enabled(void); void xen_igd_gfx_pt_set(bool value, Error **errp); @@ -39,8 +40,8 @@ typedef struct XenPTReg XenPTReg; typedef struct XenPCIPassthroughState XenPCIPassthroughState; #define TYPE_XEN_PT_DEVICE "xen-pci-passthrough" -#define XEN_PT_DEVICE(obj) \ - OBJECT_CHECK(XenPCIPassthroughState, (obj), TYPE_XEN_PT_DEVICE) +DECLARE_INSTANCE_CHECKER(XenPCIPassthroughState, XEN_PT_DEVICE, + TYPE_XEN_PT_DEVICE) uint32_t igd_read_opregion(XenPCIPassthroughState *s); void igd_write_opregion(XenPCIPassthroughState *s, uint32_t val); |