diff options
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/kvmvapic.c | 20 | ||||
| -rw-r--r-- | hw/m48t59.c | 7 | ||||
| -rw-r--r-- | hw/nvram.h | 1 | ||||
| -rw-r--r-- | hw/qxl.c | 36 | ||||
| -rw-r--r-- | hw/sun4c_intctl.c | 23 | ||||
| -rw-r--r-- | hw/sun4m.h | 4 | ||||
| -rw-r--r-- | hw/vmware_vga.c | 30 |
7 files changed, 69 insertions, 52 deletions
diff --git a/hw/kvmvapic.c b/hw/kvmvapic.c index dc111ee8e6..e04c4011d7 100644 --- a/hw/kvmvapic.c +++ b/hw/kvmvapic.c @@ -384,10 +384,13 @@ static void patch_call(VAPICROMState *s, CPUX86State *env, target_ulong ip, static void patch_instruction(VAPICROMState *s, CPUX86State *env, target_ulong ip) { - hwaddr paddr; VAPICHandlers *handlers; uint8_t opcode[2]; uint32_t imm32; + TranslationBlock *current_tb; + target_ulong current_pc = 0; + target_ulong current_cs_base = 0; + int current_flags = 0; if (smp_cpus == 1) { handlers = &s->rom_state.up; @@ -395,6 +398,13 @@ static void patch_instruction(VAPICROMState *s, CPUX86State *env, target_ulong i handlers = &s->rom_state.mp; } + if (!kvm_enabled()) { + current_tb = tb_find_pc(env->mem_io_pc); + cpu_restore_state(current_tb, env, env->mem_io_pc); + cpu_get_tb_cpu_state(env, ¤t_pc, ¤t_cs_base, + ¤t_flags); + } + pause_all_vcpus(); cpu_memory_rw_debug(env, ip, opcode, sizeof(opcode), 0); @@ -430,9 +440,11 @@ static void patch_instruction(VAPICROMState *s, CPUX86State *env, target_ulong i resume_all_vcpus(); - paddr = cpu_get_phys_page_debug(env, ip); - paddr += ip & ~TARGET_PAGE_MASK; - tb_invalidate_phys_page_range(paddr, paddr + 1, 1); + if (!kvm_enabled()) { + env->current_tb = NULL; + tb_gen_code(env, current_pc, current_cs_base, current_flags, 1); + cpu_resume_from_signal(env, NULL); + } } void vapic_report_tpr_access(DeviceState *dev, void *cpu, target_ulong ip, diff --git a/hw/m48t59.c b/hw/m48t59.c index 9e8e692669..7da7e7c822 100644 --- a/hw/m48t59.c +++ b/hw/m48t59.c @@ -468,13 +468,6 @@ uint32_t m48t59_read (void *opaque, uint32_t addr) return retval; } -void m48t59_set_addr (void *opaque, uint32_t addr) -{ - M48t59State *NVRAM = opaque; - - NVRAM->addr = addr; -} - void m48t59_toggle_lock (void *opaque, int lock) { M48t59State *NVRAM = opaque; diff --git a/hw/nvram.h b/hw/nvram.h index 72363ced42..59337faaad 100644 --- a/hw/nvram.h +++ b/hw/nvram.h @@ -30,6 +30,5 @@ M48t59State *m48t59_init_isa(ISABus *bus, uint32_t io_base, uint16_t size, int type); M48t59State *m48t59_init(qemu_irq IRQ, hwaddr mem_base, uint32_t io_base, uint16_t size, int type); -void m48t59_set_addr (void *opaque, uint32_t addr); #endif /* !NVRAM_H */ diff --git a/hw/qxl.c b/hw/qxl.c index 1f56fcd169..1bc2d32aa8 100644 --- a/hw/qxl.c +++ b/hw/qxl.c @@ -293,6 +293,10 @@ void qxl_spice_reset_cursor(PCIQXLDevice *qxl) qemu_mutex_lock(&qxl->track_lock); qxl->guest_cursor = 0; qemu_mutex_unlock(&qxl->track_lock); + if (qxl->ssd.cursor) { + cursor_put(qxl->ssd.cursor); + } + qxl->ssd.cursor = cursor_builtin_hidden(); } @@ -447,6 +451,12 @@ static int qxl_track_command(PCIQXLDevice *qxl, struct QXLCommandExt *ext) qxl->ssd.num_surfaces); return 1; } + if (cmd->type == QXL_SURFACE_CMD_CREATE && + (cmd->u.surface_create.stride & 0x03) != 0) { + qxl_set_guest_bug(qxl, "QXL_CMD_SURFACE stride = %d %% 4 != 0\n", + cmd->u.surface_create.stride); + return 1; + } qemu_mutex_lock(&qxl->track_lock); if (cmd->type == QXL_SURFACE_CMD_CREATE) { qxl->guest_surfaces.cmds[id] = ext->cmd.data; @@ -1059,7 +1069,7 @@ static void qxl_enter_vga_mode(PCIQXLDevice *d) trace_qxl_enter_vga_mode(d->id); qemu_spice_create_host_primary(&d->ssd); d->mode = QXL_MODE_VGA; - memset(&d->ssd.dirty, 0, sizeof(d->ssd.dirty)); + dpy_gfx_resize(d->ssd.ds); vga_dirty_log_start(&d->vga); } @@ -1357,6 +1367,12 @@ static void qxl_create_guest_primary(PCIQXLDevice *qxl, int loadvm, trace_qxl_create_guest_primary_rest(qxl->id, sc->stride, sc->type, sc->flags); + if ((surface.stride & 0x3) != 0) { + qxl_set_guest_bug(qxl, "primary surface stride = %d %% 4 != 0", + surface.stride); + return; + } + surface.mouse_mode = true; surface.group_id = MEMSLOT_GROUP_GUEST; if (loadvm) { @@ -1689,7 +1705,13 @@ static void qxl_send_events(PCIQXLDevice *d, uint32_t events) uint32_t le_events = cpu_to_le32(events); trace_qxl_send_events(d->id, events); - assert(qemu_spice_display_is_running(&d->ssd)); + if (!qemu_spice_display_is_running(&d->ssd)) { + /* spice-server tracks guest running state and should not do this */ + fprintf(stderr, "%s: spice-server bug: guest stopped, ignoring\n", + __func__); + trace_qxl_send_events_vm_stopped(d->id, events); + return; + } old_pending = __sync_fetch_and_or(&d->ram->int_pending, le_events); if ((old_pending & le_events) == le_events) { return; @@ -2027,6 +2049,7 @@ static int qxl_init_primary(PCIDevice *dev) PCIQXLDevice *qxl = DO_UPCAST(PCIQXLDevice, pci, dev); VGACommonState *vga = &qxl->vga; PortioList *qxl_vga_port_list = g_new(PortioList, 1); + int rc; qxl->id = 0; qxl_init_ramsize(qxl); @@ -2041,9 +2064,14 @@ static int qxl_init_primary(PCIDevice *dev) qemu_spice_display_init_common(&qxl->ssd, vga->ds); qxl0 = qxl; - register_displaychangelistener(vga->ds, &display_listener); - return qxl_init_common(qxl); + rc = qxl_init_common(qxl); + if (rc != 0) { + return rc; + } + + register_displaychangelistener(vga->ds, &display_listener); + return rc; } static int qxl_init_secondary(PCIDevice *dev) diff --git a/hw/sun4c_intctl.c b/hw/sun4c_intctl.c index 8cd70ab64c..702e9f5444 100644 --- a/hw/sun4c_intctl.c +++ b/hw/sun4c_intctl.c @@ -94,29 +94,6 @@ static const MemoryRegionOps sun4c_intctl_mem_ops = { }, }; -void sun4c_pic_info(Monitor *mon, void *opaque) -{ - Sun4c_INTCTLState *s = opaque; - - monitor_printf(mon, "master: pending 0x%2.2x, enabled 0x%2.2x\n", - s->pending, s->reg); -} - -void sun4c_irq_info(Monitor *mon, void *opaque) -{ -#ifndef DEBUG_IRQ_COUNT - monitor_printf(mon, "irq statistic code not compiled.\n"); -#else - Sun4c_INTCTLState *s = opaque; - int64_t count; - - monitor_printf(mon, "IRQ statistics:\n"); - count = s->irq_count; - if (count > 0) - monitor_printf(mon, " %" PRId64 "\n", count); -#endif -} - static const uint32_t intbit_to_level[] = { 0, 1, 4, 6, 8, 10, 0, 14, }; static void sun4c_check_interrupts(void *opaque) diff --git a/hw/sun4m.h b/hw/sun4m.h index a8c3133703..47eb945f07 100644 --- a/hw/sun4m.h +++ b/hw/sun4m.h @@ -26,10 +26,6 @@ static inline void sparc_iommu_memory_write(void *opaque, void slavio_pic_info(Monitor *mon, DeviceState *dev); void slavio_irq_info(Monitor *mon, DeviceState *dev); -/* sun4c_intctl.c */ -void sun4c_pic_info(Monitor *mon, void *opaque); -void sun4c_irq_info(Monitor *mon, void *opaque); - /* sun4m.c */ void sun4m_pic_info(Monitor *mon); void sun4m_irq_info(Monitor *mon); diff --git a/hw/vmware_vga.c b/hw/vmware_vga.c index 7c766fb3da..834588daf6 100644 --- a/hw/vmware_vga.c +++ b/hw/vmware_vga.c @@ -39,6 +39,8 @@ struct vmsvga_state_s { VGACommonState vga; int invalidated; + int depth; + int bypp; int enable; int config; struct { @@ -55,6 +57,9 @@ struct vmsvga_state_s { int new_height; uint32_t guest; uint32_t svgaid; + uint32_t wred; + uint32_t wgreen; + uint32_t wblue; int syncing; MemoryRegion fifo_ram; @@ -718,25 +723,25 @@ static uint32_t vmsvga_value_read(void *opaque, uint32_t address) return SVGA_MAX_HEIGHT; case SVGA_REG_DEPTH: - return ds_get_depth(s->vga.ds); + return s->depth; case SVGA_REG_BITS_PER_PIXEL: - return ds_get_bits_per_pixel(s->vga.ds); + return (s->depth + 7) & ~7; case SVGA_REG_PSEUDOCOLOR: return 0x0; case SVGA_REG_RED_MASK: - return ds_get_rmask(s->vga.ds); + return s->wred; case SVGA_REG_GREEN_MASK: - return ds_get_gmask(s->vga.ds); + return s->wgreen; case SVGA_REG_BLUE_MASK: - return ds_get_bmask(s->vga.ds); + return s->wblue; case SVGA_REG_BYTES_PER_LINE: - return ds_get_bytes_per_pixel(s->vga.ds) * s->new_width; + return s->bypp * s->new_width; case SVGA_REG_FB_START: { struct pci_vmsvga_state_s *pci_vmsvga @@ -801,7 +806,7 @@ static uint32_t vmsvga_value_read(void *opaque, uint32_t address) return s->cursor.on; case SVGA_REG_HOST_BITS_PER_PIXEL: - return ds_get_bits_per_pixel(s->vga.ds); + return (s->depth + 7) & ~7; case SVGA_REG_SCRATCH_SIZE: return s->scratch_size; @@ -864,7 +869,7 @@ static void vmsvga_value_write(void *opaque, uint32_t address, uint32_t value) break; case SVGA_REG_BITS_PER_PIXEL: - if (value != ds_get_bits_per_pixel(s->vga.ds)) { + if (value != s->depth) { printf("%s: Bad bits per pixel: %i bits\n", __func__, value); s->config = 0; } @@ -1084,7 +1089,7 @@ static const VMStateDescription vmstate_vmware_vga_internal = { .minimum_version_id_old = 0, .post_load = vmsvga_post_load, .fields = (VMStateField[]) { - VMSTATE_UNUSED(4), /* was depth */ + VMSTATE_INT32_EQUAL(depth, struct vmsvga_state_s), VMSTATE_INT32(enable, struct vmsvga_state_s), VMSTATE_INT32(config, struct vmsvga_state_s), VMSTATE_INT32(cursor.id, struct vmsvga_state_s), @@ -1137,6 +1142,13 @@ static void vmsvga_init(struct vmsvga_state_s *s, vga_common_init(&s->vga); vga_init(&s->vga, address_space, io, true); vmstate_register(NULL, 0, &vmstate_vga_common, &s->vga); + /* Save some values here in case they are changed later. + * This is suspicious and needs more though why it is needed. */ + s->depth = ds_get_bits_per_pixel(s->vga.ds); + s->bypp = ds_get_bytes_per_pixel(s->vga.ds); + s->wred = ds_get_rmask(s->vga.ds); + s->wgreen = ds_get_gmask(s->vga.ds); + s->wblue = ds_get_bmask(s->vga.ds); } static uint64_t vmsvga_io_read(void *opaque, hwaddr addr, unsigned size) |