diff options
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/core/stream.c | 20 | ||||
| -rw-r--r-- | hw/dma/xilinx_axidma.c | 32 | ||||
| -rw-r--r-- | hw/net/xilinx_axienet.c | 20 | ||||
| -rw-r--r-- | hw/ssi/xilinx_spips.c | 2 |
4 files changed, 37 insertions, 37 deletions
diff --git a/hw/core/stream.c b/hw/core/stream.c index a65ad1208d..19477d0f2d 100644 --- a/hw/core/stream.c +++ b/hw/core/stream.c @@ -3,32 +3,32 @@ #include "qemu/module.h" size_t -stream_push(StreamSlave *sink, uint8_t *buf, size_t len, bool eop) +stream_push(StreamSink *sink, uint8_t *buf, size_t len, bool eop) { - StreamSlaveClass *k = STREAM_SLAVE_GET_CLASS(sink); + StreamSinkClass *k = STREAM_SINK_GET_CLASS(sink); return k->push(sink, buf, len, eop); } bool -stream_can_push(StreamSlave *sink, StreamCanPushNotifyFn notify, +stream_can_push(StreamSink *sink, StreamCanPushNotifyFn notify, void *notify_opaque) { - StreamSlaveClass *k = STREAM_SLAVE_GET_CLASS(sink); + StreamSinkClass *k = STREAM_SINK_GET_CLASS(sink); return k->can_push ? k->can_push(sink, notify, notify_opaque) : true; } -static const TypeInfo stream_slave_info = { - .name = TYPE_STREAM_SLAVE, +static const TypeInfo stream_sink_info = { + .name = TYPE_STREAM_SINK, .parent = TYPE_INTERFACE, - .class_size = sizeof(StreamSlaveClass), + .class_size = sizeof(StreamSinkClass), }; -static void stream_slave_register_types(void) +static void stream_sink_register_types(void) { - type_register_static(&stream_slave_info); + type_register_static(&stream_sink_info); } -type_init(stream_slave_register_types) +type_init(stream_sink_register_types) diff --git a/hw/dma/xilinx_axidma.c b/hw/dma/xilinx_axidma.c index 0a7f5acb4b..306da46699 100644 --- a/hw/dma/xilinx_axidma.c +++ b/hw/dma/xilinx_axidma.c @@ -128,8 +128,8 @@ struct XilinxAXIDMA { AddressSpace as; uint32_t freqhz; - StreamSlave *tx_data_dev; - StreamSlave *tx_control_dev; + StreamSink *tx_data_dev; + StreamSink *tx_control_dev; XilinxAXIDMAStreamSlave rx_data_dev; XilinxAXIDMAStreamSlave rx_control_dev; @@ -261,8 +261,8 @@ static void stream_complete(struct Stream *s) ptimer_transaction_commit(s->ptimer); } -static void stream_process_mem2s(struct Stream *s, StreamSlave *tx_data_dev, - StreamSlave *tx_control_dev) +static void stream_process_mem2s(struct Stream *s, StreamSink *tx_data_dev, + StreamSink *tx_control_dev) { uint32_t prev_d; uint32_t txlen; @@ -384,7 +384,7 @@ static void xilinx_axidma_reset(DeviceState *dev) } static size_t -xilinx_axidma_control_stream_push(StreamSlave *obj, unsigned char *buf, +xilinx_axidma_control_stream_push(StreamSink *obj, unsigned char *buf, size_t len, bool eop) { XilinxAXIDMAStreamSlave *cs = XILINX_AXI_DMA_CONTROL_STREAM(obj); @@ -400,7 +400,7 @@ xilinx_axidma_control_stream_push(StreamSlave *obj, unsigned char *buf, } static bool -xilinx_axidma_data_stream_can_push(StreamSlave *obj, +xilinx_axidma_data_stream_can_push(StreamSink *obj, StreamCanPushNotifyFn notify, void *notify_opaque) { @@ -417,7 +417,7 @@ xilinx_axidma_data_stream_can_push(StreamSlave *obj, } static size_t -xilinx_axidma_data_stream_push(StreamSlave *obj, unsigned char *buf, size_t len, +xilinx_axidma_data_stream_push(StreamSink *obj, unsigned char *buf, size_t len, bool eop) { XilinxAXIDMAStreamSlave *ds = XILINX_AXI_DMA_DATA_STREAM(obj); @@ -588,9 +588,9 @@ static void xilinx_axidma_init(Object *obj) static Property axidma_properties[] = { DEFINE_PROP_UINT32("freqhz", XilinxAXIDMA, freqhz, 50000000), DEFINE_PROP_LINK("axistream-connected", XilinxAXIDMA, - tx_data_dev, TYPE_STREAM_SLAVE, StreamSlave *), + tx_data_dev, TYPE_STREAM_SINK, StreamSink *), DEFINE_PROP_LINK("axistream-control-connected", XilinxAXIDMA, - tx_control_dev, TYPE_STREAM_SLAVE, StreamSlave *), + tx_control_dev, TYPE_STREAM_SINK, StreamSink *), DEFINE_PROP_END_OF_LIST(), }; @@ -603,21 +603,21 @@ static void axidma_class_init(ObjectClass *klass, void *data) device_class_set_props(dc, axidma_properties); } -static StreamSlaveClass xilinx_axidma_data_stream_class = { +static StreamSinkClass xilinx_axidma_data_stream_class = { .push = xilinx_axidma_data_stream_push, .can_push = xilinx_axidma_data_stream_can_push, }; -static StreamSlaveClass xilinx_axidma_control_stream_class = { +static StreamSinkClass xilinx_axidma_control_stream_class = { .push = xilinx_axidma_control_stream_push, }; static void xilinx_axidma_stream_class_init(ObjectClass *klass, void *data) { - StreamSlaveClass *ssc = STREAM_SLAVE_CLASS(klass); + StreamSinkClass *ssc = STREAM_SINK_CLASS(klass); - ssc->push = ((StreamSlaveClass *)data)->push; - ssc->can_push = ((StreamSlaveClass *)data)->can_push; + ssc->push = ((StreamSinkClass *)data)->push; + ssc->can_push = ((StreamSinkClass *)data)->can_push; } static const TypeInfo axidma_info = { @@ -635,7 +635,7 @@ static const TypeInfo xilinx_axidma_data_stream_info = { .class_init = xilinx_axidma_stream_class_init, .class_data = &xilinx_axidma_data_stream_class, .interfaces = (InterfaceInfo[]) { - { TYPE_STREAM_SLAVE }, + { TYPE_STREAM_SINK }, { } } }; @@ -647,7 +647,7 @@ static const TypeInfo xilinx_axidma_control_stream_info = { .class_init = xilinx_axidma_stream_class_init, .class_data = &xilinx_axidma_control_stream_class, .interfaces = (InterfaceInfo[]) { - { TYPE_STREAM_SLAVE }, + { TYPE_STREAM_SINK }, { } } }; diff --git a/hw/net/xilinx_axienet.c b/hw/net/xilinx_axienet.c index f8cf5290e1..9bccbe9be3 100644 --- a/hw/net/xilinx_axienet.c +++ b/hw/net/xilinx_axienet.c @@ -320,8 +320,8 @@ struct XilinxAXIEnet { SysBusDevice busdev; MemoryRegion iomem; qemu_irq irq; - StreamSlave *tx_data_dev; - StreamSlave *tx_control_dev; + StreamSink *tx_data_dev; + StreamSink *tx_control_dev; XilinxAXIEnetStreamSlave rx_data_dev; XilinxAXIEnetStreamSlave rx_control_dev; NICState *nic; @@ -852,7 +852,7 @@ static ssize_t eth_rx(NetClientState *nc, const uint8_t *buf, size_t size) } static size_t -xilinx_axienet_control_stream_push(StreamSlave *obj, uint8_t *buf, size_t len, +xilinx_axienet_control_stream_push(StreamSink *obj, uint8_t *buf, size_t len, bool eop) { int i; @@ -874,7 +874,7 @@ xilinx_axienet_control_stream_push(StreamSlave *obj, uint8_t *buf, size_t len, } static size_t -xilinx_axienet_data_stream_push(StreamSlave *obj, uint8_t *buf, size_t size, +xilinx_axienet_data_stream_push(StreamSink *obj, uint8_t *buf, size_t size, bool eop) { XilinxAXIEnetStreamSlave *ds = XILINX_AXI_ENET_DATA_STREAM(obj); @@ -1002,9 +1002,9 @@ static Property xilinx_enet_properties[] = { DEFINE_PROP_UINT32("txmem", XilinxAXIEnet, c_txmem, 0x1000), DEFINE_NIC_PROPERTIES(XilinxAXIEnet, conf), DEFINE_PROP_LINK("axistream-connected", XilinxAXIEnet, - tx_data_dev, TYPE_STREAM_SLAVE, StreamSlave *), + tx_data_dev, TYPE_STREAM_SINK, StreamSink *), DEFINE_PROP_LINK("axistream-control-connected", XilinxAXIEnet, - tx_control_dev, TYPE_STREAM_SLAVE, StreamSlave *), + tx_control_dev, TYPE_STREAM_SINK, StreamSink *), DEFINE_PROP_END_OF_LIST(), }; @@ -1020,14 +1020,14 @@ static void xilinx_enet_class_init(ObjectClass *klass, void *data) static void xilinx_enet_control_stream_class_init(ObjectClass *klass, void *data) { - StreamSlaveClass *ssc = STREAM_SLAVE_CLASS(klass); + StreamSinkClass *ssc = STREAM_SINK_CLASS(klass); ssc->push = xilinx_axienet_control_stream_push; } static void xilinx_enet_data_stream_class_init(ObjectClass *klass, void *data) { - StreamSlaveClass *ssc = STREAM_SLAVE_CLASS(klass); + StreamSinkClass *ssc = STREAM_SINK_CLASS(klass); ssc->push = xilinx_axienet_data_stream_push; } @@ -1046,7 +1046,7 @@ static const TypeInfo xilinx_enet_data_stream_info = { .instance_size = sizeof(XilinxAXIEnetStreamSlave), .class_init = xilinx_enet_data_stream_class_init, .interfaces = (InterfaceInfo[]) { - { TYPE_STREAM_SLAVE }, + { TYPE_STREAM_SINK }, { } } }; @@ -1057,7 +1057,7 @@ static const TypeInfo xilinx_enet_control_stream_info = { .instance_size = sizeof(XilinxAXIEnetStreamSlave), .class_init = xilinx_enet_control_stream_class_init, .interfaces = (InterfaceInfo[]) { - { TYPE_STREAM_SLAVE }, + { TYPE_STREAM_SINK }, { } } }; diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c index dd8df9daf4..a897034601 100644 --- a/hw/ssi/xilinx_spips.c +++ b/hw/ssi/xilinx_spips.c @@ -1354,7 +1354,7 @@ static void xlnx_zynqmp_qspips_init(Object *obj) { XlnxZynqMPQSPIPS *rq = XLNX_ZYNQMP_QSPIPS(obj); - object_property_add_link(obj, "stream-connected-dma", TYPE_STREAM_SLAVE, + object_property_add_link(obj, "stream-connected-dma", TYPE_STREAM_SINK, (Object **)&rq->dma, object_property_allow_set_link, OBJ_PROP_LINK_STRONG); |