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-rw-r--r--include/hw/riscv/opentitan.h10
-rw-r--r--include/hw/riscv/riscv_hart.h10
-rw-r--r--include/hw/riscv/spike.h10
-rw-r--r--include/hw/riscv/virt.h10
4 files changed, 24 insertions, 16 deletions
diff --git a/include/hw/riscv/opentitan.h b/include/hw/riscv/opentitan.h
index 835a80f896..8c15b6325f 100644
--- a/include/hw/riscv/opentitan.h
+++ b/include/hw/riscv/opentitan.h
@@ -22,12 +22,14 @@
 #include "hw/riscv/riscv_hart.h"
 #include "hw/intc/ibex_plic.h"
 #include "hw/char/ibex_uart.h"
+#include "qom/object.h"
 
 #define TYPE_RISCV_IBEX_SOC "riscv.lowrisc.ibex.soc"
-#define RISCV_IBEX_SOC(obj) \
-    OBJECT_CHECK(LowRISCIbexSoCState, (obj), TYPE_RISCV_IBEX_SOC)
+typedef struct LowRISCIbexSoCState LowRISCIbexSoCState;
+DECLARE_INSTANCE_CHECKER(LowRISCIbexSoCState, RISCV_IBEX_SOC,
+                         TYPE_RISCV_IBEX_SOC)
 
-typedef struct LowRISCIbexSoCState {
+struct LowRISCIbexSoCState {
     /*< private >*/
     SysBusDevice parent_obj;
 
@@ -38,7 +40,7 @@ typedef struct LowRISCIbexSoCState {
 
     MemoryRegion flash_mem;
     MemoryRegion rom;
-} LowRISCIbexSoCState;
+};
 
 typedef struct OpenTitanState {
     /*< private >*/
diff --git a/include/hw/riscv/riscv_hart.h b/include/hw/riscv/riscv_hart.h
index c75856fa73..9be1fd80ed 100644
--- a/include/hw/riscv/riscv_hart.h
+++ b/include/hw/riscv/riscv_hart.h
@@ -23,13 +23,15 @@
 
 #include "hw/sysbus.h"
 #include "target/riscv/cpu.h"
+#include "qom/object.h"
 
 #define TYPE_RISCV_HART_ARRAY "riscv.hart_array"
 
-#define RISCV_HART_ARRAY(obj) \
-    OBJECT_CHECK(RISCVHartArrayState, (obj), TYPE_RISCV_HART_ARRAY)
+typedef struct RISCVHartArrayState RISCVHartArrayState;
+DECLARE_INSTANCE_CHECKER(RISCVHartArrayState, RISCV_HART_ARRAY,
+                         TYPE_RISCV_HART_ARRAY)
 
-typedef struct RISCVHartArrayState {
+struct RISCVHartArrayState {
     /*< private >*/
     SysBusDevice parent_obj;
 
@@ -38,6 +40,6 @@ typedef struct RISCVHartArrayState {
     uint32_t hartid_base;
     char *cpu_type;
     RISCVCPU *harts;
-} RISCVHartArrayState;
+};
 
 #endif
diff --git a/include/hw/riscv/spike.h b/include/hw/riscv/spike.h
index b0a18a9c94..cddeca2e77 100644
--- a/include/hw/riscv/spike.h
+++ b/include/hw/riscv/spike.h
@@ -21,15 +21,17 @@
 
 #include "hw/riscv/riscv_hart.h"
 #include "hw/sysbus.h"
+#include "qom/object.h"
 
 #define SPIKE_CPUS_MAX 8
 #define SPIKE_SOCKETS_MAX 8
 
 #define TYPE_SPIKE_MACHINE MACHINE_TYPE_NAME("spike")
-#define SPIKE_MACHINE(obj) \
-    OBJECT_CHECK(SpikeState, (obj), TYPE_SPIKE_MACHINE)
+typedef struct SpikeState SpikeState;
+DECLARE_INSTANCE_CHECKER(SpikeState, SPIKE_MACHINE,
+                         TYPE_SPIKE_MACHINE)
 
-typedef struct {
+struct SpikeState {
     /*< private >*/
     MachineState parent;
 
@@ -37,7 +39,7 @@ typedef struct {
     RISCVHartArrayState soc[SPIKE_SOCKETS_MAX];
     void *fdt;
     int fdt_size;
-} SpikeState;
+};
 
 enum {
     SPIKE_MROM,
diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h
index 1beacd7666..b4ed9a32eb 100644
--- a/include/hw/riscv/virt.h
+++ b/include/hw/riscv/virt.h
@@ -22,15 +22,17 @@
 #include "hw/riscv/riscv_hart.h"
 #include "hw/sysbus.h"
 #include "hw/block/flash.h"
+#include "qom/object.h"
 
 #define VIRT_CPUS_MAX 8
 #define VIRT_SOCKETS_MAX 8
 
 #define TYPE_RISCV_VIRT_MACHINE MACHINE_TYPE_NAME("virt")
-#define RISCV_VIRT_MACHINE(obj) \
-    OBJECT_CHECK(RISCVVirtState, (obj), TYPE_RISCV_VIRT_MACHINE)
+typedef struct RISCVVirtState RISCVVirtState;
+DECLARE_INSTANCE_CHECKER(RISCVVirtState, RISCV_VIRT_MACHINE,
+                         TYPE_RISCV_VIRT_MACHINE)
 
-typedef struct {
+struct RISCVVirtState {
     /*< private >*/
     MachineState parent;
 
@@ -41,7 +43,7 @@ typedef struct {
 
     void *fdt;
     int fdt_size;
-} RISCVVirtState;
+};
 
 enum {
     VIRT_DEBUG,