diff options
Diffstat (limited to 'include/hw')
| -rw-r--r-- | include/hw/arm/bcm2836.h | 31 | ||||
| -rw-r--r-- | include/hw/arm/fsl-imx6.h | 4 | ||||
| -rw-r--r-- | include/hw/boards.h | 1 | ||||
| -rw-r--r-- | include/hw/char/imx_serial.h | 3 | ||||
| -rw-r--r-- | include/hw/char/parallel.h | 14 | ||||
| -rw-r--r-- | include/hw/dma/i8257.h (renamed from include/hw/isa/i8257.h) | 6 | ||||
| -rw-r--r-- | include/hw/i386/pc.h | 22 | ||||
| -rw-r--r-- | include/hw/input/i8042.h | 24 | ||||
| -rw-r--r-- | include/hw/isa/isa.h | 2 | ||||
| -rw-r--r-- | include/hw/isa/pc87312.h | 24 | ||||
| -rw-r--r-- | include/hw/isa/superio.h | 60 | ||||
| -rw-r--r-- | include/hw/isa/vt82c686.h | 4 | ||||
| -rw-r--r-- | include/hw/pci/pci.h | 1 | ||||
| -rw-r--r-- | include/hw/scsi/esp.h | 10 | ||||
| -rw-r--r-- | include/hw/vfio/vfio-common.h | 23 |
15 files changed, 176 insertions, 53 deletions
diff --git a/include/hw/arm/bcm2836.h b/include/hw/arm/bcm2836.h index 4758b4ae54..93248399ba 100644 --- a/include/hw/arm/bcm2836.h +++ b/include/hw/arm/bcm2836.h @@ -15,12 +15,19 @@ #include "hw/arm/bcm2835_peripherals.h" #include "hw/intc/bcm2836_control.h" -#define TYPE_BCM2836 "bcm2836" -#define BCM2836(obj) OBJECT_CHECK(BCM2836State, (obj), TYPE_BCM2836) +#define TYPE_BCM283X "bcm283x" +#define BCM283X(obj) OBJECT_CHECK(BCM283XState, (obj), TYPE_BCM283X) + +#define BCM283X_NCPUS 4 -#define BCM2836_NCPUS 4 +/* These type names are for specific SoCs; other than instantiating + * them, code using these devices should always handle them via the + * BCM283x base class, so they have no BCM2836(obj) etc macros. + */ +#define TYPE_BCM2836 "bcm2836" +#define TYPE_BCM2837 "bcm2837" -typedef struct BCM2836State { +typedef struct BCM283XState { /*< private >*/ DeviceState parent_obj; /*< public >*/ @@ -28,9 +35,21 @@ typedef struct BCM2836State { char *cpu_type; uint32_t enabled_cpus; - ARMCPU cpus[BCM2836_NCPUS]; + ARMCPU cpus[BCM283X_NCPUS]; BCM2836ControlState control; BCM2835PeripheralState peripherals; -} BCM2836State; +} BCM283XState; + +typedef struct BCM283XInfo BCM283XInfo; + +typedef struct BCM283XClass { + DeviceClass parent_class; + const BCM283XInfo *info; +} BCM283XClass; + +#define BCM283X_CLASS(klass) \ + OBJECT_CLASS_CHECK(BCM283XClass, (klass), TYPE_BCM283X) +#define BCM283X_GET_CLASS(obj) \ + OBJECT_GET_CLASS(BCM283XClass, (obj), TYPE_BCM283X) #endif /* BCM2836_H */ diff --git a/include/hw/arm/fsl-imx6.h b/include/hw/arm/fsl-imx6.h index ec6c509d74..06f8aaeda4 100644 --- a/include/hw/arm/fsl-imx6.h +++ b/include/hw/arm/fsl-imx6.h @@ -438,8 +438,8 @@ typedef struct FslIMX6State { #define FSL_IMX6_HDMI_MASTER_IRQ 115 #define FSL_IMX6_HDMI_CEC_IRQ 116 #define FSL_IMX6_MLB150_LOW_IRQ 117 -#define FSL_IMX6_ENET_MAC_1588_IRQ 118 -#define FSL_IMX6_ENET_MAC_IRQ 119 +#define FSL_IMX6_ENET_MAC_IRQ 118 +#define FSL_IMX6_ENET_MAC_1588_IRQ 119 #define FSL_IMX6_PCIE1_IRQ 120 #define FSL_IMX6_PCIE2_IRQ 121 #define FSL_IMX6_PCIE3_IRQ 122 diff --git a/include/hw/boards.h b/include/hw/boards.h index 8ce9a7a21d..a609239112 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -252,7 +252,6 @@ struct MachineState { char *kernel_filename; char *kernel_cmdline; char *initrd_filename; - const char *cpu_model; const char *cpu_type; AccelState *accelerator; CPUArchIdList *possible_cpus; diff --git a/include/hw/char/imx_serial.h b/include/hw/char/imx_serial.h index baeec3183f..5b99cee7cf 100644 --- a/include/hw/char/imx_serial.h +++ b/include/hw/char/imx_serial.h @@ -67,6 +67,8 @@ #define UCR2_RXEN (1<<1) /* Receiver enable */ #define UCR2_SRST (1<<0) /* Reset complete */ +#define UCR4_TCEN BIT(3) /* TX complete interrupt enable */ + #define UTS1_TXEMPTY (1<<6) #define UTS1_RXEMPTY (1<<5) #define UTS1_TXFULL (1<<4) @@ -95,6 +97,7 @@ typedef struct IMXSerialState { uint32_t ubmr; uint32_t ubrc; uint32_t ucr3; + uint32_t ucr4; qemu_irq irq; CharBackend chr; diff --git a/include/hw/char/parallel.h b/include/hw/char/parallel.h new file mode 100644 index 0000000000..d6dd62fb9f --- /dev/null +++ b/include/hw/char/parallel.h @@ -0,0 +1,14 @@ +#ifndef HW_PARALLEL_H +#define HW_PARALLEL_H + +#include "exec/memory.h" +#include "hw/isa/isa.h" +#include "chardev/char.h" + +void parallel_hds_isa_init(ISABus *bus, int n); + +bool parallel_mm_init(MemoryRegion *address_space, + hwaddr base, int it_shift, qemu_irq irq, + Chardev *chr); + +#endif diff --git a/include/hw/isa/i8257.h b/include/hw/dma/i8257.h index 88a2766a3f..2cab50bb6c 100644 --- a/include/hw/isa/i8257.h +++ b/include/hw/dma/i8257.h @@ -1,6 +1,10 @@ #ifndef HW_I8257_H #define HW_I8257_H +#include "hw/hw.h" +#include "hw/isa/isa.h" +#include "exec/ioport.h" + #define TYPE_I8257 "i8257" typedef struct I8257Regs { @@ -40,4 +44,6 @@ typedef struct I8257State { PortioList portio_pageh; } I8257State; +void i8257_dma_init(ISABus *bus, bool high_page_enable); + #endif diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index bb49165fe0..ffee8413f0 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -114,6 +114,7 @@ struct PCMachineClass { /* Device configuration: */ bool pci_enabled; bool kvmclock_enabled; + const char *default_nic_model; /* Compat options: */ @@ -151,14 +152,6 @@ struct PCMachineClass { #define PC_MACHINE_CLASS(klass) \ OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE) -/* parallel.c */ - -void parallel_hds_isa_init(ISABus *bus, int n); - -bool parallel_mm_init(MemoryRegion *address_space, - hwaddr base, int it_shift, qemu_irq irq, - Chardev *chr); - /* i8259.c */ extern DeviceState *isa_pic; @@ -196,15 +189,6 @@ void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque); void vmmouse_get_data(uint32_t *data); void vmmouse_set_data(const uint32_t *data); -/* pckbd.c */ -#define I8042_A20_LINE "a20" - -void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, - MemoryRegion *region, ram_addr_t size, - hwaddr mask); -void i8042_isa_mouse_fake_event(void *opaque); -void i8042_setup_a20_line(ISADevice *dev, qemu_irq a20_out); - /* pc.c */ extern int fd_bootchk; @@ -248,7 +232,7 @@ void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd); void pc_cmos_init(PCMachineState *pcms, BusState *ide0, BusState *ide1, ISADevice *s); -void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus); +void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus); void pc_pci_device_init(PCIBus *pci_bus); typedef void (*cpu_set_smm_t)(int smm, void *arg); @@ -617,7 +601,7 @@ bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *); #define PC_COMPAT_2_2 \ HW_COMPAT_2_2 \ - PC_CPU_MODEL_IDS("2.3.0") \ + PC_CPU_MODEL_IDS("2.2.0") \ {\ .driver = "kvm64" "-" TYPE_X86_CPU,\ .property = "vme",\ diff --git a/include/hw/input/i8042.h b/include/hw/input/i8042.h new file mode 100644 index 0000000000..f6ff146364 --- /dev/null +++ b/include/hw/input/i8042.h @@ -0,0 +1,24 @@ +/* + * QEMU PS/2 Controller + * + * Copyright (c) 2003 Fabrice Bellard + * + * SPDX-License-Identifier: MIT + */ +#ifndef HW_INPUT_I8042_H +#define HW_INPUT_I8042_H + +#include "hw/hw.h" +#include "hw/isa/isa.h" + +#define TYPE_I8042 "i8042" + +#define I8042_A20_LINE "a20" + +void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, + MemoryRegion *region, ram_addr_t size, + hwaddr mask); +void i8042_isa_mouse_fake_event(void *opaque); +void i8042_setup_a20_line(ISADevice *dev, qemu_irq a20_out); + +#endif /* HW_INPUT_I8042_H */ diff --git a/include/hw/isa/isa.h b/include/hw/isa/isa.h index 95593408ef..b9dbab24b4 100644 --- a/include/hw/isa/isa.h +++ b/include/hw/isa/isa.h @@ -151,6 +151,4 @@ static inline ISABus *isa_bus_from_device(ISADevice *d) return ISA_BUS(qdev_get_parent_bus(DEVICE(d))); } -/* i8257.c */ -void DMA_init(ISABus *bus, int high_page_enable); #endif diff --git a/include/hw/isa/pc87312.h b/include/hw/isa/pc87312.h index bf74470d40..e16263d4b1 100644 --- a/include/hw/isa/pc87312.h +++ b/include/hw/isa/pc87312.h @@ -25,32 +25,22 @@ #ifndef QEMU_PC87312_H #define QEMU_PC87312_H -#include "hw/isa/isa.h" +#include "hw/isa/superio.h" -#define TYPE_PC87312 "pc87312" -#define PC87312(obj) OBJECT_CHECK(PC87312State, (obj), TYPE_PC87312) +#define TYPE_PC87312_SUPERIO "pc87312" +#define PC87312(obj) OBJECT_CHECK(PC87312State, (obj), TYPE_PC87312_SUPERIO) typedef struct PC87312State { - ISADevice dev; + /*< private >*/ + ISASuperIODevice parent_dev; + /*< public >*/ - uint32_t iobase; + uint16_t iobase; uint8_t config; /* initial configuration */ struct { ISADevice *dev; - } parallel; - - struct { - ISADevice *dev; - } uart[2]; - - struct { - ISADevice *dev; - } fdc; - - struct { - ISADevice *dev; } ide; MemoryRegion io; diff --git a/include/hw/isa/superio.h b/include/hw/isa/superio.h new file mode 100644 index 0000000000..f9ba29aa30 --- /dev/null +++ b/include/hw/isa/superio.h @@ -0,0 +1,60 @@ +/* + * Generic ISA Super I/O + * + * Copyright (c) 2018 Philippe Mathieu-Daudé + * + * This code is licensed under the GNU GPLv2 and later. + * See the COPYING file in the top-level directory. + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#ifndef HW_ISA_SUPERIO_H +#define HW_ISA_SUPERIO_H + +#include "qemu-common.h" +#include "sysemu/sysemu.h" +#include "hw/isa/isa.h" + +#define TYPE_ISA_SUPERIO "isa-superio" +#define ISA_SUPERIO(obj) \ + OBJECT_CHECK(ISASuperIODevice, (obj), TYPE_ISA_SUPERIO) +#define ISA_SUPERIO_GET_CLASS(obj) \ + OBJECT_GET_CLASS(ISASuperIOClass, (obj), TYPE_ISA_SUPERIO) +#define ISA_SUPERIO_CLASS(klass) \ + OBJECT_CLASS_CHECK(ISASuperIOClass, (klass), TYPE_ISA_SUPERIO) + +typedef struct ISASuperIODevice { + /*< private >*/ + ISADevice parent_obj; + /*< public >*/ + + ISADevice *parallel[MAX_PARALLEL_PORTS]; + ISADevice *serial[MAX_SERIAL_PORTS]; + ISADevice *floppy; + ISADevice *kbc; + ISADevice *ide; +} ISASuperIODevice; + +typedef struct ISASuperIOFuncs { + size_t count; + bool (*is_enabled)(ISASuperIODevice *sio, uint8_t index); + uint16_t (*get_iobase)(ISASuperIODevice *sio, uint8_t index); + unsigned int (*get_irq)(ISASuperIODevice *sio, uint8_t index); + unsigned int (*get_dma)(ISASuperIODevice *sio, uint8_t index); +} ISASuperIOFuncs; + +typedef struct ISASuperIOClass { + /*< private >*/ + ISADeviceClass parent_class; + /*< public >*/ + DeviceRealize parent_realize; + + ISASuperIOFuncs parallel; + ISASuperIOFuncs serial; + ISASuperIOFuncs floppy; + ISASuperIOFuncs ide; +} ISASuperIOClass; + +#define TYPE_FDC37M81X_SUPERIO "fdc37m81x-superio" +#define TYPE_SMC37C669_SUPERIO "smc37c669-superio" + +#endif /* HW_ISA_SUPERIO_H */ diff --git a/include/hw/isa/vt82c686.h b/include/hw/isa/vt82c686.h index 471b5e9e53..c3c2b6e786 100644 --- a/include/hw/isa/vt82c686.h +++ b/include/hw/isa/vt82c686.h @@ -1,8 +1,10 @@ #ifndef HW_VT82C686_H #define HW_VT82C686_H +#define TYPE_VT82C686B_SUPERIO "vt82c686b-superio" + /* vt82c686.c */ -ISABus *vt82c686b_init(PCIBus * bus, int devfn); +ISABus *vt82c686b_isa_init(PCIBus * bus, int devfn); void vt82c686b_ac97_init(PCIBus *bus, int devfn); void vt82c686b_mc97_init(PCIBus *bus, int devfn); I2CBus *vt82c686b_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index d8c18c7fa4..e255941b5a 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -708,6 +708,7 @@ PCIDevice *pci_create(PCIBus *bus, int devfn, const char *name); PCIDevice *pci_create_simple(PCIBus *bus, int devfn, const char *name); void lsi53c895a_create(PCIBus *bus); +void lsi53c810_create(PCIBus *bus, int devfn); qemu_irq pci_allocate_irq(PCIDevice *pci_dev); void pci_set_irq(PCIDevice *pci_dev, int level); diff --git a/include/hw/scsi/esp.h b/include/hw/scsi/esp.h index 3b160f858c..93fdaced67 100644 --- a/include/hw/scsi/esp.h +++ b/include/hw/scsi/esp.h @@ -7,11 +7,6 @@ /* esp.c */ #define ESP_MAX_DEVS 7 typedef void (*ESPDMAMemoryReadWriteFunc)(void *opaque, uint8_t *buf, int len); -void esp_init(hwaddr espaddr, int it_shift, - ESPDMAMemoryReadWriteFunc dma_memory_read, - ESPDMAMemoryReadWriteFunc dma_memory_write, - void *dma_opaque, qemu_irq irq, qemu_irq *reset, - qemu_irq *dma_enable); #define ESP_REGS 16 #define TI_BUFSZ 16 @@ -136,6 +131,11 @@ typedef struct { #define TCHI_FAS100A 0x4 #define TCHI_AM53C974 0x12 +ESPState *esp_init(hwaddr espaddr, int it_shift, + ESPDMAMemoryReadWriteFunc dma_memory_read, + ESPDMAMemoryReadWriteFunc dma_memory_write, + void *dma_opaque, qemu_irq irq, qemu_irq *reset, + qemu_irq *dma_enable); void esp_dma_enable(ESPState *s, int irq, int level); void esp_request_cancelled(SCSIRequest *req); void esp_command_complete(SCSIRequest *req, uint32_t status, size_t resid); diff --git a/include/hw/vfio/vfio-common.h b/include/hw/vfio/vfio-common.h index f3a2ac9fee..d9360148e6 100644 --- a/include/hw/vfio/vfio-common.h +++ b/include/hw/vfio/vfio-common.h @@ -26,6 +26,7 @@ #include "exec/memory.h" #include "qemu/queue.h" #include "qemu/notify.h" +#include "ui/console.h" #ifdef CONFIG_LINUX #include <linux/vfio.h> #endif @@ -142,6 +143,27 @@ typedef struct VFIOGroup { QLIST_ENTRY(VFIOGroup) container_next; } VFIOGroup; +typedef struct VFIODMABuf { + QemuDmaBuf buf; + uint32_t pos_x, pos_y, pos_updates; + uint32_t hot_x, hot_y, hot_updates; + int dmabuf_id; + QTAILQ_ENTRY(VFIODMABuf) next; +} VFIODMABuf; + +typedef struct VFIODisplay { + QemuConsole *con; + struct { + VFIORegion buffer; + DisplaySurface *surface; + } region; + struct { + QTAILQ_HEAD(, VFIODMABuf) bufs; + VFIODMABuf *primary; + VFIODMABuf *cursor; + } dmabuf; +} VFIODisplay; + void vfio_put_base_device(VFIODevice *vbasedev); void vfio_disable_irqindex(VFIODevice *vbasedev, int index); void vfio_unmask_single_irqindex(VFIODevice *vbasedev, int index); @@ -171,6 +193,7 @@ int vfio_get_region_info(VFIODevice *vbasedev, int index, struct vfio_region_info **info); int vfio_get_dev_region_info(VFIODevice *vbasedev, uint32_t type, uint32_t subtype, struct vfio_region_info **info); +bool vfio_has_region_cap(VFIODevice *vbasedev, int region, uint16_t cap_type); #endif extern const MemoryListener vfio_prereg_listener; |