diff options
Diffstat (limited to 'include/hw')
| -rw-r--r-- | include/hw/misc/aspeed_scu.h | 2 | ||||
| -rw-r--r-- | include/hw/nvram/npcm7xx_otp.h | 4 | ||||
| -rw-r--r-- | include/hw/qdev-core.h | 4 |
3 files changed, 5 insertions, 5 deletions
diff --git a/include/hw/misc/aspeed_scu.h b/include/hw/misc/aspeed_scu.h index 5c7c04eedf..7cb6018dbc 100644 --- a/include/hw/misc/aspeed_scu.h +++ b/include/hw/misc/aspeed_scu.h @@ -51,7 +51,7 @@ struct AspeedSCUState { #define ASPEED_IS_AST2500(si_rev) ((((si_rev) >> 24) & 0xff) == 0x04) -extern bool is_supported_silicon_rev(uint32_t silicon_rev); +bool is_supported_silicon_rev(uint32_t silicon_rev); struct AspeedSCUClass { diff --git a/include/hw/nvram/npcm7xx_otp.h b/include/hw/nvram/npcm7xx_otp.h index 156bbd151a..ea4b5d0731 100644 --- a/include/hw/nvram/npcm7xx_otp.h +++ b/include/hw/nvram/npcm7xx_otp.h @@ -73,7 +73,7 @@ typedef struct NPCM7xxOTPClass NPCM7xxOTPClass; * Each nibble of data is encoded into a byte, so the number of bytes written * to the array will be @len * 2. */ -extern void npcm7xx_otp_array_write(NPCM7xxOTPState *s, const void *data, - unsigned int offset, unsigned int len); +void npcm7xx_otp_array_write(NPCM7xxOTPState *s, const void *data, + unsigned int offset, unsigned int len); #endif /* NPCM7XX_OTP_H */ diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h index 884c726a87..151d968238 100644 --- a/include/hw/qdev-core.h +++ b/include/hw/qdev-core.h @@ -1086,7 +1086,7 @@ typedef enum MachineInitPhase { PHASE_MACHINE_READY, } MachineInitPhase; -extern bool phase_check(MachineInitPhase phase); -extern void phase_advance(MachineInitPhase phase); +bool phase_check(MachineInitPhase phase); +void phase_advance(MachineInitPhase phase); #endif |