diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/exec/cpu-defs.h | 1 | ||||
| -rw-r--r-- | include/hw/i386/ich9.h | 2 | ||||
| -rw-r--r-- | include/hw/loader.h | 8 | ||||
| -rw-r--r-- | include/hw/pci-host/q35.h | 24 |
4 files changed, 19 insertions, 16 deletions
diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h index 01cd8c7a2b..66a3d46938 100644 --- a/include/exec/cpu-defs.h +++ b/include/exec/cpu-defs.h @@ -59,6 +59,7 @@ typedef uint64_t target_ulong; #define EXCP_HLT 0x10001 /* hlt instruction reached */ #define EXCP_DEBUG 0x10002 /* cpu stopped after a breakpoint or singlestep */ #define EXCP_HALTED 0x10003 /* cpu is halted (waiting for external event) */ +#define EXCP_YIELD 0x10004 /* cpu wants to yield timeslice to another */ #define TB_JMP_CACHE_BITS 12 #define TB_JMP_CACHE_SIZE (1 << TB_JMP_CACHE_BITS) diff --git a/include/hw/i386/ich9.h b/include/hw/i386/ich9.h index 9e4a0e4b8d..e19143555e 100644 --- a/include/hw/i386/ich9.h +++ b/include/hw/i386/ich9.h @@ -102,7 +102,7 @@ Object *ich9_lpc_find(void); #define ICH9_USB_UHCI1_DEV 29 #define ICH9_USB_UHCI1_FUNC 0 -/* D30:F0 DMI-to-PCI brdige */ +/* D30:F0 DMI-to-PCI bridge */ #define ICH9_D2P_BRIDGE "ICH9 D2P BRIDGE" #define ICH9_D2P_BRIDGE_SAVEVM_VERSION 0 diff --git a/include/hw/loader.h b/include/hw/loader.h index aaf08c377e..796cbf9b39 100644 --- a/include/hw/loader.h +++ b/include/hw/loader.h @@ -49,10 +49,12 @@ void pstrcpy_targphys(const char *name, hwaddr dest, int buf_size, const char *source); -extern bool rom_file_in_ram; +extern bool option_rom_has_mr; +extern bool rom_file_has_mr; int rom_add_file(const char *file, const char *fw_dir, - hwaddr addr, int32_t bootindex); + hwaddr addr, int32_t bootindex, + bool option_rom); void *rom_add_blob(const char *name, const void *blob, size_t len, hwaddr addr, const char *fw_file_name, FWCfgReadCallback fw_callback, void *callback_opaque); @@ -66,7 +68,7 @@ void *rom_ptr(hwaddr addr); void do_info_roms(Monitor *mon, const QDict *qdict); #define rom_add_file_fixed(_f, _a, _i) \ - rom_add_file(_f, NULL, _a, _i) + rom_add_file(_f, NULL, _a, _i, false) #define rom_add_blob_fixed(_f, _b, _l, _a) \ rom_add_blob(_f, _b, _l, _a, NULL, NULL, NULL) diff --git a/include/hw/pci-host/q35.h b/include/hw/pci-host/q35.h index d0355b712b..d9ee97845b 100644 --- a/include/hw/pci-host/q35.h +++ b/include/hw/pci-host/q35.h @@ -125,8 +125,8 @@ typedef struct Q35PCIHost { #define MCH_HOST_BRIDGE_PAM_RE ((uint8_t)0x1) #define MCH_HOST_BRIDGE_PAM_MASK ((uint8_t)0x3) -#define MCH_HOST_BRDIGE_SMRAM 0x9d -#define MCH_HOST_BRDIGE_SMRAM_SIZE 1 +#define MCH_HOST_BRIDGE_SMRAM 0x9d +#define MCH_HOST_BRIDGE_SMRAM_SIZE 1 #define MCH_HOST_BRIDGE_SMRAM_DEFAULT ((uint8_t)0x2) #define MCH_HOST_BRIDGE_SMRAM_D_OPEN ((uint8_t)(1 << 6)) #define MCH_HOST_BRIDGE_SMRAM_D_CLS ((uint8_t)(1 << 5)) @@ -140,16 +140,16 @@ typedef struct Q35PCIHost { #define MCH_HOST_BRIDGE_UPPER_SYSTEM_BIOS_END 0x100000 #define MCH_HOST_BRIDGE_ESMRAMC 0x9e -#define MCH_HOST_BRDIGE_ESMRAMC_H_SMRAME ((uint8_t)(1 << 6)) -#define MCH_HOST_BRDIGE_ESMRAMC_E_SMERR ((uint8_t)(1 << 5)) -#define MCH_HOST_BRDIGE_ESMRAMC_SM_CACHE ((uint8_t)(1 << 4)) -#define MCH_HOST_BRDIGE_ESMRAMC_SM_L1 ((uint8_t)(1 << 3)) -#define MCH_HOST_BRDIGE_ESMRAMC_SM_L2 ((uint8_t)(1 << 2)) -#define MCH_HOST_BRDIGE_ESMRAMC_TSEG_SZ_MASK ((uint8_t)(0x3 << 1)) -#define MCH_HOST_BRDIGE_ESMRAMC_TSEG_SZ_1MB ((uint8_t)(0x0 << 1)) -#define MCH_HOST_BRDIGE_ESMRAMC_TSEG_SZ_2MB ((uint8_t)(0x1 << 1)) -#define MCH_HOST_BRDIGE_ESMRAMC_TSEG_SZ_8MB ((uint8_t)(0x2 << 1)) -#define MCH_HOST_BRDIGE_ESMRAMC_T_EN ((uint8_t)1) +#define MCH_HOST_BRIDGE_ESMRAMC_H_SMRAME ((uint8_t)(1 << 6)) +#define MCH_HOST_BRIDGE_ESMRAMC_E_SMERR ((uint8_t)(1 << 5)) +#define MCH_HOST_BRIDGE_ESMRAMC_SM_CACHE ((uint8_t)(1 << 4)) +#define MCH_HOST_BRIDGE_ESMRAMC_SM_L1 ((uint8_t)(1 << 3)) +#define MCH_HOST_BRIDGE_ESMRAMC_SM_L2 ((uint8_t)(1 << 2)) +#define MCH_HOST_BRIDGE_ESMRAMC_TSEG_SZ_MASK ((uint8_t)(0x3 << 1)) +#define MCH_HOST_BRIDGE_ESMRAMC_TSEG_SZ_1MB ((uint8_t)(0x0 << 1)) +#define MCH_HOST_BRIDGE_ESMRAMC_TSEG_SZ_2MB ((uint8_t)(0x1 << 1)) +#define MCH_HOST_BRIDGE_ESMRAMC_TSEG_SZ_8MB ((uint8_t)(0x2 << 1)) +#define MCH_HOST_BRIDGE_ESMRAMC_T_EN ((uint8_t)1) /* D1:F0 PCIE* port*/ #define MCH_PCIE_DEV 1 |