diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/block/block.h | 4 | ||||
| -rw-r--r-- | include/block/block_int.h | 1 | ||||
| -rw-r--r-- | include/hw/char/ibex_uart.h | 79 | ||||
| -rw-r--r-- | include/hw/riscv/boot.h | 7 | ||||
| -rw-r--r-- | include/hw/riscv/boot_opensbi.h | 58 | ||||
| -rw-r--r-- | include/qemu/osdep.h | 10 |
6 files changed, 116 insertions, 43 deletions
diff --git a/include/block/block.h b/include/block/block.h index bca3bb831c..6e36154061 100644 --- a/include/block/block.h +++ b/include/block/block.h @@ -405,8 +405,8 @@ void bdrv_get_geometry(BlockDriverState *bs, uint64_t *nb_sectors_ptr); void bdrv_refresh_limits(BlockDriverState *bs, Error **errp); int bdrv_commit(BlockDriverState *bs); int bdrv_make_empty(BdrvChild *c, Error **errp); -int bdrv_change_backing_file(BlockDriverState *bs, - const char *backing_file, const char *backing_fmt); +int bdrv_change_backing_file(BlockDriverState *bs, const char *backing_file, + const char *backing_fmt, bool warn); void bdrv_register(BlockDriver *bdrv); int bdrv_drop_intermediate(BlockDriverState *top, BlockDriverState *base, const char *backing_file_str); diff --git a/include/block/block_int.h b/include/block/block_int.h index 3d6cf88592..38dec0275b 100644 --- a/include/block/block_int.h +++ b/include/block/block_int.h @@ -53,6 +53,7 @@ #define BLOCK_OPT_ADAPTER_TYPE "adapter_type" #define BLOCK_OPT_REDUNDANCY "redundancy" #define BLOCK_OPT_NOCOW "nocow" +#define BLOCK_OPT_EXTENT_SIZE_HINT "extent_size_hint" #define BLOCK_OPT_OBJECT_SIZE "object_size" #define BLOCK_OPT_REFCOUNT_BITS "refcount_bits" #define BLOCK_OPT_DATA_FILE "data_file" diff --git a/include/hw/char/ibex_uart.h b/include/hw/char/ibex_uart.h index 2bec772615..b6bd5a6700 100644 --- a/include/hw/char/ibex_uart.h +++ b/include/hw/char/ibex_uart.h @@ -26,52 +26,47 @@ #define HW_IBEX_UART_H #include "hw/sysbus.h" +#include "hw/registerfields.h" #include "chardev/char-fe.h" #include "qemu/timer.h" -#define IBEX_UART_INTR_STATE 0x00 - #define INTR_STATE_TX_WATERMARK (1 << 0) - #define INTR_STATE_RX_WATERMARK (1 << 1) - #define INTR_STATE_TX_EMPTY (1 << 2) - #define INTR_STATE_RX_OVERFLOW (1 << 3) -#define IBEX_UART_INTR_ENABLE 0x04 -#define IBEX_UART_INTR_TEST 0x08 - -#define IBEX_UART_CTRL 0x0c - #define UART_CTRL_TX_ENABLE (1 << 0) - #define UART_CTRL_RX_ENABLE (1 << 1) - #define UART_CTRL_NF (1 << 2) - #define UART_CTRL_SLPBK (1 << 4) - #define UART_CTRL_LLPBK (1 << 5) - #define UART_CTRL_PARITY_EN (1 << 6) - #define UART_CTRL_PARITY_ODD (1 << 7) - #define UART_CTRL_RXBLVL (3 << 8) - #define UART_CTRL_NCO (0xFFFF << 16) - -#define IBEX_UART_STATUS 0x10 - #define UART_STATUS_TXFULL (1 << 0) - #define UART_STATUS_RXFULL (1 << 1) - #define UART_STATUS_TXEMPTY (1 << 2) - #define UART_STATUS_RXIDLE (1 << 4) - #define UART_STATUS_RXEMPTY (1 << 5) - -#define IBEX_UART_RDATA 0x14 -#define IBEX_UART_WDATA 0x18 - -#define IBEX_UART_FIFO_CTRL 0x1c - #define FIFO_CTRL_RXRST (1 << 0) - #define FIFO_CTRL_TXRST (1 << 1) - #define FIFO_CTRL_RXILVL (7 << 2) - #define FIFO_CTRL_RXILVL_SHIFT (2) - #define FIFO_CTRL_TXILVL (3 << 5) - #define FIFO_CTRL_TXILVL_SHIFT (5) - -#define IBEX_UART_FIFO_STATUS 0x20 -#define IBEX_UART_OVRD 0x24 -#define IBEX_UART_VAL 0x28 -#define IBEX_UART_TIMEOUT_CTRL 0x2c +REG32(INTR_STATE, 0x00) + FIELD(INTR_STATE, TX_WATERMARK, 0, 1) + FIELD(INTR_STATE, RX_WATERMARK, 1, 1) + FIELD(INTR_STATE, TX_EMPTY, 2, 1) + FIELD(INTR_STATE, RX_OVERFLOW, 3, 1) +REG32(INTR_ENABLE, 0x04) +REG32(INTR_TEST, 0x08) +REG32(CTRL, 0x0C) + FIELD(CTRL, TX_ENABLE, 0, 1) + FIELD(CTRL, RX_ENABLE, 1, 1) + FIELD(CTRL, NF, 2, 1) + FIELD(CTRL, SLPBK, 4, 1) + FIELD(CTRL, LLPBK, 5, 1) + FIELD(CTRL, PARITY_EN, 6, 1) + FIELD(CTRL, PARITY_ODD, 7, 1) + FIELD(CTRL, RXBLVL, 8, 2) + FIELD(CTRL, NCO, 16, 16) +REG32(STATUS, 0x10) + FIELD(STATUS, TXFULL, 0, 1) + FIELD(STATUS, RXFULL, 1, 1) + FIELD(STATUS, TXEMPTY, 2, 1) + FIELD(STATUS, RXIDLE, 4, 1) + FIELD(STATUS, RXEMPTY, 5, 1) +REG32(RDATA, 0x14) +REG32(WDATA, 0x18) +REG32(FIFO_CTRL, 0x1c) + FIELD(FIFO_CTRL, RXRST, 0, 1) + FIELD(FIFO_CTRL, TXRST, 1, 1) + FIELD(FIFO_CTRL, RXILVL, 2, 3) + FIELD(FIFO_CTRL, TXILVL, 5, 2) +REG32(FIFO_STATUS, 0x20) +REG32(OVRD, 0x24) +REG32(VAL, 0x28) +REG32(TIMEOUT_CTRL, 0x2c) #define IBEX_UART_TX_FIFO_SIZE 16 +#define IBEX_UART_CLOCK 50000000 /* 50MHz clock */ #define TYPE_IBEX_UART "ibex-uart" #define IBEX_UART(obj) \ @@ -101,6 +96,8 @@ typedef struct { uint32_t uart_val; uint32_t uart_timeout_ctrl; + Clock *f_clk; + CharBackend chr; qemu_irq tx_watermark; qemu_irq rx_watermark; diff --git a/include/hw/riscv/boot.h b/include/hw/riscv/boot.h index 9daa98da08..451338780a 100644 --- a/include/hw/riscv/boot.h +++ b/include/hw/riscv/boot.h @@ -35,5 +35,12 @@ target_ulong riscv_load_kernel(const char *kernel_filename, symbol_fn_t sym_cb); hwaddr riscv_load_initrd(const char *filename, uint64_t mem_size, uint64_t kernel_entry, hwaddr *start); +uint32_t riscv_load_fdt(hwaddr dram_start, uint64_t dram_size, void *fdt); +void riscv_setup_rom_reset_vec(hwaddr saddr, hwaddr rom_base, + hwaddr rom_size, uint64_t kernel_entry, + uint32_t fdt_load_addr, void *fdt); +void riscv_rom_copy_firmware_info(hwaddr rom_base, hwaddr rom_size, + uint32_t reset_vec_size, + uint64_t kernel_entry); #endif /* RISCV_BOOT_H */ diff --git a/include/hw/riscv/boot_opensbi.h b/include/hw/riscv/boot_opensbi.h new file mode 100644 index 0000000000..0d5ddd6c3d --- /dev/null +++ b/include/hw/riscv/boot_opensbi.h @@ -0,0 +1,58 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* + * Copyright (c) 2019 Western Digital Corporation or its affiliates. + * + * Based on include/sbi/{fw_dynamic.h,sbi_scratch.h} from the OpenSBI project. + */ +#ifndef OPENSBI_H +#define OPENSBI_H + +/** Expected value of info magic ('OSBI' ascii string in hex) */ +#define FW_DYNAMIC_INFO_MAGIC_VALUE 0x4942534f + +/** Maximum supported info version */ +#define FW_DYNAMIC_INFO_VERSION 0x2 + +/** Possible next mode values */ +#define FW_DYNAMIC_INFO_NEXT_MODE_U 0x0 +#define FW_DYNAMIC_INFO_NEXT_MODE_S 0x1 +#define FW_DYNAMIC_INFO_NEXT_MODE_M 0x3 + +enum sbi_scratch_options { + /** Disable prints during boot */ + SBI_SCRATCH_NO_BOOT_PRINTS = (1 << 0), + /** Enable runtime debug prints */ + SBI_SCRATCH_DEBUG_PRINTS = (1 << 1), +}; + +/** Representation dynamic info passed by previous booting stage */ +struct fw_dynamic_info { + /** Info magic */ + target_long magic; + /** Info version */ + target_long version; + /** Next booting stage address */ + target_long next_addr; + /** Next booting stage mode */ + target_long next_mode; + /** Options for OpenSBI library */ + target_long options; + /** + * Preferred boot HART id + * + * It is possible that the previous booting stage uses same link + * address as the FW_DYNAMIC firmware. In this case, the relocation + * lottery mechanism can potentially overwrite the previous booting + * stage while other HARTs are still running in the previous booting + * stage leading to boot-time crash. To avoid this boot-time crash, + * the previous booting stage can specify last HART that will jump + * to the FW_DYNAMIC firmware as the preferred boot HART. + * + * To avoid specifying a preferred boot HART, the previous booting + * stage can set it to -1UL which will force the FW_DYNAMIC firmware + * to use the relocation lottery mechanism. + */ + target_long boot_hart; +}; + +#endif diff --git a/include/qemu/osdep.h b/include/qemu/osdep.h index 979a403984..4841b5c6b5 100644 --- a/include/qemu/osdep.h +++ b/include/qemu/osdep.h @@ -655,4 +655,14 @@ static inline void qemu_reset_optind(void) #endif } +/** + * qemu_get_host_name: + * @errp: Error object + * + * Operating system agnostic way of querying host name. + * + * Returns allocated hostname (caller should free), NULL on failure. + */ +char *qemu_get_host_name(Error **errp); + #endif |