diff options
Diffstat (limited to 'include')
44 files changed, 617 insertions, 254 deletions
diff --git a/include/disas/disas.h b/include/disas/disas.h index 2b9293b62a..4930d78ac4 100644 --- a/include/disas/disas.h +++ b/include/disas/disas.h @@ -4,6 +4,8 @@ #include "qemu-common.h" #ifdef NEED_CPU_H +#include "cpu.h" + /* Disassemble this for me please... (debugging). */ void disas(FILE *out, void *code, unsigned long size); void target_disas(FILE *out, CPUState *cpu, target_ulong code, diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 08e5093d0e..3911576431 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -165,6 +165,31 @@ extern unsigned long reserved_va; #define GUEST_ADDR_MAX (reserved_va ? reserved_va : \ (1ul << TARGET_VIRT_ADDR_SPACE_BITS) - 1) +#else + +#include "exec/hwaddr.h" +uint32_t lduw_phys(AddressSpace *as, hwaddr addr); +uint32_t ldl_phys(AddressSpace *as, hwaddr addr); +uint64_t ldq_phys(AddressSpace *as, hwaddr addr); +void stl_phys_notdirty(AddressSpace *as, hwaddr addr, uint32_t val); +void stw_phys(AddressSpace *as, hwaddr addr, uint32_t val); +void stl_phys(AddressSpace *as, hwaddr addr, uint32_t val); +void stq_phys(AddressSpace *as, hwaddr addr, uint64_t val); + +uint32_t address_space_lduw(AddressSpace *as, hwaddr addr, + MemTxAttrs attrs, MemTxResult *result); +uint32_t address_space_ldl(AddressSpace *as, hwaddr addr, + MemTxAttrs attrs, MemTxResult *result); +uint64_t address_space_ldq(AddressSpace *as, hwaddr addr, + MemTxAttrs attrs, MemTxResult *result); +void address_space_stl_notdirty(AddressSpace *as, hwaddr addr, uint32_t val, + MemTxAttrs attrs, MemTxResult *result); +void address_space_stw(AddressSpace *as, hwaddr addr, uint32_t val, + MemTxAttrs attrs, MemTxResult *result); +void address_space_stl(AddressSpace *as, hwaddr addr, uint32_t val, + MemTxAttrs attrs, MemTxResult *result); +void address_space_stq(AddressSpace *as, hwaddr addr, uint64_t val, + MemTxAttrs attrs, MemTxResult *result); #endif /* page related stuff */ diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index 9e839e50cd..04eade5b7b 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -7,10 +7,6 @@ #include "exec/hwaddr.h" #endif -#ifndef NEED_CPU_H -#include "exec/poison.h" -#endif - #include "qemu/bswap.h" #include "qemu/queue.h" #include "qemu/fprintf-fn.h" @@ -113,16 +109,6 @@ void stl_be_phys(AddressSpace *as, hwaddr addr, uint32_t val); void stq_le_phys(AddressSpace *as, hwaddr addr, uint64_t val); void stq_be_phys(AddressSpace *as, hwaddr addr, uint64_t val); -#ifdef NEED_CPU_H -uint32_t lduw_phys(AddressSpace *as, hwaddr addr); -uint32_t ldl_phys(AddressSpace *as, hwaddr addr); -uint64_t ldq_phys(AddressSpace *as, hwaddr addr); -void stl_phys_notdirty(AddressSpace *as, hwaddr addr, uint32_t val); -void stw_phys(AddressSpace *as, hwaddr addr, uint32_t val); -void stl_phys(AddressSpace *as, hwaddr addr, uint32_t val); -void stq_phys(AddressSpace *as, hwaddr addr, uint64_t val); -#endif - void cpu_physical_memory_write_rom(AddressSpace *as, hwaddr addr, const uint8_t *buf, int len); void cpu_flush_icache_range(hwaddr start, int len); diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h index 854e7e3566..5f4e303635 100644 --- a/include/exec/cpu-defs.h +++ b/include/exec/cpu-defs.h @@ -23,6 +23,7 @@ #error cpu.h included from common code #endif +#include "qemu/host-utils.h" #include "qemu/queue.h" #include "tcg-target.h" #ifndef CONFIG_USER_ONLY diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 85528f9941..b6a4a122da 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -21,6 +21,7 @@ #define _EXEC_ALL_H_ #include "qemu-common.h" +#include "exec/tb-context.h" /* allow to see translation results - the slowdown should be negligible, so we leave it */ #define DEBUG_DISAS @@ -40,30 +41,6 @@ typedef ram_addr_t tb_page_addr_t; #define DISAS_UPDATE 2 /* cpu state was modified dynamically */ #define DISAS_TB_JUMP 3 /* only pc was modified statically */ -struct TranslationBlock; -typedef struct TranslationBlock TranslationBlock; - -/* XXX: make safe guess about sizes */ -#define MAX_OP_PER_INSTR 266 - -#if HOST_LONG_BITS == 32 -#define MAX_OPC_PARAM_PER_ARG 2 -#else -#define MAX_OPC_PARAM_PER_ARG 1 -#endif -#define MAX_OPC_PARAM_IARGS 5 -#define MAX_OPC_PARAM_OARGS 1 -#define MAX_OPC_PARAM_ARGS (MAX_OPC_PARAM_IARGS + MAX_OPC_PARAM_OARGS) - -/* A Call op needs up to 4 + 2N parameters on 32-bit archs, - * and up to 4 + N parameters on 64-bit archs - * (N = number of input arguments + output arguments). */ -#define MAX_OPC_PARAM (4 + (MAX_OPC_PARAM_PER_ARG * MAX_OPC_PARAM_ARGS)) -#define OPC_BUF_SIZE 640 -#define OPC_MAX_SIZE (OPC_BUF_SIZE - MAX_OP_PER_INSTR) - -#define OPPARAM_BUF_SIZE (OPC_BUF_SIZE * MAX_OPC_PARAM) - #include "qemu/log.h" void gen_intermediate_code(CPUArchState *env, struct TranslationBlock *tb); @@ -104,15 +81,6 @@ void cpu_reloading_memory_map(void); * Note that with KVM only one address space is supported. */ void cpu_address_space_init(CPUState *cpu, AddressSpace *as, int asidx); -/** - * cpu_get_address_space: - * @cpu: CPU to get address space from - * @asidx: index identifying which address space to get - * - * Return the requested address space of this CPU. @asidx - * specifies which address space to read. - */ -AddressSpace *cpu_get_address_space(CPUState *cpu, int asidx); /* cputlb.c */ /** * tlb_flush_page: @@ -212,9 +180,6 @@ static inline void tlb_flush_by_mmuidx(CPUState *cpu, ...) #define CODE_GEN_ALIGN 16 /* must be >= of the size of a icache line */ -#define CODE_GEN_PHYS_HASH_BITS 15 -#define CODE_GEN_PHYS_HASH_SIZE (1 << CODE_GEN_PHYS_HASH_BITS) - /* Estimated block size for TB allocation. */ /* ??? The following is based on a 2015 survey of x86_64 host output. Better would seem to be some sort of dynamically sized TB array, @@ -289,23 +254,6 @@ struct TranslationBlock { uintptr_t jmp_list_first; }; -#include "qemu/thread.h" - -typedef struct TBContext TBContext; - -struct TBContext { - - TranslationBlock *tbs; - TranslationBlock *tb_phys_hash[CODE_GEN_PHYS_HASH_SIZE]; - int nb_tbs; - /* any access to the tbs or the page table must use this lock */ - QemuMutex tb_lock; - - /* statistics */ - int tb_flush_count; - int tb_phys_invalidate_count; -}; - void tb_free(TranslationBlock *tb); void tb_flush(CPUState *cpu); void tb_phys_invalidate(TranslationBlock *tb, tb_page_addr_t page_addr); diff --git a/include/exec/gdbstub.h b/include/exec/gdbstub.h index d9e8cf7715..8e3f8d8176 100644 --- a/include/exec/gdbstub.h +++ b/include/exec/gdbstub.h @@ -11,6 +11,8 @@ #define GDB_WATCHPOINT_ACCESS 4 #ifdef NEED_CPU_H +#include "cpu.h" + typedef void (*gdb_syscall_complete_cb)(CPUState *cpu, target_ulong ret, target_ulong err); diff --git a/include/exec/helper-head.h b/include/exec/helper-head.h index ec790432d5..74f8f039d8 100644 --- a/include/exec/helper-head.h +++ b/include/exec/helper-head.h @@ -33,17 +33,9 @@ #define dh_alias_s64 i64 #define dh_alias_f32 i32 #define dh_alias_f64 i64 -#ifdef TARGET_LONG_BITS -# if TARGET_LONG_BITS == 32 -# define dh_alias_tl i32 -# else -# define dh_alias_tl i64 -# endif -#endif #define dh_alias_ptr ptr #define dh_alias_void void #define dh_alias_noreturn noreturn -#define dh_alias_env ptr #define dh_alias(t) glue(dh_alias_, t) #define dh_ctype_i32 uint32_t @@ -53,13 +45,24 @@ #define dh_ctype_s64 int64_t #define dh_ctype_f32 float32 #define dh_ctype_f64 float64 -#define dh_ctype_tl target_ulong #define dh_ctype_ptr void * #define dh_ctype_void void #define dh_ctype_noreturn void QEMU_NORETURN -#define dh_ctype_env CPUArchState * #define dh_ctype(t) dh_ctype_##t +#ifdef NEED_CPU_H +# ifdef TARGET_LONG_BITS +# if TARGET_LONG_BITS == 32 +# define dh_alias_tl i32 +# else +# define dh_alias_tl i64 +# endif +# endif +# define dh_alias_env ptr +# define dh_ctype_tl target_ulong +# define dh_ctype_env CPUArchState * +#endif + /* We can't use glue() here because it falls foul of C preprocessor recursive expansion rules. */ #define dh_retvar_decl0_void void diff --git a/include/exec/hwaddr.h b/include/exec/hwaddr.h index c9eb78fba1..bb41588b9d 100644 --- a/include/exec/hwaddr.h +++ b/include/exec/hwaddr.h @@ -3,6 +3,8 @@ #ifndef HWADDR_H #define HWADDR_H +#include <inttypes.h> + #define HWADDR_BITS 64 /* hwaddr is the type of a physical address (its size can be different from 'target_ulong'). */ diff --git a/include/exec/ioport.h b/include/exec/ioport.h index 3bd6722627..a298b89ce1 100644 --- a/include/exec/ioport.h +++ b/include/exec/ioport.h @@ -24,13 +24,6 @@ #ifndef IOPORT_H #define IOPORT_H -#include "qemu-common.h" -#include "qom/object.h" -#include "exec/memory.h" - -typedef uint32_t pio_addr_t; -#define FMT_pioaddr PRIx32 - #define MAX_IOPORTS (64 * 1024) #define IOPORTS_MASK (MAX_IOPORTS - 1) @@ -49,12 +42,12 @@ typedef struct MemoryRegionPortio { extern const MemoryRegionOps unassigned_io_ops; #endif -void cpu_outb(pio_addr_t addr, uint8_t val); -void cpu_outw(pio_addr_t addr, uint16_t val); -void cpu_outl(pio_addr_t addr, uint32_t val); -uint8_t cpu_inb(pio_addr_t addr); -uint16_t cpu_inw(pio_addr_t addr); -uint32_t cpu_inl(pio_addr_t addr); +void cpu_outb(uint32_t addr, uint8_t val); +void cpu_outw(uint32_t addr, uint16_t val); +void cpu_outl(uint32_t addr, uint32_t val); +uint8_t cpu_inb(uint32_t addr); +uint16_t cpu_inw(uint32_t addr); +uint32_t cpu_inl(uint32_t addr); typedef struct PortioList { const struct MemoryRegionPortio *ports; diff --git a/include/exec/memory.h b/include/exec/memory.h index e2a3e9953c..7fb9188c0a 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -1292,23 +1292,6 @@ void address_space_stq_le(AddressSpace *as, hwaddr addr, uint64_t val, void address_space_stq_be(AddressSpace *as, hwaddr addr, uint64_t val, MemTxAttrs attrs, MemTxResult *result); -#ifdef NEED_CPU_H -uint32_t address_space_lduw(AddressSpace *as, hwaddr addr, - MemTxAttrs attrs, MemTxResult *result); -uint32_t address_space_ldl(AddressSpace *as, hwaddr addr, - MemTxAttrs attrs, MemTxResult *result); -uint64_t address_space_ldq(AddressSpace *as, hwaddr addr, - MemTxAttrs attrs, MemTxResult *result); -void address_space_stl_notdirty(AddressSpace *as, hwaddr addr, uint32_t val, - MemTxAttrs attrs, MemTxResult *result); -void address_space_stw(AddressSpace *as, hwaddr addr, uint32_t val, - MemTxAttrs attrs, MemTxResult *result); -void address_space_stl(AddressSpace *as, hwaddr addr, uint32_t val, - MemTxAttrs attrs, MemTxResult *result); -void address_space_stq(AddressSpace *as, hwaddr addr, uint64_t val, - MemTxAttrs attrs, MemTxResult *result); -#endif - /* address_space_translate: translate an address range into an address space * into a MemoryRegion and an address range into that section. Should be * called from an RCU critical section, to avoid that the last reference diff --git a/include/exec/poison.h b/include/exec/poison.h index a4b1eca24f..3ca7929cce 100644 --- a/include/exec/poison.h +++ b/include/exec/poison.h @@ -37,14 +37,6 @@ #pragma GCC poison CPUArchState -#pragma GCC poison lduw_phys -#pragma GCC poison ldl_phys -#pragma GCC poison ldq_phys -#pragma GCC poison stl_phys_notdirty -#pragma GCC poison stw_phys -#pragma GCC poison stl_phys -#pragma GCC poison stq_phys - #pragma GCC poison CPU_INTERRUPT_HARD #pragma GCC poison CPU_INTERRUPT_EXITTB #pragma GCC poison CPU_INTERRUPT_HALT diff --git a/include/exec/tb-context.h b/include/exec/tb-context.h new file mode 100644 index 0000000000..5efe3d9087 --- /dev/null +++ b/include/exec/tb-context.h @@ -0,0 +1,44 @@ +/* + * Internal structs that QEMU exports to TCG + * + * Copyright (c) 2003 Fabrice Bellard + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see <http://www.gnu.org/licenses/>. + */ + +#ifndef QEMU_TB_CONTEXT_H_ +#define QEMU_TB_CONTEXT_H_ + +#include "qemu/thread.h" + +#define CODE_GEN_PHYS_HASH_BITS 15 +#define CODE_GEN_PHYS_HASH_SIZE (1 << CODE_GEN_PHYS_HASH_BITS) + +typedef struct TranslationBlock TranslationBlock; +typedef struct TBContext TBContext; + +struct TBContext { + + TranslationBlock *tbs; + TranslationBlock *tb_phys_hash[CODE_GEN_PHYS_HASH_SIZE]; + int nb_tbs; + /* any access to the tbs or the page table must use this lock */ + QemuMutex tb_lock; + + /* statistics */ + int tb_flush_count; + int tb_phys_invalidate_count; +}; + +#endif diff --git a/include/hw/acpi/acpi.h b/include/hw/acpi/acpi.h index e0978c8b92..dc6ee00885 100644 --- a/include/hw/acpi/acpi.h +++ b/include/hw/acpi/acpi.h @@ -150,13 +150,6 @@ void acpi_pm_tmr_init(ACPIREGS *ar, acpi_update_sci_fn update_sci, MemoryRegion *parent); void acpi_pm_tmr_reset(ACPIREGS *ar); -#include "qemu/timer.h" -static inline int64_t acpi_pm_tmr_get_clock(void) -{ - return muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), PM_TIMER_FREQUENCY, - NANOSECONDS_PER_SECOND); -} - /* PM1a_EVT: piix and ich9 don't implement PM1b. */ uint16_t acpi_pm1_evt_get_sts(ACPIREGS *ar); void acpi_pm1_evt_power_down(ACPIREGS *ar); diff --git a/include/hw/arm/arm.h b/include/hw/arm/arm.h index b2517f9a43..8b49a9833f 100644 --- a/include/hw/arm/arm.h +++ b/include/hw/arm/arm.h @@ -12,9 +12,9 @@ #define ARM_MISC_H 1 #include "exec/memory.h" +#include "target-arm/cpu-qom.h" #include "hw/irq.h" #include "qemu/notify.h" -#include "cpu.h" typedef enum { ARM_ENDIANNESS_UNKNOWN = 0, diff --git a/include/hw/arm/digic.h b/include/hw/arm/digic.h index a739d6ae65..63785baaa8 100644 --- a/include/hw/arm/digic.h +++ b/include/hw/arm/digic.h @@ -19,7 +19,6 @@ #define HW_ARM_DIGIC_H #include "cpu.h" - #include "hw/timer/digic-timer.h" #include "hw/char/digic-uart.h" diff --git a/include/hw/arm/exynos4210.h b/include/hw/arm/exynos4210.h index 5c1820f883..b6d929ddb7 100644 --- a/include/hw/arm/exynos4210.h +++ b/include/hw/arm/exynos4210.h @@ -28,6 +28,7 @@ #include "qemu-common.h" #include "exec/memory.h" +#include "target-arm/cpu-qom.h" #define EXYNOS4210_NCPUS 2 diff --git a/include/hw/arm/fsl-imx6.h b/include/hw/arm/fsl-imx6.h index d24aaee1c1..e9157ea4b3 100644 --- a/include/hw/arm/fsl-imx6.h +++ b/include/hw/arm/fsl-imx6.h @@ -29,6 +29,7 @@ #include "hw/sd/sdhci.h" #include "hw/ssi/imx_spi.h" #include "exec/memory.h" +#include "cpu.h" #define TYPE_FSL_IMX6 "fsl,imx6" #define FSL_IMX6(obj) OBJECT_CHECK(FslIMX6State, (obj), TYPE_FSL_IMX6) diff --git a/include/hw/arm/omap.h b/include/hw/arm/omap.h index 0ad5fb883c..f026c8df57 100644 --- a/include/hw/arm/omap.h +++ b/include/hw/arm/omap.h @@ -20,6 +20,7 @@ #include "exec/memory.h" # define hw_omap_h "omap.h" #include "hw/irq.h" +#include "target-arm/cpu-qom.h" # define OMAP_EMIFS_BASE 0x00000000 # define OMAP2_Q0_BASE 0x00000000 diff --git a/include/hw/arm/pxa.h b/include/hw/arm/pxa.h index 259b852495..074feacd03 100644 --- a/include/hw/arm/pxa.h +++ b/include/hw/arm/pxa.h @@ -10,6 +10,7 @@ # define PXA_H "pxa.h" #include "exec/memory.h" +#include "target-arm/cpu-qom.h" /* Interrupt numbers */ # define PXA2XX_PIC_SSP3 0 diff --git a/include/hw/arm/virt-acpi-build.h b/include/hw/arm/virt-acpi-build.h index 7d3700ebf6..e43330ad65 100644 --- a/include/hw/arm/virt-acpi-build.h +++ b/include/hw/arm/virt-acpi-build.h @@ -22,6 +22,7 @@ #include "qemu-common.h" #include "hw/arm/virt.h" +#include "qemu/notify.h" #define ACPI_GICC_ENABLED 1 diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index ecd8589603..82703d2ecd 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -31,6 +31,7 @@ #define QEMU_ARM_VIRT_H #include "qemu-common.h" +#include "exec/hwaddr.h" #define NUM_GICV2M_SPIS 64 #define NUM_VIRTIO_TRANSPORTS 32 diff --git a/include/hw/hw.h b/include/hw/hw.h index 2cb69d5f5b..3669ebd916 100644 --- a/include/hw/hw.h +++ b/include/hw/hw.h @@ -2,40 +2,17 @@ #ifndef QEMU_HW_H #define QEMU_HW_H - -#if !defined(CONFIG_USER_ONLY) && !defined(NEED_CPU_H) -#include "exec/cpu-common.h" +#ifdef CONFIG_USER_ONLY +#error Cannot include hw/hw.h from user emulation #endif -#include "exec/ioport.h" +#include "exec/cpu-common.h" +#include "qom/object.h" +#include "exec/memory.h" #include "hw/irq.h" -#include "block/aio.h" #include "migration/vmstate.h" -#include "qemu/log.h" #include "qemu/module.h" -#ifdef NEED_CPU_H -#if TARGET_LONG_BITS == 64 -#define qemu_put_betl qemu_put_be64 -#define qemu_get_betl qemu_get_be64 -#define qemu_put_betls qemu_put_be64s -#define qemu_get_betls qemu_get_be64s -#define qemu_put_sbetl qemu_put_sbe64 -#define qemu_get_sbetl qemu_get_sbe64 -#define qemu_put_sbetls qemu_put_sbe64s -#define qemu_get_sbetls qemu_get_sbe64s -#else -#define qemu_put_betl qemu_put_be32 -#define qemu_get_betl qemu_get_be32 -#define qemu_put_betls qemu_put_be32s -#define qemu_get_betls qemu_get_be32s -#define qemu_put_sbetl qemu_put_sbe32 -#define qemu_get_sbetl qemu_get_sbe32 -#define qemu_put_sbetls qemu_put_sbe32s -#define qemu_get_sbetls qemu_get_sbe32s -#endif -#endif - typedef void QEMUResetHandler(void *opaque); void qemu_register_reset(QEMUResetHandler *func, void *opaque); @@ -43,31 +20,4 @@ void qemu_unregister_reset(QEMUResetHandler *func, void *opaque); void QEMU_NORETURN hw_error(const char *fmt, ...) GCC_FMT_ATTR(1, 2); -#ifdef NEED_CPU_H -#if TARGET_LONG_BITS == 64 -#define VMSTATE_UINTTL_V(_f, _s, _v) \ - VMSTATE_UINT64_V(_f, _s, _v) -#define VMSTATE_UINTTL_EQUAL_V(_f, _s, _v) \ - VMSTATE_UINT64_EQUAL_V(_f, _s, _v) -#define VMSTATE_UINTTL_ARRAY_V(_f, _s, _n, _v) \ - VMSTATE_UINT64_ARRAY_V(_f, _s, _n, _v) -#define vmstate_info_uinttl vmstate_info_uint64 -#else -#define VMSTATE_UINTTL_V(_f, _s, _v) \ - VMSTATE_UINT32_V(_f, _s, _v) -#define VMSTATE_UINTTL_EQUAL_V(_f, _s, _v) \ - VMSTATE_UINT32_EQUAL_V(_f, _s, _v) -#define VMSTATE_UINTTL_ARRAY_V(_f, _s, _n, _v) \ - VMSTATE_UINT32_ARRAY_V(_f, _s, _n, _v) -#define vmstate_info_uinttl vmstate_info_uint32 -#endif -#define VMSTATE_UINTTL(_f, _s) \ - VMSTATE_UINTTL_V(_f, _s, 0) -#define VMSTATE_UINTTL_EQUAL(_f, _s) \ - VMSTATE_UINTTL_EQUAL_V(_f, _s, 0) -#define VMSTATE_UINTTL_ARRAY(_f, _s, _n) \ - VMSTATE_UINTTL_ARRAY_V(_f, _s, _n, 0) - -#endif - #endif diff --git a/include/hw/i386/apic.h b/include/hw/i386/apic.h index 51eb6d3884..ea48ea9389 100644 --- a/include/hw/i386/apic.h +++ b/include/hw/i386/apic.h @@ -18,15 +18,10 @@ void cpu_set_apic_tpr(DeviceState *s, uint8_t val); uint8_t cpu_get_apic_tpr(DeviceState *s); void apic_init_reset(DeviceState *s); void apic_sipi(DeviceState *s); -void apic_handle_tpr_access_report(DeviceState *d, target_ulong ip, - TPRAccess access); void apic_poll_irq(DeviceState *d); void apic_designate_bsp(DeviceState *d, bool bsp); /* pc.c */ DeviceState *cpu_get_current_apic(void); -/* cpu.c */ -bool cpu_is_bsp(X86CPU *cpu); - #endif diff --git a/include/hw/isa/isa.h b/include/hw/isa/isa.h index ffb2ea7cdf..c87fbad47a 100644 --- a/include/hw/isa/isa.h +++ b/include/hw/isa/isa.h @@ -3,8 +3,8 @@ /* ISA bus */ -#include "exec/ioport.h" #include "exec/memory.h" +#include "exec/ioport.h" #include "hw/qdev.h" #define ISA_NUM_IRQS 16 diff --git a/include/hw/m68k/mcf.h b/include/hw/m68k/mcf.h index fbc8dc26df..0f0d2288e6 100644 --- a/include/hw/m68k/mcf.h +++ b/include/hw/m68k/mcf.h @@ -2,6 +2,8 @@ #define HW_MCF_H /* Motorola ColdFire device prototypes. */ +#include "target-m68k/cpu-qom.h" + struct MemoryRegion; /* mcf_uart.c */ diff --git a/include/hw/mips/cpudevs.h b/include/hw/mips/cpudevs.h index b2626f2922..8673daa39d 100644 --- a/include/hw/mips/cpudevs.h +++ b/include/hw/mips/cpudevs.h @@ -1,5 +1,8 @@ #ifndef HW_MIPS_CPUDEVS_H #define HW_MIPS_CPUDEVS_H + +#include "target-mips/cpu-qom.h" + /* Definitions for MIPS CPU internal devices. */ /* mips_addr.c */ @@ -9,9 +12,9 @@ uint64_t cpu_mips_kvm_um_phys_to_kseg0(void *opaque, uint64_t addr); /* mips_int.c */ -void cpu_mips_irq_init_cpu(CPUMIPSState *env); +void cpu_mips_irq_init_cpu(MIPSCPU *cpu); /* mips_timer.c */ -void cpu_mips_clock_init(CPUMIPSState *); +void cpu_mips_clock_init(MIPSCPU *cpu); #endif diff --git a/include/hw/ppc/openpic.h b/include/hw/ppc/openpic.h index ee67098cbc..afe950b409 100644 --- a/include/hw/ppc/openpic.h +++ b/include/hw/ppc/openpic.h @@ -2,7 +2,8 @@ #define __OPENPIC_H__ #include "qemu-common.h" -#include "hw/qdev.h" +#include "hw/qdev-core.h" +#include "qom/cpu.h" #define TYPE_OPENPIC "openpic" diff --git a/include/hw/ppc/ppc.h b/include/hw/ppc/ppc.h index 14efd0ca31..5617dc4a2c 100644 --- a/include/hw/ppc/ppc.h +++ b/include/hw/ppc/ppc.h @@ -1,6 +1,8 @@ #ifndef HW_PPC_H #define HW_PPC_H 1 +#include "target-ppc/cpu-qom.h" + void ppc_set_irq(PowerPCCPU *cpu, int n_IRQ, int level); /* PowerPC hardware exceptions management helpers */ @@ -64,17 +66,21 @@ clk_setup_cb ppc_40x_timers_init (CPUPPCState *env, uint32_t freq, void ppc40x_core_reset(PowerPCCPU *cpu); void ppc40x_chip_reset(PowerPCCPU *cpu); void ppc40x_system_reset(PowerPCCPU *cpu); -void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val); - -extern CPUWriteMemoryFunc * const PPC_io_write[]; -extern CPUReadMemoryFunc * const PPC_io_read[]; void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val); -void ppc40x_irq_init (CPUPPCState *env); -void ppce500_irq_init (CPUPPCState *env); -void ppc6xx_irq_init (CPUPPCState *env); -void ppc970_irq_init (CPUPPCState *env); -void ppcPOWER7_irq_init (CPUPPCState *env); +#if defined(CONFIG_USER_ONLY) +static inline void ppc40x_irq_init(PowerPCCPU *cpu) {} +static inline void ppc6xx_irq_init(PowerPCCPU *cpu) {} +static inline void ppc970_irq_init(PowerPCCPU *cpu) {} +static inline void ppcPOWER7_irq_init(PowerPCCPU *cpu) {} +static inline void ppce500_irq_init(PowerPCCPU *cpu) {} +#else +void ppc40x_irq_init(PowerPCCPU *cpu); +void ppce500_irq_init(PowerPCCPU *cpu); +void ppc6xx_irq_init(PowerPCCPU *cpu); +void ppc970_irq_init(PowerPCCPU *cpu); +void ppcPOWER7_irq_init(PowerPCCPU *cpu); +#endif /* PPC machines for OpenBIOS */ enum { diff --git a/include/hw/ppc/spapr_vio.h b/include/hw/ppc/spapr_vio.h index c9733e7552..5f8b0422f1 100644 --- a/include/hw/ppc/spapr_vio.h +++ b/include/hw/ppc/spapr_vio.h @@ -61,7 +61,7 @@ struct VIOsPAPRDevice { DeviceState qdev; uint32_t reg; uint32_t irq; - target_ulong signal_state; + uint64_t signal_state; VIOsPAPR_CRQ crq; AddressSpace as; MemoryRegion mrroot; diff --git a/include/hw/s390x/css.h b/include/hw/s390x/css.h new file mode 100644 index 0000000000..98b2e2cc79 --- /dev/null +++ b/include/hw/s390x/css.h @@ -0,0 +1,155 @@ +/* + * Channel subsystem structures and definitions. + * + * Copyright 2012 IBM Corp. + * Author(s): Cornelia Huck <cornelia.huck@de.ibm.com> + * + * This work is licensed under the terms of the GNU GPL, version 2 or (at + * your option) any later version. See the COPYING file in the top-level + * directory. + */ + +#ifndef CSS_H +#define CSS_H + +#include "hw/s390x/adapter.h" +#include "hw/s390x/s390_flic.h" +#include "hw/s390x/ioinst.h" + +/* Channel subsystem constants. */ +#define MAX_SCHID 65535 +#define MAX_SSID 3 +#define MAX_CSSID 254 /* 255 is reserved */ +#define MAX_CHPID 255 + +#define MAX_CIWS 62 + +typedef struct CIW { + uint8_t type; + uint8_t command; + uint16_t count; +} QEMU_PACKED CIW; + +typedef struct SenseId { + /* common part */ + uint8_t reserved; /* always 0x'FF' */ + uint16_t cu_type; /* control unit type */ + uint8_t cu_model; /* control unit model */ + uint16_t dev_type; /* device type */ + uint8_t dev_model; /* device model */ + uint8_t unused; /* padding byte */ + /* extended part */ + CIW ciw[MAX_CIWS]; /* variable # of CIWs */ +} QEMU_PACKED SenseId; + +/* Channel measurements, from linux/drivers/s390/cio/cmf.c. */ +typedef struct CMB { + uint16_t ssch_rsch_count; + uint16_t sample_count; + uint32_t device_connect_time; + uint32_t function_pending_time; + uint32_t device_disconnect_time; + uint32_t control_unit_queuing_time; + uint32_t device_active_only_time; + uint32_t reserved[2]; +} QEMU_PACKED CMB; + +typedef struct CMBE { + uint32_t ssch_rsch_count; + uint32_t sample_count; + uint32_t device_connect_time; + uint32_t function_pending_time; + uint32_t device_disconnect_time; + uint32_t control_unit_queuing_time; + uint32_t device_active_only_time; + uint32_t device_busy_time; + uint32_t initial_command_response_time; + uint32_t reserved[7]; +} QEMU_PACKED CMBE; + +typedef struct SubchDev SubchDev; +struct SubchDev { + /* channel-subsystem related things: */ + uint8_t cssid; + uint8_t ssid; + uint16_t schid; + uint16_t devno; + SCHIB curr_status; + uint8_t sense_data[32]; + hwaddr channel_prog; + CCW1 last_cmd; + bool last_cmd_valid; + bool ccw_fmt_1; + bool thinint_active; + uint8_t ccw_no_data_cnt; + /* transport-provided data: */ + int (*ccw_cb) (SubchDev *, CCW1); + void (*disable_cb)(SubchDev *); + SenseId id; + void *driver_data; +}; + +typedef struct IndAddr { + hwaddr addr; + uint64_t map; + unsigned long refcnt; + int len; + QTAILQ_ENTRY(IndAddr) sibling; +} IndAddr; + +IndAddr *get_indicator(hwaddr ind_addr, int len); +void release_indicator(AdapterInfo *adapter, IndAddr *indicator); +int map_indicator(AdapterInfo *adapter, IndAddr *indicator); + +typedef SubchDev *(*css_subch_cb_func)(uint8_t m, uint8_t cssid, uint8_t ssid, + uint16_t schid); +void subch_device_save(SubchDev *s, QEMUFile *f); +int subch_device_load(SubchDev *s, QEMUFile *f); +int css_create_css_image(uint8_t cssid, bool default_image); +bool css_devno_used(uint8_t cssid, uint8_t ssid, uint16_t devno); +void css_subch_assign(uint8_t cssid, uint8_t ssid, uint16_t schid, + uint16_t devno, SubchDev *sch); +void css_sch_build_virtual_schib(SubchDev *sch, uint8_t chpid, uint8_t type); +uint16_t css_build_subchannel_id(SubchDev *sch); +void css_reset(void); +void css_reset_sch(SubchDev *sch); +void css_queue_crw(uint8_t rsc, uint8_t erc, int chain, uint16_t rsid); +void css_generate_sch_crws(uint8_t cssid, uint8_t ssid, uint16_t schid, + int hotplugged, int add); +void css_generate_chp_crws(uint8_t cssid, uint8_t chpid); +void css_generate_css_crws(uint8_t cssid); +void css_clear_sei_pending(void); +void css_adapter_interrupt(uint8_t isc); + +#define CSS_IO_ADAPTER_VIRTIO 1 +int css_register_io_adapter(uint8_t type, uint8_t isc, bool swap, + bool maskable, uint32_t *id); + +#ifndef CONFIG_USER_ONLY +SubchDev *css_find_subch(uint8_t m, uint8_t cssid, uint8_t ssid, + uint16_t schid); +bool css_subch_visible(SubchDev *sch); +void css_conditional_io_interrupt(SubchDev *sch); +int css_do_stsch(SubchDev *sch, SCHIB *schib); +bool css_schid_final(int m, uint8_t cssid, uint8_t ssid, uint16_t schid); +int css_do_msch(SubchDev *sch, const SCHIB *schib); +int css_do_xsch(SubchDev *sch); +int css_do_csch(SubchDev *sch); +int css_do_hsch(SubchDev *sch); +int css_do_ssch(SubchDev *sch, ORB *orb); +int css_do_tsch_get_irb(SubchDev *sch, IRB *irb, int *irb_len); +void css_do_tsch_update_subch(SubchDev *sch); +int css_do_stcrw(CRW *crw); +void css_undo_stcrw(CRW *crw); +int css_do_tpi(IOIntCode *int_code, int lowcore); +int css_collect_chp_desc(int m, uint8_t cssid, uint8_t f_chpid, uint8_t l_chpid, + int rfmt, void *buf); +void css_do_schm(uint8_t mbk, int update, int dct, uint64_t mbo); +int css_enable_mcsse(void); +int css_enable_mss(void); +int css_do_rsch(SubchDev *sch); +int css_do_rchp(uint8_t cssid, uint8_t chpid); +bool css_present(uint8_t cssid); +#endif + +#endif diff --git a/include/hw/s390x/ioinst.h b/include/hw/s390x/ioinst.h new file mode 100644 index 0000000000..12d44c8a02 --- /dev/null +++ b/include/hw/s390x/ioinst.h @@ -0,0 +1,232 @@ +/* + * S/390 channel I/O instructions + * + * Copyright 2012 IBM Corp. + * Author(s): Cornelia Huck <cornelia.huck@de.ibm.com> + * + * This work is licensed under the terms of the GNU GPL, version 2 or (at + * your option) any later version. See the COPYING file in the top-level + * directory. +*/ + +#ifndef IOINST_S390X_H +#define IOINST_S390X_H + +/* + * Channel I/O related definitions, as defined in the Principles + * Of Operation (and taken from the Linux implementation). + */ + +/* subchannel status word (command mode only) */ +typedef struct SCSW { + uint16_t flags; + uint16_t ctrl; + uint32_t cpa; + uint8_t dstat; + uint8_t cstat; + uint16_t count; +} QEMU_PACKED SCSW; + +#define SCSW_FLAGS_MASK_KEY 0xf000 +#define SCSW_FLAGS_MASK_SCTL 0x0800 +#define SCSW_FLAGS_MASK_ESWF 0x0400 +#define SCSW_FLAGS_MASK_CC 0x0300 +#define SCSW_FLAGS_MASK_FMT 0x0080 +#define SCSW_FLAGS_MASK_PFCH 0x0040 +#define SCSW_FLAGS_MASK_ISIC 0x0020 +#define SCSW_FLAGS_MASK_ALCC 0x0010 +#define SCSW_FLAGS_MASK_SSI 0x0008 +#define SCSW_FLAGS_MASK_ZCC 0x0004 +#define SCSW_FLAGS_MASK_ECTL 0x0002 +#define SCSW_FLAGS_MASK_PNO 0x0001 + +#define SCSW_CTRL_MASK_FCTL 0x7000 +#define SCSW_CTRL_MASK_ACTL 0x0fe0 +#define SCSW_CTRL_MASK_STCTL 0x001f + +#define SCSW_FCTL_CLEAR_FUNC 0x1000 +#define SCSW_FCTL_HALT_FUNC 0x2000 +#define SCSW_FCTL_START_FUNC 0x4000 + +#define SCSW_ACTL_SUSP 0x0020 +#define SCSW_ACTL_DEVICE_ACTIVE 0x0040 +#define SCSW_ACTL_SUBCH_ACTIVE 0x0080 +#define SCSW_ACTL_CLEAR_PEND 0x0100 +#define SCSW_ACTL_HALT_PEND 0x0200 +#define SCSW_ACTL_START_PEND 0x0400 +#define SCSW_ACTL_RESUME_PEND 0x0800 + +#define SCSW_STCTL_STATUS_PEND 0x0001 +#define SCSW_STCTL_SECONDARY 0x0002 +#define SCSW_STCTL_PRIMARY 0x0004 +#define SCSW_STCTL_INTERMEDIATE 0x0008 +#define SCSW_STCTL_ALERT 0x0010 + +#define SCSW_DSTAT_ATTENTION 0x80 +#define SCSW_DSTAT_STAT_MOD 0x40 +#define SCSW_DSTAT_CU_END 0x20 +#define SCSW_DSTAT_BUSY 0x10 +#define SCSW_DSTAT_CHANNEL_END 0x08 +#define SCSW_DSTAT_DEVICE_END 0x04 +#define SCSW_DSTAT_UNIT_CHECK 0x02 +#define SCSW_DSTAT_UNIT_EXCEP 0x01 + +#define SCSW_CSTAT_PCI 0x80 +#define SCSW_CSTAT_INCORR_LEN 0x40 +#define SCSW_CSTAT_PROG_CHECK 0x20 +#define SCSW_CSTAT_PROT_CHECK 0x10 +#define SCSW_CSTAT_DATA_CHECK 0x08 +#define SCSW_CSTAT_CHN_CTRL_CHK 0x04 +#define SCSW_CSTAT_INTF_CTRL_CHK 0x02 +#define SCSW_CSTAT_CHAIN_CHECK 0x01 + +/* path management control word */ +typedef struct PMCW { + uint32_t intparm; + uint16_t flags; + uint16_t devno; + uint8_t lpm; + uint8_t pnom; + uint8_t lpum; + uint8_t pim; + uint16_t mbi; + uint8_t pom; + uint8_t pam; + uint8_t chpid[8]; + uint32_t chars; +} QEMU_PACKED PMCW; + +#define PMCW_FLAGS_MASK_QF 0x8000 +#define PMCW_FLAGS_MASK_W 0x4000 +#define PMCW_FLAGS_MASK_ISC 0x3800 +#define PMCW_FLAGS_MASK_ENA 0x0080 +#define PMCW_FLAGS_MASK_LM 0x0060 +#define PMCW_FLAGS_MASK_MME 0x0018 +#define PMCW_FLAGS_MASK_MP 0x0004 +#define PMCW_FLAGS_MASK_TF 0x0002 +#define PMCW_FLAGS_MASK_DNV 0x0001 +#define PMCW_FLAGS_MASK_INVALID 0x0700 + +#define PMCW_CHARS_MASK_ST 0x00e00000 +#define PMCW_CHARS_MASK_MBFC 0x00000004 +#define PMCW_CHARS_MASK_XMWME 0x00000002 +#define PMCW_CHARS_MASK_CSENSE 0x00000001 +#define PMCW_CHARS_MASK_INVALID 0xff1ffff8 + +/* subchannel information block */ +typedef struct SCHIB { + PMCW pmcw; + SCSW scsw; + uint64_t mba; + uint8_t mda[4]; +} QEMU_PACKED SCHIB; + +/* interruption response block */ +typedef struct IRB { + SCSW scsw; + uint32_t esw[5]; + uint32_t ecw[8]; + uint32_t emw[8]; +} QEMU_PACKED IRB; + +/* operation request block */ +typedef struct ORB { + uint32_t intparm; + uint16_t ctrl0; + uint8_t lpm; + uint8_t ctrl1; + uint32_t cpa; +} QEMU_PACKED ORB; + +#define ORB_CTRL0_MASK_KEY 0xf000 +#define ORB_CTRL0_MASK_SPND 0x0800 +#define ORB_CTRL0_MASK_STR 0x0400 +#define ORB_CTRL0_MASK_MOD 0x0200 +#define ORB_CTRL0_MASK_SYNC 0x0100 +#define ORB_CTRL0_MASK_FMT 0x0080 +#define ORB_CTRL0_MASK_PFCH 0x0040 +#define ORB_CTRL0_MASK_ISIC 0x0020 +#define ORB_CTRL0_MASK_ALCC 0x0010 +#define ORB_CTRL0_MASK_SSIC 0x0008 +#define ORB_CTRL0_MASK_C64 0x0002 +#define ORB_CTRL0_MASK_I2K 0x0001 +#define ORB_CTRL0_MASK_INVALID 0x0004 + +#define ORB_CTRL1_MASK_ILS 0x80 +#define ORB_CTRL1_MASK_MIDAW 0x40 +#define ORB_CTRL1_MASK_ORBX 0x01 +#define ORB_CTRL1_MASK_INVALID 0x3e + +/* channel command word (type 0) */ +typedef struct CCW0 { + uint8_t cmd_code; + uint8_t cda0; + uint16_t cda1; + uint8_t flags; + uint8_t reserved; + uint16_t count; +} QEMU_PACKED CCW0; + +/* channel command word (type 1) */ +typedef struct CCW1 { + uint8_t cmd_code; + uint8_t flags; + uint16_t count; + uint32_t cda; +} QEMU_PACKED CCW1; + +#define CCW_FLAG_DC 0x80 +#define CCW_FLAG_CC 0x40 +#define CCW_FLAG_SLI 0x20 +#define CCW_FLAG_SKIP 0x10 +#define CCW_FLAG_PCI 0x08 +#define CCW_FLAG_IDA 0x04 +#define CCW_FLAG_SUSPEND 0x02 + +#define CCW_CMD_NOOP 0x03 +#define CCW_CMD_BASIC_SENSE 0x04 +#define CCW_CMD_TIC 0x08 +#define CCW_CMD_SENSE_ID 0xe4 + +typedef struct CRW { + uint16_t flags; + uint16_t rsid; +} QEMU_PACKED CRW; + +#define CRW_FLAGS_MASK_S 0x4000 +#define CRW_FLAGS_MASK_R 0x2000 +#define CRW_FLAGS_MASK_C 0x1000 +#define CRW_FLAGS_MASK_RSC 0x0f00 +#define CRW_FLAGS_MASK_A 0x0080 +#define CRW_FLAGS_MASK_ERC 0x003f + +#define CRW_ERC_INIT 0x02 +#define CRW_ERC_IPI 0x04 + +#define CRW_RSC_SUBCH 0x3 +#define CRW_RSC_CHP 0x4 +#define CRW_RSC_CSS 0xb + +/* I/O interruption code */ +typedef struct IOIntCode { + uint32_t subsys_id; + uint32_t intparm; + uint32_t interrupt_id; +} QEMU_PACKED IOIntCode; + +/* schid disintegration */ +#define IOINST_SCHID_ONE(_schid) ((_schid & 0x00010000) >> 16) +#define IOINST_SCHID_M(_schid) ((_schid & 0x00080000) >> 19) +#define IOINST_SCHID_CSSID(_schid) ((_schid & 0xff000000) >> 24) +#define IOINST_SCHID_SSID(_schid) ((_schid & 0x00060000) >> 17) +#define IOINST_SCHID_NR(_schid) (_schid & 0x0000ffff) + +#define IO_INT_WORD_ISC(_int_word) ((_int_word & 0x38000000) >> 27) +#define ISC_TO_ISC_BITS(_isc) ((0x80 >> _isc) << 24) + +#define IO_INT_WORD_AI 0x80000000 + +int ioinst_disassemble_sch_ident(uint32_t value, int *m, int *cssid, int *ssid, + int *schid); + +#endif diff --git a/include/hw/sd/sd.h b/include/hw/sd/sd.h index d5d273a449..c8a4b98d5d 100644 --- a/include/hw/sd/sd.h +++ b/include/hw/sd/sd.h @@ -29,6 +29,8 @@ #ifndef __hw_sd_h #define __hw_sd_h 1 +#include "hw/qdev.h" + #define OUT_OF_RANGE (1 << 31) #define ADDRESS_ERROR (1 << 30) #define BLOCK_LEN_ERROR (1 << 29) diff --git a/include/hw/sh4/sh.h b/include/hw/sh4/sh.h index e61de9acc6..070312d921 100644 --- a/include/hw/sh4/sh.h +++ b/include/hw/sh4/sh.h @@ -3,6 +3,7 @@ /* Definitions for SH board emulation. */ #include "hw/sh4/sh_intc.h" +#include "target-sh4/cpu-qom.h" #define A7ADDR(x) ((x) & 0x1fffffff) #define P4ADDR(x) ((x) | 0xe0000000) diff --git a/include/hw/sysbus.h b/include/hw/sysbus.h index cc1dba49bf..a4959378d4 100644 --- a/include/hw/sysbus.h +++ b/include/hw/sysbus.h @@ -72,7 +72,7 @@ struct SysBusDevice { MemoryRegion *memory; } mmio[QDEV_MAX_MMIO]; int num_pio; - pio_addr_t pio[QDEV_MAX_PIO]; + uint32_t pio[QDEV_MAX_PIO]; }; typedef int FindSysbusDeviceFunc(SysBusDevice *sbdev, void *opaque); @@ -81,7 +81,7 @@ void sysbus_init_mmio(SysBusDevice *dev, MemoryRegion *memory); MemoryRegion *sysbus_mmio_get_region(SysBusDevice *dev, int n); void sysbus_init_irq(SysBusDevice *dev, qemu_irq *p); void sysbus_pass_irq(SysBusDevice *dev, SysBusDevice *target); -void sysbus_init_ioports(SysBusDevice *dev, pio_addr_t ioport, pio_addr_t size); +void sysbus_init_ioports(SysBusDevice *dev, uint32_t ioport, uint32_t size); bool sysbus_has_irq(SysBusDevice *dev, int n); diff --git a/include/hw/xen/xen.h b/include/hw/xen/xen.h index 6eb815aace..6365483473 100644 --- a/include/hw/xen/xen.h +++ b/include/hw/xen/xen.h @@ -7,8 +7,10 @@ * /usr/include/xen, so it can be included unconditionally. */ -#include "hw/irq.h" #include "qemu-common.h" +#include "qemu/typedefs.h" +#include "exec/cpu-common.h" +#include "hw/irq.h" /* xen-machine.c */ enum xen_mode { @@ -37,12 +39,11 @@ qemu_irq *xen_interrupt_controller_init(void); void xenstore_store_pv_console_info(int i, struct CharDriverState *chr); -#if defined(NEED_CPU_H) && !defined(CONFIG_USER_ONLY) void xen_hvm_init(PCMachineState *pcms, MemoryRegion **ram_memory); + void xen_ram_alloc(ram_addr_t ram_addr, ram_addr_t size, struct MemoryRegion *mr, Error **errp); void xen_modified_memory(ram_addr_t start, ram_addr_t length); -#endif void xen_register_framebuffer(struct MemoryRegion *mr); diff --git a/include/migration/cpu.h b/include/migration/cpu.h new file mode 100644 index 0000000000..f3abbab650 --- /dev/null +++ b/include/migration/cpu.h @@ -0,0 +1,48 @@ +/* Declarations for use for CPU state serialization. */ +#ifndef MIGRATION_CPU_H +#define MIGRATION_CPU_H + +#if TARGET_LONG_BITS == 64 +#define qemu_put_betl qemu_put_be64 +#define qemu_get_betl qemu_get_be64 +#define qemu_put_betls qemu_put_be64s +#define qemu_get_betls qemu_get_be64s +#define qemu_put_sbetl qemu_put_sbe64 +#define qemu_get_sbetl qemu_get_sbe64 +#define qemu_put_sbetls qemu_put_sbe64s +#define qemu_get_sbetls qemu_get_sbe64s + +#define VMSTATE_UINTTL_V(_f, _s, _v) \ + VMSTATE_UINT64_V(_f, _s, _v) +#define VMSTATE_UINTTL_EQUAL_V(_f, _s, _v) \ + VMSTATE_UINT64_EQUAL_V(_f, _s, _v) +#define VMSTATE_UINTTL_ARRAY_V(_f, _s, _n, _v) \ + VMSTATE_UINT64_ARRAY_V(_f, _s, _n, _v) +#define vmstate_info_uinttl vmstate_info_uint64 +#else +#define qemu_put_betl qemu_put_be32 +#define qemu_get_betl qemu_get_be32 +#define qemu_put_betls qemu_put_be32s +#define qemu_get_betls qemu_get_be32s +#define qemu_put_sbetl qemu_put_sbe32 +#define qemu_get_sbetl qemu_get_sbe32 +#define qemu_put_sbetls qemu_put_sbe32s +#define qemu_get_sbetls qemu_get_sbe32s + +#define VMSTATE_UINTTL_V(_f, _s, _v) \ + VMSTATE_UINT32_V(_f, _s, _v) +#define VMSTATE_UINTTL_EQUAL_V(_f, _s, _v) \ + VMSTATE_UINT32_EQUAL_V(_f, _s, _v) +#define VMSTATE_UINTTL_ARRAY_V(_f, _s, _n, _v) \ + VMSTATE_UINT32_ARRAY_V(_f, _s, _n, _v) +#define vmstate_info_uinttl vmstate_info_uint32 +#endif + +#define VMSTATE_UINTTL(_f, _s) \ + VMSTATE_UINTTL_V(_f, _s, 0) +#define VMSTATE_UINTTL_EQUAL(_f, _s) \ + VMSTATE_UINTTL_EQUAL_V(_f, _s, 0) +#define VMSTATE_UINTTL_ARRAY(_f, _s, _n) \ + VMSTATE_UINTTL_ARRAY_V(_f, _s, _n, 0) + +#endif diff --git a/include/qemu-common.h b/include/qemu-common.h index 163bcbb861..835cbc68b8 100644 --- a/include/qemu-common.h +++ b/include/qemu-common.h @@ -21,25 +21,6 @@ #define TFR(expr) do { if ((expr) != -1) break; } while (errno == EINTR) #include "qemu/option.h" -#include "qemu/host-utils.h" - -void cpu_ticks_init(void); - -/* icount */ -void configure_icount(QemuOpts *opts, Error **errp); -extern int use_icount; -extern int icount_align_option; -/* drift information for info jit command */ -extern int64_t max_delay; -extern int64_t max_advance; -void dump_drift_info(FILE *f, fprintf_function cpu_fprintf); - -#include "qemu/bswap.h" - -/* FIXME: Remove NEED_CPU_H. */ -#ifdef NEED_CPU_H -#include "cpu.h" -#endif /* !defined(NEED_CPU_H) */ /* main function, renamed */ #if defined(CONFIG_COCOA) @@ -100,19 +81,6 @@ bool tcg_enabled(void); void cpu_exec_init_all(void); -/* Unblock cpu */ -void qemu_cpu_kick_self(void); - -/* work queue */ -struct qemu_work_item { - struct qemu_work_item *next; - void (*func)(void *data); - void *data; - int done; - bool free; -}; - - /** * Sends a (part of) iovec down a socket, yielding when the socket is full, or * Receives data into a (part of) iovec from a socket, diff --git a/include/qemu/log.h b/include/qemu/log.h index c52f136ac1..234fa81153 100644 --- a/include/qemu/log.h +++ b/include/qemu/log.h @@ -104,21 +104,8 @@ typedef struct QEMULogItem { extern const QEMULogItem qemu_log_items[]; -/* This is the function that actually does the work of - * changing the log level; it should only be accessed via - * the qemu_set_log() wrapper. - */ -void do_qemu_set_log(int log_flags, bool use_own_buffers); - -static inline void qemu_set_log(int log_flags) -{ -#ifdef CONFIG_USER_ONLY - do_qemu_set_log(log_flags, true); -#else - do_qemu_set_log(log_flags, false); -#endif -} - +void qemu_set_log(int log_flags); +void qemu_log_needs_buffers(void); void qemu_set_log_filename(const char *filename); void qemu_set_dfilter_ranges(const char *ranges); bool qemu_log_in_addr_range(uint64_t addr); diff --git a/include/qemu/osdep.h b/include/qemu/osdep.h index 2e930a92ce..268ec66958 100644 --- a/include/qemu/osdep.h +++ b/include/qemu/osdep.h @@ -30,6 +30,8 @@ #include "config-host.h" #ifdef NEED_CPU_H #include "config-target.h" +#else +#include "exec/poison.h" #endif #include "qemu/compiler.h" diff --git a/include/qemu/timer.h b/include/qemu/timer.h index 471969a24d..309f3d09e9 100644 --- a/include/qemu/timer.h +++ b/include/qemu/timer.h @@ -4,6 +4,7 @@ #include "qemu-common.h" #include "qemu/notify.h" #include "qemu/host-utils.h" +#include "sysemu/cpus.h" #define NANOSECONDS_PER_SECOND 1000000000LL diff --git a/include/qom/cpu.h b/include/qom/cpu.h index 4349c465c5..c9ba16ca82 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -222,6 +222,15 @@ struct kvm_run; #define TB_JMP_CACHE_BITS 12 #define TB_JMP_CACHE_SIZE (1 << TB_JMP_CACHE_BITS) +/* work queue */ +struct qemu_work_item { + struct qemu_work_item *next; + void (*func)(void *data); + void *data; + int done; + bool free; +}; + /** * CPUState: * @cpu_index: CPU index (informative). @@ -815,6 +824,16 @@ int cpu_watchpoint_remove(CPUState *cpu, vaddr addr, void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint); void cpu_watchpoint_remove_all(CPUState *cpu, int mask); +/** + * cpu_get_address_space: + * @cpu: CPU to get address space from + * @asidx: index identifying which address space to get + * + * Return the requested address space of this CPU. @asidx + * specifies which address space to read. + */ +AddressSpace *cpu_get_address_space(CPUState *cpu, int asidx); + void QEMU_NORETURN cpu_abort(CPUState *cpu, const char *fmt, ...) GCC_FMT_ATTR(2, 3); void cpu_exec_exit(CPUState *cpu); diff --git a/include/sysemu/cpus.h b/include/sysemu/cpus.h index 3d1e5ba1e1..fe992a8946 100644 --- a/include/sysemu/cpus.h +++ b/include/sysemu/cpus.h @@ -7,6 +7,19 @@ void qemu_init_cpu_loop(void); void resume_all_vcpus(void); void pause_all_vcpus(void); void cpu_stop_current(void); +void cpu_ticks_init(void); + +void configure_icount(QemuOpts *opts, Error **errp); +extern int use_icount; +extern int icount_align_option; + +/* drift information for info jit command */ +extern int64_t max_delay; +extern int64_t max_advance; +void dump_drift_info(FILE *f, fprintf_function cpu_fprintf); + +/* Unblock cpu */ +void qemu_cpu_kick_self(void); void cpu_synchronize_all_states(void); void cpu_synchronize_all_post_reset(void); diff --git a/include/sysemu/dma.h b/include/sysemu/dma.h index 0f7cd4d3ce..d6e96a4298 100644 --- a/include/sysemu/dma.h +++ b/include/sysemu/dma.h @@ -15,7 +15,6 @@ #include "hw/hw.h" #include "block/block.h" #include "block/accounting.h" -#include "sysemu/kvm.h" typedef struct ScatterGatherEntry ScatterGatherEntry; @@ -67,9 +66,7 @@ static inline void dma_barrier(AddressSpace *as, DMADirection dir) * use lighter barriers based on the direction of the * transfer, the DMA context, etc... */ - if (kvm_enabled()) { - smp_mb(); - } + smp_mb(); } /* Checks that the given range of addresses is valid for DMA. This is diff --git a/include/sysemu/kvm.h b/include/sysemu/kvm.h index 0e18f15c94..f9f00e2e56 100644 --- a/include/sysemu/kvm.h +++ b/include/sysemu/kvm.h @@ -218,6 +218,7 @@ int kvm_init_vcpu(CPUState *cpu); int kvm_cpu_exec(CPUState *cpu); #ifdef NEED_CPU_H +#include "cpu.h" void kvm_setup_guest_memory(void *start, size_t size); void kvm_flush_coalesced_mmio_buffer(void); |