diff options
Diffstat (limited to 'target-i386/helper.c')
| -rw-r--r-- | target-i386/helper.c | 73 |
1 files changed, 42 insertions, 31 deletions
diff --git a/target-i386/helper.c b/target-i386/helper.c index 2586aff700..83122bf617 100644 --- a/target-i386/helper.c +++ b/target-i386/helper.c @@ -16,14 +16,8 @@ * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, see <http://www.gnu.org/licenses/>. */ -#include <stdarg.h> -#include <stdlib.h> -#include <stdio.h> -#include <string.h> -#include <inttypes.h> #include "cpu.h" -#include "qemu-common.h" #include "kvm.h" #ifndef CONFIG_USER_ONLY #include "sysemu.h" @@ -33,7 +27,7 @@ //#define DEBUG_MMU /* NOTE: must be called outside the CPU execute loop */ -void cpu_reset(CPUX86State *env) +void cpu_state_reset(CPUX86State *env) { int i; @@ -112,7 +106,7 @@ void cpu_x86_close(CPUX86State *env) g_free(env); } -static void cpu_x86_version(CPUState *env, int *family, int *model) +static void cpu_x86_version(CPUX86State *env, int *family, int *model) { int cpuver = env->cpuid_version; @@ -125,7 +119,7 @@ static void cpu_x86_version(CPUState *env, int *family, int *model) } /* Broadcast MCA signal for processor version 06H_EH and above */ -int cpu_x86_support_mca_broadcast(CPUState *env) +int cpu_x86_support_mca_broadcast(CPUX86State *env) { int family = 0; int model = 0; @@ -197,7 +191,7 @@ static const char *cc_op_str[] = { }; static void -cpu_x86_dump_seg_cache(CPUState *env, FILE *f, fprintf_function cpu_fprintf, +cpu_x86_dump_seg_cache(CPUX86State *env, FILE *f, fprintf_function cpu_fprintf, const char *name, struct SegmentCache *sc) { #ifdef TARGET_X86_64 @@ -254,7 +248,7 @@ done: #define DUMP_CODE_BYTES_TOTAL 50 #define DUMP_CODE_BYTES_BACKWARD 20 -void cpu_dump_state(CPUState *env, FILE *f, fprintf_function cpu_fprintf, +void cpu_dump_state(CPUX86State *env, FILE *f, fprintf_function cpu_fprintf, int flags) { int eflags, i, nb; @@ -863,7 +857,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr, return 1; } -target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr) +target_phys_addr_t cpu_get_phys_page_debug(CPUX86State *env, target_ulong addr) { target_ulong pde_addr, pte_addr; uint64_t pte; @@ -891,8 +885,8 @@ target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr) if (!(pml4e & PG_PRESENT_MASK)) return -1; - pdpe_addr = ((pml4e & ~0xfff) + (((addr >> 30) & 0x1ff) << 3)) & - env->a20_mask; + pdpe_addr = ((pml4e & ~0xfff & ~(PG_NX_MASK | PG_HI_USER_MASK)) + + (((addr >> 30) & 0x1ff) << 3)) & env->a20_mask; pdpe = ldq_phys(pdpe_addr); if (!(pdpe & PG_PRESENT_MASK)) return -1; @@ -906,8 +900,8 @@ target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr) return -1; } - pde_addr = ((pdpe & ~0xfff) + (((addr >> 21) & 0x1ff) << 3)) & - env->a20_mask; + pde_addr = ((pdpe & ~0xfff & ~(PG_NX_MASK | PG_HI_USER_MASK)) + + (((addr >> 21) & 0x1ff) << 3)) & env->a20_mask; pde = ldq_phys(pde_addr); if (!(pde & PG_PRESENT_MASK)) { return -1; @@ -918,11 +912,12 @@ target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr) pte = pde & ~( (page_size - 1) & ~0xfff); /* align to page_size */ } else { /* 4 KB page */ - pte_addr = ((pde & ~0xfff) + (((addr >> 12) & 0x1ff) << 3)) & - env->a20_mask; + pte_addr = ((pde & ~0xfff & ~(PG_NX_MASK | PG_HI_USER_MASK)) + + (((addr >> 12) & 0x1ff) << 3)) & env->a20_mask; page_size = 4096; pte = ldq_phys(pte_addr); } + pte &= ~(PG_NX_MASK | PG_HI_USER_MASK); if (!(pte & PG_PRESENT_MASK)) return -1; } else { @@ -957,7 +952,7 @@ target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr) return paddr; } -void hw_breakpoint_insert(CPUState *env, int index) +void hw_breakpoint_insert(CPUX86State *env, int index) { int type, err = 0; @@ -985,7 +980,7 @@ void hw_breakpoint_insert(CPUState *env, int index) env->cpu_breakpoint[index] = NULL; } -void hw_breakpoint_remove(CPUState *env, int index) +void hw_breakpoint_remove(CPUX86State *env, int index) { if (!env->cpu_breakpoint[index]) return; @@ -1004,7 +999,7 @@ void hw_breakpoint_remove(CPUState *env, int index) } } -int check_hw_breakpoints(CPUState *env, int force_dr6_update) +int check_hw_breakpoints(CPUX86State *env, int force_dr6_update) { target_ulong dr6; int reg, type; @@ -1028,7 +1023,7 @@ int check_hw_breakpoints(CPUState *env, int force_dr6_update) static CPUDebugExcpHandler *prev_debug_excp_handler; -static void breakpoint_handler(CPUState *env) +static void breakpoint_handler(CPUX86State *env) { CPUBreakpoint *bp; @@ -1056,7 +1051,7 @@ static void breakpoint_handler(CPUState *env) typedef struct MCEInjectionParams { Monitor *mon; - CPUState *env; + CPUX86State *env; int bank; uint64_t status; uint64_t mcg_status; @@ -1068,7 +1063,7 @@ typedef struct MCEInjectionParams { static void do_inject_x86_mce(void *data) { MCEInjectionParams *params = data; - CPUState *cenv = params->env; + CPUX86State *cenv = params->env; uint64_t *banks = cenv->mce_banks + 4 * params->bank; cpu_synchronize_state(cenv); @@ -1138,7 +1133,7 @@ static void do_inject_x86_mce(void *data) } } -void cpu_x86_inject_mce(Monitor *mon, CPUState *cenv, int bank, +void cpu_x86_inject_mce(Monitor *mon, CPUX86State *cenv, int bank, uint64_t status, uint64_t mcg_status, uint64_t addr, uint64_t misc, int flags) { @@ -1153,7 +1148,7 @@ void cpu_x86_inject_mce(Monitor *mon, CPUState *cenv, int bank, .flags = flags, }; unsigned bank_num = cenv->mcg_cap & 0xff; - CPUState *env; + CPUX86State *env; if (!cenv->mcg_cap) { monitor_printf(mon, "MCE injection not supported\n"); @@ -1189,6 +1184,22 @@ void cpu_x86_inject_mce(Monitor *mon, CPUState *cenv, int bank, } } } + +void cpu_report_tpr_access(CPUX86State *env, TPRAccess access) +{ + TranslationBlock *tb; + + if (kvm_enabled()) { + env->tpr_access_type = access; + + cpu_interrupt(env, CPU_INTERRUPT_TPR); + } else { + tb = tb_find_pc(env->mem_io_pc); + cpu_restore_state(tb, env, env->mem_io_pc); + + apic_handle_tpr_access_report(env->apic_state, env->eip, access); + } +} #endif /* !CONFIG_USER_ONLY */ static void mce_init(CPUX86State *cenv) @@ -1266,27 +1277,27 @@ CPUX86State *cpu_x86_init(const char *cpu_model) } #if !defined(CONFIG_USER_ONLY) -void do_cpu_init(CPUState *env) +void do_cpu_init(CPUX86State *env) { int sipi = env->interrupt_request & CPU_INTERRUPT_SIPI; uint64_t pat = env->pat; - cpu_reset(env); + cpu_state_reset(env); env->interrupt_request = sipi; env->pat = pat; apic_init_reset(env->apic_state); env->halted = !cpu_is_bsp(env); } -void do_cpu_sipi(CPUState *env) +void do_cpu_sipi(CPUX86State *env) { apic_sipi(env->apic_state); } #else -void do_cpu_init(CPUState *env) +void do_cpu_init(CPUX86State *env) { } -void do_cpu_sipi(CPUState *env) +void do_cpu_sipi(CPUX86State *env) { } #endif |