5 files changed, 32 insertions, 32 deletions

diff --git a/target-lm32/cpu.c b/target-lm32/cpu.c
index bbb7fbf768..23c05ddbed 100644
--- a/target-lm32/cpu.c
+++ b/target-lm32/cpu.c
@@ -36,10 +36,10 @@ static void lm32_cpu_reset(CPUState *s)
 
     lcc->parent_reset(s);
 
-    tlb_flush(env, 1);
-
     /* reset cpu state */
     memset(env, 0, offsetof(CPULM32State, breakpoints));
+
+    tlb_flush(env, 1);
 }
 
 static void lm32_cpu_realizefn(DeviceState *dev, Error **errp)
diff --git a/target-lm32/cpu.h b/target-lm32/cpu.h
index fd50b534fc..bfb9150588 100644
--- a/target-lm32/cpu.h
+++ b/target-lm32/cpu.h
@@ -229,18 +229,8 @@ static inline void cpu_set_tls(CPULM32State *env, target_ulong newtls)
 {
 }
 
-static inline int cpu_interrupts_enabled(CPULM32State *env)
-{
-    return env->ie & IE_IE;
-}
-
 #include "exec/cpu-all.h"
 
-static inline target_ulong cpu_get_pc(CPULM32State *env)
-{
-    return env->pc;
-}
-
 static inline void cpu_get_tb_cpu_state(CPULM32State *env, target_ulong *pc,
                                         target_ulong *cs_base, int *flags)
 {
diff --git a/target-lm32/helper.c b/target-lm32/helper.c
index a0a8399906..03fa5fbe28 100644
--- a/target-lm32/helper.c
+++ b/target-lm32/helper.c
@@ -39,7 +39,12 @@ int cpu_lm32_handle_mmu_fault(CPULM32State *env, target_ulong address, int rw,
 
 hwaddr cpu_get_phys_page_debug(CPULM32State *env, target_ulong addr)
 {
-    return addr & TARGET_PAGE_MASK;
+    addr &= TARGET_PAGE_MASK;
+    if (env->flags & LM32_FLAG_IGNORE_MSB) {
+        return addr & 0x7fffffff;
+    } else {
+        return addr;
+    }
 }
 
 void lm32_cpu_do_interrupt(CPUState *cs)
diff --git a/target-lm32/op_helper.c b/target-lm32/op_helper.c
index ebc94a0681..7ff991e28e 100644
--- a/target-lm32/op_helper.c
+++ b/target-lm32/op_helper.c
@@ -17,13 +17,13 @@
 #define SHIFT 3
 #include "exec/softmmu_template.h"
 
-void helper_raise_exception(CPULM32State *env, uint32_t index)
+void HELPER(raise_exception)(CPULM32State *env, uint32_t index)
 {
     env->exception_index = index;
     cpu_loop_exit(env);
 }
 
-void helper_hlt(CPULM32State *env)
+void HELPER(hlt)(CPULM32State *env)
 {
     CPUState *cs = CPU(lm32_env_get_cpu(env));
 
@@ -32,42 +32,42 @@ void helper_hlt(CPULM32State *env)
     cpu_loop_exit(env);
 }
 
-void helper_wcsr_im(CPULM32State *env, uint32_t im)
+void HELPER(wcsr_im)(CPULM32State *env, uint32_t im)
 {
     lm32_pic_set_im(env->pic_state, im);
 }
 
-void helper_wcsr_ip(CPULM32State *env, uint32_t im)
+void HELPER(wcsr_ip)(CPULM32State *env, uint32_t im)
 {
     lm32_pic_set_ip(env->pic_state, im);
 }
 
-void helper_wcsr_jtx(CPULM32State *env, uint32_t jtx)
+void HELPER(wcsr_jtx)(CPULM32State *env, uint32_t jtx)
 {
     lm32_juart_set_jtx(env->juart_state, jtx);
 }
 
-void helper_wcsr_jrx(CPULM32State *env, uint32_t jrx)
+void HELPER(wcsr_jrx)(CPULM32State *env, uint32_t jrx)
 {
     lm32_juart_set_jrx(env->juart_state, jrx);
 }
 
-uint32_t helper_rcsr_im(CPULM32State *env)
+uint32_t HELPER(rcsr_im)(CPULM32State *env)
 {
     return lm32_pic_get_im(env->pic_state);
 }
 
-uint32_t helper_rcsr_ip(CPULM32State *env)
+uint32_t HELPER(rcsr_ip)(CPULM32State *env)
 {
     return lm32_pic_get_ip(env->pic_state);
 }
 
-uint32_t helper_rcsr_jtx(CPULM32State *env)
+uint32_t HELPER(rcsr_jtx)(CPULM32State *env)
 {
     return lm32_juart_get_jtx(env->juart_state);
 }
 
-uint32_t helper_rcsr_jrx(CPULM32State *env)
+uint32_t HELPER(rcsr_jrx)(CPULM32State *env)
 {
     return lm32_juart_get_jrx(env->juart_state);
 }
diff --git a/target-lm32/translate.c b/target-lm32/translate.c
index 695d9c59b2..e885bb3aeb 100644
--- a/target-lm32/translate.c
+++ b/target-lm32/translate.c
@@ -324,10 +324,20 @@ static inline void gen_compare(DisasContext *dc, int cond)
     int rX = (dc->format == OP_FMT_RR) ? dc->r2 : dc->r1;
     int rY = (dc->format == OP_FMT_RR) ? dc->r0 : dc->r0;
     int rZ = (dc->format == OP_FMT_RR) ? dc->r1 : -1;
+    int i;
 
     if (dc->format == OP_FMT_RI) {
-        tcg_gen_setcondi_tl(cond, cpu_R[rX], cpu_R[rY],
-                sign_extend(dc->imm16, 16));
+        switch (cond) {
+        case TCG_COND_GEU:
+        case TCG_COND_GTU:
+            i = zero_extend(dc->imm16, 16);
+            break;
+        default:
+            i = sign_extend(dc->imm16, 16);
+            break;
+        }
+
+        tcg_gen_setcondi_tl(cond, cpu_R[rX], cpu_R[rY], i);
     } else {
         tcg_gen_setcond_tl(cond, cpu_R[rX], cpu_R[rY], cpu_R[rZ]);
     }
@@ -373,7 +383,7 @@ static void dec_cmpgeu(DisasContext *dc)
 {
     if (dc->format == OP_FMT_RI) {
         LOG_DIS("cmpgeui r%d, r%d, %d\n", dc->r0, dc->r1,
-                sign_extend(dc->imm16, 16));
+                zero_extend(dc->imm16, 16));
     } else {
         LOG_DIS("cmpgeu r%d, r%d, r%d\n", dc->r2, dc->r0, dc->r1);
     }
@@ -385,7 +395,7 @@ static void dec_cmpgu(DisasContext *dc)
 {
     if (dc->format == OP_FMT_RI) {
         LOG_DIS("cmpgui r%d, r%d, %d\n", dc->r0, dc->r1,
-                sign_extend(dc->imm16, 16));
+                zero_extend(dc->imm16, 16));
     } else {
         LOG_DIS("cmpgu r%d, r%d, r%d\n", dc->r2, dc->r0, dc->r1);
     }
@@ -1027,11 +1037,6 @@ static void gen_intermediate_code_internal(CPULM32State *env,
         cpu_abort(env, "LM32: unaligned PC=%x\n", pc_start);
     }
 
-    if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
-        qemu_log("-----------------------------------------\n");
-        log_cpu_state(env, 0);
-    }
-
     next_page_start = (pc_start & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE;
     lj = -1;
     num_insns = 0;