diff options
Diffstat (limited to 'target-mips/cpu.h')
| -rw-r--r-- | target-mips/cpu.h | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/target-mips/cpu.h b/target-mips/cpu.h index 1037f9b7eb..2c4583931c 100644 --- a/target-mips/cpu.h +++ b/target-mips/cpu.h @@ -19,7 +19,7 @@ typedef struct r4k_tlb_t r4k_tlb_t; struct r4k_tlb_t { target_ulong VPN; uint32_t PageMask; - uint8_t ASID; + uint16_t ASID; unsigned int G:1; unsigned int C0:3; unsigned int C1:3; @@ -343,6 +343,7 @@ struct CPUMIPSState { int32_t CP0_Count; target_ulong CP0_EntryHi; #define CP0EnHi_EHINV 10 + target_ulong CP0_EntryHi_ASID_mask; int32_t CP0_Compare; int32_t CP0_Status; #define CP0St_CU3 31 @@ -467,6 +468,7 @@ struct CPUMIPSState { int32_t CP0_Config4_rw_bitmask; #define CP0C4_M 31 #define CP0C4_IE 29 +#define CP0C4_AE 28 #define CP0C4_KScrExist 16 #define CP0C4_MMUExtDef 14 #define CP0C4_FTLBPageSize 8 @@ -503,6 +505,7 @@ struct CPUMIPSState { int CP0_LLAddr_shift; target_ulong CP0_WatchLo[8]; int32_t CP0_WatchHi[8]; +#define CP0WH_ASID 16 target_ulong CP0_XContext; int32_t CP0_Framemask; int32_t CP0_Debug; @@ -616,6 +619,7 @@ struct CPUMIPSState { void *irq[8]; QEMUTimer *timer; /* Internal timer */ MemoryRegion *itc_tag; /* ITC Configuration Tags */ + target_ulong exception_base; /* ExceptionBase input to the core */ }; /** @@ -807,6 +811,7 @@ int cpu_mips_signal_handler(int host_signum, void *pinfo, void *puc); #define cpu_init(cpu_model) CPU(cpu_mips_init(cpu_model)) bool cpu_supports_cps_smp(const char *cpu_model); +void cpu_set_exception_base(int vp_index, target_ulong address); /* TODO QOM'ify CPU reset and remove */ void cpu_state_reset(CPUMIPSState *s); |