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Diffstat (limited to 'target-mips/op_helper.c')
-rw-r--r--target-mips/op_helper.c42
1 files changed, 20 insertions, 22 deletions
diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
index 31d062ad4d..7d74efc45b 100644
--- a/target-mips/op_helper.c
+++ b/target-mips/op_helper.c
@@ -626,8 +626,6 @@ void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec,
 
 /* Complex FPU operations which may need stack space. */
 
-#define FLOAT_SIGN32 (1 << 31)
-#define FLOAT_SIGN64 (1ULL << 63)
 #define FLOAT_ONE32 (0x3f8 << 20)
 #define FLOAT_ONE64 (0x3ffULL << 52)
 #define FLOAT_TWO32 (1 << 30)
@@ -1054,7 +1052,7 @@ FLOAT_OP(name, d)         \
     FDT2 = float64_ ## name (FDT0, FDT1, &env->fpu->fp_status);    \
     update_fcr31();                                                \
     if (GET_FP_CAUSE(env->fpu->fcr31) & FP_INVALID)                \
-        FDT2 = FLOAT_QNAN64;                                       \
+        DT2 = FLOAT_QNAN64;                                        \
 }                         \
 FLOAT_OP(name, s)         \
 {                         \
@@ -1062,7 +1060,7 @@ FLOAT_OP(name, s)         \
     FST2 = float32_ ## name (FST0, FST1, &env->fpu->fp_status);    \
     update_fcr31();                                                \
     if (GET_FP_CAUSE(env->fpu->fcr31) & FP_INVALID)                \
-        FST2 = FLOAT_QNAN32;                                       \
+        WT2 = FLOAT_QNAN32;                                        \
 }                         \
 FLOAT_OP(name, ps)        \
 {                         \
@@ -1071,8 +1069,8 @@ FLOAT_OP(name, ps)        \
     FSTH2 = float32_ ## name (FSTH0, FSTH1, &env->fpu->fp_status); \
     update_fcr31();       \
     if (GET_FP_CAUSE(env->fpu->fcr31) & FP_INVALID) {              \
-        FST2 = FLOAT_QNAN32;                                       \
-        FSTH2 = FLOAT_QNAN32;                                      \
+        WT2 = FLOAT_QNAN32;                                        \
+        WTH2 = FLOAT_QNAN32;                                       \
     }                     \
 }
 FLOAT_BINOP(add)
@@ -1086,14 +1084,14 @@ FLOAT_OP(recip2, d)
 {
     set_float_exception_flags(0, &env->fpu->fp_status);
     FDT2 = float64_mul(FDT0, FDT2, &env->fpu->fp_status);
-    FDT2 = float64_sub(FDT2, FLOAT_ONE64, &env->fpu->fp_status) ^ FLOAT_SIGN64;
+    FDT2 = float64_chs(float64_sub(FDT2, FLOAT_ONE64, &env->fpu->fp_status));
     update_fcr31();
 }
 FLOAT_OP(recip2, s)
 {
     set_float_exception_flags(0, &env->fpu->fp_status);
     FST2 = float32_mul(FST0, FST2, &env->fpu->fp_status);
-    FST2 = float32_sub(FST2, FLOAT_ONE32, &env->fpu->fp_status) ^ FLOAT_SIGN32;
+    FST2 = float32_chs(float32_sub(FST2, FLOAT_ONE32, &env->fpu->fp_status));
     update_fcr31();
 }
 FLOAT_OP(recip2, ps)
@@ -1101,8 +1099,8 @@ FLOAT_OP(recip2, ps)
     set_float_exception_flags(0, &env->fpu->fp_status);
     FST2 = float32_mul(FST0, FST2, &env->fpu->fp_status);
     FSTH2 = float32_mul(FSTH0, FSTH2, &env->fpu->fp_status);
-    FST2 = float32_sub(FST2, FLOAT_ONE32, &env->fpu->fp_status) ^ FLOAT_SIGN32;
-    FSTH2 = float32_sub(FSTH2, FLOAT_ONE32, &env->fpu->fp_status) ^ FLOAT_SIGN32;
+    FST2 = float32_chs(float32_sub(FST2, FLOAT_ONE32, &env->fpu->fp_status));
+    FSTH2 = float32_chs(float32_sub(FSTH2, FLOAT_ONE32, &env->fpu->fp_status));
     update_fcr31();
 }
 
@@ -1111,7 +1109,7 @@ FLOAT_OP(rsqrt2, d)
     set_float_exception_flags(0, &env->fpu->fp_status);
     FDT2 = float64_mul(FDT0, FDT2, &env->fpu->fp_status);
     FDT2 = float64_sub(FDT2, FLOAT_ONE64, &env->fpu->fp_status);
-    FDT2 = float64_div(FDT2, FLOAT_TWO64, &env->fpu->fp_status) ^ FLOAT_SIGN64;
+    FDT2 = float64_chs(float64_div(FDT2, FLOAT_TWO64, &env->fpu->fp_status));
     update_fcr31();
 }
 FLOAT_OP(rsqrt2, s)
@@ -1119,7 +1117,7 @@ FLOAT_OP(rsqrt2, s)
     set_float_exception_flags(0, &env->fpu->fp_status);
     FST2 = float32_mul(FST0, FST2, &env->fpu->fp_status);
     FST2 = float32_sub(FST2, FLOAT_ONE32, &env->fpu->fp_status);
-    FST2 = float32_div(FST2, FLOAT_TWO32, &env->fpu->fp_status) ^ FLOAT_SIGN32;
+    FST2 = float32_chs(float32_div(FST2, FLOAT_TWO32, &env->fpu->fp_status));
     update_fcr31();
 }
 FLOAT_OP(rsqrt2, ps)
@@ -1129,8 +1127,8 @@ FLOAT_OP(rsqrt2, ps)
     FSTH2 = float32_mul(FSTH0, FSTH2, &env->fpu->fp_status);
     FST2 = float32_sub(FST2, FLOAT_ONE32, &env->fpu->fp_status);
     FSTH2 = float32_sub(FSTH2, FLOAT_ONE32, &env->fpu->fp_status);
-    FST2 = float32_div(FST2, FLOAT_TWO32, &env->fpu->fp_status) ^ FLOAT_SIGN32;
-    FSTH2 = float32_div(FSTH2, FLOAT_TWO32, &env->fpu->fp_status) ^ FLOAT_SIGN32;
+    FST2 = float32_chs(float32_div(FST2, FLOAT_TWO32, &env->fpu->fp_status));
+    FSTH2 = float32_chs(float32_div(FSTH2, FLOAT_TWO32, &env->fpu->fp_status));
     update_fcr31();
 }
 
@@ -1164,8 +1162,8 @@ void do_cmp_d_ ## op (long cc)                 \
 void do_cmpabs_d_ ## op (long cc)              \
 {                                              \
     int c;                                     \
-    FDT0 &= ~FLOAT_SIGN64;                     \
-    FDT1 &= ~FLOAT_SIGN64;                     \
+    FDT0 = float64_chs(FDT0);                  \
+    FDT1 = float64_chs(FDT1);                  \
     c = cond;                                  \
     update_fcr31();                            \
     if (c)                                     \
@@ -1222,8 +1220,8 @@ void do_cmp_s_ ## op (long cc)                 \
 void do_cmpabs_s_ ## op (long cc)              \
 {                                              \
     int c;                                     \
-    FST0 &= ~FLOAT_SIGN32;                     \
-    FST1 &= ~FLOAT_SIGN32;                     \
+    FST0 = float32_abs(FST0);                  \
+    FST1 = float32_abs(FST1);                  \
     c = cond;                                  \
     update_fcr31();                            \
     if (c)                                     \
@@ -1285,10 +1283,10 @@ void do_cmp_ps_ ## op (long cc)                \
 void do_cmpabs_ps_ ## op (long cc)             \
 {                                              \
     int cl, ch;                                \
-    FST0 &= ~FLOAT_SIGN32;                     \
-    FSTH0 &= ~FLOAT_SIGN32;                    \
-    FST1 &= ~FLOAT_SIGN32;                     \
-    FSTH1 &= ~FLOAT_SIGN32;                    \
+    FST0 = float32_abs(FST0);                  \
+    FSTH0 = float32_abs(FSTH0);                \
+    FST1 = float32_abs(FST1);                  \
+    FSTH1 = float32_abs(FSTH1);                \
     cl = condl;                                \
     ch = condh;                                \
     update_fcr31();                            \