diff options
Diffstat (limited to 'target-ppc/cpu.h')
| -rw-r--r-- | target-ppc/cpu.h | 47 |
1 files changed, 26 insertions, 21 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index fbcf4881a8..ca6f1cb58c 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -71,7 +71,7 @@ #endif /* defined (TARGET_PPC64) */ -#define CPUState struct CPUPPCState +#define CPUArchState struct CPUPPCState #include "cpu-defs.h" @@ -1173,12 +1173,12 @@ void store_40x_dbcr0 (CPUPPCState *env, uint32_t val); void store_40x_sler (CPUPPCState *env, uint32_t val); void store_booke_tcr (CPUPPCState *env, target_ulong val); void store_booke_tsr (CPUPPCState *env, target_ulong val); -void booke206_flush_tlb(CPUState *env, int flags, const int check_iprot); -target_phys_addr_t booke206_tlb_to_page_size(CPUState *env, ppcmas_tlb_t *tlb); -int ppcemb_tlb_check(CPUState *env, ppcemb_tlb_t *tlb, +void booke206_flush_tlb(CPUPPCState *env, int flags, const int check_iprot); +target_phys_addr_t booke206_tlb_to_page_size(CPUPPCState *env, ppcmas_tlb_t *tlb); +int ppcemb_tlb_check(CPUPPCState *env, ppcemb_tlb_t *tlb, target_phys_addr_t *raddrp, target_ulong address, uint32_t pid, int ext, int i); -int ppcmas_tlb_check(CPUState *env, ppcmas_tlb_t *tlb, +int ppcmas_tlb_check(CPUPPCState *env, ppcmas_tlb_t *tlb, target_phys_addr_t *raddrp, target_ulong address, uint32_t pid); void ppc_tlb_invalidate_all (CPUPPCState *env); @@ -1226,13 +1226,13 @@ int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, uint32_t val); #define MMU_MODE1_SUFFIX _kernel #define MMU_MODE2_SUFFIX _hypv #define MMU_USER_IDX 0 -static inline int cpu_mmu_index (CPUState *env) +static inline int cpu_mmu_index (CPUPPCState *env) { return env->mmu_idx; } #if defined(CONFIG_USER_ONLY) -static inline void cpu_clone_regs(CPUState *env, target_ulong newsp) +static inline void cpu_clone_regs(CPUPPCState *env, target_ulong newsp) { if (newsp) env->gpr[1] = newsp; @@ -1918,8 +1918,10 @@ enum { PPC2_DFP = 0x0000000000000004ULL, /* Embedded.Processor Control */ PPC2_PRCNTL = 0x0000000000000008ULL, + /* Byte-reversed, indexed, double-word load and store */ + PPC2_DBRX = 0x0000000000000010ULL, -#define PPC_TCG_INSNS2 (PPC2_BOOKE206 | PPC2_PRCNTL) +#define PPC_TCG_INSNS2 (PPC2_BOOKE206 | PPC2_PRCNTL | PPC2_DBRX) }; /*****************************************************************************/ @@ -2051,9 +2053,12 @@ enum { PPC_INTERRUPT_PERFM, /* Performance monitor interrupt */ }; +/* CPU should be reset next, restart from scratch afterwards */ +#define CPU_INTERRUPT_RESET CPU_INTERRUPT_TGT_INT_0 + /*****************************************************************************/ -static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc, +static inline void cpu_get_tb_cpu_state(CPUPPCState *env, target_ulong *pc, target_ulong *cs_base, int *flags) { *pc = env->nip; @@ -2061,7 +2066,7 @@ static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc, *flags = env->hflags; } -static inline void cpu_set_tls(CPUState *env, target_ulong newtls) +static inline void cpu_set_tls(CPUPPCState *env, target_ulong newtls) { #if defined(TARGET_PPC64) /* The kernel checks TIF_32BIT here; we don't support loading 32-bit @@ -2073,7 +2078,7 @@ static inline void cpu_set_tls(CPUState *env, target_ulong newtls) } #if !defined(CONFIG_USER_ONLY) -static inline int booke206_tlbm_id(CPUState *env, ppcmas_tlb_t *tlbm) +static inline int booke206_tlbm_id(CPUPPCState *env, ppcmas_tlb_t *tlbm) { uintptr_t tlbml = (uintptr_t)tlbm; uintptr_t tlbl = (uintptr_t)env->tlb.tlbm; @@ -2081,21 +2086,21 @@ static inline int booke206_tlbm_id(CPUState *env, ppcmas_tlb_t *tlbm) return (tlbml - tlbl) / sizeof(env->tlb.tlbm[0]); } -static inline int booke206_tlb_size(CPUState *env, int tlbn) +static inline int booke206_tlb_size(CPUPPCState *env, int tlbn) { uint32_t tlbncfg = env->spr[SPR_BOOKE_TLB0CFG + tlbn]; int r = tlbncfg & TLBnCFG_N_ENTRY; return r; } -static inline int booke206_tlb_ways(CPUState *env, int tlbn) +static inline int booke206_tlb_ways(CPUPPCState *env, int tlbn) { uint32_t tlbncfg = env->spr[SPR_BOOKE_TLB0CFG + tlbn]; int r = tlbncfg >> TLBnCFG_ASSOC_SHIFT; return r; } -static inline int booke206_tlbm_to_tlbn(CPUState *env, ppcmas_tlb_t *tlbm) +static inline int booke206_tlbm_to_tlbn(CPUPPCState *env, ppcmas_tlb_t *tlbm) { int id = booke206_tlbm_id(env, tlbm); int end = 0; @@ -2112,14 +2117,14 @@ static inline int booke206_tlbm_to_tlbn(CPUState *env, ppcmas_tlb_t *tlbm) return 0; } -static inline int booke206_tlbm_to_way(CPUState *env, ppcmas_tlb_t *tlb) +static inline int booke206_tlbm_to_way(CPUPPCState *env, ppcmas_tlb_t *tlb) { int tlbn = booke206_tlbm_to_tlbn(env, tlb); int tlbid = booke206_tlbm_id(env, tlb); return tlbid & (booke206_tlb_ways(env, tlbn) - 1); } -static inline ppcmas_tlb_t *booke206_get_tlbm(CPUState *env, const int tlbn, +static inline ppcmas_tlb_t *booke206_get_tlbm(CPUPPCState *env, const int tlbn, target_ulong ea, int way) { int r; @@ -2146,7 +2151,7 @@ static inline ppcmas_tlb_t *booke206_get_tlbm(CPUState *env, const int tlbn, } /* returns bitmap of supported page sizes for a given TLB */ -static inline uint32_t booke206_tlbnps(CPUState *env, const int tlbn) +static inline uint32_t booke206_tlbnps(CPUPPCState *env, const int tlbn) { bool mav2 = false; uint32_t ret = 0; @@ -2168,20 +2173,20 @@ static inline uint32_t booke206_tlbnps(CPUState *env, const int tlbn) #endif -extern void (*cpu_ppc_hypercall)(CPUState *); +extern void (*cpu_ppc_hypercall)(CPUPPCState *); -static inline bool cpu_has_work(CPUState *env) +static inline bool cpu_has_work(CPUPPCState *env) { return msr_ee && (env->interrupt_request & CPU_INTERRUPT_HARD); } #include "exec-all.h" -static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb) +static inline void cpu_pc_from_tb(CPUPPCState *env, TranslationBlock *tb) { env->nip = tb->pc; } -void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUState *env); +void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUPPCState *env); #endif /* !defined (__CPU_PPC_H__) */ |