diff options
Diffstat (limited to 'target-sparc')
| -rw-r--r-- | target-sparc/cc_helper.c | 66 | ||||
| -rw-r--r-- | target-sparc/cpu.h | 75 | ||||
| -rw-r--r-- | target-sparc/cpu_init.c | 5 | ||||
| -rw-r--r-- | target-sparc/fop_helper.c | 68 | ||||
| -rw-r--r-- | target-sparc/helper.c | 16 | ||||
| -rw-r--r-- | target-sparc/helper.h | 20 | ||||
| -rw-r--r-- | target-sparc/int32_helper.c | 6 | ||||
| -rw-r--r-- | target-sparc/int64_helper.c | 12 | ||||
| -rw-r--r-- | target-sparc/ldst_helper.c | 443 | ||||
| -rw-r--r-- | target-sparc/machine.c | 4 | ||||
| -rw-r--r-- | target-sparc/mmu_helper.c | 28 | ||||
| -rw-r--r-- | target-sparc/op_helper.c | 74 | ||||
| -rw-r--r-- | target-sparc/translate.c | 142 | ||||
| -rw-r--r-- | target-sparc/win_helper.c | 58 |
14 files changed, 503 insertions, 514 deletions
diff --git a/target-sparc/cc_helper.c b/target-sparc/cc_helper.c index 04bd2cf9c7..63bab077d6 100644 --- a/target-sparc/cc_helper.c +++ b/target-sparc/cc_helper.c @@ -20,12 +20,12 @@ #include "cpu.h" #include "helper.h" -static uint32_t compute_all_flags(CPUState *env) +static uint32_t compute_all_flags(CPUSPARCState *env) { return env->psr & PSR_ICC; } -static uint32_t compute_C_flags(CPUState *env) +static uint32_t compute_C_flags(CPUSPARCState *env) { return env->psr & PSR_CARRY; } @@ -43,12 +43,12 @@ static inline uint32_t get_NZ_icc(int32_t dst) } #ifdef TARGET_SPARC64 -static uint32_t compute_all_flags_xcc(CPUState *env) +static uint32_t compute_all_flags_xcc(CPUSPARCState *env) { return env->xcc & PSR_ICC; } -static uint32_t compute_C_flags_xcc(CPUState *env) +static uint32_t compute_C_flags_xcc(CPUSPARCState *env) { return env->xcc & PSR_CARRY; } @@ -76,7 +76,7 @@ static inline uint32_t get_V_div_icc(target_ulong src2) return ret; } -static uint32_t compute_all_div(CPUState *env) +static uint32_t compute_all_div(CPUSPARCState *env) { uint32_t ret; @@ -85,7 +85,7 @@ static uint32_t compute_all_div(CPUState *env) return ret; } -static uint32_t compute_C_div(CPUState *env) +static uint32_t compute_C_div(CPUSPARCState *env) { return 0; } @@ -155,7 +155,7 @@ static inline uint32_t get_V_add_xcc(target_ulong dst, target_ulong src1, return ret; } -static uint32_t compute_all_add_xcc(CPUState *env) +static uint32_t compute_all_add_xcc(CPUSPARCState *env) { uint32_t ret; @@ -165,13 +165,13 @@ static uint32_t compute_all_add_xcc(CPUState *env) return ret; } -static uint32_t compute_C_add_xcc(CPUState *env) +static uint32_t compute_C_add_xcc(CPUSPARCState *env) { return get_C_add_xcc(CC_DST, CC_SRC); } #endif -static uint32_t compute_all_add(CPUState *env) +static uint32_t compute_all_add(CPUSPARCState *env) { uint32_t ret; @@ -181,13 +181,13 @@ static uint32_t compute_all_add(CPUState *env) return ret; } -static uint32_t compute_C_add(CPUState *env) +static uint32_t compute_C_add(CPUSPARCState *env) { return get_C_add_icc(CC_DST, CC_SRC); } #ifdef TARGET_SPARC64 -static uint32_t compute_all_addx_xcc(CPUState *env) +static uint32_t compute_all_addx_xcc(CPUSPARCState *env) { uint32_t ret; @@ -197,7 +197,7 @@ static uint32_t compute_all_addx_xcc(CPUState *env) return ret; } -static uint32_t compute_C_addx_xcc(CPUState *env) +static uint32_t compute_C_addx_xcc(CPUSPARCState *env) { uint32_t ret; @@ -206,7 +206,7 @@ static uint32_t compute_C_addx_xcc(CPUState *env) } #endif -static uint32_t compute_all_addx(CPUState *env) +static uint32_t compute_all_addx(CPUSPARCState *env) { uint32_t ret; @@ -216,7 +216,7 @@ static uint32_t compute_all_addx(CPUState *env) return ret; } -static uint32_t compute_C_addx(CPUState *env) +static uint32_t compute_C_addx(CPUSPARCState *env) { uint32_t ret; @@ -234,7 +234,7 @@ static inline uint32_t get_V_tag_icc(target_ulong src1, target_ulong src2) return ret; } -static uint32_t compute_all_tadd(CPUState *env) +static uint32_t compute_all_tadd(CPUSPARCState *env) { uint32_t ret; @@ -245,7 +245,7 @@ static uint32_t compute_all_tadd(CPUState *env) return ret; } -static uint32_t compute_all_taddtv(CPUState *env) +static uint32_t compute_all_taddtv(CPUSPARCState *env) { uint32_t ret; @@ -320,7 +320,7 @@ static inline uint32_t get_V_sub_xcc(target_ulong dst, target_ulong src1, return ret; } -static uint32_t compute_all_sub_xcc(CPUState *env) +static uint32_t compute_all_sub_xcc(CPUSPARCState *env) { uint32_t ret; @@ -330,13 +330,13 @@ static uint32_t compute_all_sub_xcc(CPUState *env) return ret; } -static uint32_t compute_C_sub_xcc(CPUState *env) +static uint32_t compute_C_sub_xcc(CPUSPARCState *env) { return get_C_sub_xcc(CC_SRC, CC_SRC2); } #endif -static uint32_t compute_all_sub(CPUState *env) +static uint32_t compute_all_sub(CPUSPARCState *env) { uint32_t ret; @@ -346,13 +346,13 @@ static uint32_t compute_all_sub(CPUState *env) return ret; } -static uint32_t compute_C_sub(CPUState *env) +static uint32_t compute_C_sub(CPUSPARCState *env) { return get_C_sub_icc(CC_SRC, CC_SRC2); } #ifdef TARGET_SPARC64 -static uint32_t compute_all_subx_xcc(CPUState *env) +static uint32_t compute_all_subx_xcc(CPUSPARCState *env) { uint32_t ret; @@ -362,7 +362,7 @@ static uint32_t compute_all_subx_xcc(CPUState *env) return ret; } -static uint32_t compute_C_subx_xcc(CPUState *env) +static uint32_t compute_C_subx_xcc(CPUSPARCState *env) { uint32_t ret; @@ -371,7 +371,7 @@ static uint32_t compute_C_subx_xcc(CPUState *env) } #endif -static uint32_t compute_all_subx(CPUState *env) +static uint32_t compute_all_subx(CPUSPARCState *env) { uint32_t ret; @@ -381,7 +381,7 @@ static uint32_t compute_all_subx(CPUState *env) return ret; } -static uint32_t compute_C_subx(CPUState *env) +static uint32_t compute_C_subx(CPUSPARCState *env) { uint32_t ret; @@ -389,7 +389,7 @@ static uint32_t compute_C_subx(CPUState *env) return ret; } -static uint32_t compute_all_tsub(CPUState *env) +static uint32_t compute_all_tsub(CPUSPARCState *env) { uint32_t ret; @@ -400,7 +400,7 @@ static uint32_t compute_all_tsub(CPUState *env) return ret; } -static uint32_t compute_all_tsubtv(CPUState *env) +static uint32_t compute_all_tsubtv(CPUSPARCState *env) { uint32_t ret; @@ -409,26 +409,26 @@ static uint32_t compute_all_tsubtv(CPUState *env) return ret; } -static uint32_t compute_all_logic(CPUState *env) +static uint32_t compute_all_logic(CPUSPARCState *env) { return get_NZ_icc(CC_DST); } -static uint32_t compute_C_logic(CPUState *env) +static uint32_t compute_C_logic(CPUSPARCState *env) { return 0; } #ifdef TARGET_SPARC64 -static uint32_t compute_all_logic_xcc(CPUState *env) +static uint32_t compute_all_logic_xcc(CPUSPARCState *env) { return get_NZ_xcc(CC_DST); } #endif typedef struct CCTable { - uint32_t (*compute_all)(CPUState *env); /* return all the flags */ - uint32_t (*compute_c)(CPUState *env); /* return the C flag */ + uint32_t (*compute_all)(CPUSPARCState *env); /* return all the flags */ + uint32_t (*compute_c)(CPUSPARCState *env); /* return the C flag */ } CCTable; static const CCTable icc_table[CC_OP_NB] = { @@ -463,7 +463,7 @@ static const CCTable xcc_table[CC_OP_NB] = { }; #endif -void helper_compute_psr(CPUState *env) +void helper_compute_psr(CPUSPARCState *env) { uint32_t new_psr; @@ -476,7 +476,7 @@ void helper_compute_psr(CPUState *env) CC_OP = CC_OP_FLAGS; } -uint32_t helper_compute_C_icc(CPUState *env) +uint32_t helper_compute_C_icc(CPUSPARCState *env) { uint32_t ret; diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h index 38a707466c..1025752e8f 100644 --- a/target-sparc/cpu.h +++ b/target-sparc/cpu.h @@ -23,7 +23,7 @@ # endif #endif -#define CPUState struct CPUSPARCState +#define CPUArchState struct CPUSPARCState #include "cpu-defs.h" @@ -378,7 +378,9 @@ struct QEMUFile; void cpu_put_timer(struct QEMUFile *f, CPUTimer *s); void cpu_get_timer(struct QEMUFile *f, CPUTimer *s); -typedef struct CPUSPARCState { +typedef struct CPUSPARCState CPUSPARCState; + +struct CPUSPARCState { target_ulong gregs[8]; /* general registers */ target_ulong *regwptr; /* pointer to current register window */ target_ulong pc; /* program counter */ @@ -413,14 +415,15 @@ typedef struct CPUSPARCState { #if !defined(TARGET_SPARC64) int psref; /* enable fpu */ #endif - target_ulong version; int interrupt_index; - uint32_t nwindows; /* NOTE: we allow 8 more registers to handle wrapping */ target_ulong regbase[MAX_NWINDOWS * 16 + 8]; CPU_COMMON + target_ulong version; + uint32_t nwindows; + /* MMU regs */ #if defined(TARGET_SPARC64) uint64_t lsu; @@ -490,6 +493,9 @@ typedef struct CPUSPARCState { /* UA 2005 hyperprivileged registers */ uint64_t hpstate, htstate[MAXTL_MAX], hintp, htba, hver, hstick_cmpr, ssr; CPUTimer *hstick; // UA 2005 + /* Interrupt vector registers */ + uint64_t ivec_status; + uint64_t ivec_data[3]; uint32_t softint; #define SOFTINT_TIMER 1 #define SOFTINT_STIMER (1 << 16) @@ -499,11 +505,11 @@ typedef struct CPUSPARCState { sparc_def_t *def; void *irq_manager; - void (*qemu_irq_ack)(CPUState *env, void *irq_manager, int intno); + void (*qemu_irq_ack)(CPUSPARCState *env, void *irq_manager, int intno); /* Leon3 cache control */ uint32_t cache_control; -} CPUSPARCState; +}; #ifndef NO_CPU_IO_DEFS /* cpu_init.c */ @@ -515,10 +521,10 @@ int cpu_sparc_handle_mmu_fault(CPUSPARCState *env1, target_ulong address, int rw int mmu_idx); #define cpu_handle_mmu_fault cpu_sparc_handle_mmu_fault target_ulong mmu_probe(CPUSPARCState *env, target_ulong address, int mmulev); -void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUState *env); +void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUSPARCState *env); #if !defined(TARGET_SPARC64) && !defined(CONFIG_USER_ONLY) -int target_memory_rw_debug(CPUState *env, target_ulong addr, +int target_memory_rw_debug(CPUSPARCState *env, target_ulong addr, uint8_t *buf, int len, int is_write); #define TARGET_CPU_MEMORY_RW_DEBUG #endif @@ -531,22 +537,22 @@ void gen_intermediate_code_init(CPUSPARCState *env); int cpu_sparc_exec(CPUSPARCState *s); /* win_helper.c */ -target_ulong cpu_get_psr(CPUState *env1); -void cpu_put_psr(CPUState *env1, target_ulong val); +target_ulong cpu_get_psr(CPUSPARCState *env1); +void cpu_put_psr(CPUSPARCState *env1, target_ulong val); #ifdef TARGET_SPARC64 -target_ulong cpu_get_ccr(CPUState *env1); -void cpu_put_ccr(CPUState *env1, target_ulong val); -target_ulong cpu_get_cwp64(CPUState *env1); -void cpu_put_cwp64(CPUState *env1, int cwp); -void cpu_change_pstate(CPUState *env1, uint32_t new_pstate); +target_ulong cpu_get_ccr(CPUSPARCState *env1); +void cpu_put_ccr(CPUSPARCState *env1, target_ulong val); +target_ulong cpu_get_cwp64(CPUSPARCState *env1); +void cpu_put_cwp64(CPUSPARCState *env1, int cwp); +void cpu_change_pstate(CPUSPARCState *env1, uint32_t new_pstate); #endif -int cpu_cwp_inc(CPUState *env1, int cwp); -int cpu_cwp_dec(CPUState *env1, int cwp); -void cpu_set_cwp(CPUState *env1, int new_cwp); +int cpu_cwp_inc(CPUSPARCState *env1, int cwp); +int cpu_cwp_dec(CPUSPARCState *env1, int cwp); +void cpu_set_cwp(CPUSPARCState *env1, int new_cwp); /* int_helper.c */ -void do_interrupt(CPUState *env); -void leon3_irq_manager(CPUState *env, void *irq_manager, int intno); +void do_interrupt(CPUSPARCState *env); +void leon3_irq_manager(CPUSPARCState *env, void *irq_manager, int intno); /* sun4m.c, sun4u.c */ void cpu_check_irqs(CPUSPARCState *env); @@ -575,12 +581,11 @@ static inline int tlb_compare_context(const SparcTLBEntry *tlb, /* cpu-exec.c */ #if !defined(CONFIG_USER_ONLY) -void cpu_unassigned_access(CPUState *env1, target_phys_addr_t addr, +void cpu_unassigned_access(CPUSPARCState *env1, target_phys_addr_t addr, int is_write, int is_exec, int is_asi, int size); #if defined(TARGET_SPARC64) -target_phys_addr_t cpu_get_phys_page_nofault(CPUState *env, target_ulong addr, +target_phys_addr_t cpu_get_phys_page_nofault(CPUSPARCState *env, target_ulong addr, int mmu_idx); - #endif #endif int cpu_sparc_signal_handler(int host_signum, void *pinfo, void *puc); @@ -615,23 +620,23 @@ int cpu_sparc_signal_handler(int host_signum, void *pinfo, void *puc); #endif #if defined (TARGET_SPARC64) -static inline int cpu_has_hypervisor(CPUState *env1) +static inline int cpu_has_hypervisor(CPUSPARCState *env1) { return env1->def->features & CPU_FEATURE_HYPV; } -static inline int cpu_hypervisor_mode(CPUState *env1) +static inline int cpu_hypervisor_mode(CPUSPARCState *env1) { return cpu_has_hypervisor(env1) && (env1->hpstate & HS_PRIV); } -static inline int cpu_supervisor_mode(CPUState *env1) +static inline int cpu_supervisor_mode(CPUSPARCState *env1) { return env1->pstate & PS_PRIV; } #endif -static inline int cpu_mmu_index(CPUState *env1) +static inline int cpu_mmu_index(CPUSPARCState *env1) { #if defined(CONFIG_USER_ONLY) return MMU_USER_IDX; @@ -650,7 +655,7 @@ static inline int cpu_mmu_index(CPUState *env1) #endif } -static inline int cpu_interrupts_enabled(CPUState *env1) +static inline int cpu_interrupts_enabled(CPUSPARCState *env1) { #if !defined (TARGET_SPARC64) if (env1->psret != 0) @@ -663,7 +668,7 @@ static inline int cpu_interrupts_enabled(CPUState *env1) return 0; } -static inline int cpu_pil_allowed(CPUState *env1, int pil) +static inline int cpu_pil_allowed(CPUSPARCState *env1, int pil) { #if !defined(TARGET_SPARC64) /* level 15 is non-maskable on sparc v8 */ @@ -674,7 +679,7 @@ static inline int cpu_pil_allowed(CPUState *env1, int pil) } #if defined(CONFIG_USER_ONLY) -static inline void cpu_clone_regs(CPUState *env, target_ulong newsp) +static inline void cpu_clone_regs(CPUSPARCState *env, target_ulong newsp) { if (newsp) env->regwptr[22] = newsp; @@ -692,13 +697,15 @@ static inline void cpu_clone_regs(CPUState *env, target_ulong newsp) void cpu_tick_set_count(CPUTimer *timer, uint64_t count); uint64_t cpu_tick_get_count(CPUTimer *timer); void cpu_tick_set_limit(CPUTimer *timer, uint64_t limit); -trap_state* cpu_tsptr(CPUState* env); +trap_state* cpu_tsptr(CPUSPARCState* env); #endif +void do_unaligned_access(CPUSPARCState *env, target_ulong addr, int is_write, + int is_user, void *retaddr); #define TB_FLAG_FPU_ENABLED (1 << 4) #define TB_FLAG_AM_ENABLED (1 << 5) -static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc, +static inline void cpu_get_tb_cpu_state(CPUSPARCState *env, target_ulong *pc, target_ulong *cs_base, int *flags) { *pc = env->pc; @@ -743,7 +750,7 @@ static inline bool tb_am_enabled(int tb_flags) #endif } -static inline bool cpu_has_work(CPUState *env1) +static inline bool cpu_has_work(CPUSPARCState *env1) { return (env1->interrupt_request & CPU_INTERRUPT_HARD) && cpu_interrupts_enabled(env1); @@ -751,7 +758,7 @@ static inline bool cpu_has_work(CPUState *env1) #include "exec-all.h" -static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb) +static inline void cpu_pc_from_tb(CPUSPARCState *env, TranslationBlock *tb) { env->pc = tb->pc; env->npc = tb->cs_base; diff --git a/target-sparc/cpu_init.c b/target-sparc/cpu_init.c index c7269b54a8..5c03f0b893 100644 --- a/target-sparc/cpu_init.c +++ b/target-sparc/cpu_init.c @@ -23,13 +23,14 @@ static int cpu_sparc_find_by_name(sparc_def_t *cpu_def, const char *cpu_model); -void cpu_reset(CPUSPARCState *env) +void cpu_state_reset(CPUSPARCState *env) { if (qemu_loglevel_mask(CPU_LOG_RESET)) { qemu_log("CPU Reset (CPU %d)\n", env->cpu_index); log_cpu_state(env, 0); } + memset(env, 0, offsetof(CPUSPARCState, breakpoints)); tlb_flush(env, 1); env->cwp = 0; #ifndef TARGET_SPARC64 @@ -780,7 +781,7 @@ static void cpu_print_cc(FILE *f, fprintf_function cpu_fprintf, #define REGS_PER_LINE 8 #endif -void cpu_dump_state(CPUState *env, FILE *f, fprintf_function cpu_fprintf, +void cpu_dump_state(CPUSPARCState *env, FILE *f, fprintf_function cpu_fprintf, int flags) { int i, x; diff --git a/target-sparc/fop_helper.c b/target-sparc/fop_helper.c index c7a2512117..9c64ef89fe 100644 --- a/target-sparc/fop_helper.c +++ b/target-sparc/fop_helper.c @@ -23,7 +23,7 @@ #define QT0 (env->qt0) #define QT1 (env->qt1) -static void check_ieee_exceptions(CPUState *env) +static void check_ieee_exceptions(CPUSPARCState *env) { target_ulong status; @@ -57,15 +57,15 @@ static void check_ieee_exceptions(CPUState *env) } } -static inline void clear_float_exceptions(CPUState *env) +static inline void clear_float_exceptions(CPUSPARCState *env) { set_float_exception_flags(0, &env->fp_status); } -#define F_HELPER(name, p) void helper_f##name##p(CPUState *env) +#define F_HELPER(name, p) void helper_f##name##p(CPUSPARCState *env) #define F_BINOP(name) \ - float32 helper_f ## name ## s (CPUState *env, float32 src1, \ + float32 helper_f ## name ## s (CPUSPARCState *env, float32 src1, \ float32 src2) \ { \ float32 ret; \ @@ -74,7 +74,7 @@ static inline void clear_float_exceptions(CPUState *env) check_ieee_exceptions(env); \ return ret; \ } \ - float64 helper_f ## name ## d (CPUState * env, float64 src1,\ + float64 helper_f ## name ## d (CPUSPARCState * env, float64 src1,\ float64 src2) \ { \ float64 ret; \ @@ -96,7 +96,7 @@ F_BINOP(mul); F_BINOP(div); #undef F_BINOP -float64 helper_fsmuld(CPUState *env, float32 src1, float32 src2) +float64 helper_fsmuld(CPUSPARCState *env, float32 src1, float32 src2) { float64 ret; clear_float_exceptions(env); @@ -107,7 +107,7 @@ float64 helper_fsmuld(CPUState *env, float32 src1, float32 src2) return ret; } -void helper_fdmulq(CPUState *env, float64 src1, float64 src2) +void helper_fdmulq(CPUSPARCState *env, float64 src1, float64 src2) { clear_float_exceptions(env); QT0 = float128_mul(float64_to_float128(src1, &env->fp_status), @@ -134,7 +134,7 @@ F_HELPER(neg, q) #endif /* Integer to float conversion. */ -float32 helper_fitos(CPUState *env, int32_t src) +float32 helper_fitos(CPUSPARCState *env, int32_t src) { /* Inexact error possible converting int to float. */ float32 ret; @@ -144,20 +144,20 @@ float32 helper_fitos(CPUState *env, int32_t src) return ret; } -float64 helper_fitod(CPUState *env, int32_t src) +float64 helper_fitod(CPUSPARCState *env, int32_t src) { /* No possible exceptions converting int to double. */ return int32_to_float64(src, &env->fp_status); } -void helper_fitoq(CPUState *env, int32_t src) +void helper_fitoq(CPUSPARCState *env, int32_t src) { /* No possible exceptions converting int to long double. */ QT0 = int32_to_float128(src, &env->fp_status); } #ifdef TARGET_SPARC64 -float32 helper_fxtos(CPUState *env, int64_t src) +float32 helper_fxtos(CPUSPARCState *env, int64_t src) { float32 ret; clear_float_exceptions(env); @@ -166,7 +166,7 @@ float32 helper_fxtos(CPUState *env, int64_t src) return ret; } -float64 helper_fxtod(CPUState *env, int64_t src) +float64 helper_fxtod(CPUSPARCState *env, int64_t src) { float64 ret; clear_float_exceptions(env); @@ -175,7 +175,7 @@ float64 helper_fxtod(CPUState *env, int64_t src) return ret; } -void helper_fxtoq(CPUState *env, int64_t src) +void helper_fxtoq(CPUSPARCState *env, int64_t src) { /* No possible exceptions converting long long to long double. */ QT0 = int64_to_float128(src, &env->fp_status); @@ -184,7 +184,7 @@ void helper_fxtoq(CPUState *env, int64_t src) #undef F_HELPER /* floating point conversion */ -float32 helper_fdtos(CPUState *env, float64 src) +float32 helper_fdtos(CPUSPARCState *env, float64 src) { float32 ret; clear_float_exceptions(env); @@ -193,7 +193,7 @@ float32 helper_fdtos(CPUState *env, float64 src) return ret; } -float64 helper_fstod(CPUState *env, float32 src) +float64 helper_fstod(CPUSPARCState *env, float32 src) { float64 ret; clear_float_exceptions(env); @@ -202,7 +202,7 @@ float64 helper_fstod(CPUState *env, float32 src) return ret; } -float32 helper_fqtos(CPUState *env) +float32 helper_fqtos(CPUSPARCState *env) { float32 ret; clear_float_exceptions(env); @@ -211,14 +211,14 @@ float32 helper_fqtos(CPUState *env) return ret; } -void helper_fstoq(CPUState *env, float32 src) +void helper_fstoq(CPUSPARCState *env, float32 src) { clear_float_exceptions(env); QT0 = float32_to_float128(src, &env->fp_status); check_ieee_exceptions(env); } -float64 helper_fqtod(CPUState *env) +float64 helper_fqtod(CPUSPARCState *env) { float64 ret; clear_float_exceptions(env); @@ -227,7 +227,7 @@ float64 helper_fqtod(CPUState *env) return ret; } -void helper_fdtoq(CPUState *env, float64 src) +void helper_fdtoq(CPUSPARCState *env, float64 src) { clear_float_exceptions(env); QT0 = float64_to_float128(src, &env->fp_status); @@ -235,7 +235,7 @@ void helper_fdtoq(CPUState *env, float64 src) } /* Float to integer conversion. */ -int32_t helper_fstoi(CPUState *env, float32 src) +int32_t helper_fstoi(CPUSPARCState *env, float32 src) { int32_t ret; clear_float_exceptions(env); @@ -244,7 +244,7 @@ int32_t helper_fstoi(CPUState *env, float32 src) return ret; } -int32_t helper_fdtoi(CPUState *env, float64 src) +int32_t helper_fdtoi(CPUSPARCState *env, float64 src) { int32_t ret; clear_float_exceptions(env); @@ -253,7 +253,7 @@ int32_t helper_fdtoi(CPUState *env, float64 src) return ret; } -int32_t helper_fqtoi(CPUState *env) +int32_t helper_fqtoi(CPUSPARCState *env) { int32_t ret; clear_float_exceptions(env); @@ -263,7 +263,7 @@ int32_t helper_fqtoi(CPUState *env) } #ifdef TARGET_SPARC64 -int64_t helper_fstox(CPUState *env, float32 src) +int64_t helper_fstox(CPUSPARCState *env, float32 src) { int64_t ret; clear_float_exceptions(env); @@ -272,7 +272,7 @@ int64_t helper_fstox(CPUState *env, float32 src) return ret; } -int64_t helper_fdtox(CPUState *env, float64 src) +int64_t helper_fdtox(CPUSPARCState *env, float64 src) { int64_t ret; clear_float_exceptions(env); @@ -281,7 +281,7 @@ int64_t helper_fdtox(CPUState *env, float64 src) return ret; } -int64_t helper_fqtox(CPUState *env) +int64_t helper_fqtox(CPUSPARCState *env) { int64_t ret; clear_float_exceptions(env); @@ -302,13 +302,13 @@ float64 helper_fabsd(float64 src) return float64_abs(src); } -void helper_fabsq(CPUState *env) +void helper_fabsq(CPUSPARCState *env) { QT0 = float128_abs(QT1); } #endif -float32 helper_fsqrts(CPUState *env, float32 src) +float32 helper_fsqrts(CPUSPARCState *env, float32 src) { float32 ret; clear_float_exceptions(env); @@ -317,7 +317,7 @@ float32 helper_fsqrts(CPUState *env, float32 src) return ret; } -float64 helper_fsqrtd(CPUState *env, float64 src) +float64 helper_fsqrtd(CPUSPARCState *env, float64 src) { float64 ret; clear_float_exceptions(env); @@ -326,7 +326,7 @@ float64 helper_fsqrtd(CPUState *env, float64 src) return ret; } -void helper_fsqrtq(CPUState *env) +void helper_fsqrtq(CPUSPARCState *env) { clear_float_exceptions(env); QT0 = float128_sqrt(QT1, &env->fp_status); @@ -334,7 +334,7 @@ void helper_fsqrtq(CPUState *env) } #define GEN_FCMP(name, size, reg1, reg2, FS, E) \ - void glue(helper_, name) (CPUState *env) \ + void glue(helper_, name) (CPUSPARCState *env) \ { \ env->fsr &= FSR_FTT_NMASK; \ if (E && (glue(size, _is_any_nan)(reg1) || \ @@ -370,7 +370,7 @@ void helper_fsqrtq(CPUState *env) } \ } #define GEN_FCMP_T(name, size, FS, E) \ - void glue(helper_, name)(CPUState *env, size src1, size src2) \ + void glue(helper_, name)(CPUSPARCState *env, size src1, size src2) \ { \ env->fsr &= FSR_FTT_NMASK; \ if (E && (glue(size, _is_any_nan)(src1) || \ @@ -443,7 +443,7 @@ GEN_FCMP(fcmpeq_fcc3, float128, QT0, QT1, 26, 1); #undef GEN_FCMP_T #undef GEN_FCMP -static inline void set_fsr(CPUState *env) +static inline void set_fsr(CPUSPARCState *env) { int rnd_mode; @@ -465,14 +465,14 @@ static inline void set_fsr(CPUState *env) set_float_rounding_mode(rnd_mode, &env->fp_status); } -void helper_ldfsr(CPUState *env, uint32_t new_fsr) +void helper_ldfsr(CPUSPARCState *env, uint32_t new_fsr) { env->fsr = (new_fsr & FSR_LDFSR_MASK) | (env->fsr & FSR_LDFSR_OLDMASK); set_fsr(env); } #ifdef TARGET_SPARC64 -void helper_ldxfsr(CPUState *env, uint64_t new_fsr) +void helper_ldxfsr(CPUSPARCState *env, uint64_t new_fsr) { env->fsr = (new_fsr & FSR_LDXFSR_MASK) | (env->fsr & FSR_LDXFSR_OLDMASK); set_fsr(env); diff --git a/target-sparc/helper.c b/target-sparc/helper.c index 037a72ce4e..65e1740e19 100644 --- a/target-sparc/helper.c +++ b/target-sparc/helper.c @@ -22,13 +22,13 @@ #include "helper.h" #include "sysemu.h" -void helper_raise_exception(CPUState *env, int tt) +void helper_raise_exception(CPUSPARCState *env, int tt) { env->exception_index = tt; cpu_loop_exit(env); } -void helper_debug(CPUState *env) +void helper_debug(CPUSPARCState *env) { env->exception_index = EXCP_DEBUG; cpu_loop_exit(env); @@ -64,7 +64,7 @@ void helper_tick_set_limit(void *opaque, uint64_t limit) } #endif -static target_ulong helper_udiv_common(CPUState *env, target_ulong a, +static target_ulong helper_udiv_common(CPUSPARCState *env, target_ulong a, target_ulong b, int cc) { int overflow = 0; @@ -92,17 +92,17 @@ static target_ulong helper_udiv_common(CPUState *env, target_ulong a, return x0; } -target_ulong helper_udiv(CPUState *env, target_ulong a, target_ulong b) +target_ulong helper_udiv(CPUSPARCState *env, target_ulong a, target_ulong b) { return helper_udiv_common(env, a, b, 0); } -target_ulong helper_udiv_cc(CPUState *env, target_ulong a, target_ulong b) +target_ulong helper_udiv_cc(CPUSPARCState *env, target_ulong a, target_ulong b) { return helper_udiv_common(env, a, b, 1); } -static target_ulong helper_sdiv_common(CPUState *env, target_ulong a, +static target_ulong helper_sdiv_common(CPUSPARCState *env, target_ulong a, target_ulong b, int cc) { int overflow = 0; @@ -130,12 +130,12 @@ static target_ulong helper_sdiv_common(CPUState *env, target_ulong a, return x0; } -target_ulong helper_sdiv(CPUState *env, target_ulong a, target_ulong b) +target_ulong helper_sdiv(CPUSPARCState *env, target_ulong a, target_ulong b) { return helper_sdiv_common(env, a, b, 0); } -target_ulong helper_sdiv_cc(CPUState *env, target_ulong a, target_ulong b) +target_ulong helper_sdiv_cc(CPUSPARCState *env, target_ulong a, target_ulong b) { return helper_sdiv_common(env, a, b, 1); } diff --git a/target-sparc/helper.h b/target-sparc/helper.h index 1f67b08065..c4d6225102 100644 --- a/target-sparc/helper.h +++ b/target-sparc/helper.h @@ -18,11 +18,11 @@ DEF_HELPER_1(rdcwp, tl, env) DEF_HELPER_2(wrcwp, void, env, tl) DEF_HELPER_FLAGS_2(array8, TCG_CALL_CONST | TCG_CALL_PURE, tl, tl, tl) DEF_HELPER_1(popc, tl, tl) -DEF_HELPER_3(ldda_asi, void, tl, int, int) -DEF_HELPER_4(ldf_asi, void, tl, int, int, int) -DEF_HELPER_4(stf_asi, void, tl, int, int, int) -DEF_HELPER_4(cas_asi, tl, tl, tl, tl, i32) -DEF_HELPER_4(casx_asi, tl, tl, tl, tl, i32) +DEF_HELPER_4(ldda_asi, void, env, tl, int, int) +DEF_HELPER_5(ldf_asi, void, env, tl, int, int, int) +DEF_HELPER_5(stf_asi, void, env, tl, int, int, int) +DEF_HELPER_5(cas_asi, tl, env, tl, tl, tl, i32) +DEF_HELPER_5(casx_asi, tl, env, tl, tl, tl, i32) DEF_HELPER_2(set_softint, void, env, i64) DEF_HELPER_2(clear_softint, void, env, i64) DEF_HELPER_2(write_softint, void, env, i64) @@ -30,7 +30,7 @@ DEF_HELPER_2(tick_set_count, void, ptr, i64) DEF_HELPER_1(tick_get_count, i64, ptr) DEF_HELPER_2(tick_set_limit, void, ptr, i64) #endif -DEF_HELPER_2(check_align, void, tl, i32) +DEF_HELPER_3(check_align, void, env, tl, i32) DEF_HELPER_1(debug, void, env) DEF_HELPER_1(save, void, env) DEF_HELPER_1(restore, void, env) @@ -38,11 +38,11 @@ DEF_HELPER_3(udiv, tl, env, tl, tl) DEF_HELPER_3(udiv_cc, tl, env, tl, tl) DEF_HELPER_3(sdiv, tl, env, tl, tl) DEF_HELPER_3(sdiv_cc, tl, env, tl, tl) -DEF_HELPER_2(ldqf, void, tl, int) -DEF_HELPER_2(stqf, void, tl, int) +DEF_HELPER_3(ldqf, void, env, tl, int) +DEF_HELPER_3(stqf, void, env, tl, int) #if !defined(CONFIG_USER_ONLY) || defined(TARGET_SPARC64) -DEF_HELPER_4(ld_asi, i64, tl, int, int, int) -DEF_HELPER_4(st_asi, void, tl, i64, int, int) +DEF_HELPER_5(ld_asi, i64, env, tl, int, int, int) +DEF_HELPER_5(st_asi, void, env, tl, i64, int, int) #endif DEF_HELPER_2(ldfsr, void, env, i32) DEF_HELPER_FLAGS_1(fabss, TCG_CALL_CONST | TCG_CALL_PURE, f32, f32) diff --git a/target-sparc/int32_helper.c b/target-sparc/int32_helper.c index ac9d01ecba..5e33d50e23 100644 --- a/target-sparc/int32_helper.c +++ b/target-sparc/int32_helper.c @@ -58,7 +58,7 @@ static const char * const excp_names[0x80] = { }; #endif -void do_interrupt(CPUState *env) +void do_interrupt(CPUSPARCState *env) { int cwp, intno = env->exception_index; @@ -132,7 +132,7 @@ void do_interrupt(CPUState *env) } #if !defined(CONFIG_USER_ONLY) -static void leon3_cache_control_int(CPUState *env) +static void leon3_cache_control_int(CPUSPARCState *env) { uint32_t state = 0; @@ -161,7 +161,7 @@ static void leon3_cache_control_int(CPUState *env) } } -void leon3_irq_manager(CPUState *env, void *irq_manager, int intno) +void leon3_irq_manager(CPUSPARCState *env, void *irq_manager, int intno) { leon3_irq_ack(irq_manager, intno); leon3_cache_control_int(env); diff --git a/target-sparc/int64_helper.c b/target-sparc/int64_helper.c index 1d471db999..5e3eff76dd 100644 --- a/target-sparc/int64_helper.c +++ b/target-sparc/int64_helper.c @@ -59,7 +59,7 @@ static const char * const excp_names[0x80] = { }; #endif -void do_interrupt(CPUState *env) +void do_interrupt(CPUSPARCState *env) { int intno = env->exception_index; trap_state *tsptr; @@ -160,12 +160,12 @@ void do_interrupt(CPUState *env) env->exception_index = -1; } -trap_state *cpu_tsptr(CPUState* env) +trap_state *cpu_tsptr(CPUSPARCState* env) { return &env->ts[env->tl & MAXTL_MASK]; } -static bool do_modify_softint(CPUState *env, uint32_t value) +static bool do_modify_softint(CPUSPARCState *env, uint32_t value) { if (env->softint != value) { env->softint = value; @@ -179,21 +179,21 @@ static bool do_modify_softint(CPUState *env, uint32_t value) return false; } -void helper_set_softint(CPUState *env, uint64_t value) +void helper_set_softint(CPUSPARCState *env, uint64_t value) { if (do_modify_softint(env, env->softint | (uint32_t)value)) { trace_int_helper_set_softint(env->softint); } } -void helper_clear_softint(CPUState *env, uint64_t value) +void helper_clear_softint(CPUSPARCState *env, uint64_t value) { if (do_modify_softint(env, env->softint & (uint32_t)~value)) { trace_int_helper_clear_softint(env->softint); } } -void helper_write_softint(CPUState *env, uint64_t value) +void helper_write_softint(CPUSPARCState *env, uint64_t value) { if (do_modify_softint(env, (uint32_t)value)) { trace_int_helper_write_softint(env->softint); diff --git a/target-sparc/ldst_helper.c b/target-sparc/ldst_helper.c index b59707ecd2..1418205f99 100644 --- a/target-sparc/ldst_helper.c +++ b/target-sparc/ldst_helper.c @@ -18,13 +18,8 @@ */ #include "cpu.h" -#include "dyngen-exec.h" #include "helper.h" -#if !defined(CONFIG_USER_ONLY) -#include "softmmu_exec.h" -#endif - //#define DEBUG_MMU //#define DEBUG_MXCC //#define DEBUG_UNALIGNED @@ -70,13 +65,21 @@ #define QT1 (env->qt1) #if !defined(CONFIG_USER_ONLY) -static void do_unassigned_access(target_phys_addr_t addr, int is_write, - int is_exec, int is_asi, int size); -#else -#ifdef TARGET_SPARC64 -static void do_unassigned_access(target_ulong addr, int is_write, int is_exec, - int is_asi, int size); -#endif +#include "softmmu_exec.h" +#define MMUSUFFIX _mmu +#define ALIGNED_ONLY + +#define SHIFT 0 +#include "softmmu_template.h" + +#define SHIFT 1 +#include "softmmu_template.h" + +#define SHIFT 2 +#include "softmmu_template.h" + +#define SHIFT 3 +#include "softmmu_template.h" #endif #if defined(TARGET_SPARC64) && !defined(CONFIG_USER_ONLY) @@ -129,7 +132,7 @@ static uint64_t ultrasparc_tag_target(uint64_t tag_access_register) static void replace_tlb_entry(SparcTLBEntry *tlb, uint64_t tlb_tag, uint64_t tlb_tte, - CPUState *env1) + CPUSPARCState *env1) { target_ulong mask, size, va, offset; @@ -152,7 +155,7 @@ static void replace_tlb_entry(SparcTLBEntry *tlb, } static void demap_tlb(SparcTLBEntry *tlb, target_ulong demap_addr, - const char *strmmu, CPUState *env1) + const char *strmmu, CPUSPARCState *env1) { unsigned int i; target_ulong mask; @@ -213,7 +216,7 @@ static void demap_tlb(SparcTLBEntry *tlb, target_ulong demap_addr, static void replace_tlb_1bit_lru(SparcTLBEntry *tlb, uint64_t tlb_tag, uint64_t tlb_tte, - const char *strmmu, CPUState *env1) + const char *strmmu, CPUSPARCState *env1) { unsigned int i, replace_used; @@ -263,7 +266,7 @@ static void replace_tlb_1bit_lru(SparcTLBEntry *tlb, #endif -static inline target_ulong address_mask(CPUState *env1, target_ulong addr) +static inline target_ulong address_mask(CPUSPARCState *env1, target_ulong addr) { #ifdef TARGET_SPARC64 if (AM_CHECK(env1)) { @@ -300,7 +303,7 @@ static inline int is_translating_asi(int asi) #endif } -static inline target_ulong asi_address_mask(CPUState *env1, +static inline target_ulong asi_address_mask(CPUSPARCState *env, int asi, target_ulong addr) { if (is_translating_asi(asi)) { @@ -310,7 +313,7 @@ static inline target_ulong asi_address_mask(CPUState *env1, } } -void helper_check_align(target_ulong addr, uint32_t align) +void helper_check_align(CPUSPARCState *env, target_ulong addr, uint32_t align) { if (addr & align) { #ifdef DEBUG_UNALIGNED @@ -323,7 +326,7 @@ void helper_check_align(target_ulong addr, uint32_t align) #if !defined(TARGET_SPARC64) && !defined(CONFIG_USER_ONLY) && \ defined(DEBUG_MXCC) -static void dump_mxcc(CPUState *env) +static void dump_mxcc(CPUSPARCState *env) { printf("mxccdata: %016" PRIx64 " %016" PRIx64 " %016" PRIx64 " %016" PRIx64 "\n", @@ -372,7 +375,8 @@ static void dump_asi(const char *txt, target_ulong addr, int asi, int size, /* Leon3 cache control */ -static void leon3_cache_control_st(target_ulong addr, uint64_t val, int size) +static void leon3_cache_control_st(CPUSPARCState *env, target_ulong addr, + uint64_t val, int size) { DPRINTF_CACHE_CONTROL("st addr:%08x, val:%" PRIx64 ", size:%d\n", addr, val, size); @@ -404,7 +408,8 @@ static void leon3_cache_control_st(target_ulong addr, uint64_t val, int size) }; } -static uint64_t leon3_cache_control_ld(target_ulong addr, int size) +static uint64_t leon3_cache_control_ld(CPUSPARCState *env, target_ulong addr, + int size) { uint64_t ret = 0; @@ -436,14 +441,15 @@ static uint64_t leon3_cache_control_ld(target_ulong addr, int size) return ret; } -uint64_t helper_ld_asi(target_ulong addr, int asi, int size, int sign) +uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, int asi, int size, + int sign) { uint64_t ret = 0; #if defined(DEBUG_MXCC) || defined(DEBUG_ASI) uint32_t last_addr = addr; #endif - helper_check_align(addr, size - 1); + helper_check_align(env, addr, size - 1); switch (asi) { case 2: /* SuperSparc MXCC registers and Leon3 cache control */ switch (addr) { @@ -451,7 +457,7 @@ uint64_t helper_ld_asi(target_ulong addr, int asi, int size, int sign) case 0x08: /* Leon3 Instruction Cache config */ case 0x0C: /* Leon3 Date Cache config */ if (env->def->features & CPU_FEATURE_CACHE_CTRL) { - ret = leon3_cache_control_ld(addr, size); + ret = leon3_cache_control_ld(env, addr, size); } break; case 0x01c00a00: /* MXCC control register */ @@ -535,51 +541,51 @@ uint64_t helper_ld_asi(target_ulong addr, int asi, int size, int sign) case 9: /* Supervisor code access */ switch (size) { case 1: - ret = ldub_code(addr); + ret = cpu_ldub_code(env, addr); break; case 2: - ret = lduw_code(addr); + ret = cpu_lduw_code(env, addr); break; default: case 4: - ret = ldl_code(addr); + ret = cpu_ldl_code(env, addr); break; case 8: - ret = ldq_code(addr); + ret = cpu_ldq_code(env, addr); break; } break; case 0xa: /* User data access */ switch (size) { case 1: - ret = ldub_user(addr); + ret = cpu_ldub_user(env, addr); break; case 2: - ret = lduw_user(addr); + ret = cpu_lduw_user(env, addr); break; default: case 4: - ret = ldl_user(addr); + ret = cpu_ldl_user(env, addr); break; case 8: - ret = ldq_user(addr); + ret = cpu_ldq_user(env, addr); break; } break; case 0xb: /* Supervisor data access */ switch (size) { case 1: - ret = ldub_kernel(addr); + ret = cpu_ldub_kernel(env, addr); break; case 2: - ret = lduw_kernel(addr); + ret = cpu_lduw_kernel(env, addr); break; default: case 4: - ret = ldl_kernel(addr); + ret = cpu_ldl_kernel(env, addr); break; case 8: - ret = ldq_kernel(addr); + ret = cpu_ldq_kernel(env, addr); break; } break; @@ -669,7 +675,7 @@ uint64_t helper_ld_asi(target_ulong addr, int asi, int size, int sign) break; case 8: /* User code access, XXX */ default: - do_unassigned_access(addr, 0, 0, asi, size); + cpu_unassigned_access(env, addr, 0, 0, asi, size); ret = 0; break; } @@ -694,9 +700,10 @@ uint64_t helper_ld_asi(target_ulong addr, int asi, int size, int sign) return ret; } -void helper_st_asi(target_ulong addr, uint64_t val, int asi, int size) +void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val, int asi, + int size) { - helper_check_align(addr, size - 1); + helper_check_align(env, addr, size - 1); switch (asi) { case 2: /* SuperSparc MXCC registers and Leon3 cache control */ switch (addr) { @@ -704,7 +711,7 @@ void helper_st_asi(target_ulong addr, uint64_t val, int asi, int size) case 0x08: /* Leon3 Instruction Cache config */ case 0x0C: /* Leon3 Date Cache config */ if (env->def->features & CPU_FEATURE_CACHE_CTRL) { - leon3_cache_control_st(addr, val, size); + leon3_cache_control_st(env, addr, val, size); } break; @@ -902,34 +909,34 @@ void helper_st_asi(target_ulong addr, uint64_t val, int asi, int size) case 0xa: /* User data access */ switch (size) { case 1: - stb_user(addr, val); + cpu_stb_user(env, addr, val); break; case 2: - stw_user(addr, val); + cpu_stw_user(env, addr, val); break; default: case 4: - stl_user(addr, val); + cpu_stl_user(env, addr, val); break; case 8: - stq_user(addr, val); + cpu_stq_user(env, addr, val); break; } break; case 0xb: /* Supervisor data access */ switch (size) { case 1: - stb_kernel(addr, val); + cpu_stb_kernel(env, addr, val); break; case 2: - stw_kernel(addr, val); + cpu_stw_kernel(env, addr, val); break; default: case 4: - stl_kernel(addr, val); + cpu_stl_kernel(env, addr, val); break; case 8: - stq_kernel(addr, val); + cpu_stq_kernel(env, addr, val); break; } break; @@ -952,8 +959,8 @@ void helper_st_asi(target_ulong addr, uint64_t val, int asi, int size) uint32_t src = val & ~3, dst = addr & ~3, temp; for (i = 0; i < 32; i += 4, src += 4, dst += 4) { - temp = ldl_kernel(src); - stl_kernel(dst, temp); + temp = cpu_ldl_kernel(env, src); + cpu_stl_kernel(env, dst, temp); } } break; @@ -965,7 +972,7 @@ void helper_st_asi(target_ulong addr, uint64_t val, int asi, int size) uint32_t dst = addr & 7; for (i = 0; i < 32; i += 8, dst += 8) { - stq_kernel(dst, val); + cpu_stq_kernel(env, dst, val); } } break; @@ -1056,7 +1063,7 @@ void helper_st_asi(target_ulong addr, uint64_t val, int asi, int size) case 8: /* User code access, XXX */ case 9: /* Supervisor code access, XXX */ default: - do_unassigned_access(addr, 1, 0, asi, size); + cpu_unassigned_access(env, addr, 1, 0, asi, size); break; } #ifdef DEBUG_ASI @@ -1068,7 +1075,8 @@ void helper_st_asi(target_ulong addr, uint64_t val, int asi, int size) #else /* TARGET_SPARC64 */ #ifdef CONFIG_USER_ONLY -uint64_t helper_ld_asi(target_ulong addr, int asi, int size, int sign) +uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, int asi, int size, + int sign) { uint64_t ret = 0; #if defined(DEBUG_ASI) @@ -1079,7 +1087,7 @@ uint64_t helper_ld_asi(target_ulong addr, int asi, int size, int sign) helper_raise_exception(env, TT_PRIV_ACT); } - helper_check_align(addr, size - 1); + helper_check_align(env, addr, size - 1); addr = asi_address_mask(env, asi, addr); switch (asi) { @@ -1174,7 +1182,8 @@ uint64_t helper_ld_asi(target_ulong addr, int asi, int size, int sign) return ret; } -void helper_st_asi(target_ulong addr, target_ulong val, int asi, int size) +void helper_st_asi(CPUSPARCState *env, target_ulong addr, target_ulong val, + int asi, int size) { #ifdef DEBUG_ASI dump_asi("write", addr, asi, size, val); @@ -1183,7 +1192,7 @@ void helper_st_asi(target_ulong addr, target_ulong val, int asi, int size) helper_raise_exception(env, TT_PRIV_ACT); } - helper_check_align(addr, size - 1); + helper_check_align(env, addr, size - 1); addr = asi_address_mask(env, asi, addr); /* Convert to little endian */ @@ -1238,14 +1247,15 @@ void helper_st_asi(target_ulong addr, target_ulong val, int asi, int size) case 0x8a: /* Primary no-fault LE, RO */ case 0x8b: /* Secondary no-fault LE, RO */ default: - do_unassigned_access(addr, 1, 0, 1, size); + helper_raise_exception(env, TT_DATA_ACCESS); return; } } #else /* CONFIG_USER_ONLY */ -uint64_t helper_ld_asi(target_ulong addr, int asi, int size, int sign) +uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, int asi, int size, + int sign) { uint64_t ret = 0; #if defined(DEBUG_ASI) @@ -1261,7 +1271,7 @@ uint64_t helper_ld_asi(target_ulong addr, int asi, int size, int sign) helper_raise_exception(env, TT_PRIV_ACT); } - helper_check_align(addr, size - 1); + helper_check_align(env, addr, size - 1); addr = asi_address_mask(env, asi, addr); /* process nonfaulting loads first */ @@ -1302,17 +1312,17 @@ uint64_t helper_ld_asi(target_ulong addr, int asi, int size, int sign) if (cpu_hypervisor_mode(env)) { switch (size) { case 1: - ret = ldub_hypv(addr); + ret = cpu_ldub_hypv(env, addr); break; case 2: - ret = lduw_hypv(addr); + ret = cpu_lduw_hypv(env, addr); break; case 4: - ret = ldl_hypv(addr); + ret = cpu_ldl_hypv(env, addr); break; default: case 8: - ret = ldq_hypv(addr); + ret = cpu_ldq_hypv(env, addr); break; } } else { @@ -1320,33 +1330,33 @@ uint64_t helper_ld_asi(target_ulong addr, int asi, int size, int sign) if (asi & 1) { switch (size) { case 1: - ret = ldub_kernel_secondary(addr); + ret = cpu_ldub_kernel_secondary(env, addr); break; case 2: - ret = lduw_kernel_secondary(addr); + ret = cpu_lduw_kernel_secondary(env, addr); break; case 4: - ret = ldl_kernel_secondary(addr); + ret = cpu_ldl_kernel_secondary(env, addr); break; default: case 8: - ret = ldq_kernel_secondary(addr); + ret = cpu_ldq_kernel_secondary(env, addr); break; } } else { switch (size) { case 1: - ret = ldub_kernel(addr); + ret = cpu_ldub_kernel(env, addr); break; case 2: - ret = lduw_kernel(addr); + ret = cpu_lduw_kernel(env, addr); break; case 4: - ret = ldl_kernel(addr); + ret = cpu_ldl_kernel(env, addr); break; default: case 8: - ret = ldq_kernel(addr); + ret = cpu_ldq_kernel(env, addr); break; } } @@ -1356,33 +1366,33 @@ uint64_t helper_ld_asi(target_ulong addr, int asi, int size, int sign) if (asi & 1) { switch (size) { case 1: - ret = ldub_user_secondary(addr); + ret = cpu_ldub_user_secondary(env, addr); break; case 2: - ret = lduw_user_secondary(addr); + ret = cpu_lduw_user_secondary(env, addr); break; case 4: - ret = ldl_user_secondary(addr); + ret = cpu_ldl_user_secondary(env, addr); break; default: case 8: - ret = ldq_user_secondary(addr); + ret = cpu_ldq_user_secondary(env, addr); break; } } else { switch (size) { case 1: - ret = ldub_user(addr); + ret = cpu_ldub_user(env, addr); break; case 2: - ret = lduw_user(addr); + ret = cpu_lduw_user(env, addr); break; case 4: - ret = ldl_user(addr); + ret = cpu_ldl_user(env, addr); break; default: case 8: - ret = ldq_user(addr); + ret = cpu_ldq_user(env, addr); break; } } @@ -1420,17 +1430,17 @@ uint64_t helper_ld_asi(target_ulong addr, int asi, int size, int sign) { switch (size) { case 1: - ret = ldub_nucleus(addr); + ret = cpu_ldub_nucleus(env, addr); break; case 2: - ret = lduw_nucleus(addr); + ret = cpu_lduw_nucleus(env, addr); break; case 4: - ret = ldl_nucleus(addr); + ret = cpu_ldl_nucleus(env, addr); break; default: case 8: - ret = ldq_nucleus(addr); + ret = cpu_ldq_nucleus(env, addr); break; } break; @@ -1526,6 +1536,19 @@ uint64_t helper_ld_asi(target_ulong addr, int asi, int size, int sign) ret = env->dtlb[reg].tag; break; } + case 0x48: /* Interrupt dispatch, RO */ + break; + case 0x49: /* Interrupt data receive */ + ret = env->ivec_status; + break; + case 0x7f: /* Incoming interrupt vector, RO */ + { + int reg = (addr >> 4) & 0x3; + if (reg < 3) { + ret = env->ivec_data[reg]; + } + break; + } case 0x46: /* D-cache data */ case 0x47: /* D-cache tag access */ case 0x4b: /* E-cache error enable */ @@ -1540,18 +1563,13 @@ uint64_t helper_ld_asi(target_ulong addr, int asi, int size, int sign) case 0x7e: /* E-cache tag */ break; case 0x5b: /* D-MMU data pointer */ - case 0x48: /* Interrupt dispatch, RO */ - case 0x49: /* Interrupt data receive */ - case 0x7f: /* Incoming interrupt vector, RO */ - /* XXX */ - break; case 0x54: /* I-MMU data in, WO */ case 0x57: /* I-MMU demap, WO */ case 0x5c: /* D-MMU data in, WO */ case 0x5f: /* D-MMU demap, WO */ case 0x77: /* Interrupt vector, WO */ default: - do_unassigned_access(addr, 0, 0, 1, size); + cpu_unassigned_access(env, addr, 0, 0, 1, size); ret = 0; break; } @@ -1604,7 +1622,8 @@ uint64_t helper_ld_asi(target_ulong addr, int asi, int size, int sign) return ret; } -void helper_st_asi(target_ulong addr, target_ulong val, int asi, int size) +void helper_st_asi(CPUSPARCState *env, target_ulong addr, target_ulong val, + int asi, int size) { #ifdef DEBUG_ASI dump_asi("write", addr, asi, size, val); @@ -1619,7 +1638,7 @@ void helper_st_asi(target_ulong addr, target_ulong val, int asi, int size) helper_raise_exception(env, TT_PRIV_ACT); } - helper_check_align(addr, size - 1); + helper_check_align(env, addr, size - 1); addr = asi_address_mask(env, asi, addr); /* Convert to little endian */ @@ -1663,17 +1682,17 @@ void helper_st_asi(target_ulong addr, target_ulong val, int asi, int size) if (cpu_hypervisor_mode(env)) { switch (size) { case 1: - stb_hypv(addr, val); + cpu_stb_hypv(env, addr, val); break; case 2: - stw_hypv(addr, val); + cpu_stw_hypv(env, addr, val); break; case 4: - stl_hypv(addr, val); + cpu_stl_hypv(env, addr, val); break; case 8: default: - stq_hypv(addr, val); + cpu_stq_hypv(env, addr, val); break; } } else { @@ -1681,33 +1700,33 @@ void helper_st_asi(target_ulong addr, target_ulong val, int asi, int size) if (asi & 1) { switch (size) { case 1: - stb_kernel_secondary(addr, val); + cpu_stb_kernel_secondary(env, addr, val); break; case 2: - stw_kernel_secondary(addr, val); + cpu_stw_kernel_secondary(env, addr, val); break; case 4: - stl_kernel_secondary(addr, val); + cpu_stl_kernel_secondary(env, addr, val); break; case 8: default: - stq_kernel_secondary(addr, val); + cpu_stq_kernel_secondary(env, addr, val); break; } } else { switch (size) { case 1: - stb_kernel(addr, val); + cpu_stb_kernel(env, addr, val); break; case 2: - stw_kernel(addr, val); + cpu_stw_kernel(env, addr, val); break; case 4: - stl_kernel(addr, val); + cpu_stl_kernel(env, addr, val); break; case 8: default: - stq_kernel(addr, val); + cpu_stq_kernel(env, addr, val); break; } } @@ -1717,33 +1736,33 @@ void helper_st_asi(target_ulong addr, target_ulong val, int asi, int size) if (asi & 1) { switch (size) { case 1: - stb_user_secondary(addr, val); + cpu_stb_user_secondary(env, addr, val); break; case 2: - stw_user_secondary(addr, val); + cpu_stw_user_secondary(env, addr, val); break; case 4: - stl_user_secondary(addr, val); + cpu_stl_user_secondary(env, addr, val); break; case 8: default: - stq_user_secondary(addr, val); + cpu_stq_user_secondary(env, addr, val); break; } } else { switch (size) { case 1: - stb_user(addr, val); + cpu_stb_user(env, addr, val); break; case 2: - stw_user(addr, val); + cpu_stw_user(env, addr, val); break; case 4: - stl_user(addr, val); + cpu_stl_user(env, addr, val); break; case 8: default: - stq_user(addr, val); + cpu_stq_user(env, addr, val); break; } } @@ -1781,17 +1800,17 @@ void helper_st_asi(target_ulong addr, target_ulong val, int asi, int size) { switch (size) { case 1: - stb_nucleus(addr, val); + cpu_stb_nucleus(env, addr, val); break; case 2: - stw_nucleus(addr, val); + cpu_stw_nucleus(env, addr, val); break; case 4: - stl_nucleus(addr, val); + cpu_stl_nucleus(env, addr, val); break; default: case 8: - stq_nucleus(addr, val); + cpu_stq_nucleus(env, addr, val); break; } break; @@ -1954,7 +1973,7 @@ void helper_st_asi(target_ulong addr, target_ulong val, int asi, int size) demap_tlb(env->dtlb, addr, "dmmu", env); return; case 0x49: /* Interrupt data receive */ - /* XXX */ + env->ivec_status = val & 0x20; return; case 0x46: /* D-cache data */ case 0x47: /* D-cache tag access */ @@ -1983,13 +2002,13 @@ void helper_st_asi(target_ulong addr, target_ulong val, int asi, int size) case 0x8a: /* Primary no-fault LE, RO */ case 0x8b: /* Secondary no-fault LE, RO */ default: - do_unassigned_access(addr, 1, 0, 1, size); + cpu_unassigned_access(env, addr, 1, 0, 1, size); return; } } #endif /* CONFIG_USER_ONLY */ -void helper_ldda_asi(target_ulong addr, int asi, int rd) +void helper_ldda_asi(CPUSPARCState *env, target_ulong addr, int asi, int rd) { if ((asi < 0x80 && (env->pstate & PS_PRIV) == 0) || (cpu_has_hypervisor(env) @@ -2004,22 +2023,22 @@ void helper_ldda_asi(target_ulong addr, int asi, int rd) #if !defined(CONFIG_USER_ONLY) case 0x24: /* Nucleus quad LDD 128 bit atomic */ case 0x2c: /* Nucleus quad LDD 128 bit atomic LE */ - helper_check_align(addr, 0xf); + helper_check_align(env, addr, 0xf); if (rd == 0) { - env->gregs[1] = ldq_nucleus(addr + 8); + env->gregs[1] = cpu_ldq_nucleus(env, addr + 8); if (asi == 0x2c) { bswap64s(&env->gregs[1]); } } else if (rd < 8) { - env->gregs[rd] = ldq_nucleus(addr); - env->gregs[rd + 1] = ldq_nucleus(addr + 8); + env->gregs[rd] = cpu_ldq_nucleus(env, addr); + env->gregs[rd + 1] = cpu_ldq_nucleus(env, addr + 8); if (asi == 0x2c) { bswap64s(&env->gregs[rd]); bswap64s(&env->gregs[rd + 1]); } } else { - env->regwptr[rd] = ldq_nucleus(addr); - env->regwptr[rd + 1] = ldq_nucleus(addr + 8); + env->regwptr[rd] = cpu_ldq_nucleus(env, addr); + env->regwptr[rd + 1] = cpu_ldq_nucleus(env, addr + 8); if (asi == 0x2c) { bswap64s(&env->regwptr[rd]); bswap64s(&env->regwptr[rd + 1]); @@ -2028,26 +2047,27 @@ void helper_ldda_asi(target_ulong addr, int asi, int rd) break; #endif default: - helper_check_align(addr, 0x3); + helper_check_align(env, addr, 0x3); if (rd == 0) { - env->gregs[1] = helper_ld_asi(addr + 4, asi, 4, 0); + env->gregs[1] = helper_ld_asi(env, addr + 4, asi, 4, 0); } else if (rd < 8) { - env->gregs[rd] = helper_ld_asi(addr, asi, 4, 0); - env->gregs[rd + 1] = helper_ld_asi(addr + 4, asi, 4, 0); + env->gregs[rd] = helper_ld_asi(env, addr, asi, 4, 0); + env->gregs[rd + 1] = helper_ld_asi(env, addr + 4, asi, 4, 0); } else { - env->regwptr[rd] = helper_ld_asi(addr, asi, 4, 0); - env->regwptr[rd + 1] = helper_ld_asi(addr + 4, asi, 4, 0); + env->regwptr[rd] = helper_ld_asi(env, addr, asi, 4, 0); + env->regwptr[rd + 1] = helper_ld_asi(env, addr + 4, asi, 4, 0); } break; } } -void helper_ldf_asi(target_ulong addr, int asi, int size, int rd) +void helper_ldf_asi(CPUSPARCState *env, target_ulong addr, int asi, int size, + int rd) { unsigned int i; target_ulong val; - helper_check_align(addr, 3); + helper_check_align(env, addr, 3); addr = asi_address_mask(env, asi, addr); switch (asi) { @@ -2059,9 +2079,9 @@ void helper_ldf_asi(target_ulong addr, int asi, int size, int rd) helper_raise_exception(env, TT_ILL_INSN); return; } - helper_check_align(addr, 0x3f); + helper_check_align(env, addr, 0x3f); for (i = 0; i < 8; i++, rd += 2, addr += 8) { - env->fpr[rd/2].ll = helper_ld_asi(addr, asi & 0x8f, 8, 0); + env->fpr[rd / 2].ll = helper_ld_asi(env, addr, asi & 0x8f, 8, 0); } return; @@ -2077,9 +2097,9 @@ void helper_ldf_asi(target_ulong addr, int asi, int size, int rd) helper_raise_exception(env, TT_ILL_INSN); return; } - helper_check_align(addr, 0x3f); + helper_check_align(env, addr, 0x3f); for (i = 0; i < 8; i++, rd += 2, addr += 4) { - env->fpr[rd/2].ll = helper_ld_asi(addr, asi & 0x19, 8, 0); + env->fpr[rd / 2].ll = helper_ld_asi(env, addr, asi & 0x19, 8, 0); } return; @@ -2090,29 +2110,30 @@ void helper_ldf_asi(target_ulong addr, int asi, int size, int rd) switch (size) { default: case 4: - val = helper_ld_asi(addr, asi, size, 0); + val = helper_ld_asi(env, addr, asi, size, 0); if (rd & 1) { - env->fpr[rd/2].l.lower = val; + env->fpr[rd / 2].l.lower = val; } else { - env->fpr[rd/2].l.upper = val; + env->fpr[rd / 2].l.upper = val; } break; case 8: - env->fpr[rd/2].ll = helper_ld_asi(addr, asi, size, 0); + env->fpr[rd / 2].ll = helper_ld_asi(env, addr, asi, size, 0); break; case 16: - env->fpr[rd/2].ll = helper_ld_asi(addr, asi, 8, 0); - env->fpr[rd/2 + 1].ll = helper_ld_asi(addr + 8, asi, 8, 0); + env->fpr[rd / 2].ll = helper_ld_asi(env, addr, asi, 8, 0); + env->fpr[rd / 2 + 1].ll = helper_ld_asi(env, addr + 8, asi, 8, 0); break; } } -void helper_stf_asi(target_ulong addr, int asi, int size, int rd) +void helper_stf_asi(CPUSPARCState *env, target_ulong addr, int asi, int size, + int rd) { unsigned int i; target_ulong val; - helper_check_align(addr, 3); + helper_check_align(env, addr, 3); addr = asi_address_mask(env, asi, addr); switch (asi) { @@ -2126,9 +2147,9 @@ void helper_stf_asi(target_ulong addr, int asi, int size, int rd) helper_raise_exception(env, TT_ILL_INSN); return; } - helper_check_align(addr, 0x3f); + helper_check_align(env, addr, 0x3f); for (i = 0; i < 8; i++, rd += 2, addr += 8) { - helper_st_asi(addr, env->fpr[rd/2].ll, asi & 0x8f, 8); + helper_st_asi(env, addr, env->fpr[rd / 2].ll, asi & 0x8f, 8); } return; @@ -2144,9 +2165,9 @@ void helper_stf_asi(target_ulong addr, int asi, int size, int rd) helper_raise_exception(env, TT_ILL_INSN); return; } - helper_check_align(addr, 0x3f); + helper_check_align(env, addr, 0x3f); for (i = 0; i < 8; i++, rd += 2, addr += 8) { - helper_st_asi(addr, env->fpr[rd/2].ll, asi & 0x19, 8); + helper_st_asi(env, addr, env->fpr[rd / 2].ll, asi & 0x19, 8); } return; @@ -2158,71 +2179,72 @@ void helper_stf_asi(target_ulong addr, int asi, int size, int rd) default: case 4: if (rd & 1) { - val = env->fpr[rd/2].l.lower; + val = env->fpr[rd / 2].l.lower; } else { - val = env->fpr[rd/2].l.upper; + val = env->fpr[rd / 2].l.upper; } - helper_st_asi(addr, val, asi, size); + helper_st_asi(env, addr, val, asi, size); break; case 8: - helper_st_asi(addr, env->fpr[rd/2].ll, asi, size); + helper_st_asi(env, addr, env->fpr[rd / 2].ll, asi, size); break; case 16: - helper_st_asi(addr, env->fpr[rd/2].ll, asi, 8); - helper_st_asi(addr + 8, env->fpr[rd/2 + 1].ll, asi, 8); + helper_st_asi(env, addr, env->fpr[rd / 2].ll, asi, 8); + helper_st_asi(env, addr + 8, env->fpr[rd / 2 + 1].ll, asi, 8); break; } } -target_ulong helper_cas_asi(target_ulong addr, target_ulong val1, - target_ulong val2, uint32_t asi) +target_ulong helper_cas_asi(CPUSPARCState *env, target_ulong addr, + target_ulong val1, target_ulong val2, uint32_t asi) { target_ulong ret; val2 &= 0xffffffffUL; - ret = helper_ld_asi(addr, asi, 4, 0); + ret = helper_ld_asi(env, addr, asi, 4, 0); ret &= 0xffffffffUL; if (val2 == ret) { - helper_st_asi(addr, val1 & 0xffffffffUL, asi, 4); + helper_st_asi(env, addr, val1 & 0xffffffffUL, asi, 4); } return ret; } -target_ulong helper_casx_asi(target_ulong addr, target_ulong val1, - target_ulong val2, uint32_t asi) +target_ulong helper_casx_asi(CPUSPARCState *env, target_ulong addr, + target_ulong val1, target_ulong val2, + uint32_t asi) { target_ulong ret; - ret = helper_ld_asi(addr, asi, 8, 0); + ret = helper_ld_asi(env, addr, asi, 8, 0); if (val2 == ret) { - helper_st_asi(addr, val1, asi, 8); + helper_st_asi(env, addr, val1, asi, 8); } return ret; } #endif /* TARGET_SPARC64 */ -void helper_ldqf(target_ulong addr, int mem_idx) +void helper_ldqf(CPUSPARCState *env, target_ulong addr, int mem_idx) { /* XXX add 128 bit load */ CPU_QuadU u; - helper_check_align(addr, 7); + helper_check_align(env, addr, 7); #if !defined(CONFIG_USER_ONLY) switch (mem_idx) { case MMU_USER_IDX: - u.ll.upper = ldq_user(addr); - u.ll.lower = ldq_user(addr + 8); + u.ll.upper = cpu_ldq_user(env, addr); + u.ll.lower = cpu_ldq_user(env, addr + 8); QT0 = u.q; break; case MMU_KERNEL_IDX: - u.ll.upper = ldq_kernel(addr); - u.ll.lower = ldq_kernel(addr + 8); + u.ll.upper = cpu_ldq_kernel(env, addr); + u.ll.lower = cpu_ldq_kernel(env, addr + 8); QT0 = u.q; break; #ifdef TARGET_SPARC64 case MMU_HYPV_IDX: - u.ll.upper = ldq_hypv(addr); - u.ll.lower = ldq_hypv(addr + 8); + u.ll.upper = cpu_ldq_hypv(env, addr); + u.ll.lower = cpu_ldq_hypv(env, addr + 8); QT0 = u.q; break; #endif @@ -2237,29 +2259,29 @@ void helper_ldqf(target_ulong addr, int mem_idx) #endif } -void helper_stqf(target_ulong addr, int mem_idx) +void helper_stqf(CPUSPARCState *env, target_ulong addr, int mem_idx) { /* XXX add 128 bit store */ CPU_QuadU u; - helper_check_align(addr, 7); + helper_check_align(env, addr, 7); #if !defined(CONFIG_USER_ONLY) switch (mem_idx) { case MMU_USER_IDX: u.q = QT0; - stq_user(addr, u.ll.upper); - stq_user(addr + 8, u.ll.lower); + cpu_stq_user(env, addr, u.ll.upper); + cpu_stq_user(env, addr + 8, u.ll.lower); break; case MMU_KERNEL_IDX: u.q = QT0; - stq_kernel(addr, u.ll.upper); - stq_kernel(addr + 8, u.ll.lower); + cpu_stq_kernel(env, addr, u.ll.upper); + cpu_stq_kernel(env, addr + 8, u.ll.lower); break; #ifdef TARGET_SPARC64 case MMU_HYPV_IDX: u.q = QT0; - stq_hypv(addr, u.ll.upper); - stq_hypv(addr + 8, u.ll.lower); + cpu_stq_hypv(env, addr, u.ll.upper); + cpu_stq_hypv(env, addr + 8, u.ll.lower); break; #endif default: @@ -2273,10 +2295,10 @@ void helper_stqf(target_ulong addr, int mem_idx) #endif } -#ifndef TARGET_SPARC64 #if !defined(CONFIG_USER_ONLY) -static void do_unassigned_access(target_phys_addr_t addr, int is_write, - int is_exec, int is_asi, int size) +#ifndef TARGET_SPARC64 +void cpu_unassigned_access(CPUSPARCState *env, target_phys_addr_t addr, + int is_write, int is_exec, int is_asi, int size) { int fault_type; @@ -2334,15 +2356,9 @@ static void do_unassigned_access(target_phys_addr_t addr, int is_write, tlb_flush(env, 1); } } -#endif -#else -#if defined(CONFIG_USER_ONLY) -static void do_unassigned_access(target_ulong addr, int is_write, int is_exec, - int is_asi, int size) #else -static void do_unassigned_access(target_phys_addr_t addr, int is_write, - int is_exec, int is_asi, int size) -#endif +void cpu_unassigned_access(CPUSPARCState *env, target_phys_addr_t addr, + int is_write, int is_exec, int is_asi, int size) { #ifdef DEBUG_UNASSIGNED printf("Unassigned mem access to " TARGET_FMT_plx " from " TARGET_FMT_lx @@ -2356,16 +2372,51 @@ static void do_unassigned_access(target_phys_addr_t addr, int is_write, } } #endif +#endif #if !defined(CONFIG_USER_ONLY) -void cpu_unassigned_access(CPUState *env1, target_phys_addr_t addr, - int is_write, int is_exec, int is_asi, int size) +/* XXX: make it generic ? */ +static void cpu_restore_state2(CPUSPARCState *env, void *retaddr) { - CPUState *saved_env; + TranslationBlock *tb; + unsigned long pc; + + if (retaddr) { + /* now we have a real cpu fault */ + pc = (unsigned long)retaddr; + tb = tb_find_pc(pc); + if (tb) { + /* the PC is inside the translated code. It means that we have + a virtual CPU fault */ + cpu_restore_state(tb, env, pc); + } + } +} + +void do_unaligned_access(CPUSPARCState *env, target_ulong addr, int is_write, + int is_user, void *retaddr) +{ +#ifdef DEBUG_UNALIGNED + printf("Unaligned access to 0x" TARGET_FMT_lx " from 0x" TARGET_FMT_lx + "\n", addr, env->pc); +#endif + cpu_restore_state2(env, retaddr); + helper_raise_exception(env, TT_UNALIGNED); +} - saved_env = env; - env = env1; - do_unassigned_access(addr, is_write, is_exec, is_asi, size); - env = saved_env; +/* try to fill the TLB and return an exception if error. If retaddr is + NULL, it means that the function was called in C code (i.e. not + from generated code or from helper.c) */ +/* XXX: fix it to restore all registers */ +void tlb_fill(CPUSPARCState *env, target_ulong addr, int is_write, int mmu_idx, + void *retaddr) +{ + int ret; + + ret = cpu_sparc_handle_mmu_fault(env, addr, is_write, mmu_idx); + if (ret) { + cpu_restore_state2(env, retaddr); + cpu_loop_exit(env); + } } #endif diff --git a/target-sparc/machine.c b/target-sparc/machine.c index 235b088a45..eb4d87f158 100644 --- a/target-sparc/machine.c +++ b/target-sparc/machine.c @@ -6,7 +6,7 @@ void cpu_save(QEMUFile *f, void *opaque) { - CPUState *env = opaque; + CPUSPARCState *env = opaque; int i; uint32_t tmp; @@ -111,7 +111,7 @@ void cpu_save(QEMUFile *f, void *opaque) int cpu_load(QEMUFile *f, void *opaque, int version_id) { - CPUState *env = opaque; + CPUSPARCState *env = opaque; int i; uint32_t tmp; diff --git a/target-sparc/mmu_helper.c b/target-sparc/mmu_helper.c index bdff1c3254..11fb9f5de6 100644 --- a/target-sparc/mmu_helper.c +++ b/target-sparc/mmu_helper.c @@ -25,7 +25,7 @@ #if defined(CONFIG_USER_ONLY) -int cpu_sparc_handle_mmu_fault(CPUState *env1, target_ulong address, int rw, +int cpu_sparc_handle_mmu_fault(CPUSPARCState *env1, target_ulong address, int rw, int mmu_idx) { if (rw & 2) { @@ -76,7 +76,7 @@ static const int perm_table[2][8] = { } }; -static int get_physical_address(CPUState *env, target_phys_addr_t *physical, +static int get_physical_address(CPUSPARCState *env, target_phys_addr_t *physical, int *prot, int *access_index, target_ulong address, int rw, int mmu_idx, target_ulong *page_size) @@ -198,7 +198,7 @@ static int get_physical_address(CPUState *env, target_phys_addr_t *physical, } /* Perform address translation */ -int cpu_sparc_handle_mmu_fault(CPUState *env, target_ulong address, int rw, +int cpu_sparc_handle_mmu_fault(CPUSPARCState *env, target_ulong address, int rw, int mmu_idx) { target_phys_addr_t paddr; @@ -244,7 +244,7 @@ int cpu_sparc_handle_mmu_fault(CPUState *env, target_ulong address, int rw, } } -target_ulong mmu_probe(CPUState *env, target_ulong address, int mmulev) +target_ulong mmu_probe(CPUSPARCState *env, target_ulong address, int mmulev) { target_phys_addr_t pde_ptr; uint32_t pde; @@ -310,7 +310,7 @@ target_ulong mmu_probe(CPUState *env, target_ulong address, int mmulev) return 0; } -void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUState *env) +void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUSPARCState *env) { target_ulong va, va1, va2; unsigned int n, m, o; @@ -354,7 +354,7 @@ void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUState *env) * reads (and only reads) in stack frames as if windows were flushed. We assume * that the sparc ABI is followed. */ -int target_memory_rw_debug(CPUState *env, target_ulong addr, +int target_memory_rw_debug(CPUSPARCState *env, target_ulong addr, uint8_t *buf, int len, int is_write) { int i; @@ -479,7 +479,7 @@ static inline int ultrasparc_tag_match(SparcTLBEntry *tlb, return 0; } -static int get_physical_address_data(CPUState *env, +static int get_physical_address_data(CPUSPARCState *env, target_phys_addr_t *physical, int *prot, target_ulong address, int rw, int mmu_idx) { @@ -598,7 +598,7 @@ static int get_physical_address_data(CPUState *env, return 1; } -static int get_physical_address_code(CPUState *env, +static int get_physical_address_code(CPUSPARCState *env, target_phys_addr_t *physical, int *prot, target_ulong address, int mmu_idx) { @@ -667,7 +667,7 @@ static int get_physical_address_code(CPUState *env, return 1; } -static int get_physical_address(CPUState *env, target_phys_addr_t *physical, +static int get_physical_address(CPUSPARCState *env, target_phys_addr_t *physical, int *prot, int *access_index, target_ulong address, int rw, int mmu_idx, target_ulong *page_size) @@ -701,7 +701,7 @@ static int get_physical_address(CPUState *env, target_phys_addr_t *physical, } /* Perform address translation */ -int cpu_sparc_handle_mmu_fault(CPUState *env, target_ulong address, int rw, +int cpu_sparc_handle_mmu_fault(CPUSPARCState *env, target_ulong address, int rw, int mmu_idx) { target_ulong virt_addr, vaddr; @@ -727,7 +727,7 @@ int cpu_sparc_handle_mmu_fault(CPUState *env, target_ulong address, int rw, return 1; } -void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUState *env) +void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUSPARCState *env) { unsigned int i; const char *mask; @@ -813,7 +813,7 @@ void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUState *env) #endif /* TARGET_SPARC64 */ -static int cpu_sparc_get_phys_page(CPUState *env, target_phys_addr_t *phys, +static int cpu_sparc_get_phys_page(CPUSPARCState *env, target_phys_addr_t *phys, target_ulong addr, int rw, int mmu_idx) { target_ulong page_size; @@ -824,7 +824,7 @@ static int cpu_sparc_get_phys_page(CPUState *env, target_phys_addr_t *phys, } #if defined(TARGET_SPARC64) -target_phys_addr_t cpu_get_phys_page_nofault(CPUState *env, target_ulong addr, +target_phys_addr_t cpu_get_phys_page_nofault(CPUSPARCState *env, target_ulong addr, int mmu_idx) { target_phys_addr_t phys_addr; @@ -836,7 +836,7 @@ target_phys_addr_t cpu_get_phys_page_nofault(CPUState *env, target_ulong addr, } #endif -target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr) +target_phys_addr_t cpu_get_phys_page_debug(CPUSPARCState *env, target_ulong addr) { target_phys_addr_t phys_addr; int mmu_idx = cpu_mmu_index(env); diff --git a/target-sparc/op_helper.c b/target-sparc/op_helper.c deleted file mode 100644 index 02b660ddf9..0000000000 --- a/target-sparc/op_helper.c +++ /dev/null @@ -1,74 +0,0 @@ -#include "cpu.h" -#include "dyngen-exec.h" -#include "helper.h" - -#if !defined(CONFIG_USER_ONLY) -static void do_unaligned_access(target_ulong addr, int is_write, int is_user, - void *retaddr); - -#define MMUSUFFIX _mmu -#define ALIGNED_ONLY - -#define SHIFT 0 -#include "softmmu_template.h" - -#define SHIFT 1 -#include "softmmu_template.h" - -#define SHIFT 2 -#include "softmmu_template.h" - -#define SHIFT 3 -#include "softmmu_template.h" - -/* XXX: make it generic ? */ -static void cpu_restore_state2(void *retaddr) -{ - TranslationBlock *tb; - unsigned long pc; - - if (retaddr) { - /* now we have a real cpu fault */ - pc = (unsigned long)retaddr; - tb = tb_find_pc(pc); - if (tb) { - /* the PC is inside the translated code. It means that we have - a virtual CPU fault */ - cpu_restore_state(tb, env, pc); - } - } -} - -static void do_unaligned_access(target_ulong addr, int is_write, int is_user, - void *retaddr) -{ -#ifdef DEBUG_UNALIGNED - printf("Unaligned access to 0x" TARGET_FMT_lx " from 0x" TARGET_FMT_lx - "\n", addr, env->pc); -#endif - cpu_restore_state2(retaddr); - helper_raise_exception(env, TT_UNALIGNED); -} - -/* try to fill the TLB and return an exception if error. If retaddr is - NULL, it means that the function was called in C code (i.e. not - from generated code or from helper.c) */ -/* XXX: fix it to restore all registers */ -void tlb_fill(CPUState *env1, target_ulong addr, int is_write, int mmu_idx, - void *retaddr) -{ - int ret; - CPUState *saved_env; - - saved_env = env; - env = env1; - - ret = cpu_sparc_handle_mmu_fault(env, addr, is_write, mmu_idx); - if (ret) { - cpu_restore_state2(retaddr); - cpu_loop_exit(env); - } - env = saved_env; -} - -#endif /* !CONFIG_USER_ONLY */ diff --git a/target-sparc/translate.c b/target-sparc/translate.c index d26111209e..4967152e88 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -1955,7 +1955,7 @@ static inline void gen_ld_asi(TCGv dst, TCGv addr, int insn, int size, r_asi = gen_get_asi(insn, addr); r_size = tcg_const_i32(size); r_sign = tcg_const_i32(sign); - gen_helper_ld_asi(dst, addr, r_asi, r_size, r_sign); + gen_helper_ld_asi(dst, cpu_env, addr, r_asi, r_size, r_sign); tcg_temp_free_i32(r_sign); tcg_temp_free_i32(r_size); tcg_temp_free_i32(r_asi); @@ -1967,7 +1967,7 @@ static inline void gen_st_asi(TCGv src, TCGv addr, int insn, int size) r_asi = gen_get_asi(insn, addr); r_size = tcg_const_i32(size); - gen_helper_st_asi(addr, src, r_asi, r_size); + gen_helper_st_asi(cpu_env, addr, src, r_asi, r_size); tcg_temp_free_i32(r_size); tcg_temp_free_i32(r_asi); } @@ -1979,7 +1979,7 @@ static inline void gen_ldf_asi(TCGv addr, int insn, int size, int rd) r_asi = gen_get_asi(insn, addr); r_size = tcg_const_i32(size); r_rd = tcg_const_i32(rd); - gen_helper_ldf_asi(addr, r_asi, r_size, r_rd); + gen_helper_ldf_asi(cpu_env, addr, r_asi, r_size, r_rd); tcg_temp_free_i32(r_rd); tcg_temp_free_i32(r_size); tcg_temp_free_i32(r_asi); @@ -1992,7 +1992,7 @@ static inline void gen_stf_asi(TCGv addr, int insn, int size, int rd) r_asi = gen_get_asi(insn, addr); r_size = tcg_const_i32(size); r_rd = tcg_const_i32(rd); - gen_helper_stf_asi(addr, r_asi, r_size, r_rd); + gen_helper_stf_asi(cpu_env, addr, r_asi, r_size, r_rd); tcg_temp_free_i32(r_rd); tcg_temp_free_i32(r_size); tcg_temp_free_i32(r_asi); @@ -2005,9 +2005,9 @@ static inline void gen_swap_asi(TCGv dst, TCGv addr, int insn) r_asi = gen_get_asi(insn, addr); r_size = tcg_const_i32(4); r_sign = tcg_const_i32(0); - gen_helper_ld_asi(cpu_tmp64, addr, r_asi, r_size, r_sign); + gen_helper_ld_asi(cpu_tmp64, cpu_env, addr, r_asi, r_size, r_sign); tcg_temp_free_i32(r_sign); - gen_helper_st_asi(addr, dst, r_asi, r_size); + gen_helper_st_asi(cpu_env, addr, dst, r_asi, r_size); tcg_temp_free_i32(r_size); tcg_temp_free_i32(r_asi); tcg_gen_trunc_i64_tl(dst, cpu_tmp64); @@ -2019,7 +2019,7 @@ static inline void gen_ldda_asi(TCGv hi, TCGv addr, int insn, int rd) r_asi = gen_get_asi(insn, addr); r_rd = tcg_const_i32(rd); - gen_helper_ldda_asi(addr, r_asi, r_rd); + gen_helper_ldda_asi(cpu_env, addr, r_asi, r_rd); tcg_temp_free_i32(r_rd); tcg_temp_free_i32(r_asi); } @@ -2032,7 +2032,7 @@ static inline void gen_stda_asi(TCGv hi, TCGv addr, int insn, int rd) tcg_gen_concat_tl_i64(cpu_tmp64, cpu_tmp0, hi); r_asi = gen_get_asi(insn, addr); r_size = tcg_const_i32(8); - gen_helper_st_asi(addr, cpu_tmp64, r_asi, r_size); + gen_helper_st_asi(cpu_env, addr, cpu_tmp64, r_asi, r_size); tcg_temp_free_i32(r_size); tcg_temp_free_i32(r_asi); } @@ -2046,7 +2046,7 @@ static inline void gen_cas_asi(TCGv dst, TCGv addr, TCGv val2, int insn, r_val1 = tcg_temp_new(); gen_movl_reg_TN(rd, r_val1); r_asi = gen_get_asi(insn, addr); - gen_helper_cas_asi(dst, addr, r_val1, val2, r_asi); + gen_helper_cas_asi(dst, cpu_env, addr, r_val1, val2, r_asi); tcg_temp_free_i32(r_asi); tcg_temp_free(r_val1); } @@ -2058,7 +2058,7 @@ static inline void gen_casx_asi(TCGv dst, TCGv addr, TCGv val2, int insn, gen_movl_reg_TN(rd, cpu_tmp64); r_asi = gen_get_asi(insn, addr); - gen_helper_casx_asi(dst, addr, cpu_tmp64, val2, r_asi); + gen_helper_casx_asi(dst, cpu_env, addr, cpu_tmp64, val2, r_asi); tcg_temp_free_i32(r_asi); } @@ -2072,7 +2072,7 @@ static inline void gen_ld_asi(TCGv dst, TCGv addr, int insn, int size, r_asi = tcg_const_i32(GET_FIELD(insn, 19, 26)); r_size = tcg_const_i32(size); r_sign = tcg_const_i32(sign); - gen_helper_ld_asi(cpu_tmp64, addr, r_asi, r_size, r_sign); + gen_helper_ld_asi(cpu_tmp64, cpu_env, addr, r_asi, r_size, r_sign); tcg_temp_free(r_sign); tcg_temp_free(r_size); tcg_temp_free(r_asi); @@ -2086,7 +2086,7 @@ static inline void gen_st_asi(TCGv src, TCGv addr, int insn, int size) tcg_gen_extu_tl_i64(cpu_tmp64, src); r_asi = tcg_const_i32(GET_FIELD(insn, 19, 26)); r_size = tcg_const_i32(size); - gen_helper_st_asi(addr, cpu_tmp64, r_asi, r_size); + gen_helper_st_asi(cpu_env, addr, cpu_tmp64, r_asi, r_size); tcg_temp_free(r_size); tcg_temp_free(r_asi); } @@ -2099,11 +2099,11 @@ static inline void gen_swap_asi(TCGv dst, TCGv addr, int insn) r_asi = tcg_const_i32(GET_FIELD(insn, 19, 26)); r_size = tcg_const_i32(4); r_sign = tcg_const_i32(0); - gen_helper_ld_asi(cpu_tmp64, addr, r_asi, r_size, r_sign); + gen_helper_ld_asi(cpu_tmp64, cpu_env, addr, r_asi, r_size, r_sign); tcg_temp_free(r_sign); r_val = tcg_temp_new_i64(); tcg_gen_extu_tl_i64(r_val, dst); - gen_helper_st_asi(addr, r_val, r_asi, r_size); + gen_helper_st_asi(cpu_env, addr, r_val, r_asi, r_size); tcg_temp_free_i64(r_val); tcg_temp_free(r_size); tcg_temp_free(r_asi); @@ -2117,7 +2117,7 @@ static inline void gen_ldda_asi(TCGv hi, TCGv addr, int insn, int rd) r_asi = tcg_const_i32(GET_FIELD(insn, 19, 26)); r_size = tcg_const_i32(8); r_sign = tcg_const_i32(0); - gen_helper_ld_asi(cpu_tmp64, addr, r_asi, r_size, r_sign); + gen_helper_ld_asi(cpu_tmp64, cpu_env, addr, r_asi, r_size, r_sign); tcg_temp_free(r_sign); tcg_temp_free(r_size); tcg_temp_free(r_asi); @@ -2136,7 +2136,7 @@ static inline void gen_stda_asi(TCGv hi, TCGv addr, int insn, int rd) tcg_gen_concat_tl_i64(cpu_tmp64, cpu_tmp0, hi); r_asi = tcg_const_i32(GET_FIELD(insn, 19, 26)); r_size = tcg_const_i32(8); - gen_helper_st_asi(addr, cpu_tmp64, r_asi, r_size); + gen_helper_st_asi(cpu_env, addr, cpu_tmp64, r_asi, r_size); tcg_temp_free(r_size); tcg_temp_free(r_asi); } @@ -2153,7 +2153,7 @@ static inline void gen_ldstub_asi(TCGv dst, TCGv addr, int insn) r_val = tcg_const_i64(0xffULL); r_asi = tcg_const_i32(GET_FIELD(insn, 19, 26)); r_size = tcg_const_i32(1); - gen_helper_st_asi(addr, r_val, r_asi, r_size); + gen_helper_st_asi(cpu_env, addr, r_val, r_asi, r_size); tcg_temp_free_i32(r_size); tcg_temp_free_i32(r_asi); tcg_temp_free_i64(r_val); @@ -2209,7 +2209,7 @@ static inline void gen_load_trap_state_at_tl(TCGv_ptr r_tsptr, TCGv_ptr cpu_env) /* calculate offset to current trap state from env->ts, reuse r_tl */ tcg_gen_muli_i32(r_tl, r_tl, sizeof (trap_state)); - tcg_gen_addi_ptr(r_tsptr, cpu_env, offsetof(CPUState, ts)); + tcg_gen_addi_ptr(r_tsptr, cpu_env, offsetof(CPUSPARCState, ts)); /* tsptr = env->ts[env->tl & MAXTL_MASK] */ { @@ -2373,9 +2373,9 @@ static void gen_faligndata(TCGv dst, TCGv gsr, TCGv s1, TCGv s2) goto nfpu_insn; /* before an instruction, dc->pc must be static */ -static void disas_sparc_insn(DisasContext * dc) +static void disas_sparc_insn(DisasContext * dc, unsigned int insn) { - unsigned int insn, opc, rs1, rs2, rd; + unsigned int opc, rs1, rs2, rd; TCGv cpu_src1, cpu_src2, cpu_tmp1, cpu_tmp2; TCGv_i32 cpu_src1_32, cpu_src2_32, cpu_dst_32; TCGv_i64 cpu_src1_64, cpu_src2_64, cpu_dst_64; @@ -2383,7 +2383,7 @@ static void disas_sparc_insn(DisasContext * dc) if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP))) tcg_gen_debug_insn_start(dc->pc); - insn = ldl_code(dc->pc); + opc = GET_FIELD(insn, 0, 1); rd = GET_FIELD(insn, 2, 6); @@ -2600,7 +2600,7 @@ static void disas_sparc_insn(DisasContext * dc) r_tickptr = tcg_temp_new_ptr(); tcg_gen_ld_ptr(r_tickptr, cpu_env, - offsetof(CPUState, tick)); + offsetof(CPUSPARCState, tick)); gen_helper_tick_get_count(cpu_dst, r_tickptr); tcg_temp_free_ptr(r_tickptr); gen_movl_TN_reg(rd, cpu_dst); @@ -2639,7 +2639,7 @@ static void disas_sparc_insn(DisasContext * dc) r_tickptr = tcg_temp_new_ptr(); tcg_gen_ld_ptr(r_tickptr, cpu_env, - offsetof(CPUState, stick)); + offsetof(CPUSPARCState, stick)); gen_helper_tick_get_count(cpu_dst, r_tickptr); tcg_temp_free_ptr(r_tickptr); gen_movl_TN_reg(rd, cpu_dst); @@ -2752,7 +2752,7 @@ static void disas_sparc_insn(DisasContext * dc) r_tickptr = tcg_temp_new_ptr(); tcg_gen_ld_ptr(r_tickptr, cpu_env, - offsetof(CPUState, tick)); + offsetof(CPUSPARCState, tick)); gen_helper_tick_get_count(cpu_tmp0, r_tickptr); gen_movl_TN_reg(rd, cpu_tmp0); tcg_temp_free_ptr(r_tickptr); @@ -3712,7 +3712,7 @@ static void disas_sparc_insn(DisasContext * dc) cpu_src2); r_tickptr = tcg_temp_new_ptr(); tcg_gen_ld_ptr(r_tickptr, cpu_env, - offsetof(CPUState, tick)); + offsetof(CPUSPARCState, tick)); gen_helper_tick_set_limit(r_tickptr, cpu_tick_cmpr); tcg_temp_free_ptr(r_tickptr); @@ -3730,7 +3730,7 @@ static void disas_sparc_insn(DisasContext * dc) cpu_src2); r_tickptr = tcg_temp_new_ptr(); tcg_gen_ld_ptr(r_tickptr, cpu_env, - offsetof(CPUState, stick)); + offsetof(CPUSPARCState, stick)); gen_helper_tick_set_count(r_tickptr, cpu_dst); tcg_temp_free_ptr(r_tickptr); @@ -3748,7 +3748,7 @@ static void disas_sparc_insn(DisasContext * dc) cpu_src2); r_tickptr = tcg_temp_new_ptr(); tcg_gen_ld_ptr(r_tickptr, cpu_env, - offsetof(CPUState, stick)); + offsetof(CPUSPARCState, stick)); gen_helper_tick_set_limit(r_tickptr, cpu_stick_cmpr); tcg_temp_free_ptr(r_tickptr); @@ -3857,7 +3857,7 @@ static void disas_sparc_insn(DisasContext * dc) r_tickptr = tcg_temp_new_ptr(); tcg_gen_ld_ptr(r_tickptr, cpu_env, - offsetof(CPUState, tick)); + offsetof(CPUSPARCState, tick)); gen_helper_tick_set_count(r_tickptr, cpu_tmp0); tcg_temp_free_ptr(r_tickptr); @@ -3985,7 +3985,7 @@ static void disas_sparc_insn(DisasContext * dc) tcg_gen_mov_tl(cpu_hstick_cmpr, cpu_tmp0); r_tickptr = tcg_temp_new_ptr(); tcg_gen_ld_ptr(r_tickptr, cpu_env, - offsetof(CPUState, hstick)); + offsetof(CPUSPARCState, hstick)); gen_helper_tick_set_limit(r_tickptr, cpu_hstick_cmpr); tcg_temp_free_ptr(r_tickptr); @@ -4547,7 +4547,7 @@ static void disas_sparc_insn(DisasContext * dc) gen_helper_restore(cpu_env); gen_mov_pc_npc(dc, cpu_cond); r_const = tcg_const_i32(3); - gen_helper_check_align(cpu_dst, r_const); + gen_helper_check_align(cpu_env, cpu_dst, r_const); tcg_temp_free_i32(r_const); tcg_gen_mov_tl(cpu_npc, cpu_dst); dc->npc = DYNAMIC_PC; @@ -4577,7 +4577,7 @@ static void disas_sparc_insn(DisasContext * dc) tcg_temp_free(r_pc); gen_mov_pc_npc(dc, cpu_cond); r_const = tcg_const_i32(3); - gen_helper_check_align(cpu_dst, r_const); + gen_helper_check_align(cpu_env, cpu_dst, r_const); tcg_temp_free_i32(r_const); tcg_gen_mov_tl(cpu_npc, cpu_dst); dc->npc = DYNAMIC_PC; @@ -4592,7 +4592,7 @@ static void disas_sparc_insn(DisasContext * dc) goto priv_insn; gen_mov_pc_npc(dc, cpu_cond); r_const = tcg_const_i32(3); - gen_helper_check_align(cpu_dst, r_const); + gen_helper_check_align(cpu_env, cpu_dst, r_const); tcg_temp_free_i32(r_const); tcg_gen_mov_tl(cpu_npc, cpu_dst); dc->npc = DYNAMIC_PC; @@ -4696,7 +4696,8 @@ static void disas_sparc_insn(DisasContext * dc) save_state(dc, cpu_cond); r_const = tcg_const_i32(7); - gen_helper_check_align(cpu_addr, r_const); // XXX remove + /* XXX remove alignment check */ + gen_helper_check_align(cpu_env, cpu_addr, r_const); tcg_temp_free_i32(r_const); gen_address_mask(dc, cpu_addr); tcg_gen_qemu_ld64(cpu_tmp64, cpu_addr, dc->mem_idx); @@ -4921,7 +4922,7 @@ static void disas_sparc_insn(DisasContext * dc) CHECK_FPU_FEATURE(dc, FLOAT128); r_const = tcg_const_i32(dc->mem_idx); gen_address_mask(dc, cpu_addr); - gen_helper_ldqf(cpu_addr, r_const); + gen_helper_ldqf(cpu_env, cpu_addr, r_const); tcg_temp_free_i32(r_const); gen_op_store_QT0_fpr(QFPREG(rd)); gen_update_fprs_dirty(QFPREG(rd)); @@ -4961,7 +4962,8 @@ static void disas_sparc_insn(DisasContext * dc) save_state(dc, cpu_cond); gen_address_mask(dc, cpu_addr); r_const = tcg_const_i32(7); - gen_helper_check_align(cpu_addr, r_const); // XXX remove + /* XXX remove alignment check */ + gen_helper_check_align(cpu_env, cpu_addr, r_const); tcg_temp_free_i32(r_const); gen_movl_reg_TN(rd + 1, cpu_tmp0); tcg_gen_concat_tl_i64(cpu_tmp64, cpu_tmp0, cpu_val); @@ -5045,13 +5047,13 @@ static void disas_sparc_insn(DisasContext * dc) case 0x25: /* stfsr, V9 stxfsr */ #ifdef TARGET_SPARC64 gen_address_mask(dc, cpu_addr); - tcg_gen_ld_i64(cpu_tmp64, cpu_env, offsetof(CPUState, fsr)); + tcg_gen_ld_i64(cpu_tmp64, cpu_env, offsetof(CPUSPARCState, fsr)); if (rd == 1) tcg_gen_qemu_st64(cpu_tmp64, cpu_addr, dc->mem_idx); else tcg_gen_qemu_st32(cpu_tmp64, cpu_addr, dc->mem_idx); #else - tcg_gen_ld_i32(cpu_tmp32, cpu_env, offsetof(CPUState, fsr)); + tcg_gen_ld_i32(cpu_tmp32, cpu_env, offsetof(CPUSPARCState, fsr)); tcg_gen_qemu_st32(cpu_tmp32, cpu_addr, dc->mem_idx); #endif break; @@ -5065,7 +5067,7 @@ static void disas_sparc_insn(DisasContext * dc) gen_op_load_fpr_QT0(QFPREG(rd)); r_const = tcg_const_i32(dc->mem_idx); gen_address_mask(dc, cpu_addr); - gen_helper_stqf(cpu_addr, r_const); + gen_helper_stqf(cpu_env, cpu_addr, r_const); tcg_temp_free_i32(r_const); } break; @@ -5108,7 +5110,7 @@ static void disas_sparc_insn(DisasContext * dc) goto jmp_insn; } r_const = tcg_const_i32(7); - gen_helper_check_align(cpu_addr, r_const); + gen_helper_check_align(cpu_env, cpu_addr, r_const); tcg_temp_free_i32(r_const); gen_stf_asi(cpu_addr, insn, 16, QFPREG(rd)); } @@ -5238,6 +5240,7 @@ static inline void gen_intermediate_code_internal(TranslationBlock * tb, int j, lj = -1; int num_insns; int max_insns; + unsigned int insn; memset(dc, 0, sizeof(DisasContext)); dc->tb = tb; @@ -5297,7 +5300,8 @@ static inline void gen_intermediate_code_internal(TranslationBlock * tb, if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO)) gen_io_start(); last_pc = dc->pc; - disas_sparc_insn(dc); + insn = cpu_ldl_code(env, dc->pc); + disas_sparc_insn(dc, insn); num_insns++; if (dc->is_br) @@ -5403,75 +5407,75 @@ void gen_intermediate_code_init(CPUSPARCState *env) cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); cpu_regwptr = tcg_global_mem_new_ptr(TCG_AREG0, - offsetof(CPUState, regwptr), + offsetof(CPUSPARCState, regwptr), "regwptr"); #ifdef TARGET_SPARC64 - cpu_xcc = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUState, xcc), + cpu_xcc = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUSPARCState, xcc), "xcc"); - cpu_asi = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUState, asi), + cpu_asi = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUSPARCState, asi), "asi"); - cpu_fprs = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUState, fprs), + cpu_fprs = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUSPARCState, fprs), "fprs"); - cpu_gsr = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, gsr), + cpu_gsr = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, gsr), "gsr"); cpu_tick_cmpr = tcg_global_mem_new(TCG_AREG0, - offsetof(CPUState, tick_cmpr), + offsetof(CPUSPARCState, tick_cmpr), "tick_cmpr"); cpu_stick_cmpr = tcg_global_mem_new(TCG_AREG0, - offsetof(CPUState, stick_cmpr), + offsetof(CPUSPARCState, stick_cmpr), "stick_cmpr"); cpu_hstick_cmpr = tcg_global_mem_new(TCG_AREG0, - offsetof(CPUState, hstick_cmpr), + offsetof(CPUSPARCState, hstick_cmpr), "hstick_cmpr"); - cpu_hintp = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, hintp), + cpu_hintp = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, hintp), "hintp"); - cpu_htba = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, htba), + cpu_htba = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, htba), "htba"); - cpu_hver = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, hver), + cpu_hver = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, hver), "hver"); cpu_ssr = tcg_global_mem_new(TCG_AREG0, - offsetof(CPUState, ssr), "ssr"); + offsetof(CPUSPARCState, ssr), "ssr"); cpu_ver = tcg_global_mem_new(TCG_AREG0, - offsetof(CPUState, version), "ver"); + offsetof(CPUSPARCState, version), "ver"); cpu_softint = tcg_global_mem_new_i32(TCG_AREG0, - offsetof(CPUState, softint), + offsetof(CPUSPARCState, softint), "softint"); #else - cpu_wim = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, wim), + cpu_wim = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, wim), "wim"); #endif - cpu_cond = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, cond), + cpu_cond = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, cond), "cond"); - cpu_cc_src = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, cc_src), + cpu_cc_src = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, cc_src), "cc_src"); cpu_cc_src2 = tcg_global_mem_new(TCG_AREG0, - offsetof(CPUState, cc_src2), + offsetof(CPUSPARCState, cc_src2), "cc_src2"); - cpu_cc_dst = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, cc_dst), + cpu_cc_dst = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, cc_dst), "cc_dst"); - cpu_cc_op = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUState, cc_op), + cpu_cc_op = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUSPARCState, cc_op), "cc_op"); - cpu_psr = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUState, psr), + cpu_psr = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUSPARCState, psr), "psr"); - cpu_fsr = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, fsr), + cpu_fsr = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, fsr), "fsr"); - cpu_pc = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, pc), + cpu_pc = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, pc), "pc"); - cpu_npc = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, npc), + cpu_npc = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, npc), "npc"); - cpu_y = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, y), "y"); + cpu_y = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, y), "y"); #ifndef CONFIG_USER_ONLY - cpu_tbr = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, tbr), + cpu_tbr = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, tbr), "tbr"); #endif for (i = 1; i < 8; i++) { cpu_gregs[i] = tcg_global_mem_new(TCG_AREG0, - offsetof(CPUState, gregs[i]), + offsetof(CPUSPARCState, gregs[i]), gregnames[i]); } for (i = 0; i < TARGET_DPREGS; i++) { cpu_fpr[i] = tcg_global_mem_new_i64(TCG_AREG0, - offsetof(CPUState, fpr[i]), + offsetof(CPUSPARCState, fpr[i]), fregnames[i]); } @@ -5482,7 +5486,7 @@ void gen_intermediate_code_init(CPUSPARCState *env) } } -void restore_state_to_opc(CPUState *env, TranslationBlock *tb, int pc_pos) +void restore_state_to_opc(CPUSPARCState *env, TranslationBlock *tb, int pc_pos) { target_ulong npc; env->pc = gen_opc_pc[pc_pos]; diff --git a/target-sparc/win_helper.c b/target-sparc/win_helper.c index a68c649e7e..3e82eb71d6 100644 --- a/target-sparc/win_helper.c +++ b/target-sparc/win_helper.c @@ -33,7 +33,7 @@ static inline void memcpy32(target_ulong *dst, const target_ulong *src) dst[7] = src[7]; } -void cpu_set_cwp(CPUState *env, int new_cwp) +void cpu_set_cwp(CPUSPARCState *env, int new_cwp) { /* put the modified wrap registers at their proper location */ if (env->cwp == env->nwindows - 1) { @@ -48,7 +48,7 @@ void cpu_set_cwp(CPUState *env, int new_cwp) env->regwptr = env->regbase + (new_cwp * 16); } -target_ulong cpu_get_psr(CPUState *env) +target_ulong cpu_get_psr(CPUSPARCState *env) { helper_compute_psr(env); @@ -64,7 +64,7 @@ target_ulong cpu_get_psr(CPUState *env) #endif } -void cpu_put_psr(CPUState *env, target_ulong val) +void cpu_put_psr(CPUSPARCState *env, target_ulong val) { env->psr = val & PSR_ICC; #if !defined(TARGET_SPARC64) @@ -83,7 +83,7 @@ void cpu_put_psr(CPUState *env, target_ulong val) env->cc_op = CC_OP_FLAGS; } -int cpu_cwp_inc(CPUState *env, int cwp) +int cpu_cwp_inc(CPUSPARCState *env, int cwp) { if (unlikely(cwp >= env->nwindows)) { cwp -= env->nwindows; @@ -91,7 +91,7 @@ int cpu_cwp_inc(CPUState *env, int cwp) return cwp; } -int cpu_cwp_dec(CPUState *env, int cwp) +int cpu_cwp_dec(CPUSPARCState *env, int cwp) { if (unlikely(cwp < 0)) { cwp += env->nwindows; @@ -100,7 +100,7 @@ int cpu_cwp_dec(CPUState *env, int cwp) } #ifndef TARGET_SPARC64 -void helper_rett(CPUState *env) +void helper_rett(CPUSPARCState *env) { unsigned int cwp; @@ -119,7 +119,7 @@ void helper_rett(CPUState *env) /* XXX: use another pointer for %iN registers to avoid slow wrapping handling ? */ -void helper_save(CPUState *env) +void helper_save(CPUSPARCState *env) { uint32_t cwp; @@ -130,7 +130,7 @@ void helper_save(CPUState *env) cpu_set_cwp(env, cwp); } -void helper_restore(CPUState *env) +void helper_restore(CPUSPARCState *env) { uint32_t cwp; @@ -141,7 +141,7 @@ void helper_restore(CPUState *env) cpu_set_cwp(env, cwp); } -void helper_wrpsr(CPUState *env, target_ulong new_psr) +void helper_wrpsr(CPUSPARCState *env, target_ulong new_psr) { if ((new_psr & PSR_CWP) >= env->nwindows) { helper_raise_exception(env, TT_ILL_INSN); @@ -150,7 +150,7 @@ void helper_wrpsr(CPUState *env, target_ulong new_psr) } } -target_ulong helper_rdpsr(CPUState *env) +target_ulong helper_rdpsr(CPUSPARCState *env) { return cpu_get_psr(env); } @@ -158,7 +158,7 @@ target_ulong helper_rdpsr(CPUState *env) #else /* XXX: use another pointer for %iN registers to avoid slow wrapping handling ? */ -void helper_save(CPUState *env) +void helper_save(CPUSPARCState *env) { uint32_t cwp; @@ -180,7 +180,7 @@ void helper_save(CPUState *env) } } -void helper_restore(CPUState *env) +void helper_restore(CPUSPARCState *env) { uint32_t cwp; @@ -197,7 +197,7 @@ void helper_restore(CPUState *env) } } -void helper_flushw(CPUState *env) +void helper_flushw(CPUSPARCState *env) { if (env->cansave != env->nwindows - 2) { helper_raise_exception(env, TT_SPILL | (env->otherwin != 0 ? @@ -207,7 +207,7 @@ void helper_flushw(CPUState *env) } } -void helper_saved(CPUState *env) +void helper_saved(CPUSPARCState *env) { env->cansave++; if (env->otherwin == 0) { @@ -217,7 +217,7 @@ void helper_saved(CPUState *env) } } -void helper_restored(CPUState *env) +void helper_restored(CPUSPARCState *env) { env->canrestore++; if (env->cleanwin < env->nwindows - 1) { @@ -230,7 +230,7 @@ void helper_restored(CPUState *env) } } -target_ulong cpu_get_ccr(CPUState *env) +target_ulong cpu_get_ccr(CPUSPARCState *env) { target_ulong psr; @@ -239,19 +239,19 @@ target_ulong cpu_get_ccr(CPUState *env) return ((env->xcc >> 20) << 4) | ((psr & PSR_ICC) >> 20); } -void cpu_put_ccr(CPUState *env, target_ulong val) +void cpu_put_ccr(CPUSPARCState *env, target_ulong val) { env->xcc = (val >> 4) << 20; env->psr = (val & 0xf) << 20; CC_OP = CC_OP_FLAGS; } -target_ulong cpu_get_cwp64(CPUState *env) +target_ulong cpu_get_cwp64(CPUSPARCState *env) { return env->nwindows - 1 - env->cwp; } -void cpu_put_cwp64(CPUState *env, int cwp) +void cpu_put_cwp64(CPUSPARCState *env, int cwp) { if (unlikely(cwp >= env->nwindows || cwp < 0)) { cwp %= env->nwindows; @@ -259,29 +259,29 @@ void cpu_put_cwp64(CPUState *env, int cwp) cpu_set_cwp(env, env->nwindows - 1 - cwp); } -target_ulong helper_rdccr(CPUState *env) +target_ulong helper_rdccr(CPUSPARCState *env) { return cpu_get_ccr(env); } -void helper_wrccr(CPUState *env, target_ulong new_ccr) +void helper_wrccr(CPUSPARCState *env, target_ulong new_ccr) { cpu_put_ccr(env, new_ccr); } /* CWP handling is reversed in V9, but we still use the V8 register order. */ -target_ulong helper_rdcwp(CPUState *env) +target_ulong helper_rdcwp(CPUSPARCState *env) { return cpu_get_cwp64(env); } -void helper_wrcwp(CPUState *env, target_ulong new_cwp) +void helper_wrcwp(CPUSPARCState *env, target_ulong new_cwp) { cpu_put_cwp64(env, new_cwp); } -static inline uint64_t *get_gregset(CPUState *env, uint32_t pstate) +static inline uint64_t *get_gregset(CPUSPARCState *env, uint32_t pstate) { switch (pstate) { default: @@ -298,7 +298,7 @@ static inline uint64_t *get_gregset(CPUState *env, uint32_t pstate) } } -void cpu_change_pstate(CPUState *env, uint32_t new_pstate) +void cpu_change_pstate(CPUSPARCState *env, uint32_t new_pstate) { uint32_t pstate_regs, new_pstate_regs; uint64_t *src, *dst; @@ -325,7 +325,7 @@ void cpu_change_pstate(CPUState *env, uint32_t new_pstate) env->pstate = new_pstate; } -void helper_wrpstate(CPUState *env, target_ulong new_state) +void helper_wrpstate(CPUSPARCState *env, target_ulong new_state) { cpu_change_pstate(env, new_state & 0xf3f); @@ -336,7 +336,7 @@ void helper_wrpstate(CPUState *env, target_ulong new_state) #endif } -void helper_wrpil(CPUState *env, target_ulong new_pil) +void helper_wrpil(CPUSPARCState *env, target_ulong new_pil) { #if !defined(CONFIG_USER_ONLY) trace_win_helper_wrpil(env->psrpil, (uint32_t)new_pil); @@ -349,7 +349,7 @@ void helper_wrpil(CPUState *env, target_ulong new_pil) #endif } -void helper_done(CPUState *env) +void helper_done(CPUSPARCState *env) { trap_state *tsptr = cpu_tsptr(env); @@ -370,7 +370,7 @@ void helper_done(CPUState *env) #endif } -void helper_retry(CPUState *env) +void helper_retry(CPUSPARCState *env) { trap_state *tsptr = cpu_tsptr(env); |