diff options
Diffstat (limited to 'target')
| -rw-r--r-- | target/alpha/translate.c | 2 | ||||
| -rw-r--r-- | target/cris/helper.c | 2 | ||||
| -rw-r--r-- | target/cris/mmu.h | 10 | ||||
| -rw-r--r-- | target/cris/translate_v10.inc.c | 2 | ||||
| -rw-r--r-- | target/i386/translate.c | 12 | ||||
| -rw-r--r-- | target/mips/translate.c | 2 | ||||
| -rw-r--r-- | target/tilegx/translate.c | 2 |
7 files changed, 16 insertions, 16 deletions
diff --git a/target/alpha/translate.c b/target/alpha/translate.c index e5d62850c5..9d8f9b3eea 100644 --- a/target/alpha/translate.c +++ b/target/alpha/translate.c @@ -804,7 +804,7 @@ static void gen_cvttq(DisasContext *ctx, int rb, int rc, int fn11) static void gen_ieee_intcvt(DisasContext *ctx, void (*helper)(TCGv, TCGv_ptr, TCGv), - int rb, int rc, int fn11) + int rb, int rc, int fn11) { TCGv vb, vc; diff --git a/target/cris/helper.c b/target/cris/helper.c index d2ec349191..b2dbb2075c 100644 --- a/target/cris/helper.c +++ b/target/cris/helper.c @@ -240,7 +240,7 @@ void cris_cpu_do_interrupt(CPUState *cs) /* Exception starts with dslot cleared. */ env->dslot = 0; } - + if (env->pregs[PR_CCS] & U_FLAG) { /* Swap stack pointers. */ env->pregs[PR_USP] = env->regs[R_SP]; diff --git a/target/cris/mmu.h b/target/cris/mmu.h index 8e249e812b..0217f476de 100644 --- a/target/cris/mmu.h +++ b/target/cris/mmu.h @@ -5,13 +5,13 @@ struct cris_mmu_result { - uint32_t phy; - int prot; - int bf_vec; + uint32_t phy; + int prot; + int bf_vec; }; void cris_mmu_init(CPUCRISState *env); void cris_mmu_flush_pid(CPUCRISState *env, uint32_t pid); int cris_mmu_translate(struct cris_mmu_result *res, - CPUCRISState *env, uint32_t vaddr, - int rw, int mmu_idx, int debug); + CPUCRISState *env, uint32_t vaddr, + int rw, int mmu_idx, int debug); diff --git a/target/cris/translate_v10.inc.c b/target/cris/translate_v10.inc.c index fce78825cc..a87b8bb281 100644 --- a/target/cris/translate_v10.inc.c +++ b/target/cris/translate_v10.inc.c @@ -384,7 +384,7 @@ static unsigned int dec10_setclrf(DisasContext *dc) } static inline void dec10_reg_prep_sext(DisasContext *dc, int size, int sext, - TCGv dd, TCGv ds, TCGv sd, TCGv ss) + TCGv dd, TCGv ds, TCGv sd, TCGv ss) { if (sext) { t_gen_sext(dd, sd, size); diff --git a/target/i386/translate.c b/target/i386/translate.c index 0dd5fbe45c..49cd298374 100644 --- a/target/i386/translate.c +++ b/target/i386/translate.c @@ -3445,7 +3445,7 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b, case 0x172: case 0x173: if (b1 >= 2) { - goto unknown_op; + goto unknown_op; } val = x86_ldub_code(env, s); if (is_xmm) { @@ -6400,7 +6400,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) SVM_IOIO_TYPE_MASK | svm_is_rep(prefixes)); if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { gen_io_start(); - } + } tcg_gen_movi_i32(s->tmp2_i32, val); gen_helper_in_func(ot, s->T1, s->tmp2_i32); gen_op_mov_reg_v(s, ot, R_EAX, s->T1); @@ -6421,7 +6421,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { gen_io_start(); - } + } tcg_gen_movi_i32(s->tmp2_i32, val); tcg_gen_trunc_tl_i32(s->tmp3_i32, s->T1); gen_helper_out_func(ot, s->tmp2_i32, s->tmp3_i32); @@ -6439,7 +6439,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) SVM_IOIO_TYPE_MASK | svm_is_rep(prefixes)); if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { gen_io_start(); - } + } tcg_gen_trunc_tl_i32(s->tmp2_i32, s->T0); gen_helper_in_func(ot, s->T1, s->tmp2_i32); gen_op_mov_reg_v(s, ot, R_EAX, s->T1); @@ -6459,7 +6459,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { gen_io_start(); - } + } tcg_gen_trunc_tl_i32(s->tmp2_i32, s->T0); tcg_gen_trunc_tl_i32(s->tmp3_i32, s->T1); gen_helper_out_func(ot, s->tmp2_i32, s->tmp3_i32); @@ -7166,7 +7166,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) gen_jmp_im(s, pc_start - s->cs_base); if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { gen_io_start(); - } + } gen_helper_rdtsc(cpu_env); if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { gen_io_end(); diff --git a/target/mips/translate.c b/target/mips/translate.c index 2636e8c022..057aaf9a44 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -7036,7 +7036,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel) /* Mark as an IO operation because we read the time. */ if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { gen_io_start(); - } + } gen_helper_mfc0_count(arg, cpu_env); if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { gen_io_end(); diff --git a/target/tilegx/translate.c b/target/tilegx/translate.c index f201150fc7..df1e4d0fef 100644 --- a/target/tilegx/translate.c +++ b/target/tilegx/translate.c @@ -297,7 +297,7 @@ static TileExcp gen_st_opcode(DisasContext *dc, unsigned dest, unsigned srca, } tcg_gen_qemu_st_tl(load_gr(dc, srcb), load_gr(dc, srca), - dc->mmuidx, memop); + dc->mmuidx, memop); qemu_log_mask(CPU_LOG_TB_IN_ASM, "%s %s, %s", name, reg_names[srca], reg_names[srcb]); |