diff options
Diffstat (limited to 'target')
| -rw-r--r-- | target/alpha/machine.c | 2 | ||||
| -rw-r--r-- | target/arm/helper.c | 6 | ||||
| -rw-r--r-- | target/arm/machine.c | 6 | ||||
| -rw-r--r-- | target/arm/monitor.c | 13 | ||||
| -rw-r--r-- | target/avr/machine.c | 4 | ||||
| -rw-r--r-- | target/hppa/machine.c | 4 | ||||
| -rw-r--r-- | target/i386/cpu.c | 6 | ||||
| -rw-r--r-- | target/i386/tcg/translate.c | 7 | ||||
| -rw-r--r-- | target/microblaze/machine.c | 2 | ||||
| -rw-r--r-- | target/mips/cpu.c | 6 | ||||
| -rw-r--r-- | target/mips/cpu.h | 1 | ||||
| -rw-r--r-- | target/mips/machine.c | 4 | ||||
| -rw-r--r-- | target/openrisc/machine.c | 2 | ||||
| -rw-r--r-- | target/ppc/machine.c | 10 | ||||
| -rw-r--r-- | target/ppc/translate_init.c.inc | 12 | ||||
| -rw-r--r-- | target/s390x/cpu_models.c | 12 | ||||
| -rw-r--r-- | target/sparc/cpu.h | 28 | ||||
| -rw-r--r-- | target/sparc/int64_helper.c | 5 | ||||
| -rw-r--r-- | target/sparc/machine.c | 2 | ||||
| -rw-r--r-- | target/sparc/translate.c | 2 | ||||
| -rw-r--r-- | target/sparc/win_helper.c | 2 | ||||
| -rw-r--r-- | target/unicore32/translate.c | 2 |
22 files changed, 61 insertions, 77 deletions
diff --git a/target/alpha/machine.c b/target/alpha/machine.c index 9d20169d4f..2b7c8148ff 100644 --- a/target/alpha/machine.c +++ b/target/alpha/machine.c @@ -11,7 +11,7 @@ static int get_fpcr(QEMUFile *f, void *opaque, size_t size, } static int put_fpcr(QEMUFile *f, void *opaque, size_t size, - const VMStateField *field, QJSON *vmdesc) + const VMStateField *field, JSONWriter *vmdesc) { CPUAlphaState *env = opaque; qemu_put_be64(f, cpu_alpha_load_fpcr(env)); diff --git a/target/arm/helper.c b/target/arm/helper.c index 7b8bcd6903..2d0d4cd1e1 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -8283,7 +8283,6 @@ static void arm_cpu_add_definition(gpointer data, gpointer user_data) { ObjectClass *oc = data; CpuDefinitionInfoList **cpu_list = user_data; - CpuDefinitionInfoList *entry; CpuDefinitionInfo *info; const char *typename; @@ -8293,10 +8292,7 @@ static void arm_cpu_add_definition(gpointer data, gpointer user_data) strlen(typename) - strlen("-" TYPE_ARM_CPU)); info->q_typename = g_strdup(typename); - entry = g_malloc0(sizeof(*entry)); - entry->value = info; - entry->next = *cpu_list; - *cpu_list = entry; + QAPI_LIST_PREPEND(*cpu_list, info); } CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp) diff --git a/target/arm/machine.c b/target/arm/machine.c index c5a2114f51..581852bc53 100644 --- a/target/arm/machine.c +++ b/target/arm/machine.c @@ -27,7 +27,7 @@ static int get_fpscr(QEMUFile *f, void *opaque, size_t size, } static int put_fpscr(QEMUFile *f, void *opaque, size_t size, - const VMStateField *field, QJSON *vmdesc) + const VMStateField *field, JSONWriter *vmdesc) { ARMCPU *cpu = opaque; CPUARMState *env = &cpu->env; @@ -573,7 +573,7 @@ static int get_cpsr(QEMUFile *f, void *opaque, size_t size, } static int put_cpsr(QEMUFile *f, void *opaque, size_t size, - const VMStateField *field, QJSON *vmdesc) + const VMStateField *field, JSONWriter *vmdesc) { ARMCPU *cpu = opaque; CPUARMState *env = &cpu->env; @@ -608,7 +608,7 @@ static int get_power(QEMUFile *f, void *opaque, size_t size, } static int put_power(QEMUFile *f, void *opaque, size_t size, - const VMStateField *field, QJSON *vmdesc) + const VMStateField *field, JSONWriter *vmdesc) { ARMCPU *cpu = opaque; diff --git a/target/arm/monitor.c b/target/arm/monitor.c index 169d8a64b6..198b14e95e 100644 --- a/target/arm/monitor.c +++ b/target/arm/monitor.c @@ -42,15 +42,6 @@ static GICCapability *gic_cap_new(int version) return cap; } -static GICCapabilityList *gic_cap_list_add(GICCapabilityList *head, - GICCapability *cap) -{ - GICCapabilityList *item = g_new0(GICCapabilityList, 1); - item->value = cap; - item->next = head; - return item; -} - static inline void gic_cap_kvm_probe(GICCapability *v2, GICCapability *v3) { #ifdef CONFIG_KVM @@ -84,8 +75,8 @@ GICCapabilityList *qmp_query_gic_capabilities(Error **errp) gic_cap_kvm_probe(v2, v3); - head = gic_cap_list_add(head, v2); - head = gic_cap_list_add(head, v3); + QAPI_LIST_PREPEND(head, v2); + QAPI_LIST_PREPEND(head, v3); return head; } diff --git a/target/avr/machine.c b/target/avr/machine.c index e315442787..de264f57c3 100644 --- a/target/avr/machine.c +++ b/target/avr/machine.c @@ -34,7 +34,7 @@ static int get_sreg(QEMUFile *f, void *opaque, size_t size, } static int put_sreg(QEMUFile *f, void *opaque, size_t size, - const VMStateField *field, QJSON *vmdesc) + const VMStateField *field, JSONWriter *vmdesc) { CPUAVRState *env = opaque; uint8_t sreg = cpu_get_sreg(env); @@ -61,7 +61,7 @@ static int get_segment(QEMUFile *f, void *opaque, size_t size, } static int put_segment(QEMUFile *f, void *opaque, size_t size, - const VMStateField *field, QJSON *vmdesc) + const VMStateField *field, JSONWriter *vmdesc) { uint32_t *ramp = opaque; uint8_t temp = *ramp >> 16; diff --git a/target/hppa/machine.c b/target/hppa/machine.c index b60b654efb..905991d7f9 100644 --- a/target/hppa/machine.c +++ b/target/hppa/machine.c @@ -52,7 +52,7 @@ static int get_psw(QEMUFile *f, void *opaque, size_t size, } static int put_psw(QEMUFile *f, void *opaque, size_t size, - const VMStateField *field, QJSON *vmdesc) + const VMStateField *field, JSONWriter *vmdesc) { CPUHPPAState *env = opaque; qemu_put_betr(f, cpu_hppa_get_psw(env)); @@ -93,7 +93,7 @@ static int get_tlb(QEMUFile *f, void *opaque, size_t size, } static int put_tlb(QEMUFile *f, void *opaque, size_t size, - const VMStateField *field, QJSON *vmdesc) + const VMStateField *field, JSONWriter *vmdesc) { hppa_tlb_entry *ent = opaque; uint32_t val = 0; diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 0d20e156f2..35459a38bb 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -5014,7 +5014,6 @@ static void x86_cpu_definition_entry(gpointer data, gpointer user_data) ObjectClass *oc = data; X86CPUClass *cc = X86_CPU_CLASS(oc); CpuDefinitionInfoList **cpu_list = user_data; - CpuDefinitionInfoList *entry; CpuDefinitionInfo *info; info = g_malloc0(sizeof(*info)); @@ -5039,10 +5038,7 @@ static void x86_cpu_definition_entry(gpointer data, gpointer user_data) info->has_alias_of = !!info->alias_of; } - entry = g_malloc0(sizeof(*entry)); - entry->value = info; - entry->next = *cpu_list; - *cpu_list = entry; + QAPI_LIST_PREPEND(*cpu_list, info); } CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index 750f75c257..11db2f3c8d 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -1778,9 +1778,12 @@ static void gen_shiftd_rm_T1(DisasContext *s, MemOp ot, int op1, } else { tcg_gen_deposit_tl(s->T1, s->T0, s->T1, 16, 16); } - /* FALLTHRU */ -#ifdef TARGET_X86_64 + /* + * If TARGET_X86_64 defined then fall through into MO_32 case, + * otherwise fall through default case. + */ case MO_32: +#ifdef TARGET_X86_64 /* Concatenate the two 32-bit values and use a 64-bit shift. */ tcg_gen_subi_tl(s->tmp0, count, 1); if (is_right) { diff --git a/target/microblaze/machine.c b/target/microblaze/machine.c index c2074bbdfe..d24def3992 100644 --- a/target/microblaze/machine.c +++ b/target/microblaze/machine.c @@ -46,7 +46,7 @@ static int get_msr(QEMUFile *f, void *opaque, size_t size, } static int put_msr(QEMUFile *f, void *opaque, size_t size, - const VMStateField *field, QJSON *vmdesc) + const VMStateField *field, JSONWriter *vmdesc) { CPUMBState *env = container_of(opaque, CPUMBState, msr); diff --git a/target/mips/cpu.c b/target/mips/cpu.c index aadc6f8e74..b2cd69ff7f 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -543,7 +543,6 @@ static void mips_cpu_add_definition(gpointer data, gpointer user_data) { ObjectClass *oc = data; CpuDefinitionInfoList **cpu_list = user_data; - CpuDefinitionInfoList *entry; CpuDefinitionInfo *info; const char *typename; @@ -553,10 +552,7 @@ static void mips_cpu_add_definition(gpointer data, gpointer user_data) strlen(typename) - strlen("-" TYPE_MIPS_CPU)); info->q_typename = g_strdup(typename); - entry = g_malloc0(sizeof(*entry)); - entry->value = info; - entry->next = *cpu_list; - *cpu_list = entry; + QAPI_LIST_PREPEND(*cpu_list, info); } CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp) diff --git a/target/mips/cpu.h b/target/mips/cpu.h index 3ac21d0e9c..4cbc31c3e8 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -844,6 +844,7 @@ struct CPUMIPSState { #define CP0C0_MT 7 /* 9..7 */ #define CP0C0_VI 3 #define CP0C0_K0 0 /* 2..0 */ +#define CP0C0_AR_LENGTH 3 int32_t CP0_Config1; #define CP0C1_M 31 #define CP0C1_MMU 25 /* 30..25 */ diff --git a/target/mips/machine.c b/target/mips/machine.c index 5b23e3e912..77afe654e9 100644 --- a/target/mips/machine.c +++ b/target/mips/machine.c @@ -31,7 +31,7 @@ static int get_fpr(QEMUFile *f, void *pv, size_t size, } static int put_fpr(QEMUFile *f, void *pv, size_t size, - const VMStateField *field, QJSON *vmdesc) + const VMStateField *field, JSONWriter *vmdesc) { int i; fpr_t *v = pv; @@ -156,7 +156,7 @@ static int get_tlb(QEMUFile *f, void *pv, size_t size, } static int put_tlb(QEMUFile *f, void *pv, size_t size, - const VMStateField *field, QJSON *vmdesc) + const VMStateField *field, JSONWriter *vmdesc) { r4k_tlb_t *v = pv; diff --git a/target/openrisc/machine.c b/target/openrisc/machine.c index b92985d99b..6239725c4f 100644 --- a/target/openrisc/machine.c +++ b/target/openrisc/machine.c @@ -55,7 +55,7 @@ static int get_sr(QEMUFile *f, void *opaque, size_t size, } static int put_sr(QEMUFile *f, void *opaque, size_t size, - const VMStateField *field, QJSON *vmdesc) + const VMStateField *field, JSONWriter *vmdesc) { CPUOpenRISCState *env = opaque; qemu_put_be32(f, cpu_get_sr(env)); diff --git a/target/ppc/machine.c b/target/ppc/machine.c index d9d911b9b1..283db1d28a 100644 --- a/target/ppc/machine.c +++ b/target/ppc/machine.c @@ -134,7 +134,7 @@ static int get_avr(QEMUFile *f, void *pv, size_t size, } static int put_avr(QEMUFile *f, void *pv, size_t size, - const VMStateField *field, QJSON *vmdesc) + const VMStateField *field, JSONWriter *vmdesc) { ppc_avr_t *v = pv; @@ -166,7 +166,7 @@ static int get_fpr(QEMUFile *f, void *pv, size_t size, } static int put_fpr(QEMUFile *f, void *pv, size_t size, - const VMStateField *field, QJSON *vmdesc) + const VMStateField *field, JSONWriter *vmdesc) { ppc_vsr_t *v = pv; @@ -197,7 +197,7 @@ static int get_vsr(QEMUFile *f, void *pv, size_t size, } static int put_vsr(QEMUFile *f, void *pv, size_t size, - const VMStateField *field, QJSON *vmdesc) + const VMStateField *field, JSONWriter *vmdesc) { ppc_vsr_t *v = pv; @@ -455,7 +455,7 @@ static int get_vscr(QEMUFile *f, void *opaque, size_t size, } static int put_vscr(QEMUFile *f, void *opaque, size_t size, - const VMStateField *field, QJSON *vmdesc) + const VMStateField *field, JSONWriter *vmdesc) { PowerPCCPU *cpu = opaque; qemu_put_be32(f, helper_mfvscr(&cpu->env)); @@ -580,7 +580,7 @@ static int get_slbe(QEMUFile *f, void *pv, size_t size, } static int put_slbe(QEMUFile *f, void *pv, size_t size, - const VMStateField *field, QJSON *vmdesc) + const VMStateField *field, JSONWriter *vmdesc) { ppc_slb_t *v = pv; diff --git a/target/ppc/translate_init.c.inc b/target/ppc/translate_init.c.inc index a4d0038828..3c05a17343 100644 --- a/target/ppc/translate_init.c.inc +++ b/target/ppc/translate_init.c.inc @@ -10566,7 +10566,6 @@ static void ppc_cpu_defs_entry(gpointer data, gpointer user_data) ObjectClass *oc = data; CpuDefinitionInfoList **first = user_data; const char *typename; - CpuDefinitionInfoList *entry; CpuDefinitionInfo *info; typename = object_class_get_name(oc); @@ -10574,10 +10573,7 @@ static void ppc_cpu_defs_entry(gpointer data, gpointer user_data) info->name = g_strndup(typename, strlen(typename) - strlen(POWERPC_CPU_TYPE_SUFFIX)); - entry = g_malloc0(sizeof(*entry)); - entry->value = info; - entry->next = *first; - *first = entry; + QAPI_LIST_PREPEND(*first, info); } CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp) @@ -10593,7 +10589,6 @@ CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp) for (i = 0; ppc_cpu_aliases[i].alias != NULL; i++) { PowerPCCPUAlias *alias = &ppc_cpu_aliases[i]; ObjectClass *oc; - CpuDefinitionInfoList *entry; CpuDefinitionInfo *info; oc = ppc_cpu_class_by_name(alias->model); @@ -10605,10 +10600,7 @@ CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp) info->name = g_strdup(alias->alias); info->q_typename = g_strdup(object_class_get_name(oc)); - entry = g_malloc0(sizeof(*entry)); - entry->value = info; - entry->next = cpu_list; - cpu_list = entry; + QAPI_LIST_PREPEND(cpu_list, info); } return cpu_list; diff --git a/target/s390x/cpu_models.c b/target/s390x/cpu_models.c index 93d8744d29..35179f9dc7 100644 --- a/target/s390x/cpu_models.c +++ b/target/s390x/cpu_models.c @@ -448,7 +448,6 @@ static void create_cpu_model_list(ObjectClass *klass, void *opaque) { struct CpuDefinitionInfoListData *cpu_list_data = opaque; CpuDefinitionInfoList **cpu_list = &cpu_list_data->list; - CpuDefinitionInfoList *entry; CpuDefinitionInfo *info; char *name = g_strdup(object_class_get_name(klass)); S390CPUClass *scc = S390_CPU_CLASS(klass); @@ -475,10 +474,7 @@ static void create_cpu_model_list(ObjectClass *klass, void *opaque) object_unref(obj); } - entry = g_new0(CpuDefinitionInfoList, 1); - entry->value = info; - entry->next = *cpu_list; - *cpu_list = entry; + QAPI_LIST_PREPEND(*cpu_list, info); } CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp) @@ -645,12 +641,8 @@ CpuModelExpansionInfo *qmp_query_cpu_model_expansion(CpuModelExpansionType type, static void list_add_feat(const char *name, void *opaque) { strList **last = (strList **) opaque; - strList *entry; - entry = g_new0(strList, 1); - entry->value = g_strdup(name); - entry->next = *last; - *last = entry; + QAPI_LIST_PREPEND(*last, g_strdup(name)); } CpuModelCompareInfo *qmp_query_cpu_model_comparison(CpuModelInfo *infoa, diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h index b9369398f2..4b2290650b 100644 --- a/target/sparc/cpu.h +++ b/target/sparc/cpu.h @@ -156,7 +156,9 @@ enum { #define PS_IE (1<<1) #define PS_AG (1<<0) /* v9, zero on UA2007 */ -#define FPRS_FEF (1<<2) +#define FPRS_DL (1 << 0) +#define FPRS_DU (1 << 1) +#define FPRS_FEF (1 << 2) #define HS_PRIV (1<<2) #endif @@ -606,10 +608,6 @@ target_ulong cpu_get_psr(CPUSPARCState *env1); void cpu_put_psr(CPUSPARCState *env1, target_ulong val); void cpu_put_psr_raw(CPUSPARCState *env1, target_ulong val); #ifdef TARGET_SPARC64 -target_ulong cpu_get_ccr(CPUSPARCState *env1); -void cpu_put_ccr(CPUSPARCState *env1, target_ulong val); -target_ulong cpu_get_cwp64(CPUSPARCState *env1); -void cpu_put_cwp64(CPUSPARCState *env1, int cwp); void cpu_change_pstate(CPUSPARCState *env1, uint32_t new_pstate); void cpu_gl_switch_gregs(CPUSPARCState *env, uint32_t new_gl); #endif @@ -827,4 +825,24 @@ static inline bool tb_am_enabled(int tb_flags) #endif } +#ifdef TARGET_SPARC64 +/* win_helper.c */ +target_ulong cpu_get_ccr(CPUSPARCState *env1); +void cpu_put_ccr(CPUSPARCState *env1, target_ulong val); +target_ulong cpu_get_cwp64(CPUSPARCState *env1); +void cpu_put_cwp64(CPUSPARCState *env1, int cwp); + +static inline uint64_t sparc64_tstate(CPUSPARCState *env) +{ + uint64_t tstate = (cpu_get_ccr(env) << 32) | + ((env->asi & 0xff) << 24) | ((env->pstate & 0xf3f) << 8) | + cpu_get_cwp64(env); + + if (env->def.features & CPU_FEATURE_GL) { + tstate |= (env->gl & 7ULL) << 40; + } + return tstate; +} +#endif + #endif diff --git a/target/sparc/int64_helper.c b/target/sparc/int64_helper.c index ba95bf228c..7fb8ab211c 100644 --- a/target/sparc/int64_helper.c +++ b/target/sparc/int64_helper.c @@ -131,9 +131,7 @@ void sparc_cpu_do_interrupt(CPUState *cs) } tsptr = cpu_tsptr(env); - tsptr->tstate = (cpu_get_ccr(env) << 32) | - ((env->asi & 0xff) << 24) | ((env->pstate & 0xf3f) << 8) | - cpu_get_cwp64(env); + tsptr->tstate = sparc64_tstate(env); tsptr->tpc = env->pc; tsptr->tnpc = env->npc; tsptr->tt = intno; @@ -148,7 +146,6 @@ void sparc_cpu_do_interrupt(CPUState *cs) } if (env->def.features & CPU_FEATURE_GL) { - tsptr->tstate |= (env->gl & 7ULL) << 40; cpu_gl_switch_gregs(env, env->gl + 1); env->gl++; } diff --git a/target/sparc/machine.c b/target/sparc/machine.c index f38cf229af..917375c3a1 100644 --- a/target/sparc/machine.c +++ b/target/sparc/machine.c @@ -68,7 +68,7 @@ static int get_psr(QEMUFile *f, void *opaque, size_t size, } static int put_psr(QEMUFile *f, void *opaque, size_t size, - const VMStateField *field, QJSON *vmdesc) + const VMStateField *field, JSONWriter *vmdesc) { SPARCCPU *cpu = opaque; CPUSPARCState *env = &cpu->env; diff --git a/target/sparc/translate.c b/target/sparc/translate.c index 30c73f8d2e..4bfa3179f8 100644 --- a/target/sparc/translate.c +++ b/target/sparc/translate.c @@ -2324,8 +2324,8 @@ static void gen_st_asi(DisasContext *dc, TCGv src, TCGv addr, } /* in OpenSPARC T1+ CPUs TWINX ASIs in store instructions * are ST_BLKINIT_ ASIs */ - /* fall through */ #endif + /* fall through */ case GET_ASI_DIRECT: gen_address_mask(dc, addr); tcg_gen_qemu_st_tl(src, addr, da.mem_idx, da.memop); diff --git a/target/sparc/win_helper.c b/target/sparc/win_helper.c index 5b57892a10..3a7c0ff943 100644 --- a/target/sparc/win_helper.c +++ b/target/sparc/win_helper.c @@ -302,7 +302,7 @@ static inline uint64_t *get_gregset(CPUSPARCState *env, uint32_t pstate) switch (pstate) { default: trace_win_helper_gregset_error(pstate); - /* pass through to normal set of global registers */ + /* fall through to normal set of global registers */ case 0: return env->bgregs; case PS_AG: diff --git a/target/unicore32/translate.c b/target/unicore32/translate.c index d4b06df672..962f9877a0 100644 --- a/target/unicore32/translate.c +++ b/target/unicore32/translate.c @@ -1801,6 +1801,7 @@ static void disas_uc32_insn(CPUUniCore32State *env, DisasContext *s) do_misc(env, s, insn); break; } + /* fallthrough */ case 0x1: if (((UCOP_OPCODES >> 2) == 2) && !UCOP_SET_S) { do_misc(env, s, insn); @@ -1817,6 +1818,7 @@ static void disas_uc32_insn(CPUUniCore32State *env, DisasContext *s) if (UCOP_SET(8) || UCOP_SET(5)) { ILLEGAL; } + /* fallthrough */ case 0x3: do_ldst_ir(env, s, insn); break; |