diff options
Diffstat (limited to 'tcg/hppa/tcg-target.c')
| -rw-r--r-- | tcg/hppa/tcg-target.c | 60 |
1 files changed, 52 insertions, 8 deletions
diff --git a/tcg/hppa/tcg-target.c b/tcg/hppa/tcg-target.c index 59d4d12ba6..e579ef06a1 100644 --- a/tcg/hppa/tcg-target.c +++ b/tcg/hppa/tcg-target.c @@ -882,6 +882,27 @@ static void tcg_out_setcond2(TCGContext *s, int cond, TCGArg ret, #if defined(CONFIG_SOFTMMU) #include "../../softmmu_defs.h" +#ifdef CONFIG_TCG_PASS_AREG0 +/* helper signature: helper_ld_mmu(CPUState *env, target_ulong addr, + int mmu_idx) */ +static const void * const qemu_ld_helpers[4] = { + helper_ldb_mmu, + helper_ldw_mmu, + helper_ldl_mmu, + helper_ldq_mmu, +}; + +/* helper signature: helper_st_mmu(CPUState *env, target_ulong addr, + uintxx_t val, int mmu_idx) */ +static const void * const qemu_st_helpers[4] = { + helper_stb_mmu, + helper_stw_mmu, + helper_stl_mmu, + helper_stq_mmu, +}; +#else +/* legacy helper signature: __ld_mmu(target_ulong addr, int + mmu_idx) */ static void *qemu_ld_helpers[4] = { __ldb_mmu, __ldw_mmu, @@ -889,12 +910,15 @@ static void *qemu_ld_helpers[4] = { __ldq_mmu, }; +/* legacy helper signature: __st_mmu(target_ulong addr, uintxx_t val, + int mmu_idx) */ static void *qemu_st_helpers[4] = { __stb_mmu, __stw_mmu, __stl_mmu, __stq_mmu, }; +#endif /* Load and compare a TLB entry, and branch if TLB miss. OFFSET is set to the offset of the first ADDR_READ or ADDR_WRITE member of the appropriate @@ -1040,19 +1064,19 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, int opc) lab1 = gen_new_label(); lab2 = gen_new_label(); - offset = offsetof(CPUState, tlb_table[mem_index][0].addr_read); + offset = offsetof(CPUArchState, tlb_table[mem_index][0].addr_read); offset = tcg_out_tlb_read(s, TCG_REG_R26, TCG_REG_R25, addrlo_reg, addrhi_reg, opc & 3, lab1, offset); /* TLB Hit. */ tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_R20, (offset ? TCG_REG_R1 : TCG_REG_R25), - offsetof(CPUState, tlb_table[mem_index][0].addend) - offset); + offsetof(CPUArchState, tlb_table[mem_index][0].addend) - offset); tcg_out_qemu_ld_direct(s, datalo_reg, datahi_reg, addrlo_reg, TCG_REG_R20, opc); tcg_out_branch(s, lab2, 1); /* TLB Miss. */ /* label1: */ - tcg_out_label(s, lab1, (tcg_target_long)s->code_ptr); + tcg_out_label(s, lab1, s->code_ptr); argreg = TCG_REG_R26; tcg_out_mov(s, TCG_TYPE_I32, argreg--, addrlo_reg); @@ -1061,6 +1085,15 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, int opc) } tcg_out_movi(s, TCG_TYPE_I32, argreg, mem_index); +#ifdef CONFIG_TCG_PASS_AREG0 + /* XXX/FIXME: suboptimal */ + tcg_out_mov(s, TCG_TYPE_I32, tcg_target_call_iarg_regs[2], + tcg_target_call_iarg_regs[1]); + tcg_out_mov(s, TCG_TYPE_TL, tcg_target_call_iarg_regs[1], + tcg_target_call_iarg_regs[0]); + tcg_out_mov(s, TCG_TYPE_PTR, tcg_target_call_iarg_regs[0], + TCG_AREG0); +#endif tcg_out_call(s, qemu_ld_helpers[opc & 3]); switch (opc) { @@ -1089,7 +1122,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, int opc) } /* label2: */ - tcg_out_label(s, lab2, (tcg_target_long)s->code_ptr); + tcg_out_label(s, lab2, s->code_ptr); #else tcg_out_qemu_ld_direct(s, datalo_reg, datahi_reg, addrlo_reg, (GUEST_BASE ? TCG_GUEST_BASE_REG : TCG_REG_R0), opc); @@ -1155,13 +1188,13 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, int opc) lab1 = gen_new_label(); lab2 = gen_new_label(); - offset = offsetof(CPUState, tlb_table[mem_index][0].addr_write); + offset = offsetof(CPUArchState, tlb_table[mem_index][0].addr_write); offset = tcg_out_tlb_read(s, TCG_REG_R26, TCG_REG_R25, addrlo_reg, addrhi_reg, opc, lab1, offset); /* TLB Hit. */ tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_R20, (offset ? TCG_REG_R1 : TCG_REG_R25), - offsetof(CPUState, tlb_table[mem_index][0].addend) - offset); + offsetof(CPUArchState, tlb_table[mem_index][0].addend) - offset); /* There are no indexed stores, so we must do this addition explitly. Careful to avoid R20, which is used for the bswaps to follow. */ @@ -1171,7 +1204,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, int opc) /* TLB Miss. */ /* label1: */ - tcg_out_label(s, lab1, (tcg_target_long)s->code_ptr); + tcg_out_label(s, lab1, s->code_ptr); argreg = TCG_REG_R26; tcg_out_mov(s, TCG_TYPE_I32, argreg--, addrlo_reg); @@ -1212,10 +1245,21 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, int opc) tcg_abort(); } +#ifdef CONFIG_TCG_PASS_AREG0 + /* XXX/FIXME: suboptimal */ + tcg_out_mov(s, TCG_TYPE_I32, tcg_target_call_iarg_regs[3], + tcg_target_call_iarg_regs[2]); + tcg_out_mov(s, TCG_TYPE_I64, tcg_target_call_iarg_regs[2], + tcg_target_call_iarg_regs[1]); + tcg_out_mov(s, TCG_TYPE_TL, tcg_target_call_iarg_regs[1], + tcg_target_call_iarg_regs[0]); + tcg_out_mov(s, TCG_TYPE_PTR, tcg_target_call_iarg_regs[0], + TCG_AREG0); +#endif tcg_out_call(s, qemu_st_helpers[opc]); /* label2: */ - tcg_out_label(s, lab2, (tcg_target_long)s->code_ptr); + tcg_out_label(s, lab2, s->code_ptr); #else /* There are no indexed stores, so if GUEST_BASE is set we must do the add explicitly. Careful to avoid R20, which is used for the bswaps to follow. */ |