diff options
Diffstat (limited to 'tcg/i386')
| -rw-r--r-- | tcg/i386/tcg-target.c.inc | 39 | ||||
| -rw-r--r-- | tcg/i386/tcg-target.h | 1 |
2 files changed, 14 insertions, 26 deletions
diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc index 0155c0691c..d8797ed398 100644 --- a/tcg/i386/tcg-target.c.inc +++ b/tcg/i386/tcg-target.c.inc @@ -208,43 +208,34 @@ static const char *target_parse_constraint(TCGArgConstraint *ct, { switch(*ct_str++) { case 'a': - ct->ct |= TCG_CT_REG; - tcg_regset_set_reg(ct->u.regs, TCG_REG_EAX); + tcg_regset_set_reg(ct->regs, TCG_REG_EAX); break; case 'b': - ct->ct |= TCG_CT_REG; - tcg_regset_set_reg(ct->u.regs, TCG_REG_EBX); + tcg_regset_set_reg(ct->regs, TCG_REG_EBX); break; case 'c': - ct->ct |= TCG_CT_REG; - tcg_regset_set_reg(ct->u.regs, TCG_REG_ECX); + tcg_regset_set_reg(ct->regs, TCG_REG_ECX); break; case 'd': - ct->ct |= TCG_CT_REG; - tcg_regset_set_reg(ct->u.regs, TCG_REG_EDX); + tcg_regset_set_reg(ct->regs, TCG_REG_EDX); break; case 'S': - ct->ct |= TCG_CT_REG; - tcg_regset_set_reg(ct->u.regs, TCG_REG_ESI); + tcg_regset_set_reg(ct->regs, TCG_REG_ESI); break; case 'D': - ct->ct |= TCG_CT_REG; - tcg_regset_set_reg(ct->u.regs, TCG_REG_EDI); + tcg_regset_set_reg(ct->regs, TCG_REG_EDI); break; case 'q': /* A register that can be used as a byte operand. */ - ct->ct |= TCG_CT_REG; - ct->u.regs = TCG_TARGET_REG_BITS == 64 ? 0xffff : 0xf; + ct->regs = TCG_TARGET_REG_BITS == 64 ? 0xffff : 0xf; break; case 'Q': /* A register with an addressable second byte (e.g. %ah). */ - ct->ct |= TCG_CT_REG; - ct->u.regs = 0xf; + ct->regs = 0xf; break; case 'r': /* A general register. */ - ct->ct |= TCG_CT_REG; - ct->u.regs |= ALL_GENERAL_REGS; + ct->regs |= ALL_GENERAL_REGS; break; case 'W': /* With TZCNT/LZCNT, we can have operand-size as an input. */ @@ -252,16 +243,14 @@ static const char *target_parse_constraint(TCGArgConstraint *ct, break; case 'x': /* A vector register. */ - ct->ct |= TCG_CT_REG; - ct->u.regs |= ALL_VECTOR_REGS; + ct->regs |= ALL_VECTOR_REGS; break; /* qemu_ld/st address constraint */ case 'L': - ct->ct |= TCG_CT_REG; - ct->u.regs = TCG_TARGET_REG_BITS == 64 ? 0xffff : 0xff; - tcg_regset_reset_reg(ct->u.regs, TCG_REG_L0); - tcg_regset_reset_reg(ct->u.regs, TCG_REG_L1); + ct->regs = TCG_TARGET_REG_BITS == 64 ? 0xffff : 0xff; + tcg_regset_reset_reg(ct->regs, TCG_REG_L0); + tcg_regset_reset_reg(ct->regs, TCG_REG_L1); break; case 'e': @@ -969,7 +958,7 @@ static void tcg_out_dupi_vec(TCGContext *s, TCGType type, new_pool_label(s, arg, R_386_PC32, s->code_ptr - 4, -4); } else { if (have_avx2) { - tcg_out_vex_modrm_pool(s, OPC_VPBROADCASTW + vex_l, ret); + tcg_out_vex_modrm_pool(s, OPC_VPBROADCASTD + vex_l, ret); } else { tcg_out_vex_modrm_pool(s, OPC_VBROADCASTSS, ret); } diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h index d2baf796b0..abd4ac7fc0 100644 --- a/tcg/i386/tcg-target.h +++ b/tcg/i386/tcg-target.h @@ -189,7 +189,6 @@ extern bool have_avx2; #define TCG_TARGET_HAS_shi_vec 1 #define TCG_TARGET_HAS_shs_vec 1 #define TCG_TARGET_HAS_shv_vec have_avx2 -#define TCG_TARGET_HAS_cmp_vec 1 #define TCG_TARGET_HAS_mul_vec 1 #define TCG_TARGET_HAS_sat_vec 1 #define TCG_TARGET_HAS_minmax_vec 1 |