diff options
Diffstat (limited to 'tests')
110 files changed, 3042 insertions, 3314 deletions
diff --git a/tests/acceptance/boot_linux_console.py b/tests/acceptance/boot_linux_console.py index 1ca32ecf25..276a53f146 100644 --- a/tests/acceptance/boot_linux_console.py +++ b/tests/acceptance/boot_linux_console.py @@ -1010,6 +1010,74 @@ class BootLinuxConsole(LinuxKernelTest): self.vm.add_args('-dtb', self.workdir + '/day16/vexpress-v2p-ca9.dtb') self.do_test_advcal_2018('16', tar_hash, 'winter.zImage') + def test_arm_ast2400_palmetto_openbmc_v2_9_0(self): + """ + :avocado: tags=arch:arm + :avocado: tags=machine:palmetto-bmc + """ + + image_url = ('https://github.com/openbmc/openbmc/releases/download/2.9.0/' + 'obmc-phosphor-image-palmetto.static.mtd') + image_hash = ('3e13bbbc28e424865dc42f35ad672b10f2e82cdb11846bb28fa625b48beafd0d') + image_path = self.fetch_asset(image_url, asset_hash=image_hash, + algorithm='sha256') + + self.do_test_arm_aspeed(image_path) + + def test_arm_ast2500_romulus_openbmc_v2_9_0(self): + """ + :avocado: tags=arch:arm + :avocado: tags=machine:romulus-bmc + """ + + image_url = ('https://github.com/openbmc/openbmc/releases/download/2.9.0/' + 'obmc-phosphor-image-romulus.static.mtd') + image_hash = ('820341076803f1955bc31e647a512c79f9add4f5233d0697678bab4604c7bb25') + image_path = self.fetch_asset(image_url, asset_hash=image_hash, + algorithm='sha256') + + self.do_test_arm_aspeed(image_path) + + def do_test_arm_aspeed(self, image): + self.vm.set_console() + self.vm.add_args('-drive', 'file=' + image + ',if=mtd,format=raw', + '-net', 'nic') + self.vm.launch() + + self.wait_for_console_pattern("U-Boot 2016.07") + self.wait_for_console_pattern("## Loading kernel from FIT Image at 20080000") + self.wait_for_console_pattern("Starting kernel ...") + self.wait_for_console_pattern("Booting Linux on physical CPU 0x0") + self.wait_for_console_pattern( + "aspeed-smc 1e620000.spi: read control register: 203b0641") + self.wait_for_console_pattern("ftgmac100 1e660000.ethernet eth0: irq ") + self.wait_for_console_pattern("systemd[1]: Set hostname to") + + def test_arm_ast2600_debian(self): + """ + :avocado: tags=arch:arm + :avocado: tags=machine:tacoma-bmc + """ + deb_url = ('http://snapshot.debian.org/archive/debian/' + '20210302T203551Z/' + 'pool/main/l/linux/' + 'linux-image-5.10.0-3-armmp_5.10.13-1_armhf.deb') + deb_hash = 'db40d32fe39255d05482bea48d72467b67d6225bb2a2a4d6f618cb8976f1e09e' + deb_path = self.fetch_asset(deb_url, asset_hash=deb_hash, + algorithm='sha256') + kernel_path = self.extract_from_deb(deb_path, '/boot/vmlinuz-5.10.0-3-armmp') + dtb_path = self.extract_from_deb(deb_path, + '/usr/lib/linux-image-5.10.0-3-armmp/aspeed-bmc-opp-tacoma.dtb') + + self.vm.set_console() + self.vm.add_args('-kernel', kernel_path, + '-dtb', dtb_path, + '-net', 'nic') + self.vm.launch() + self.wait_for_console_pattern("Booting Linux on physical CPU 0xf00") + self.wait_for_console_pattern("SMP: Total of 2 processors activated") + self.wait_for_console_pattern("No filesystem could mount root") + def test_m68k_mcf5208evb(self): """ :avocado: tags=arch:m68k diff --git a/tests/decode/succ_argset_type1.decode b/tests/decode/succ_argset_type1.decode new file mode 100644 index 0000000000..ed946b420d --- /dev/null +++ b/tests/decode/succ_argset_type1.decode @@ -0,0 +1 @@ +&asdf b:bool c:uint64_t a diff --git a/tests/migration/guestperf/comparison.py b/tests/migration/guestperf/comparison.py index ba2edbe546..c03b3f6d7e 100644 --- a/tests/migration/guestperf/comparison.py +++ b/tests/migration/guestperf/comparison.py @@ -121,4 +121,18 @@ COMPARISONS = [ Scenario("compr-xbzrle-cache-50", compression_xbzrle=True, compression_xbzrle_cache=50), ]), + + + # Looking at effect of multifd with + # varying numbers of channels + Comparison("compr-multifd", scenarios = [ + Scenario("compr-multifd-channels-4", + multifd=True, multifd_channels=2), + Scenario("compr-multifd-channels-8", + multifd=True, multifd_channels=8), + Scenario("compr-multifd-channels-32", + multifd=True, multifd_channels=32), + Scenario("compr-multifd-channels-64", + multifd=True, multifd_channels=64), + ]), ] diff --git a/tests/migration/guestperf/engine.py b/tests/migration/guestperf/engine.py index 6b49aed579..208e095794 100644 --- a/tests/migration/guestperf/engine.py +++ b/tests/migration/guestperf/engine.py @@ -188,6 +188,22 @@ class Engine(object): 1024 * 1024 * 1024 / 100 * scenario._compression_xbzrle_cache)) + if scenario._multifd: + resp = src.command("migrate-set-capabilities", + capabilities = [ + { "capability": "multifd", + "state": True } + ]) + resp = src.command("migrate-set-parameters", + multifd_channels=scenario._multifd_channels) + resp = dst.command("migrate-set-capabilities", + capabilities = [ + { "capability": "multifd", + "state": True } + ]) + resp = dst.command("migrate-set-parameters", + multifd_channels=scenario._multifd_channels) + resp = src.command("migrate", uri=connect_uri) post_copy = False diff --git a/tests/migration/guestperf/scenario.py b/tests/migration/guestperf/scenario.py index 28ef36c26d..de70d9b2f5 100644 --- a/tests/migration/guestperf/scenario.py +++ b/tests/migration/guestperf/scenario.py @@ -29,7 +29,8 @@ class Scenario(object): post_copy=False, post_copy_iters=5, auto_converge=False, auto_converge_step=10, compression_mt=False, compression_mt_threads=1, - compression_xbzrle=False, compression_xbzrle_cache=10): + compression_xbzrle=False, compression_xbzrle_cache=10, + multifd=False, multifd_channels=2): self._name = name @@ -56,6 +57,9 @@ class Scenario(object): self._compression_xbzrle = compression_xbzrle self._compression_xbzrle_cache = compression_xbzrle_cache # percentage of guest RAM + self._multifd = multifd + self._multifd_channels = multifd_channels + def serialize(self): return { "name": self._name, @@ -73,6 +77,8 @@ class Scenario(object): "compression_mt_threads": self._compression_mt_threads, "compression_xbzrle": self._compression_xbzrle, "compression_xbzrle_cache": self._compression_xbzrle_cache, + "multifd": self._multifd, + "multifd_channels": self._multifd_channels, } @classmethod @@ -92,4 +98,6 @@ class Scenario(object): data["compression_mt"], data["compression_mt_threads"], data["compression_xbzrle"], - data["compression_xbzrle_cache"]) + data["compression_xbzrle_cache"], + data["multifd"], + data["multifd_channels"]) diff --git a/tests/migration/guestperf/shell.py b/tests/migration/guestperf/shell.py index f838888809..8a809e3dda 100644 --- a/tests/migration/guestperf/shell.py +++ b/tests/migration/guestperf/shell.py @@ -122,6 +122,11 @@ class Shell(BaseShell): parser.add_argument("--compression-xbzrle", dest="compression_xbzrle", default=False, action="store_true") parser.add_argument("--compression-xbzrle-cache", dest="compression_xbzrle_cache", default=10, type=int) + parser.add_argument("--multifd", dest="multifd", default=False, + action="store_true") + parser.add_argument("--multifd-channels", dest="multifd_channels", + default=2, type=int) + def get_scenario(self, args): return Scenario(name="perfreport", downtime=args.downtime, @@ -142,7 +147,10 @@ class Shell(BaseShell): compression_mt_threads=args.compression_mt_threads, compression_xbzrle=args.compression_xbzrle, - compression_xbzrle_cache=args.compression_xbzrle_cache) + compression_xbzrle_cache=args.compression_xbzrle_cache, + + multifd=args.multifd, + multifd_channels=args.multifd_channels) def run(self, argv): args = self._parser.parse_args(argv) diff --git a/tests/qapi-schema/alternate-data-invalid.err b/tests/qapi-schema/alternate-data-invalid.err new file mode 100644 index 0000000000..55f1033aef --- /dev/null +++ b/tests/qapi-schema/alternate-data-invalid.err @@ -0,0 +1,2 @@ +alternate-data-invalid.json: In alternate 'Alt': +alternate-data-invalid.json:2: 'data' must be an object diff --git a/tests/qapi-schema/alternate-data-invalid.json b/tests/qapi-schema/alternate-data-invalid.json new file mode 100644 index 0000000000..7d5d905581 --- /dev/null +++ b/tests/qapi-schema/alternate-data-invalid.json @@ -0,0 +1,4 @@ +# Alternate type requires an object for 'data' +{ 'alternate': 'Alt', + 'data': ['rubbish', 'nonsense'] +} diff --git a/tests/qapi-schema/alternate-data-invalid.out b/tests/qapi-schema/alternate-data-invalid.out new file mode 100644 index 0000000000..e69de29bb2 --- /dev/null +++ b/tests/qapi-schema/alternate-data-invalid.out diff --git a/tests/qapi-schema/meson.build b/tests/qapi-schema/meson.build index 8ba6917132..d7163e6601 100644 --- a/tests/qapi-schema/meson.build +++ b/tests/qapi-schema/meson.build @@ -14,6 +14,7 @@ schemas = [ 'alternate-conflict-string.json', 'alternate-conflict-bool-string.json', 'alternate-conflict-num-string.json', + 'alternate-data-invalid.json', 'alternate-empty.json', 'alternate-invalid-dict.json', 'alternate-nested.json', @@ -192,6 +193,7 @@ schemas = [ 'union-clash-branches.json', 'union-empty.json', 'union-invalid-base.json', + 'union-invalid-data.json', 'union-optional-branch.json', 'union-unknown.json', 'unknown-escape.json', diff --git a/tests/qapi-schema/union-invalid-data.err b/tests/qapi-schema/union-invalid-data.err new file mode 100644 index 0000000000..e26cf769a3 --- /dev/null +++ b/tests/qapi-schema/union-invalid-data.err @@ -0,0 +1,2 @@ +union-invalid-data.json: In union 'TestUnion': +union-invalid-data.json:2: 'data' must be an object diff --git a/tests/qapi-schema/union-invalid-data.json b/tests/qapi-schema/union-invalid-data.json new file mode 100644 index 0000000000..395ba24d39 --- /dev/null +++ b/tests/qapi-schema/union-invalid-data.json @@ -0,0 +1,6 @@ +# the union data type must be an object. +{ 'union': 'TestUnion', + 'base': 'int', + 'discriminator': 'int', + 'data': ['rubbish', 'nonsense'] +} diff --git a/tests/qapi-schema/union-invalid-data.out b/tests/qapi-schema/union-invalid-data.out new file mode 100644 index 0000000000..e69de29bb2 --- /dev/null +++ b/tests/qapi-schema/union-invalid-data.out diff --git a/tests/qemu-iotests/005 b/tests/qemu-iotests/005 index 40e64a9a8f..ba377543b0 100755 --- a/tests/qemu-iotests/005 +++ b/tests/qemu-iotests/005 @@ -52,11 +52,6 @@ if [ "$IMGFMT" = "vpc" ]; then _notrun "image format $IMGFMT does not support large image sizes" fi -# sheepdog image is limited to 4TB, so we can't test it here -if [ "$IMGPROTO" = "sheepdog" ]; then - _notrun "image protocol $IMGPROTO does not support large image sizes" -fi - # Sanity check: For raw, we require a file system that permits the creation # of a HUGE (but very sparse) file. Check we can create it before continuing. if [ "$IMGFMT" = "raw" ]; then diff --git a/tests/qemu-iotests/025 b/tests/qemu-iotests/025 index da77ed3154..80686a30d5 100755 --- a/tests/qemu-iotests/025 +++ b/tests/qemu-iotests/025 @@ -39,7 +39,7 @@ trap "_cleanup; exit \$status" 0 1 2 3 15 . ./common.pattern _supported_fmt raw qcow2 qed luks -_supported_proto file sheepdog rbd nfs fuse +_supported_proto file rbd nfs fuse echo "=== Creating image" echo diff --git a/tests/qemu-iotests/245 b/tests/qemu-iotests/245 index 11104b9208..fc5297e268 100755 --- a/tests/qemu-iotests/245 +++ b/tests/qemu-iotests/245 @@ -905,7 +905,7 @@ class TestBlockdevReopen(iotests.QMPTestCase): # We can't reopen hd1 to read-only, as block-stream requires it to be # read-write self.reopen(opts['backing'], {'read-only': True}, - "Cannot make block node read-only, there is a writer on it") + "Read-only block node 'hd1' cannot support read-write users") # We can't remove hd2 while the stream job is ongoing opts['backing']['backing'] = None diff --git a/tests/qemu-iotests/283.out b/tests/qemu-iotests/283.out index 37c35058ae..97e62a4c94 100644 --- a/tests/qemu-iotests/283.out +++ b/tests/qemu-iotests/283.out @@ -5,7 +5,7 @@ {"execute": "blockdev-add", "arguments": {"driver": "blkdebug", "image": "base", "node-name": "other", "take-child-perms": ["write"]}} {"return": {}} {"execute": "blockdev-backup", "arguments": {"device": "source", "sync": "full", "target": "target"}} -{"error": {"class": "GenericError", "desc": "Cannot set permissions for backup-top filter: Conflicts with use by other as 'image', which uses 'write' on base"}} +{"error": {"class": "GenericError", "desc": "Cannot append backup-top filter: Conflicts with use by source as 'image', which does not allow 'write' on base"}} === backup-top should be gone after job-finalize === diff --git a/tests/qemu-iotests/check b/tests/qemu-iotests/check index d1c87ceaf1..08f51366f1 100755 --- a/tests/qemu-iotests/check +++ b/tests/qemu-iotests/check @@ -65,8 +65,7 @@ def make_argparser() -> argparse.ArgumentParser: mg.add_argument('-' + fmt, dest='imgfmt', action='store_const', const=fmt, help=f'test {fmt}') - protocol_list = ['file', 'rbd', 'sheepdog', 'nbd', 'ssh', 'nfs', - 'fuse'] + protocol_list = ['file', 'rbd', 'nbd', 'ssh', 'nfs', 'fuse'] g_prt = p.add_argument_group( ' image protocol options', 'The following options set the IMGPROTO environment variable. ' diff --git a/tests/qemu-iotests/common.rc b/tests/qemu-iotests/common.rc index 7f49c9716d..cbbf6d7c7f 100644 --- a/tests/qemu-iotests/common.rc +++ b/tests/qemu-iotests/common.rc @@ -641,10 +641,6 @@ _cleanup_test_img() rbd --no-progress rm "$TEST_DIR/t.$IMGFMT" > /dev/null ;; - sheepdog) - collie vdi delete "$TEST_DIR/t.$IMGFMT" - ;; - esac } diff --git a/tests/qemu-iotests/tests/qsd-jobs.out b/tests/qemu-iotests/tests/qsd-jobs.out index 5f41491e05..9f52255da8 100644 --- a/tests/qemu-iotests/tests/qsd-jobs.out +++ b/tests/qemu-iotests/tests/qsd-jobs.out @@ -16,7 +16,7 @@ QMP_VERSION {"return": {}} {"timestamp": {"seconds": TIMESTAMP, "microseconds": TIMESTAMP}, "event": "JOB_STATUS_CHANGE", "data": {"status": "created", "id": "job0"}} {"timestamp": {"seconds": TIMESTAMP, "microseconds": TIMESTAMP}, "event": "JOB_STATUS_CHANGE", "data": {"status": "null", "id": "job0"}} -{"error": {"class": "GenericError", "desc": "Conflicts with use by a block device as 'root', which uses 'write' on fmt_base"}} +{"error": {"class": "GenericError", "desc": "Conflicts with use by stream job 'job0' as 'intermediate node', which does not allow 'write' on fmt_base"}} {"return": {}} {"timestamp": {"seconds": TIMESTAMP, "microseconds": TIMESTAMP}, "event": "BLOCK_EXPORT_DELETED", "data": {"id": "export1"}} *** done diff --git a/tests/qtest/aspeed_hace-test.c b/tests/qtest/aspeed_hace-test.c new file mode 100644 index 0000000000..09ee31545e --- /dev/null +++ b/tests/qtest/aspeed_hace-test.c @@ -0,0 +1,469 @@ +/* + * QTest testcase for the ASPEED Hash and Crypto Engine + * + * SPDX-License-Identifier: GPL-2.0-or-later + * Copyright 2021 IBM Corp. + */ + +#include "qemu/osdep.h" + +#include "libqos/libqtest.h" +#include "qemu-common.h" +#include "qemu/bitops.h" + +#define HACE_CMD 0x10 +#define HACE_SHA_BE_EN BIT(3) +#define HACE_MD5_LE_EN BIT(2) +#define HACE_ALGO_MD5 0 +#define HACE_ALGO_SHA1 BIT(5) +#define HACE_ALGO_SHA224 BIT(6) +#define HACE_ALGO_SHA256 (BIT(4) | BIT(6)) +#define HACE_ALGO_SHA512 (BIT(5) | BIT(6)) +#define HACE_ALGO_SHA384 (BIT(5) | BIT(6) | BIT(10)) +#define HACE_SG_EN BIT(18) + +#define HACE_STS 0x1c +#define HACE_RSA_ISR BIT(13) +#define HACE_CRYPTO_ISR BIT(12) +#define HACE_HASH_ISR BIT(9) +#define HACE_RSA_BUSY BIT(2) +#define HACE_CRYPTO_BUSY BIT(1) +#define HACE_HASH_BUSY BIT(0) +#define HACE_HASH_SRC 0x20 +#define HACE_HASH_DIGEST 0x24 +#define HACE_HASH_KEY_BUFF 0x28 +#define HACE_HASH_DATA_LEN 0x2c +#define HACE_HASH_CMD 0x30 +/* Scatter-Gather Hash */ +#define SG_LIST_LEN_LAST BIT(31) +struct AspeedSgList { + uint32_t len; + uint32_t addr; +} __attribute__ ((__packed__)); + +/* + * Test vector is the ascii "abc" + * + * Expected results were generated using command line utitiles: + * + * echo -n -e 'abc' | dd of=/tmp/test + * for hash in sha512sum sha256sum md5sum; do $hash /tmp/test; done + * + */ +static const uint8_t test_vector[] = {0x61, 0x62, 0x63}; + +static const uint8_t test_result_sha512[] = { + 0xdd, 0xaf, 0x35, 0xa1, 0x93, 0x61, 0x7a, 0xba, 0xcc, 0x41, 0x73, 0x49, + 0xae, 0x20, 0x41, 0x31, 0x12, 0xe6, 0xfa, 0x4e, 0x89, 0xa9, 0x7e, 0xa2, + 0x0a, 0x9e, 0xee, 0xe6, 0x4b, 0x55, 0xd3, 0x9a, 0x21, 0x92, 0x99, 0x2a, + 0x27, 0x4f, 0xc1, 0xa8, 0x36, 0xba, 0x3c, 0x23, 0xa3, 0xfe, 0xeb, 0xbd, + 0x45, 0x4d, 0x44, 0x23, 0x64, 0x3c, 0xe8, 0x0e, 0x2a, 0x9a, 0xc9, 0x4f, + 0xa5, 0x4c, 0xa4, 0x9f}; + +static const uint8_t test_result_sha256[] = { + 0xba, 0x78, 0x16, 0xbf, 0x8f, 0x01, 0xcf, 0xea, 0x41, 0x41, 0x40, 0xde, + 0x5d, 0xae, 0x22, 0x23, 0xb0, 0x03, 0x61, 0xa3, 0x96, 0x17, 0x7a, 0x9c, + 0xb4, 0x10, 0xff, 0x61, 0xf2, 0x00, 0x15, 0xad}; + +static const uint8_t test_result_md5[] = { + 0x90, 0x01, 0x50, 0x98, 0x3c, 0xd2, 0x4f, 0xb0, 0xd6, 0x96, 0x3f, 0x7d, + 0x28, 0xe1, 0x7f, 0x72}; + +/* + * The Scatter-Gather Test vector is the ascii "abc" "def" "ghi", broken + * into blocks of 3 characters as shown + * + * Expected results were generated using command line utitiles: + * + * echo -n -e 'abcdefghijkl' | dd of=/tmp/test + * for hash in sha512sum sha256sum; do $hash /tmp/test; done + * + */ +static const uint8_t test_vector_sg1[] = {0x61, 0x62, 0x63, 0x64, 0x65, 0x66}; +static const uint8_t test_vector_sg2[] = {0x67, 0x68, 0x69}; +static const uint8_t test_vector_sg3[] = {0x6a, 0x6b, 0x6c}; + +static const uint8_t test_result_sg_sha512[] = { + 0x17, 0x80, 0x7c, 0x72, 0x8e, 0xe3, 0xba, 0x35, 0xe7, 0xcf, 0x7a, 0xf8, + 0x23, 0x11, 0x6d, 0x26, 0xe4, 0x1e, 0x5d, 0x4d, 0x6c, 0x2f, 0xf1, 0xf3, + 0x72, 0x0d, 0x3d, 0x96, 0xaa, 0xcb, 0x6f, 0x69, 0xde, 0x64, 0x2e, 0x63, + 0xd5, 0xb7, 0x3f, 0xc3, 0x96, 0xc1, 0x2b, 0xe3, 0x8b, 0x2b, 0xd5, 0xd8, + 0x84, 0x25, 0x7c, 0x32, 0xc8, 0xf6, 0xd0, 0x85, 0x4a, 0xe6, 0xb5, 0x40, + 0xf8, 0x6d, 0xda, 0x2e}; + +static const uint8_t test_result_sg_sha256[] = { + 0xd6, 0x82, 0xed, 0x4c, 0xa4, 0xd9, 0x89, 0xc1, 0x34, 0xec, 0x94, 0xf1, + 0x55, 0x1e, 0x1e, 0xc5, 0x80, 0xdd, 0x6d, 0x5a, 0x6e, 0xcd, 0xe9, 0xf3, + 0xd3, 0x5e, 0x6e, 0x4a, 0x71, 0x7f, 0xbd, 0xe4}; + + +static void write_regs(QTestState *s, uint32_t base, uint32_t src, + uint32_t length, uint32_t out, uint32_t method) +{ + qtest_writel(s, base + HACE_HASH_SRC, src); + qtest_writel(s, base + HACE_HASH_DIGEST, out); + qtest_writel(s, base + HACE_HASH_DATA_LEN, length); + qtest_writel(s, base + HACE_HASH_CMD, HACE_SHA_BE_EN | method); +} + +static void test_md5(const char *machine, const uint32_t base, + const uint32_t src_addr) + +{ + QTestState *s = qtest_init(machine); + + uint32_t digest_addr = src_addr + 0x01000000; + uint8_t digest[16] = {0}; + + /* Check engine is idle, no busy or irq bits set */ + g_assert_cmphex(qtest_readl(s, base + HACE_STS), ==, 0); + + /* Write test vector into memory */ + qtest_memwrite(s, src_addr, test_vector, sizeof(test_vector)); + + write_regs(s, base, src_addr, sizeof(test_vector), digest_addr, HACE_ALGO_MD5); + + /* Check hash IRQ status is asserted */ + g_assert_cmphex(qtest_readl(s, base + HACE_STS), ==, 0x00000200); + + /* Clear IRQ status and check status is deasserted */ + qtest_writel(s, base + HACE_STS, 0x00000200); + g_assert_cmphex(qtest_readl(s, base + HACE_STS), ==, 0); + + /* Read computed digest from memory */ + qtest_memread(s, digest_addr, digest, sizeof(digest)); + + /* Check result of computation */ + g_assert_cmpmem(digest, sizeof(digest), + test_result_md5, sizeof(digest)); + + qtest_quit(s); +} + +static void test_sha256(const char *machine, const uint32_t base, + const uint32_t src_addr) +{ + QTestState *s = qtest_init(machine); + + const uint32_t digest_addr = src_addr + 0x1000000; + uint8_t digest[32] = {0}; + + /* Check engine is idle, no busy or irq bits set */ + g_assert_cmphex(qtest_readl(s, base + HACE_STS), ==, 0); + + /* Write test vector into memory */ + qtest_memwrite(s, src_addr, test_vector, sizeof(test_vector)); + + write_regs(s, base, src_addr, sizeof(test_vector), digest_addr, HACE_ALGO_SHA256); + + /* Check hash IRQ status is asserted */ + g_assert_cmphex(qtest_readl(s, base + HACE_STS), ==, 0x00000200); + + /* Clear IRQ status and check status is deasserted */ + qtest_writel(s, base + HACE_STS, 0x00000200); + g_assert_cmphex(qtest_readl(s, base + HACE_STS), ==, 0); + + /* Read computed digest from memory */ + qtest_memread(s, digest_addr, digest, sizeof(digest)); + + /* Check result of computation */ + g_assert_cmpmem(digest, sizeof(digest), + test_result_sha256, sizeof(digest)); + + qtest_quit(s); +} + +static void test_sha512(const char *machine, const uint32_t base, + const uint32_t src_addr) +{ + QTestState *s = qtest_init(machine); + + const uint32_t digest_addr = src_addr + 0x1000000; + uint8_t digest[64] = {0}; + + /* Check engine is idle, no busy or irq bits set */ + g_assert_cmphex(qtest_readl(s, base + HACE_STS), ==, 0); + + /* Write test vector into memory */ + qtest_memwrite(s, src_addr, test_vector, sizeof(test_vector)); + + write_regs(s, base, src_addr, sizeof(test_vector), digest_addr, HACE_ALGO_SHA512); + + /* Check hash IRQ status is asserted */ + g_assert_cmphex(qtest_readl(s, base + HACE_STS), ==, 0x00000200); + + /* Clear IRQ status and check status is deasserted */ + qtest_writel(s, base + HACE_STS, 0x00000200); + g_assert_cmphex(qtest_readl(s, base + HACE_STS), ==, 0); + + /* Read computed digest from memory */ + qtest_memread(s, digest_addr, digest, sizeof(digest)); + + /* Check result of computation */ + g_assert_cmpmem(digest, sizeof(digest), + test_result_sha512, sizeof(digest)); + + qtest_quit(s); +} + +static void test_sha256_sg(const char *machine, const uint32_t base, + const uint32_t src_addr) +{ + QTestState *s = qtest_init(machine); + + const uint32_t src_addr_1 = src_addr + 0x1000000; + const uint32_t src_addr_2 = src_addr + 0x2000000; + const uint32_t src_addr_3 = src_addr + 0x3000000; + const uint32_t digest_addr = src_addr + 0x4000000; + uint8_t digest[32] = {0}; + struct AspeedSgList array[] = { + { cpu_to_le32(sizeof(test_vector_sg1)), + cpu_to_le32(src_addr_1) }, + { cpu_to_le32(sizeof(test_vector_sg2)), + cpu_to_le32(src_addr_2) }, + { cpu_to_le32(sizeof(test_vector_sg3) | SG_LIST_LEN_LAST), + cpu_to_le32(src_addr_3) }, + }; + + /* Check engine is idle, no busy or irq bits set */ + g_assert_cmphex(qtest_readl(s, base + HACE_STS), ==, 0); + + /* Write test vector into memory */ + qtest_memwrite(s, src_addr_1, test_vector_sg1, sizeof(test_vector_sg1)); + qtest_memwrite(s, src_addr_2, test_vector_sg2, sizeof(test_vector_sg2)); + qtest_memwrite(s, src_addr_3, test_vector_sg3, sizeof(test_vector_sg3)); + qtest_memwrite(s, src_addr, array, sizeof(array)); + + write_regs(s, base, src_addr, + (sizeof(test_vector_sg1) + + sizeof(test_vector_sg2) + + sizeof(test_vector_sg3)), + digest_addr, HACE_ALGO_SHA256 | HACE_SG_EN); + + /* Check hash IRQ status is asserted */ + g_assert_cmphex(qtest_readl(s, base + HACE_STS), ==, 0x00000200); + + /* Clear IRQ status and check status is deasserted */ + qtest_writel(s, base + HACE_STS, 0x00000200); + g_assert_cmphex(qtest_readl(s, base + HACE_STS), ==, 0); + + /* Read computed digest from memory */ + qtest_memread(s, digest_addr, digest, sizeof(digest)); + + /* Check result of computation */ + g_assert_cmpmem(digest, sizeof(digest), + test_result_sg_sha256, sizeof(digest)); + + qtest_quit(s); +} + +static void test_sha512_sg(const char *machine, const uint32_t base, + const uint32_t src_addr) +{ + QTestState *s = qtest_init(machine); + + const uint32_t src_addr_1 = src_addr + 0x1000000; + const uint32_t src_addr_2 = src_addr + 0x2000000; + const uint32_t src_addr_3 = src_addr + 0x3000000; + const uint32_t digest_addr = src_addr + 0x4000000; + uint8_t digest[64] = {0}; + struct AspeedSgList array[] = { + { cpu_to_le32(sizeof(test_vector_sg1)), + cpu_to_le32(src_addr_1) }, + { cpu_to_le32(sizeof(test_vector_sg2)), + cpu_to_le32(src_addr_2) }, + { cpu_to_le32(sizeof(test_vector_sg3) | SG_LIST_LEN_LAST), + cpu_to_le32(src_addr_3) }, + }; + + /* Check engine is idle, no busy or irq bits set */ + g_assert_cmphex(qtest_readl(s, base + HACE_STS), ==, 0); + + /* Write test vector into memory */ + qtest_memwrite(s, src_addr_1, test_vector_sg1, sizeof(test_vector_sg1)); + qtest_memwrite(s, src_addr_2, test_vector_sg2, sizeof(test_vector_sg2)); + qtest_memwrite(s, src_addr_3, test_vector_sg3, sizeof(test_vector_sg3)); + qtest_memwrite(s, src_addr, array, sizeof(array)); + + write_regs(s, base, src_addr, + (sizeof(test_vector_sg1) + + sizeof(test_vector_sg2) + + sizeof(test_vector_sg3)), + digest_addr, HACE_ALGO_SHA512 | HACE_SG_EN); + + /* Check hash IRQ status is asserted */ + g_assert_cmphex(qtest_readl(s, base + HACE_STS), ==, 0x00000200); + + /* Clear IRQ status and check status is deasserted */ + qtest_writel(s, base + HACE_STS, 0x00000200); + g_assert_cmphex(qtest_readl(s, base + HACE_STS), ==, 0); + + /* Read computed digest from memory */ + qtest_memread(s, digest_addr, digest, sizeof(digest)); + + /* Check result of computation */ + g_assert_cmpmem(digest, sizeof(digest), + test_result_sg_sha512, sizeof(digest)); + + qtest_quit(s); +} + +struct masks { + uint32_t src; + uint32_t dest; + uint32_t len; +}; + +static const struct masks ast2600_masks = { + .src = 0x7fffffff, + .dest = 0x7ffffff8, + .len = 0x0fffffff, +}; + +static const struct masks ast2500_masks = { + .src = 0x3fffffff, + .dest = 0x3ffffff8, + .len = 0x0fffffff, +}; + +static const struct masks ast2400_masks = { + .src = 0x0fffffff, + .dest = 0x0ffffff8, + .len = 0x0fffffff, +}; + +static void test_addresses(const char *machine, const uint32_t base, + const struct masks *expected) +{ + QTestState *s = qtest_init(machine); + + /* + * Check command mode is zero, meaning engine is in direct access mode, + * as this affects the masking behavior of the HASH_SRC register. + */ + g_assert_cmphex(qtest_readl(s, base + HACE_CMD), ==, 0); + g_assert_cmphex(qtest_readl(s, base + HACE_HASH_SRC), ==, 0); + g_assert_cmphex(qtest_readl(s, base + HACE_HASH_DIGEST), ==, 0); + g_assert_cmphex(qtest_readl(s, base + HACE_HASH_DATA_LEN), ==, 0); + + + /* Check that the address masking is correct */ + qtest_writel(s, base + HACE_HASH_SRC, 0xffffffff); + g_assert_cmphex(qtest_readl(s, base + HACE_HASH_SRC), ==, expected->src); + + qtest_writel(s, base + HACE_HASH_DIGEST, 0xffffffff); + g_assert_cmphex(qtest_readl(s, base + HACE_HASH_DIGEST), ==, expected->dest); + + qtest_writel(s, base + HACE_HASH_DATA_LEN, 0xffffffff); + g_assert_cmphex(qtest_readl(s, base + HACE_HASH_DATA_LEN), ==, expected->len); + + /* Reset to zero */ + qtest_writel(s, base + HACE_HASH_SRC, 0); + qtest_writel(s, base + HACE_HASH_DIGEST, 0); + qtest_writel(s, base + HACE_HASH_DATA_LEN, 0); + + /* Check that all bits are now zero */ + g_assert_cmphex(qtest_readl(s, base + HACE_HASH_SRC), ==, 0); + g_assert_cmphex(qtest_readl(s, base + HACE_HASH_DIGEST), ==, 0); + g_assert_cmphex(qtest_readl(s, base + HACE_HASH_DATA_LEN), ==, 0); + + qtest_quit(s); +} + +/* ast2600 */ +static void test_md5_ast2600(void) +{ + test_md5("-machine ast2600-evb", 0x1e6d0000, 0x80000000); +} + +static void test_sha256_ast2600(void) +{ + test_sha256("-machine ast2600-evb", 0x1e6d0000, 0x80000000); +} + +static void test_sha256_sg_ast2600(void) +{ + test_sha256_sg("-machine ast2600-evb", 0x1e6d0000, 0x80000000); +} + +static void test_sha512_ast2600(void) +{ + test_sha512("-machine ast2600-evb", 0x1e6d0000, 0x80000000); +} + +static void test_sha512_sg_ast2600(void) +{ + test_sha512_sg("-machine ast2600-evb", 0x1e6d0000, 0x80000000); +} + +static void test_addresses_ast2600(void) +{ + test_addresses("-machine ast2600-evb", 0x1e6d0000, &ast2600_masks); +} + +/* ast2500 */ +static void test_md5_ast2500(void) +{ + test_md5("-machine ast2500-evb", 0x1e6e3000, 0x80000000); +} + +static void test_sha256_ast2500(void) +{ + test_sha256("-machine ast2500-evb", 0x1e6e3000, 0x80000000); +} + +static void test_sha512_ast2500(void) +{ + test_sha512("-machine ast2500-evb", 0x1e6e3000, 0x80000000); +} + +static void test_addresses_ast2500(void) +{ + test_addresses("-machine ast2500-evb", 0x1e6e3000, &ast2500_masks); +} + +/* ast2400 */ +static void test_md5_ast2400(void) +{ + test_md5("-machine palmetto-bmc", 0x1e6e3000, 0x40000000); +} + +static void test_sha256_ast2400(void) +{ + test_sha256("-machine palmetto-bmc", 0x1e6e3000, 0x40000000); +} + +static void test_sha512_ast2400(void) +{ + test_sha512("-machine palmetto-bmc", 0x1e6e3000, 0x40000000); +} + +static void test_addresses_ast2400(void) +{ + test_addresses("-machine palmetto-bmc", 0x1e6e3000, &ast2400_masks); +} + +int main(int argc, char **argv) +{ + g_test_init(&argc, &argv, NULL); + + qtest_add_func("ast2600/hace/addresses", test_addresses_ast2600); + qtest_add_func("ast2600/hace/sha512", test_sha512_ast2600); + qtest_add_func("ast2600/hace/sha256", test_sha256_ast2600); + qtest_add_func("ast2600/hace/md5", test_md5_ast2600); + + qtest_add_func("ast2600/hace/sha512_sg", test_sha512_sg_ast2600); + qtest_add_func("ast2600/hace/sha256_sg", test_sha256_sg_ast2600); + + qtest_add_func("ast2500/hace/addresses", test_addresses_ast2500); + qtest_add_func("ast2500/hace/sha512", test_sha512_ast2500); + qtest_add_func("ast2500/hace/sha256", test_sha256_ast2500); + qtest_add_func("ast2500/hace/md5", test_md5_ast2500); + + qtest_add_func("ast2400/hace/addresses", test_addresses_ast2400); + qtest_add_func("ast2400/hace/sha512", test_sha512_ast2400); + qtest_add_func("ast2400/hace/sha256", test_sha256_ast2400); + qtest_add_func("ast2400/hace/md5", test_md5_ast2400); + + return g_test_run(); +} diff --git a/tests/qtest/m25p80-test.c b/tests/qtest/aspeed_smc-test.c index f860cef5f0..87b40a0ef1 100644 --- a/tests/qtest/m25p80-test.c +++ b/tests/qtest/aspeed_smc-test.c @@ -367,12 +367,12 @@ int main(int argc, char **argv) "-drive file=%s,format=raw,if=mtd", tmp_path); - qtest_add_func("/m25p80/read_jedec", test_read_jedec); - qtest_add_func("/m25p80/erase_sector", test_erase_sector); - qtest_add_func("/m25p80/erase_all", test_erase_all); - qtest_add_func("/m25p80/write_page", test_write_page); - qtest_add_func("/m25p80/read_page_mem", test_read_page_mem); - qtest_add_func("/m25p80/write_page_mem", test_write_page_mem); + qtest_add_func("/ast2400/smc/read_jedec", test_read_jedec); + qtest_add_func("/ast2400/smc/erase_sector", test_erase_sector); + qtest_add_func("/ast2400/smc/erase_all", test_erase_all); + qtest_add_func("/ast2400/smc/write_page", test_write_page); + qtest_add_func("/ast2400/smc/read_page_mem", test_read_page_mem); + qtest_add_func("/ast2400/smc/write_page_mem", test_write_page_mem); ret = g_test_run(); diff --git a/tests/qtest/boot-serial-test.c b/tests/qtest/boot-serial-test.c index d74509b1c5..d40adddafa 100644 --- a/tests/qtest/boot-serial-test.c +++ b/tests/qtest/boot-serial-test.c @@ -61,13 +61,6 @@ static const uint8_t kernel_plml605[] = { 0xfc, 0xff, 0x00, 0xb8 /* bri -4 loop */ }; -static const uint8_t bios_moxiesim[] = { - 0x20, 0x10, 0x00, 0x00, 0x03, 0xf8, /* ldi.s r1,0x3f8 */ - 0x1b, 0x20, 0x00, 0x00, 0x00, 0x54, /* ldi.b r2,'T' */ - 0x1e, 0x12, /* st.b r1,r2 */ - 0x1a, 0x00, 0x00, 0x00, 0x10, 0x00 /* jmpa 0x1000 */ -}; - static const uint8_t bios_raspi2[] = { 0x08, 0x30, 0x9f, 0xe5, /* ldr r3,[pc,#8] Get base */ 0x54, 0x20, 0xa0, 0xe3, /* mov r2,#'T' */ @@ -145,7 +138,6 @@ static testdef_t tests[] = { sizeof(kernel_pls3adsp1800), kernel_pls3adsp1800 }, { "microblazeel", "petalogix-ml605", "", "TT", sizeof(kernel_plml605), kernel_plml605 }, - { "moxie", "moxiesim", "", "TT", sizeof(bios_moxiesim), 0, bios_moxiesim }, { "arm", "raspi2", "", "TT", sizeof(bios_raspi2), 0, bios_raspi2 }, /* For hppa, force bios to output to serial by disabling graphics. */ { "hppa", "hppa", "-vga none", "SeaBIOS wants SYSTEM HALT" }, diff --git a/tests/qtest/fuzz/fuzz.c b/tests/qtest/fuzz/fuzz.c index 496d11a231..04b70e114b 100644 --- a/tests/qtest/fuzz/fuzz.c +++ b/tests/qtest/fuzz/fuzz.c @@ -18,7 +18,6 @@ #include "qemu/datadir.h" #include "sysemu/qtest.h" #include "sysemu/runstate.h" -#include "sysemu/sysemu.h" #include "qemu/main-loop.h" #include "qemu/rcu.h" #include "tests/qtest/libqos/libqtest.h" diff --git a/tests/qtest/fuzz/generic_fuzz.c b/tests/qtest/fuzz/generic_fuzz.c index ae219540b4..cea7d4058e 100644 --- a/tests/qtest/fuzz/generic_fuzz.c +++ b/tests/qtest/fuzz/generic_fuzz.c @@ -19,11 +19,9 @@ #include "tests/qtest/libqos/pci-pc.h" #include "fuzz.h" #include "fork_fuzz.h" -#include "exec/address-spaces.h" #include "string.h" #include "exec/memory.h" #include "exec/ramblock.h" -#include "exec/address-spaces.h" #include "hw/qdev-core.h" #include "hw/pci/pci.h" #include "hw/boards.h" diff --git a/tests/qtest/fuzz/qos_fuzz.c b/tests/qtest/fuzz/qos_fuzz.c index cee1a2a60f..7a244c951e 100644 --- a/tests/qtest/fuzz/qos_fuzz.c +++ b/tests/qtest/fuzz/qos_fuzz.c @@ -21,8 +21,6 @@ #include "qapi/error.h" #include "qemu-common.h" #include "exec/memory.h" -#include "exec/address-spaces.h" -#include "sysemu/sysemu.h" #include "qemu/main-loop.h" #include "tests/qtest/libqos/libqtest.h" diff --git a/tests/qtest/machine-none-test.c b/tests/qtest/machine-none-test.c index aab06b9fc2..138101b46a 100644 --- a/tests/qtest/machine-none-test.c +++ b/tests/qtest/machine-none-test.c @@ -32,7 +32,6 @@ static struct arch2cpu cpus_map[] = { { "i386", "qemu32,apic-id=0" }, { "alpha", "ev67" }, { "cris", "crisv32" }, - { "lm32", "lm32-full" }, { "m68k", "m5206" }, { "microblaze", "any" }, { "microblazeel", "any" }, @@ -40,7 +39,6 @@ static struct arch2cpu cpus_map[] = { { "mipsel", "I7200" }, { "mips64", "20Kc" }, { "mips64el", "I6500" }, - { "moxie", "MoxieLite" }, { "nios2", "FIXME" }, { "or1k", "or1200" }, { "ppc", "604" }, @@ -51,7 +49,6 @@ static struct arch2cpu cpus_map[] = { { "sparc", "LEON2" }, { "sparc64", "Fujitsu Sparc64" }, { "tricore", "tc1796" }, - { "unicore32", "UniCore-II" }, { "xtensa", "dc233c" }, { "xtensaeb", "fsf" }, { "hppa", "hppa" }, diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build index 0c76738921..49de74ff59 100644 --- a/tests/qtest/meson.build +++ b/tests/qtest/meson.build @@ -126,8 +126,6 @@ qtests_mips64el = \ (config_all_devices.has_key('CONFIG_ISA_TESTDEV') ? ['endianness-test'] : []) + \ (config_all_devices.has_key('CONFIG_VGA') ? ['display-vga-test'] : []) -qtests_moxie = [ 'boot-serial-test' ] - qtests_ppc = \ (config_all_devices.has_key('CONFIG_ISA_TESTDEV') ? ['endianness-test'] : []) + \ (config_all_devices.has_key('CONFIG_M48T59') ? ['m48t59-test'] : []) + \ @@ -161,16 +159,19 @@ qtests_npcm7xx = \ 'npcm7xx_timer-test', 'npcm7xx_watchdog_timer-test'] + \ (slirp.found() ? ['npcm7xx_emc-test'] : []) +qtests_aspeed = \ + ['aspeed_hace-test', + 'aspeed_smc-test'] qtests_arm = \ (config_all_devices.has_key('CONFIG_MPS2') ? ['sse-timer-test'] : []) + \ (config_all_devices.has_key('CONFIG_CMSDK_APB_DUALTIMER') ? ['cmsdk-apb-dualtimer-test'] : []) + \ (config_all_devices.has_key('CONFIG_CMSDK_APB_TIMER') ? ['cmsdk-apb-timer-test'] : []) + \ (config_all_devices.has_key('CONFIG_CMSDK_APB_WATCHDOG') ? ['cmsdk-apb-watchdog-test'] : []) + \ (config_all_devices.has_key('CONFIG_PFLASH_CFI02') ? ['pflash-cfi02-test'] : []) + \ + (config_all_devices.has_key('CONFIG_ASPEED_SOC') ? qtests_aspeed : []) + \ (config_all_devices.has_key('CONFIG_NPCM7XX') ? qtests_npcm7xx : []) + \ ['arm-cpu-features', 'microbit-test', - 'm25p80-test', 'test-arm-mptimer', 'boot-serial-test', 'hexloader-test'] diff --git a/tests/qtest/migration-test.c b/tests/qtest/migration-test.c index 3a711bb492..2b028df687 100644 --- a/tests/qtest/migration-test.c +++ b/tests/qtest/migration-test.c @@ -110,13 +110,12 @@ static void init_bootfile(const char *bootpath, void *content, size_t len) */ static void wait_for_serial(const char *side) { - char *serialpath = g_strdup_printf("%s/%s", tmpfs, side); + g_autofree char *serialpath = g_strdup_printf("%s/%s", tmpfs, side); FILE *serialfile = fopen(serialpath, "r"); const char *arch = qtest_get_arch(); int started = (strcmp(side, "src_serial") == 0 && strcmp(arch, "ppc64") == 0) ? 0 : 1; - g_free(serialpath); do { int readvalue = fgetc(serialfile); @@ -274,10 +273,9 @@ static void check_guests_ram(QTestState *who) static void cleanup(const char *filename) { - char *path = g_strdup_printf("%s/%s", tmpfs, filename); + g_autofree char *path = g_strdup_printf("%s/%s", tmpfs, filename); unlink(path); - g_free(path); } static char *SocketAddress_to_str(SocketAddress *addr) @@ -374,11 +372,8 @@ static char *migrate_get_parameter_str(QTestState *who, static void migrate_check_parameter_str(QTestState *who, const char *parameter, const char *value) { - char *result; - - result = migrate_get_parameter_str(who, parameter); + g_autofree char *result = migrate_get_parameter_str(who, parameter); g_assert_cmpstr(result, ==, value); - g_free(result); } static void migrate_set_parameter_str(QTestState *who, const char *parameter, @@ -495,12 +490,14 @@ static void migrate_start_destroy(MigrateStart *args) static int test_migrate_start(QTestState **from, QTestState **to, const char *uri, MigrateStart *args) { - gchar *arch_source, *arch_target; - gchar *cmd_source, *cmd_target; + g_autofree gchar *arch_source = NULL; + g_autofree gchar *arch_target = NULL; + g_autofree gchar *cmd_source = NULL; + g_autofree gchar *cmd_target = NULL; const gchar *ignore_stderr; - char *bootpath = NULL; - char *shmem_opts; - char *shmem_path; + g_autofree char *bootpath = NULL; + g_autofree char *shmem_opts = NULL; + g_autofree char *shmem_path = NULL; const char *arch = qtest_get_arch(); const char *machine_opts = NULL; const char *memory_size; @@ -559,8 +556,6 @@ static int test_migrate_start(QTestState **from, QTestState **to, g_assert_not_reached(); } - g_free(bootpath); - if (!getenv("QTEST_LOG") && args->hide_stderr) { ignore_stderr = "2>/dev/null"; } else { @@ -588,11 +583,9 @@ static int test_migrate_start(QTestState **from, QTestState **to, memory_size, tmpfs, arch_source, shmem_opts, args->opts_source, ignore_stderr); - g_free(arch_source); if (!args->only_target) { *from = qtest_init(cmd_source); } - g_free(cmd_source); cmd_target = g_strdup_printf("-accel kvm -accel tcg%s%s " "-name target,debug-threads=on " @@ -605,18 +598,14 @@ static int test_migrate_start(QTestState **from, QTestState **to, memory_size, tmpfs, uri, arch_target, shmem_opts, args->opts_target, ignore_stderr); - g_free(arch_target); *to = qtest_init(cmd_target); - g_free(cmd_target); - g_free(shmem_opts); /* * Remove shmem file immediately to avoid memory leak in test failed case. * It's valid becase QEMU has already opened this file */ if (args->use_shmem) { unlink(shmem_path); - g_free(shmem_path); } out: @@ -662,7 +651,7 @@ static int migrate_postcopy_prepare(QTestState **from_ptr, QTestState **to_ptr, MigrateStart *args) { - char *uri = g_strdup_printf("unix:%s/migsocket", tmpfs); + g_autofree char *uri = g_strdup_printf("unix:%s/migsocket", tmpfs); QTestState *from, *to; if (test_migrate_start(&from, &to, uri, args)) { @@ -684,7 +673,6 @@ static int migrate_postcopy_prepare(QTestState **from_ptr, wait_for_serial("src_serial"); migrate_qmp(from, uri, "{}"); - g_free(uri); wait_for_migration_pass(from); @@ -724,7 +712,7 @@ static void test_postcopy_recovery(void) { MigrateStart *args = migrate_start_new(); QTestState *from, *to; - char *uri; + g_autofree char *uri = NULL; args->hide_stderr = true; @@ -775,7 +763,6 @@ static void test_postcopy_recovery(void) (const char * []) { "failed", "active", "completed", NULL }); migrate_qmp(from, uri, "{'resume': true}"); - g_free(uri); /* Restore the postcopy bandwidth to unlimited */ migrate_set_parameter_int(from, "max-postcopy-bandwidth", 0); @@ -800,7 +787,7 @@ static void test_baddest(void) static void test_precopy_unix(void) { - char *uri = g_strdup_printf("unix:%s/migsocket", tmpfs); + g_autofree char *uri = g_strdup_printf("unix:%s/migsocket", tmpfs); MigrateStart *args = migrate_start_new(); QTestState *from, *to; @@ -836,14 +823,13 @@ static void test_precopy_unix(void) wait_for_migration_complete(from); test_migrate_end(from, to, true); - g_free(uri); } #if 0 /* Currently upset on aarch64 TCG */ static void test_ignore_shared(void) { - char *uri = g_strdup_printf("unix:%s/migsocket", tmpfs); + g_autofree char *uri = g_strdup_printf("unix:%s/migsocket", tmpfs); QTestState *from, *to; if (test_migrate_start(&from, &to, uri, false, true, NULL, NULL)) { @@ -873,7 +859,6 @@ static void test_ignore_shared(void) g_assert_cmpint(read_ram_property_int(from, "transferred"), <, 1024 * 1024); test_migrate_end(from, to, true); - g_free(uri); } #endif @@ -898,8 +883,8 @@ static void test_xbzrle(const char *uri) migrate_set_parameter_int(from, "xbzrle-cache-size", 33554432); - migrate_set_capability(from, "xbzrle", "true"); - migrate_set_capability(to, "xbzrle", "true"); + migrate_set_capability(from, "xbzrle", true); + migrate_set_capability(to, "xbzrle", true); /* Wait for the first serial output from the source */ wait_for_serial("src_serial"); @@ -925,16 +910,15 @@ static void test_xbzrle(const char *uri) static void test_xbzrle_unix(void) { - char *uri = g_strdup_printf("unix:%s/migsocket", tmpfs); + g_autofree char *uri = g_strdup_printf("unix:%s/migsocket", tmpfs); test_xbzrle(uri); - g_free(uri); } static void test_precopy_tcp(void) { MigrateStart *args = migrate_start_new(); - char *uri; + g_autofree char *uri = NULL; QTestState *from, *to; if (test_migrate_start(&from, &to, "tcp:127.0.0.1:0", args)) { @@ -971,7 +955,6 @@ static void test_precopy_tcp(void) wait_for_migration_complete(from); test_migrate_end(from, to, true); - g_free(uri); } static void test_migrate_fd_proto(void) @@ -1060,7 +1043,7 @@ static void test_migrate_fd_proto(void) static void do_test_validate_uuid(MigrateStart *args, bool should_fail) { - char *uri = g_strdup_printf("unix:%s/migsocket", tmpfs); + g_autofree char *uri = g_strdup_printf("unix:%s/migsocket", tmpfs); QTestState *from, *to; if (test_migrate_start(&from, &to, uri, args)) { @@ -1088,7 +1071,6 @@ static void do_test_validate_uuid(MigrateStart *args, bool should_fail) } test_migrate_end(from, to, false); - g_free(uri); } static void test_validate_uuid(void) @@ -1136,7 +1118,7 @@ static void test_validate_uuid_dst_not_set(void) static void test_migrate_auto_converge(void) { - char *uri = g_strdup_printf("unix:%s/migsocket", tmpfs); + g_autofree char *uri = g_strdup_printf("unix:%s/migsocket", tmpfs); MigrateStart *args = migrate_start_new(); QTestState *from, *to; int64_t remaining, percentage; @@ -1214,7 +1196,6 @@ static void test_migrate_auto_converge(void) wait_for_serial("dest_serial"); wait_for_migration_complete(from); - g_free(uri); test_migrate_end(from, to, true); } @@ -1224,7 +1205,7 @@ static void test_multifd_tcp(const char *method) MigrateStart *args = migrate_start_new(); QTestState *from, *to; QDict *rsp; - char *uri; + g_autofree char *uri = NULL; if (test_migrate_start(&from, &to, "defer", args)) { return; @@ -1246,8 +1227,8 @@ static void test_multifd_tcp(const char *method) migrate_set_parameter_str(from, "multifd-compression", method); migrate_set_parameter_str(to, "multifd-compression", method); - migrate_set_capability(from, "multifd", "true"); - migrate_set_capability(to, "multifd", "true"); + migrate_set_capability(from, "multifd", true); + migrate_set_capability(to, "multifd", true); /* Start incoming migration from the 1st socket */ rsp = wait_command(to, "{ 'execute': 'migrate-incoming'," @@ -1273,7 +1254,6 @@ static void test_multifd_tcp(const char *method) wait_for_serial("dest_serial"); wait_for_migration_complete(from); test_migrate_end(from, to, true); - g_free(uri); } static void test_multifd_tcp_none(void) @@ -1309,7 +1289,7 @@ static void test_multifd_tcp_cancel(void) MigrateStart *args = migrate_start_new(); QTestState *from, *to, *to2; QDict *rsp; - char *uri; + g_autofree char *uri = NULL; args->hide_stderr = true; @@ -1330,8 +1310,8 @@ static void test_multifd_tcp_cancel(void) migrate_set_parameter_int(from, "multifd-channels", 16); migrate_set_parameter_int(to, "multifd-channels", 16); - migrate_set_capability(from, "multifd", "true"); - migrate_set_capability(to, "multifd", "true"); + migrate_set_capability(from, "multifd", true); + migrate_set_capability(to, "multifd", true); /* Start incoming migration from the 1st socket */ rsp = wait_command(to, "{ 'execute': 'migrate-incoming'," @@ -1358,7 +1338,7 @@ static void test_multifd_tcp_cancel(void) migrate_set_parameter_int(to2, "multifd-channels", 16); - migrate_set_capability(to2, "multifd", "true"); + migrate_set_capability(to2, "multifd", true); /* Start incoming migration from the 1st socket */ rsp = wait_command(to2, "{ 'execute': 'migrate-incoming'," @@ -1387,7 +1367,6 @@ static void test_multifd_tcp_cancel(void) wait_for_serial("dest_serial"); wait_for_migration_complete(from); test_migrate_end(from, to2, true); - g_free(uri); } int main(int argc, char **argv) diff --git a/tests/tcg/README b/tests/tcg/README index 2a58f9a058..706bb185b4 100644 --- a/tests/tcg/README +++ b/tests/tcg/README @@ -7,9 +7,3 @@ CRIS ==== The testsuite for CRIS is in tests/tcg/cris. You can run it with "make test-cris". - -LM32 -==== -The testsuite for LM32 is in tests/tcg/lm32. You can run it -with "make test-lm32". - diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target index 05b2622bfc..928357b10a 100644 --- a/tests/tcg/aarch64/Makefile.target +++ b/tests/tcg/aarch64/Makefile.target @@ -37,7 +37,7 @@ AARCH64_TESTS += bti-2 # MTE Tests ifneq ($(DOCKER_IMAGE)$(CROSS_CC_HAS_ARMV8_MTE),) -AARCH64_TESTS += mte-1 mte-2 mte-3 mte-4 mte-6 +AARCH64_TESTS += mte-1 mte-2 mte-3 mte-4 mte-5 mte-6 mte-%: CFLAGS += -march=armv8.5-a+memtag endif diff --git a/tests/tcg/aarch64/mte-5.c b/tests/tcg/aarch64/mte-5.c new file mode 100644 index 0000000000..6dbd6ab3ea --- /dev/null +++ b/tests/tcg/aarch64/mte-5.c @@ -0,0 +1,44 @@ +/* + * Memory tagging, faulting unaligned access. + * + * Copyright (c) 2021 Linaro Ltd + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "mte.h" + +void pass(int sig, siginfo_t *info, void *uc) +{ + assert(info->si_code == SEGV_MTESERR); + exit(0); +} + +int main(int ac, char **av) +{ + struct sigaction sa; + void *p0, *p1, *p2; + long excl = 1; + + enable_mte(PR_MTE_TCF_SYNC); + p0 = alloc_mte_mem(sizeof(*p0)); + + /* Create two differently tagged pointers. */ + asm("irg %0,%1,%2" : "=r"(p1) : "r"(p0), "r"(excl)); + asm("gmi %0,%1,%0" : "+r"(excl) : "r" (p1)); + assert(excl != 1); + asm("irg %0,%1,%2" : "=r"(p2) : "r"(p0), "r"(excl)); + assert(p1 != p2); + + memset(&sa, 0, sizeof(sa)); + sa.sa_sigaction = pass; + sa.sa_flags = SA_SIGINFO; + sigaction(SIGSEGV, &sa, NULL); + + /* Store store two different tags in sequential granules. */ + asm("stg %0, [%0]" : : "r"(p1)); + asm("stg %0, [%0]" : : "r"(p2 + 16)); + + /* Perform an unaligned load crossing the granules. */ + asm volatile("ldr %0, [%1]" : "=r"(p0) : "r"(p1 + 12)); + abort(); +} diff --git a/tests/tcg/configure.sh b/tests/tcg/configure.sh index fa1a4261a4..8f20ce065d 100755 --- a/tests/tcg/configure.sh +++ b/tests/tcg/configure.sh @@ -96,7 +96,7 @@ for target in $target_list; do xtensa|xtensaeb) arches=xtensa ;; - alpha|cris|hexagon|hppa|i386|lm32|microblaze|microblazeel|m68k|openrisc|riscv64|s390x|sh4|sparc64) + alpha|cris|hexagon|hppa|i386|microblaze|microblazeel|m68k|openrisc|riscv64|s390x|sh4|sparc64) arches=$target ;; *) diff --git a/tests/tcg/hexagon/Makefile.target b/tests/tcg/hexagon/Makefile.target index 616af697fe..0992787d50 100644 --- a/tests/tcg/hexagon/Makefile.target +++ b/tests/tcg/hexagon/Makefile.target @@ -28,6 +28,7 @@ endif CFLAGS += -Wno-incompatible-pointer-types -Wno-undefined-internal +CFLAGS += -fno-unroll-loops HEX_SRC=$(SRC_PATH)/tests/tcg/hexagon VPATH += $(HEX_SRC) @@ -39,7 +40,12 @@ HEX_TESTS = first HEX_TESTS += misc HEX_TESTS += preg_alias HEX_TESTS += dual_stores +HEX_TESTS += multi_result HEX_TESTS += mem_noshuf +HEX_TESTS += circ +HEX_TESTS += brev +HEX_TESTS += load_unpack +HEX_TESTS += load_align HEX_TESTS += atomics HEX_TESTS += fpstuff diff --git a/tests/tcg/hexagon/brev.c b/tests/tcg/hexagon/brev.c new file mode 100644 index 0000000000..9736a2405d --- /dev/null +++ b/tests/tcg/hexagon/brev.c @@ -0,0 +1,190 @@ +/* + * Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see <http://www.gnu.org/licenses/>. + */ + +#include <stdio.h> +#include <string.h> + +int err; + +#define NBITS 8 +#define SIZE (1 << NBITS) + +long long dbuf[SIZE] __attribute__((aligned(1 << 16))) = {0}; +int wbuf[SIZE] __attribute__((aligned(1 << 16))) = {0}; +short hbuf[SIZE] __attribute__((aligned(1 << 16))) = {0}; +unsigned char bbuf[SIZE] __attribute__((aligned(1 << 16))) = {0}; + +/* + * We use the C preporcessor to deal with the combinations of types + */ + +#define BREV_LOAD(SZ, RES, ADDR, INC) \ + __asm__( \ + "m0 = %2\n\t" \ + "%0 = mem" #SZ "(%1++m0:brev)\n\t" \ + : "=r"(RES), "+r"(ADDR) \ + : "r"(INC) \ + : "m0") + +#define BREV_LOAD_b(RES, ADDR, INC) \ + BREV_LOAD(b, RES, ADDR, INC) +#define BREV_LOAD_ub(RES, ADDR, INC) \ + BREV_LOAD(ub, RES, ADDR, INC) +#define BREV_LOAD_h(RES, ADDR, INC) \ + BREV_LOAD(h, RES, ADDR, INC) +#define BREV_LOAD_uh(RES, ADDR, INC) \ + BREV_LOAD(uh, RES, ADDR, INC) +#define BREV_LOAD_w(RES, ADDR, INC) \ + BREV_LOAD(w, RES, ADDR, INC) +#define BREV_LOAD_d(RES, ADDR, INC) \ + BREV_LOAD(d, RES, ADDR, INC) + +#define BREV_STORE(SZ, PART, ADDR, VAL, INC) \ + __asm__( \ + "m0 = %2\n\t" \ + "mem" #SZ "(%0++m0:brev) = %1" PART "\n\t" \ + : "+r"(ADDR) \ + : "r"(VAL), "r"(INC) \ + : "m0", "memory") + +#define BREV_STORE_b(ADDR, VAL, INC) \ + BREV_STORE(b, "", ADDR, VAL, INC) +#define BREV_STORE_h(ADDR, VAL, INC) \ + BREV_STORE(h, "", ADDR, VAL, INC) +#define BREV_STORE_f(ADDR, VAL, INC) \ + BREV_STORE(h, ".H", ADDR, VAL, INC) +#define BREV_STORE_w(ADDR, VAL, INC) \ + BREV_STORE(w, "", ADDR, VAL, INC) +#define BREV_STORE_d(ADDR, VAL, INC) \ + BREV_STORE(d, "", ADDR, VAL, INC) + +#define BREV_STORE_NEW(SZ, ADDR, VAL, INC) \ + __asm__( \ + "m0 = %2\n\t" \ + "{\n\t" \ + " r5 = %1\n\t" \ + " mem" #SZ "(%0++m0:brev) = r5.new\n\t" \ + "}\n\t" \ + : "+r"(ADDR) \ + : "r"(VAL), "r"(INC) \ + : "r5", "m0", "memory") + +#define BREV_STORE_bnew(ADDR, VAL, INC) \ + BREV_STORE_NEW(b, ADDR, VAL, INC) +#define BREV_STORE_hnew(ADDR, VAL, INC) \ + BREV_STORE_NEW(h, ADDR, VAL, INC) +#define BREV_STORE_wnew(ADDR, VAL, INC) \ + BREV_STORE_NEW(w, ADDR, VAL, INC) + +int bitreverse(int x) +{ + int result = 0; + int i; + for (i = 0; i < NBITS; i++) { + result <<= 1; + result |= x & 1; + x >>= 1; + } + return result; +} + +int sext8(int x) +{ + return (x << 24) >> 24; +} + +void check(int i, long long result, long long expect) +{ + if (result != expect) { + printf("ERROR(%d): 0x%04llx != 0x%04llx\n", i, result, expect); + err++; + } +} + +#define TEST_BREV_LOAD(SZ, TYPE, BUF, SHIFT, EXP) \ + do { \ + p = BUF; \ + for (i = 0; i < SIZE; i++) { \ + TYPE result; \ + BREV_LOAD_##SZ(result, p, 1 << (SHIFT - NBITS)); \ + check(i, result, EXP); \ + } \ + } while (0) + +#define TEST_BREV_STORE(SZ, TYPE, BUF, VAL, SHIFT) \ + do { \ + p = BUF; \ + memset(BUF, 0xff, sizeof(BUF)); \ + for (i = 0; i < SIZE; i++) { \ + BREV_STORE_##SZ(p, (TYPE)(VAL), 1 << (SHIFT - NBITS)); \ + } \ + for (i = 0; i < SIZE; i++) { \ + check(i, BUF[i], bitreverse(i)); \ + } \ + } while (0) + +#define TEST_BREV_STORE_NEW(SZ, BUF, SHIFT) \ + do { \ + p = BUF; \ + memset(BUF, 0xff, sizeof(BUF)); \ + for (i = 0; i < SIZE; i++) { \ + BREV_STORE_##SZ(p, i, 1 << (SHIFT - NBITS)); \ + } \ + for (i = 0; i < SIZE; i++) { \ + check(i, BUF[i], bitreverse(i)); \ + } \ + } while (0) + +/* + * We'll set high_half[i] = i << 16 for use in the .H form of store + * which stores from the high half of the word. + */ +int high_half[SIZE]; + +int main() +{ + void *p; + int i; + + for (i = 0; i < SIZE; i++) { + bbuf[i] = bitreverse(i); + hbuf[i] = bitreverse(i); + wbuf[i] = bitreverse(i); + dbuf[i] = bitreverse(i); + high_half[i] = i << 16; + } + + TEST_BREV_LOAD(b, int, bbuf, 16, sext8(i)); + TEST_BREV_LOAD(ub, int, bbuf, 16, i); + TEST_BREV_LOAD(h, int, hbuf, 15, i); + TEST_BREV_LOAD(uh, int, hbuf, 15, i); + TEST_BREV_LOAD(w, int, wbuf, 14, i); + TEST_BREV_LOAD(d, long long, dbuf, 13, i); + + TEST_BREV_STORE(b, int, bbuf, i, 16); + TEST_BREV_STORE(h, int, hbuf, i, 15); + TEST_BREV_STORE(f, int, hbuf, high_half[i], 15); + TEST_BREV_STORE(w, int, wbuf, i, 14); + TEST_BREV_STORE(d, long long, dbuf, i, 13); + + TEST_BREV_STORE_NEW(bnew, bbuf, 16); + TEST_BREV_STORE_NEW(hnew, hbuf, 15); + TEST_BREV_STORE_NEW(wnew, wbuf, 14); + + puts(err ? "FAIL" : "PASS"); + return err ? 1 : 0; +} diff --git a/tests/tcg/hexagon/circ.c b/tests/tcg/hexagon/circ.c new file mode 100644 index 0000000000..67a1aa3054 --- /dev/null +++ b/tests/tcg/hexagon/circ.c @@ -0,0 +1,486 @@ +/* + * Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see <http://www.gnu.org/licenses/>. + */ + +#include <stdio.h> + +#define DEBUG 0 +#define DEBUG_PRINTF(...) \ + do { \ + if (DEBUG) { \ + printf(__VA_ARGS__); \ + } \ + } while (0) + + +#define NBYTES (1 << 8) +#define NHALFS (NBYTES / sizeof(short)) +#define NWORDS (NBYTES / sizeof(int)) +#define NDOBLS (NBYTES / sizeof(long long)) + +long long dbuf[NDOBLS] __attribute__((aligned(1 << 12))) = {0}; +int wbuf[NWORDS] __attribute__((aligned(1 << 12))) = {0}; +short hbuf[NHALFS] __attribute__((aligned(1 << 12))) = {0}; +unsigned char bbuf[NBYTES] __attribute__((aligned(1 << 12))) = {0}; + +/* + * We use the C preporcessor to deal with the combinations of types + */ + +#define INIT(BUF, N) \ + void init_##BUF(void) \ + { \ + int i; \ + for (i = 0; i < N; i++) { \ + BUF[i] = i; \ + } \ + } \ + +INIT(bbuf, NBYTES) +INIT(hbuf, NHALFS) +INIT(wbuf, NWORDS) +INIT(dbuf, NDOBLS) + +/* + * Macros for performing circular load + * RES result + * ADDR address + * START start address of buffer + * LEN length of buffer (in bytes) + * INC address increment (in bytes for IMM, elements for REG) + */ +#define CIRC_LOAD_IMM(SIZE, RES, ADDR, START, LEN, INC) \ + __asm__( \ + "r4 = %3\n\t" \ + "m0 = r4\n\t" \ + "cs0 = %2\n\t" \ + "%0 = mem" #SIZE "(%1++#" #INC ":circ(M0))\n\t" \ + : "=r"(RES), "+r"(ADDR) \ + : "r"(START), "r"(LEN) \ + : "r4", "m0", "cs0") +#define CIRC_LOAD_IMM_b(RES, ADDR, START, LEN, INC) \ + CIRC_LOAD_IMM(b, RES, ADDR, START, LEN, INC) +#define CIRC_LOAD_IMM_ub(RES, ADDR, START, LEN, INC) \ + CIRC_LOAD_IMM(ub, RES, ADDR, START, LEN, INC) +#define CIRC_LOAD_IMM_h(RES, ADDR, START, LEN, INC) \ + CIRC_LOAD_IMM(h, RES, ADDR, START, LEN, INC) +#define CIRC_LOAD_IMM_uh(RES, ADDR, START, LEN, INC) \ + CIRC_LOAD_IMM(uh, RES, ADDR, START, LEN, INC) +#define CIRC_LOAD_IMM_w(RES, ADDR, START, LEN, INC) \ + CIRC_LOAD_IMM(w, RES, ADDR, START, LEN, INC) +#define CIRC_LOAD_IMM_d(RES, ADDR, START, LEN, INC) \ + CIRC_LOAD_IMM(d, RES, ADDR, START, LEN, INC) + +/* + * The mreg has the following pieces + * mreg[31:28] increment[10:7] + * mreg[27:24] K value (used Hexagon v3 and earlier) + * mreg[23:17] increment[6:0] + * mreg[16:0] circular buffer length + */ +static int build_mreg(int inc, int K, int len) +{ + return ((inc & 0x780) << 21) | + ((K & 0xf) << 24) | + ((inc & 0x7f) << 17) | + (len & 0x1ffff); +} + +#define CIRC_LOAD_REG(SIZE, RES, ADDR, START, LEN, INC) \ + __asm__( \ + "r4 = %2\n\t" \ + "m1 = r4\n\t" \ + "cs1 = %3\n\t" \ + "%0 = mem" #SIZE "(%1++I:circ(M1))\n\t" \ + : "=r"(RES), "+r"(ADDR) \ + : "r"(build_mreg((INC), 0, (LEN))), \ + "r"(START) \ + : "r4", "m1", "cs1") +#define CIRC_LOAD_REG_b(RES, ADDR, START, LEN, INC) \ + CIRC_LOAD_REG(b, RES, ADDR, START, LEN, INC) +#define CIRC_LOAD_REG_ub(RES, ADDR, START, LEN, INC) \ + CIRC_LOAD_REG(ub, RES, ADDR, START, LEN, INC) +#define CIRC_LOAD_REG_h(RES, ADDR, START, LEN, INC) \ + CIRC_LOAD_REG(h, RES, ADDR, START, LEN, INC) +#define CIRC_LOAD_REG_uh(RES, ADDR, START, LEN, INC) \ + CIRC_LOAD_REG(uh, RES, ADDR, START, LEN, INC) +#define CIRC_LOAD_REG_w(RES, ADDR, START, LEN, INC) \ + CIRC_LOAD_REG(w, RES, ADDR, START, LEN, INC) +#define CIRC_LOAD_REG_d(RES, ADDR, START, LEN, INC) \ + CIRC_LOAD_REG(d, RES, ADDR, START, LEN, INC) + +/* + * Macros for performing circular store + * VAL value to store + * ADDR address + * START start address of buffer + * LEN length of buffer (in bytes) + * INC address increment (in bytes for IMM, elements for REG) + */ +#define CIRC_STORE_IMM(SIZE, PART, VAL, ADDR, START, LEN, INC) \ + __asm__( \ + "r4 = %3\n\t" \ + "m0 = r4\n\t" \ + "cs0 = %1\n\t" \ + "mem" #SIZE "(%0++#" #INC ":circ(M0)) = %2" PART "\n\t" \ + : "+r"(ADDR) \ + : "r"(START), "r"(VAL), "r"(LEN) \ + : "r4", "m0", "cs0", "memory") +#define CIRC_STORE_IMM_b(VAL, ADDR, START, LEN, INC) \ + CIRC_STORE_IMM(b, "", VAL, ADDR, START, LEN, INC) +#define CIRC_STORE_IMM_h(VAL, ADDR, START, LEN, INC) \ + CIRC_STORE_IMM(h, "", VAL, ADDR, START, LEN, INC) +#define CIRC_STORE_IMM_f(VAL, ADDR, START, LEN, INC) \ + CIRC_STORE_IMM(h, ".H", VAL, ADDR, START, LEN, INC) +#define CIRC_STORE_IMM_w(VAL, ADDR, START, LEN, INC) \ + CIRC_STORE_IMM(w, "", VAL, ADDR, START, LEN, INC) +#define CIRC_STORE_IMM_d(VAL, ADDR, START, LEN, INC) \ + CIRC_STORE_IMM(d, "", VAL, ADDR, START, LEN, INC) + +#define CIRC_STORE_NEW_IMM(SIZE, VAL, ADDR, START, LEN, INC) \ + __asm__( \ + "r4 = %3\n\t" \ + "m0 = r4\n\t" \ + "cs0 = %1\n\t" \ + "{\n\t" \ + " r5 = %2\n\t" \ + " mem" #SIZE "(%0++#" #INC ":circ(M0)) = r5.new\n\t" \ + "}\n\t" \ + : "+r"(ADDR) \ + : "r"(START), "r"(VAL), "r"(LEN) \ + : "r4", "r5", "m0", "cs0", "memory") +#define CIRC_STORE_IMM_bnew(VAL, ADDR, START, LEN, INC) \ + CIRC_STORE_NEW_IMM(b, VAL, ADDR, START, LEN, INC) +#define CIRC_STORE_IMM_hnew(VAL, ADDR, START, LEN, INC) \ + CIRC_STORE_NEW_IMM(h, VAL, ADDR, START, LEN, INC) +#define CIRC_STORE_IMM_wnew(VAL, ADDR, START, LEN, INC) \ + CIRC_STORE_NEW_IMM(w, VAL, ADDR, START, LEN, INC) + +#define CIRC_STORE_REG(SIZE, PART, VAL, ADDR, START, LEN, INC) \ + __asm__( \ + "r4 = %1\n\t" \ + "m1 = r4\n\t" \ + "cs1 = %2\n\t" \ + "mem" #SIZE "(%0++I:circ(M1)) = %3" PART "\n\t" \ + : "+r"(ADDR) \ + : "r"(build_mreg((INC), 0, (LEN))), \ + "r"(START), \ + "r"(VAL) \ + : "r4", "m1", "cs1", "memory") +#define CIRC_STORE_REG_b(VAL, ADDR, START, LEN, INC) \ + CIRC_STORE_REG(b, "", VAL, ADDR, START, LEN, INC) +#define CIRC_STORE_REG_h(VAL, ADDR, START, LEN, INC) \ + CIRC_STORE_REG(h, "", VAL, ADDR, START, LEN, INC) +#define CIRC_STORE_REG_f(VAL, ADDR, START, LEN, INC) \ + CIRC_STORE_REG(h, ".H", VAL, ADDR, START, LEN, INC) +#define CIRC_STORE_REG_w(VAL, ADDR, START, LEN, INC) \ + CIRC_STORE_REG(w, "", VAL, ADDR, START, LEN, INC) +#define CIRC_STORE_REG_d(VAL, ADDR, START, LEN, INC) \ + CIRC_STORE_REG(d, "", VAL, ADDR, START, LEN, INC) + +#define CIRC_STORE_NEW_REG(SIZE, VAL, ADDR, START, LEN, INC) \ + __asm__( \ + "r4 = %1\n\t" \ + "m1 = r4\n\t" \ + "cs1 = %2\n\t" \ + "{\n\t" \ + " r5 = %3\n\t" \ + " mem" #SIZE "(%0++I:circ(M1)) = r5.new\n\t" \ + "}\n\t" \ + : "+r"(ADDR) \ + : "r"(build_mreg((INC), 0, (LEN))), \ + "r"(START), \ + "r"(VAL) \ + : "r4", "r5", "m1", "cs1", "memory") +#define CIRC_STORE_REG_bnew(VAL, ADDR, START, LEN, INC) \ + CIRC_STORE_NEW_REG(b, VAL, ADDR, START, LEN, INC) +#define CIRC_STORE_REG_hnew(VAL, ADDR, START, LEN, INC) \ + CIRC_STORE_NEW_REG(h, VAL, ADDR, START, LEN, INC) +#define CIRC_STORE_REG_wnew(VAL, ADDR, START, LEN, INC) \ + CIRC_STORE_NEW_REG(w, VAL, ADDR, START, LEN, INC) + + +int err; + +/* We'll test increments +1 and -1 */ +void check_load(int i, long long result, int inc, int size) +{ + int expect = (i * inc); + while (expect >= size) { + expect -= size; + } + while (expect < 0) { + expect += size; + } + if (result != expect) { + printf("ERROR(%d): %lld != %d\n", i, result, expect); + err++; + } +} + +#define TEST_LOAD_IMM(SZ, TYPE, BUF, BUFSIZE, INC, FMT) \ +void circ_test_load_imm_##SZ(void) \ +{ \ + TYPE *p = (TYPE *)BUF; \ + int size = 10; \ + int i; \ + for (i = 0; i < BUFSIZE; i++) { \ + TYPE element; \ + CIRC_LOAD_IMM_##SZ(element, p, BUF, size * sizeof(TYPE), (INC)); \ + DEBUG_PRINTF("i = %2d, p = 0x%p, element = %2" #FMT "\n", \ + i, p, element); \ + check_load(i, element, ((INC) / (int)sizeof(TYPE)), size); \ + } \ + p = (TYPE *)BUF; \ + for (i = 0; i < BUFSIZE; i++) { \ + TYPE element; \ + CIRC_LOAD_IMM_##SZ(element, p, BUF, size * sizeof(TYPE), -(INC)); \ + DEBUG_PRINTF("i = %2d, p = 0x%p, element = %2" #FMT "\n", \ + i, p, element); \ + check_load(i, element, (-(INC) / (int)sizeof(TYPE)), size); \ + } \ +} + +TEST_LOAD_IMM(b, char, bbuf, NBYTES, 1, d) +TEST_LOAD_IMM(ub, unsigned char, bbuf, NBYTES, 1, d) +TEST_LOAD_IMM(h, short, hbuf, NHALFS, 2, d) +TEST_LOAD_IMM(uh, unsigned short, hbuf, NHALFS, 2, d) +TEST_LOAD_IMM(w, int, wbuf, NWORDS, 4, d) +TEST_LOAD_IMM(d, long long, dbuf, NDOBLS, 8, lld) + +#define TEST_LOAD_REG(SZ, TYPE, BUF, BUFSIZE, FMT) \ +void circ_test_load_reg_##SZ(void) \ +{ \ + TYPE *p = (TYPE *)BUF; \ + int size = 13; \ + int i; \ + for (i = 0; i < BUFSIZE; i++) { \ + TYPE element; \ + CIRC_LOAD_REG_##SZ(element, p, BUF, size * sizeof(TYPE), 1); \ + DEBUG_PRINTF("i = %2d, p = 0x%p, element = %2" #FMT "\n", \ + i, p, element); \ + check_load(i, element, 1, size); \ + } \ + p = (TYPE *)BUF; \ + for (i = 0; i < BUFSIZE; i++) { \ + TYPE element; \ + CIRC_LOAD_REG_##SZ(element, p, BUF, size * sizeof(TYPE), -1); \ + DEBUG_PRINTF("i = %2d, p = 0x%p, element = %2" #FMT "\n", \ + i, p, element); \ + check_load(i, element, -1, size); \ + } \ +} + +TEST_LOAD_REG(b, char, bbuf, NBYTES, d) +TEST_LOAD_REG(ub, unsigned char, bbuf, NBYTES, d) +TEST_LOAD_REG(h, short, hbuf, NHALFS, d) +TEST_LOAD_REG(uh, unsigned short, hbuf, NHALFS, d) +TEST_LOAD_REG(w, int, wbuf, NWORDS, d) +TEST_LOAD_REG(d, long long, dbuf, NDOBLS, lld) + +/* The circular stores will wrap around somewhere inside the buffer */ +#define CIRC_VAL(SZ, TYPE, BUFSIZE) \ +TYPE circ_val_##SZ(int i, int inc, int size) \ +{ \ + int mod = BUFSIZE % size; \ + int elem = i * inc; \ + if (elem < 0) { \ + if (-elem <= size - mod) { \ + return (elem + BUFSIZE - mod); \ + } else { \ + return (elem + BUFSIZE + size - mod); \ + } \ + } else if (elem < mod) {\ + return (elem + BUFSIZE - mod); \ + } else { \ + return (elem + BUFSIZE - size - mod); \ + } \ +} + +CIRC_VAL(b, unsigned char, NBYTES) +CIRC_VAL(h, short, NHALFS) +CIRC_VAL(w, int, NWORDS) +CIRC_VAL(d, long long, NDOBLS) + +/* + * Circular stores should only write to the first "size" elements of the buffer + * the remainder of the elements should have BUF[i] == i + */ +#define CHECK_STORE(SZ, BUF, BUFSIZE, FMT) \ +void check_store_##SZ(int inc, int size) \ +{ \ + int i; \ + for (i = 0; i < size; i++) { \ + DEBUG_PRINTF(#BUF "[%3d] = 0x%02" #FMT ", guess = 0x%02" #FMT "\n", \ + i, BUF[i], circ_val_##SZ(i, inc, size)); \ + if (BUF[i] != circ_val_##SZ(i, inc, size)) { \ + printf("ERROR(%3d): 0x%02" #FMT " != 0x%02" #FMT "\n", \ + i, BUF[i], circ_val_##SZ(i, inc, size)); \ + err++; \ + } \ + } \ + for (i = size; i < BUFSIZE; i++) { \ + if (BUF[i] != i) { \ + printf("ERROR(%3d): 0x%02" #FMT " != 0x%02x\n", i, BUF[i], i); \ + err++; \ + } \ + } \ +} + +CHECK_STORE(b, bbuf, NBYTES, x) +CHECK_STORE(h, hbuf, NHALFS, x) +CHECK_STORE(w, wbuf, NWORDS, x) +CHECK_STORE(d, dbuf, NDOBLS, llx) + +#define CIRC_TEST_STORE_IMM(SZ, CHK, TYPE, BUF, BUFSIZE, SHIFT, INC) \ +void circ_test_store_imm_##SZ(void) \ +{ \ + unsigned int size = 27; \ + TYPE *p = BUF; \ + TYPE val = 0; \ + int i; \ + init_##BUF(); \ + for (i = 0; i < BUFSIZE; i++) { \ + CIRC_STORE_IMM_##SZ(val << SHIFT, p, BUF, size * sizeof(TYPE), INC); \ + val++; \ + } \ + check_store_##CHK(((INC) / (int)sizeof(TYPE)), size); \ + p = BUF; \ + val = 0; \ + init_##BUF(); \ + for (i = 0; i < BUFSIZE; i++) { \ + CIRC_STORE_IMM_##SZ(val << SHIFT, p, BUF, size * sizeof(TYPE), \ + -(INC)); \ + val++; \ + } \ + check_store_##CHK((-(INC) / (int)sizeof(TYPE)), size); \ +} + +CIRC_TEST_STORE_IMM(b, b, unsigned char, bbuf, NBYTES, 0, 1) +CIRC_TEST_STORE_IMM(h, h, short, hbuf, NHALFS, 0, 2) +CIRC_TEST_STORE_IMM(f, h, short, hbuf, NHALFS, 16, 2) +CIRC_TEST_STORE_IMM(w, w, int, wbuf, NWORDS, 0, 4) +CIRC_TEST_STORE_IMM(d, d, long long, dbuf, NDOBLS, 0, 8) +CIRC_TEST_STORE_IMM(bnew, b, unsigned char, bbuf, NBYTES, 0, 1) +CIRC_TEST_STORE_IMM(hnew, h, short, hbuf, NHALFS, 0, 2) +CIRC_TEST_STORE_IMM(wnew, w, int, wbuf, NWORDS, 0, 4) + +#define CIRC_TEST_STORE_REG(SZ, CHK, TYPE, BUF, BUFSIZE, SHIFT) \ +void circ_test_store_reg_##SZ(void) \ +{ \ + TYPE *p = BUF; \ + unsigned int size = 19; \ + TYPE val = 0; \ + int i; \ + init_##BUF(); \ + for (i = 0; i < BUFSIZE; i++) { \ + CIRC_STORE_REG_##SZ(val << SHIFT, p, BUF, size * sizeof(TYPE), 1); \ + val++; \ + } \ + check_store_##CHK(1, size); \ + p = BUF; \ + val = 0; \ + init_##BUF(); \ + for (i = 0; i < BUFSIZE; i++) { \ + CIRC_STORE_REG_##SZ(val << SHIFT, p, BUF, size * sizeof(TYPE), -1); \ + val++; \ + } \ + check_store_##CHK(-1, size); \ +} + +CIRC_TEST_STORE_REG(b, b, unsigned char, bbuf, NBYTES, 0) +CIRC_TEST_STORE_REG(h, h, short, hbuf, NHALFS, 0) +CIRC_TEST_STORE_REG(f, h, short, hbuf, NHALFS, 16) +CIRC_TEST_STORE_REG(w, w, int, wbuf, NWORDS, 0) +CIRC_TEST_STORE_REG(d, d, long long, dbuf, NDOBLS, 0) +CIRC_TEST_STORE_REG(bnew, b, unsigned char, bbuf, NBYTES, 0) +CIRC_TEST_STORE_REG(hnew, h, short, hbuf, NHALFS, 0) +CIRC_TEST_STORE_REG(wnew, w, int, wbuf, NWORDS, 0) + +/* Test the old scheme used in Hexagon V3 */ +static void circ_test_v3(void) +{ + int *p = wbuf; + int size = 15; + int K = 4; /* 64 bytes */ + int element; + int i; + + init_wbuf(); + + for (i = 0; i < NWORDS; i++) { + __asm__( + "r4 = %2\n\t" + "m1 = r4\n\t" + "%0 = memw(%1++I:circ(M1))\n\t" + : "=r"(element), "+r"(p) + : "r"(build_mreg(1, K, size * sizeof(int))) + : "r4", "m1"); + DEBUG_PRINTF("i = %2d, p = 0x%p, element = %2d\n", i, p, element); + check_load(i, element, 1, size); + } +} + +int main() +{ + init_bbuf(); + init_hbuf(); + init_wbuf(); + init_dbuf(); + + DEBUG_PRINTF("NBYTES = %d\n", NBYTES); + DEBUG_PRINTF("Address of dbuf = 0x%p\n", dbuf); + DEBUG_PRINTF("Address of wbuf = 0x%p\n", wbuf); + DEBUG_PRINTF("Address of hbuf = 0x%p\n", hbuf); + DEBUG_PRINTF("Address of bbuf = 0x%p\n", bbuf); + + circ_test_load_imm_b(); + circ_test_load_imm_ub(); + circ_test_load_imm_h(); + circ_test_load_imm_uh(); + circ_test_load_imm_w(); + circ_test_load_imm_d(); + + circ_test_load_reg_b(); + circ_test_load_reg_ub(); + circ_test_load_reg_h(); + circ_test_load_reg_uh(); + circ_test_load_reg_w(); + circ_test_load_reg_d(); + + circ_test_store_imm_b(); + circ_test_store_imm_h(); + circ_test_store_imm_f(); + circ_test_store_imm_w(); + circ_test_store_imm_d(); + circ_test_store_imm_bnew(); + circ_test_store_imm_hnew(); + circ_test_store_imm_wnew(); + + circ_test_store_reg_b(); + circ_test_store_reg_h(); + circ_test_store_reg_f(); + circ_test_store_reg_w(); + circ_test_store_reg_d(); + circ_test_store_reg_bnew(); + circ_test_store_reg_hnew(); + circ_test_store_reg_wnew(); + + circ_test_v3(); + + puts(err ? "FAIL" : "PASS"); + return err ? 1 : 0; +} diff --git a/tests/tcg/hexagon/fpstuff.c b/tests/tcg/hexagon/fpstuff.c index e4f1a0eeb4..0dff429f4c 100644 --- a/tests/tcg/hexagon/fpstuff.c +++ b/tests/tcg/hexagon/fpstuff.c @@ -37,10 +37,12 @@ const int SF_NaN = 0x7fc00000; const int SF_NaN_special = 0x7f800001; const int SF_ANY = 0x3f800000; const int SF_HEX_NAN = 0xffffffff; +const int SF_small_neg = 0xab98fba8; const long long DF_NaN = 0x7ff8000000000000ULL; const long long DF_ANY = 0x3f80000000000000ULL; const long long DF_HEX_NAN = 0xffffffffffffffffULL; +const long long DF_small_neg = 0xbd731f7500000000ULL; int err; @@ -248,6 +250,87 @@ static void check_dfminmax(void) check_fpstatus(usr, FPINVF); } +static void check_recip_exception(void) +{ + int result; + int usr; + + /* + * Check that sfrecipa doesn't set status bits when + * a NaN with bit 22 non-zero is passed + */ + asm (CLEAR_FPSTATUS + "%0,p0 = sfrecipa(%2, %3)\n\t" + "%1 = usr\n\t" + : "=r"(result), "=r"(usr) : "r"(SF_NaN), "r"(SF_ANY) + : "r2", "p0", "usr"); + check32(result, SF_HEX_NAN); + check_fpstatus(usr, 0); + + asm (CLEAR_FPSTATUS + "%0,p0 = sfrecipa(%2, %3)\n\t" + "%1 = usr\n\t" + : "=r"(result), "=r"(usr) : "r"(SF_ANY), "r"(SF_NaN) + : "r2", "p0", "usr"); + check32(result, SF_HEX_NAN); + check_fpstatus(usr, 0); + + asm (CLEAR_FPSTATUS + "%0,p0 = sfrecipa(%2, %2)\n\t" + "%1 = usr\n\t" + : "=r"(result), "=r"(usr) : "r"(SF_NaN) + : "r2", "p0", "usr"); + check32(result, SF_HEX_NAN); + check_fpstatus(usr, 0); + + /* + * Check that sfrecipa doesn't set status bits when + * a NaN with bit 22 zero is passed + */ + asm (CLEAR_FPSTATUS + "%0,p0 = sfrecipa(%2, %3)\n\t" + "%1 = usr\n\t" + : "=r"(result), "=r"(usr) : "r"(SF_NaN_special), "r"(SF_ANY) + : "r2", "p0", "usr"); + check32(result, SF_HEX_NAN); + check_fpstatus(usr, FPINVF); + + asm (CLEAR_FPSTATUS + "%0,p0 = sfrecipa(%2, %3)\n\t" + "%1 = usr\n\t" + : "=r"(result), "=r"(usr) : "r"(SF_ANY), "r"(SF_NaN_special) + : "r2", "p0", "usr"); + check32(result, SF_HEX_NAN); + check_fpstatus(usr, FPINVF); + + asm (CLEAR_FPSTATUS + "%0,p0 = sfrecipa(%2, %2)\n\t" + "%1 = usr\n\t" + : "=r"(result), "=r"(usr) : "r"(SF_NaN_special) + : "r2", "p0", "usr"); + check32(result, SF_HEX_NAN); + check_fpstatus(usr, FPINVF); + + /* + * Check that sfrecipa properly sets divid-by-zero + */ + asm (CLEAR_FPSTATUS + "%0,p0 = sfrecipa(%2, %3)\n\t" + "%1 = usr\n\t" + : "=r"(result), "=r"(usr) : "r"(0x885dc960), "r"(0x80000000) + : "r2", "p0", "usr"); + check32(result, 0x3f800000); + check_fpstatus(usr, FPDBZF); + + asm (CLEAR_FPSTATUS + "%0,p0 = sfrecipa(%2, %3)\n\t" + "%1 = usr\n\t" + : "=r"(result), "=r"(usr) : "r"(0x7f800000), "r"(SF_ZERO) + : "r2", "p0", "usr"); + check32(result, 0x3f800000); + check_fpstatus(usr, 0); +} + static void check_canonical_NaN(void) { int sf_result; @@ -358,12 +441,171 @@ static void check_canonical_NaN(void) check_fpstatus(usr, 0); } +static void check_invsqrta(void) +{ + int result; + int predval; + + asm volatile("%0,p0 = sfinvsqrta(%2)\n\t" + "%1 = p0\n\t" + : "+r"(result), "=r"(predval) + : "r"(0x7f800000) + : "p0"); + check32(result, 0xff800000); + check32(predval, 0x0); +} + +static void check_float2int_convs() +{ + int res32; + long long res64; + int usr; + + /* + * Check that the various forms of float-to-unsigned + * check sign before rounding + */ + asm(CLEAR_FPSTATUS + "%0 = convert_sf2uw(%2)\n\t" + "%1 = usr\n\t" + : "=r"(res32), "=r"(usr) : "r"(SF_small_neg) + : "r2", "usr"); + check32(res32, 0); + check_fpstatus(usr, FPINVF); + + asm(CLEAR_FPSTATUS + "%0 = convert_sf2uw(%2):chop\n\t" + "%1 = usr\n\t" + : "=r"(res32), "=r"(usr) : "r"(SF_small_neg) + : "r2", "usr"); + check32(res32, 0); + check_fpstatus(usr, FPINVF); + + asm(CLEAR_FPSTATUS + "%0 = convert_sf2ud(%2)\n\t" + "%1 = usr\n\t" + : "=r"(res64), "=r"(usr) : "r"(SF_small_neg) + : "r2", "usr"); + check64(res64, 0); + check_fpstatus(usr, FPINVF); + + asm(CLEAR_FPSTATUS + "%0 = convert_sf2ud(%2):chop\n\t" + "%1 = usr\n\t" + : "=r"(res64), "=r"(usr) : "r"(SF_small_neg) + : "r2", "usr"); + check64(res64, 0); + check_fpstatus(usr, FPINVF); + + asm(CLEAR_FPSTATUS + "%0 = convert_df2uw(%2)\n\t" + "%1 = usr\n\t" + : "=r"(res32), "=r"(usr) : "r"(DF_small_neg) + : "r2", "usr"); + check32(res32, 0); + check_fpstatus(usr, FPINVF); + + asm(CLEAR_FPSTATUS + "%0 = convert_df2uw(%2):chop\n\t" + "%1 = usr\n\t" + : "=r"(res32), "=r"(usr) : "r"(DF_small_neg) + : "r2", "usr"); + check32(res32, 0); + check_fpstatus(usr, FPINVF); + + asm(CLEAR_FPSTATUS + "%0 = convert_df2ud(%2)\n\t" + "%1 = usr\n\t" + : "=r"(res64), "=r"(usr) : "r"(DF_small_neg) + : "r2", "usr"); + check64(res64, 0); + check_fpstatus(usr, FPINVF); + + asm(CLEAR_FPSTATUS + "%0 = convert_df2ud(%2):chop\n\t" + "%1 = usr\n\t" + : "=r"(res64), "=r"(usr) : "r"(DF_small_neg) + : "r2", "usr"); + check64(res64, 0); + check_fpstatus(usr, FPINVF); + + /* + * Check that the various forms of float-to-signed return -1 for NaN + */ + asm(CLEAR_FPSTATUS + "%0 = convert_sf2w(%2)\n\t" + "%1 = usr\n\t" + : "=r"(res32), "=r"(usr) : "r"(SF_NaN) + : "r2", "usr"); + check32(res32, -1); + check_fpstatus(usr, FPINVF); + + asm(CLEAR_FPSTATUS + "%0 = convert_sf2w(%2):chop\n\t" + "%1 = usr\n\t" + : "=r"(res32), "=r"(usr) : "r"(SF_NaN) + : "r2", "usr"); + check32(res32, -1); + check_fpstatus(usr, FPINVF); + + asm(CLEAR_FPSTATUS + "%0 = convert_sf2d(%2)\n\t" + "%1 = usr\n\t" + : "=r"(res64), "=r"(usr) : "r"(SF_NaN) + : "r2", "usr"); + check64(res64, -1); + check_fpstatus(usr, FPINVF); + + asm(CLEAR_FPSTATUS + "%0 = convert_sf2d(%2):chop\n\t" + "%1 = usr\n\t" + : "=r"(res64), "=r"(usr) : "r"(SF_NaN) + : "r2", "usr"); + check64(res64, -1); + check_fpstatus(usr, FPINVF); + + asm(CLEAR_FPSTATUS + "%0 = convert_df2w(%2)\n\t" + "%1 = usr\n\t" + : "=r"(res32), "=r"(usr) : "r"(DF_NaN) + : "r2", "usr"); + check32(res32, -1); + check_fpstatus(usr, FPINVF); + + asm(CLEAR_FPSTATUS + "%0 = convert_df2w(%2):chop\n\t" + "%1 = usr\n\t" + : "=r"(res32), "=r"(usr) : "r"(DF_NaN) + : "r2", "usr"); + check32(res32, -1); + check_fpstatus(usr, FPINVF); + + asm(CLEAR_FPSTATUS + "%0 = convert_df2d(%2)\n\t" + "%1 = usr\n\t" + : "=r"(res64), "=r"(usr) : "r"(DF_NaN) + : "r2", "usr"); + check64(res64, -1); + check_fpstatus(usr, FPINVF); + + asm(CLEAR_FPSTATUS + "%0 = convert_df2d(%2):chop\n\t" + "%1 = usr\n\t" + : "=r"(res64), "=r"(usr) : "r"(DF_NaN) + : "r2", "usr"); + check64(res64, -1); + check_fpstatus(usr, FPINVF); +} + int main() { check_compare_exception(); check_sfminmax(); check_dfminmax(); + check_recip_exception(); check_canonical_NaN(); + check_invsqrta(); + check_float2int_convs(); puts(err ? "FAIL" : "PASS"); return err ? 1 : 0; diff --git a/tests/tcg/hexagon/load_align.c b/tests/tcg/hexagon/load_align.c new file mode 100644 index 0000000000..12fc9cbd8f --- /dev/null +++ b/tests/tcg/hexagon/load_align.c @@ -0,0 +1,415 @@ +/* + * Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see <http://www.gnu.org/licenses/>. + */ + +/* + * Test load align instructions + * + * Example + * r1:0 = memh_fifo(r1+#0) + * loads a half word from memory, shifts the destination register + * right by one half word and inserts the loaded value into the high + * half word of the destination. + * + * There are 8 addressing modes and byte and half word variants, for a + * total of 16 instructions to test + */ + +#include <stdio.h> +#include <string.h> + +int err; + +char buf[16] __attribute__((aligned(1 << 16))); + +void init_buf(void) +{ + int i; + for (i = 0; i < 16; i++) { + buf[i] = i + 1; + } +} + +void __check(int line, long long result, long long expect) +{ + if (result != expect) { + printf("ERROR at line %d: 0x%016llx != 0x%016llx\n", + line, result, expect); + err++; + } +} + +#define check(RES, EXP) __check(__LINE__, RES, EXP) + +void __checkp(int line, void *p, void *expect) +{ + if (p != expect) { + printf("ERROR at line %d: 0x%p != 0x%p\n", line, p, expect); + err++; + } +} + +#define checkp(RES, EXP) __checkp(__LINE__, RES, EXP) + +/* + **************************************************************************** + * _io addressing mode (addr + offset) + */ +#define LOAD_io(SZ, RES, ADDR, OFF) \ + __asm__( \ + "%0 = mem" #SZ "_fifo(%1+#" #OFF ")\n\t" \ + : "+r"(RES) \ + : "r"(ADDR)) +#define LOAD_io_b(RES, ADDR, OFF) \ + LOAD_io(b, RES, ADDR, OFF) +#define LOAD_io_h(RES, ADDR, OFF) \ + LOAD_io(h, RES, ADDR, OFF) + +#define TEST_io(NAME, SZ, SIZE, EXP1, EXP2, EXP3, EXP4) \ +void test_##NAME(void) \ +{ \ + long long result = ~0LL; \ + LOAD_io_##SZ(result, buf, 0 * (SIZE)); \ + check(result, (EXP1)); \ + LOAD_io_##SZ(result, buf, 1 * (SIZE)); \ + check(result, (EXP2)); \ + LOAD_io_##SZ(result, buf, 2 * (SIZE)); \ + check(result, (EXP3)); \ + LOAD_io_##SZ(result, buf, 3 * (SIZE)); \ + check(result, (EXP4)); \ +} + +TEST_io(loadalignb_io, b, 1, + 0x01ffffffffffffffLL, 0x0201ffffffffffffLL, + 0x030201ffffffffffLL, 0x04030201ffffffffLL) +TEST_io(loadalignh_io, h, 2, + 0x0201ffffffffffffLL, 0x04030201ffffffffLL, + 0x060504030201ffffLL, 0x0807060504030201LL) + +/* + **************************************************************************** + * _ur addressing mode (index << offset + base) + */ +#define LOAD_ur(SZ, RES, SHIFT, IDX) \ + __asm__( \ + "%0 = mem" #SZ "_fifo(%1<<#" #SHIFT " + ##buf)\n\t" \ + : "+r"(RES) \ + : "r"(IDX)) +#define LOAD_ur_b(RES, SHIFT, IDX) \ + LOAD_ur(b, RES, SHIFT, IDX) +#define LOAD_ur_h(RES, SHIFT, IDX) \ + LOAD_ur(h, RES, SHIFT, IDX) + +#define TEST_ur(NAME, SZ, SHIFT, RES1, RES2, RES3, RES4) \ +void test_##NAME(void) \ +{ \ + long long result = ~0LL; \ + LOAD_ur_##SZ(result, (SHIFT), 0); \ + check(result, (RES1)); \ + LOAD_ur_##SZ(result, (SHIFT), 1); \ + check(result, (RES2)); \ + LOAD_ur_##SZ(result, (SHIFT), 2); \ + check(result, (RES3)); \ + LOAD_ur_##SZ(result, (SHIFT), 3); \ + check(result, (RES4)); \ +} + +TEST_ur(loadalignb_ur, b, 1, + 0x01ffffffffffffffLL, 0x0301ffffffffffffLL, + 0x050301ffffffffffLL, 0x07050301ffffffffLL) +TEST_ur(loadalignh_ur, h, 1, + 0x0201ffffffffffffLL, 0x04030201ffffffffLL, + 0x060504030201ffffLL, 0x0807060504030201LL) + +/* + **************************************************************************** + * _ap addressing mode (addr = base) + */ +#define LOAD_ap(SZ, RES, PTR, ADDR) \ + __asm__( \ + "%0 = mem" #SZ "_fifo(%1 = ##" #ADDR ")\n\t" \ + : "+r"(RES), "=r"(PTR)) +#define LOAD_ap_b(RES, PTR, ADDR) \ + LOAD_ap(b, RES, PTR, ADDR) +#define LOAD_ap_h(RES, PTR, ADDR) \ + LOAD_ap(h, RES, PTR, ADDR) + +#define TEST_ap(NAME, SZ, SIZE, RES1, RES2, RES3, RES4) \ +void test_##NAME(void) \ +{ \ + long long result = ~0LL; \ + void *ptr; \ + LOAD_ap_##SZ(result, ptr, (buf + 0 * (SIZE))); \ + check(result, (RES1)); \ + checkp(ptr, &buf[0 * (SIZE)]); \ + LOAD_ap_##SZ(result, ptr, (buf + 1 * (SIZE))); \ + check(result, (RES2)); \ + checkp(ptr, &buf[1 * (SIZE)]); \ + LOAD_ap_##SZ(result, ptr, (buf + 2 * (SIZE))); \ + check(result, (RES3)); \ + checkp(ptr, &buf[2 * (SIZE)]); \ + LOAD_ap_##SZ(result, ptr, (buf + 3 * (SIZE))); \ + check(result, (RES4)); \ + checkp(ptr, &buf[3 * (SIZE)]); \ +} + +TEST_ap(loadalignb_ap, b, 1, + 0x01ffffffffffffffLL, 0x0201ffffffffffffLL, + 0x030201ffffffffffLL, 0x04030201ffffffffLL) +TEST_ap(loadalignh_ap, h, 2, + 0x0201ffffffffffffLL, 0x04030201ffffffffLL, + 0x060504030201ffffLL, 0x0807060504030201LL) + +/* + **************************************************************************** + * _rp addressing mode (addr ++ modifer-reg) + */ +#define LOAD_pr(SZ, RES, PTR, INC) \ + __asm__( \ + "m0 = %2\n\t" \ + "%0 = mem" #SZ "_fifo(%1++m0)\n\t" \ + : "+r"(RES), "+r"(PTR) \ + : "r"(INC) \ + : "m0") +#define LOAD_pr_b(RES, PTR, INC) \ + LOAD_pr(b, RES, PTR, INC) +#define LOAD_pr_h(RES, PTR, INC) \ + LOAD_pr(h, RES, PTR, INC) + +#define TEST_pr(NAME, SZ, SIZE, RES1, RES2, RES3, RES4) \ +void test_##NAME(void) \ +{ \ + long long result = ~0LL; \ + void *ptr = buf; \ + LOAD_pr_##SZ(result, ptr, (SIZE)); \ + check(result, (RES1)); \ + checkp(ptr, &buf[1 * (SIZE)]); \ + LOAD_pr_##SZ(result, ptr, (SIZE)); \ + check(result, (RES2)); \ + checkp(ptr, &buf[2 * (SIZE)]); \ + LOAD_pr_##SZ(result, ptr, (SIZE)); \ + check(result, (RES3)); \ + checkp(ptr, &buf[3 * (SIZE)]); \ + LOAD_pr_##SZ(result, ptr, (SIZE)); \ + check(result, (RES4)); \ + checkp(ptr, &buf[4 * (SIZE)]); \ +} + +TEST_pr(loadalignb_pr, b, 1, + 0x01ffffffffffffffLL, 0x0201ffffffffffffLL, + 0x030201ffffffffffLL, 0x04030201ffffffffLL) +TEST_pr(loadalignh_pr, h, 2, + 0x0201ffffffffffffLL, 0x04030201ffffffffLL, + 0x060504030201ffffLL, 0x0807060504030201LL) + +/* + **************************************************************************** + * _pbr addressing mode (addr ++ modifer-reg:brev) + */ +#define LOAD_pbr(SZ, RES, PTR) \ + __asm__( \ + "r4 = #(1 << (16 - 3))\n\t" \ + "m0 = r4\n\t" \ + "%0 = mem" #SZ "_fifo(%1++m0:brev)\n\t" \ + : "+r"(RES), "+r"(PTR) \ + : \ + : "r4", "m0") +#define LOAD_pbr_b(RES, PTR) \ + LOAD_pbr(b, RES, PTR) +#define LOAD_pbr_h(RES, PTR) \ + LOAD_pbr(h, RES, PTR) + +#define TEST_pbr(NAME, SZ, RES1, RES2, RES3, RES4) \ +void test_##NAME(void) \ +{ \ + long long result = ~0LL; \ + void *ptr = buf; \ + LOAD_pbr_##SZ(result, ptr); \ + check(result, (RES1)); \ + LOAD_pbr_##SZ(result, ptr); \ + check(result, (RES2)); \ + LOAD_pbr_##SZ(result, ptr); \ + check(result, (RES3)); \ + LOAD_pbr_##SZ(result, ptr); \ + check(result, (RES4)); \ +} + +TEST_pbr(loadalignb_pbr, b, + 0x01ffffffffffffffLL, 0x0501ffffffffffffLL, + 0x030501ffffffffffLL, 0x07030501ffffffffLL) +TEST_pbr(loadalignh_pbr, h, + 0x0201ffffffffffffLL, 0x06050201ffffffffLL, + 0x040306050201ffffLL, 0x0807040306050201LL) + +/* + **************************************************************************** + * _pi addressing mode (addr ++ inc) + */ +#define LOAD_pi(SZ, RES, PTR, INC) \ + __asm__( \ + "%0 = mem" #SZ "_fifo(%1++#" #INC ")\n\t" \ + : "+r"(RES), "+r"(PTR)) +#define LOAD_pi_b(RES, PTR, INC) \ + LOAD_pi(b, RES, PTR, INC) +#define LOAD_pi_h(RES, PTR, INC) \ + LOAD_pi(h, RES, PTR, INC) + +#define TEST_pi(NAME, SZ, INC, RES1, RES2, RES3, RES4) \ +void test_##NAME(void) \ +{ \ + long long result = ~0LL; \ + void *ptr = buf; \ + LOAD_pi_##SZ(result, ptr, (INC)); \ + check(result, (RES1)); \ + checkp(ptr, &buf[1 * (INC)]); \ + LOAD_pi_##SZ(result, ptr, (INC)); \ + check(result, (RES2)); \ + checkp(ptr, &buf[2 * (INC)]); \ + LOAD_pi_##SZ(result, ptr, (INC)); \ + check(result, (RES3)); \ + checkp(ptr, &buf[3 * (INC)]); \ + LOAD_pi_##SZ(result, ptr, (INC)); \ + check(result, (RES4)); \ + checkp(ptr, &buf[4 * (INC)]); \ +} + +TEST_pi(loadalignb_pi, b, 1, + 0x01ffffffffffffffLL, 0x0201ffffffffffffLL, + 0x030201ffffffffffLL, 0x04030201ffffffffLL) +TEST_pi(loadalignh_pi, h, 2, + 0x0201ffffffffffffLL, 0x04030201ffffffffLL, + 0x060504030201ffffLL, 0x0807060504030201LL) + +/* + **************************************************************************** + * _pci addressing mode (addr ++ inc:circ) + */ +#define LOAD_pci(SZ, RES, PTR, START, LEN, INC) \ + __asm__( \ + "r4 = %3\n\t" \ + "m0 = r4\n\t" \ + "cs0 = %2\n\t" \ + "%0 = mem" #SZ "_fifo(%1++#" #INC ":circ(m0))\n\t" \ + : "+r"(RES), "+r"(PTR) \ + : "r"(START), "r"(LEN) \ + : "r4", "m0", "cs0") +#define LOAD_pci_b(RES, PTR, START, LEN, INC) \ + LOAD_pci(b, RES, PTR, START, LEN, INC) +#define LOAD_pci_h(RES, PTR, START, LEN, INC) \ + LOAD_pci(h, RES, PTR, START, LEN, INC) + +#define TEST_pci(NAME, SZ, LEN, INC, RES1, RES2, RES3, RES4) \ +void test_##NAME(void) \ +{ \ + long long result = ~0LL; \ + void *ptr = buf; \ + LOAD_pci_##SZ(result, ptr, buf, (LEN), (INC)); \ + check(result, (RES1)); \ + checkp(ptr, &buf[(1 * (INC)) % (LEN)]); \ + LOAD_pci_##SZ(result, ptr, buf, (LEN), (INC)); \ + check(result, (RES2)); \ + checkp(ptr, &buf[(2 * (INC)) % (LEN)]); \ + LOAD_pci_##SZ(result, ptr, buf, (LEN), (INC)); \ + check(result, (RES3)); \ + checkp(ptr, &buf[(3 * (INC)) % (LEN)]); \ + LOAD_pci_##SZ(result, ptr, buf, (LEN), (INC)); \ + check(result, (RES4)); \ + checkp(ptr, &buf[(4 * (INC)) % (LEN)]); \ +} + +TEST_pci(loadalignb_pci, b, 2, 1, + 0x01ffffffffffffffLL, 0x0201ffffffffffffLL, + 0x010201ffffffffffLL, 0x02010201ffffffffLL) +TEST_pci(loadalignh_pci, h, 4, 2, + 0x0201ffffffffffffLL, 0x04030201ffffffffLL, + 0x020104030201ffffLL, 0x0403020104030201LL) + +/* + **************************************************************************** + * _pcr addressing mode (addr ++ I:circ(modifier-reg)) + */ +#define LOAD_pcr(SZ, RES, PTR, START, LEN, INC) \ + __asm__( \ + "r4 = %2\n\t" \ + "m1 = r4\n\t" \ + "cs1 = %3\n\t" \ + "%0 = mem" #SZ "_fifo(%1++I:circ(m1))\n\t" \ + : "+r"(RES), "+r"(PTR) \ + : "r"((((INC) & 0x7f) << 17) | ((LEN) & 0x1ffff)), \ + "r"(START) \ + : "r4", "m1", "cs1") +#define LOAD_pcr_b(RES, PTR, START, LEN, INC) \ + LOAD_pcr(b, RES, PTR, START, LEN, INC) +#define LOAD_pcr_h(RES, PTR, START, LEN, INC) \ + LOAD_pcr(h, RES, PTR, START, LEN, INC) + +#define TEST_pcr(NAME, SZ, SIZE, LEN, INC, RES1, RES2, RES3, RES4) \ +void test_##NAME(void) \ +{ \ + long long result = ~0LL; \ + void *ptr = buf; \ + LOAD_pcr_##SZ(result, ptr, buf, (LEN), (INC)); \ + check(result, (RES1)); \ + checkp(ptr, &buf[(1 * (INC) * (SIZE)) % (LEN)]); \ + LOAD_pcr_##SZ(result, ptr, buf, (LEN), (INC)); \ + check(result, (RES2)); \ + checkp(ptr, &buf[(2 * (INC) * (SIZE)) % (LEN)]); \ + LOAD_pcr_##SZ(result, ptr, buf, (LEN), (INC)); \ + check(result, (RES3)); \ + checkp(ptr, &buf[(3 * (INC) * (SIZE)) % (LEN)]); \ + LOAD_pcr_##SZ(result, ptr, buf, (LEN), (INC)); \ + check(result, (RES4)); \ + checkp(ptr, &buf[(4 * (INC) * (SIZE)) % (LEN)]); \ +} + +TEST_pcr(loadalignb_pcr, b, 1, 2, 1, + 0x01ffffffffffffffLL, 0x0201ffffffffffffLL, + 0x010201ffffffffffLL, 0x02010201ffffffffLL) +TEST_pcr(loadalignh_pcr, h, 2, 4, 1, + 0x0201ffffffffffffLL, 0x04030201ffffffffLL, + 0x020104030201ffffLL, 0x0403020104030201LL) + +int main() +{ + init_buf(); + + test_loadalignb_io(); + test_loadalignh_io(); + + test_loadalignb_ur(); + test_loadalignh_ur(); + + test_loadalignb_ap(); + test_loadalignh_ap(); + + test_loadalignb_pr(); + test_loadalignh_pr(); + + test_loadalignb_pbr(); + test_loadalignh_pbr(); + + test_loadalignb_pi(); + test_loadalignh_pi(); + + test_loadalignb_pci(); + test_loadalignh_pci(); + + test_loadalignb_pcr(); + test_loadalignh_pcr(); + + puts(err ? "FAIL" : "PASS"); + return err ? 1 : 0; +} diff --git a/tests/tcg/hexagon/load_unpack.c b/tests/tcg/hexagon/load_unpack.c new file mode 100644 index 0000000000..3575a37a28 --- /dev/null +++ b/tests/tcg/hexagon/load_unpack.c @@ -0,0 +1,474 @@ +/* + * Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see <http://www.gnu.org/licenses/>. + */ + +/* + * Test load unpack instructions + * + * Example + * r0 = memubh(r1+#0) + * loads a half word from memory and zero-extends the 2 bytes to form a word + * + * For each addressing mode, there are 4 tests + * bzw2 unsigned 2 elements + * bsw2 signed 2 elements + * bzw4 unsigned 4 elements + * bsw4 signed 4 elements + * There are 8 addressing modes, for a total of 32 instructions to test + */ + +#include <stdio.h> +#include <string.h> + +int err; + +char buf[16] __attribute__((aligned(1 << 16))); + +void init_buf(void) +{ + int i; + for (i = 0; i < 16; i++) { + int sign = i % 2 == 0 ? 0x80 : 0; + buf[i] = sign | (i + 1); + } +} + +void __check(int line, long long result, long long expect) +{ + if (result != expect) { + printf("ERROR at line %d: 0x%08llx != 0x%08llx\n", + line, result, expect); + err++; + } +} + +#define check(RES, EXP) __check(__LINE__, RES, EXP) + +void __checkp(int line, void *p, void *expect) +{ + if (p != expect) { + printf("ERROR at line %d: 0x%p != 0x%p\n", line, p, expect); + err++; + } +} + +#define checkp(RES, EXP) __checkp(__LINE__, RES, EXP) + +/* + **************************************************************************** + * _io addressing mode (addr + offset) + */ +#define BxW_LOAD_io(SZ, RES, ADDR, OFF) \ + __asm__( \ + "%0 = mem" #SZ "(%1+#" #OFF ")\n\t" \ + : "=r"(RES) \ + : "r"(ADDR)) +#define BxW_LOAD_io_Z(RES, ADDR, OFF) \ + BxW_LOAD_io(ubh, RES, ADDR, OFF) +#define BxW_LOAD_io_S(RES, ADDR, OFF) \ + BxW_LOAD_io(bh, RES, ADDR, OFF) + +#define TEST_io(NAME, TYPE, SIGN, SIZE, EXT, EXP1, EXP2, EXP3, EXP4) \ +void test_##NAME(void) \ +{ \ + TYPE result; \ + init_buf(); \ + BxW_LOAD_io_##SIGN(result, buf, 0 * (SIZE)); \ + check(result, (EXP1) | (EXT)); \ + BxW_LOAD_io_##SIGN(result, buf, 1 * (SIZE)); \ + check(result, (EXP2) | (EXT)); \ + BxW_LOAD_io_##SIGN(result, buf, 2 * (SIZE)); \ + check(result, (EXP3) | (EXT)); \ + BxW_LOAD_io_##SIGN(result, buf, 3 * (SIZE)); \ + check(result, (EXP4) | (EXT)); \ +} + + +TEST_io(loadbzw2_io, int, Z, 2, 0x00000000, + 0x00020081, 0x00040083, 0x00060085, 0x00080087) +TEST_io(loadbsw2_io, int, S, 2, 0x0000ff00, + 0x00020081, 0x00040083, 0x00060085, 0x00080087) +TEST_io(loadbzw4_io, long long, Z, 4, 0x0000000000000000LL, + 0x0004008300020081LL, 0x0008008700060085LL, + 0x000c008b000a0089LL, 0x0010008f000e008dLL) +TEST_io(loadbsw4_io, long long, S, 4, 0x0000ff000000ff00LL, + 0x0004008300020081LL, 0x0008008700060085LL, + 0x000c008b000a0089LL, 0x0010008f000e008dLL) + +/* + **************************************************************************** + * _ur addressing mode (index << offset + base) + */ +#define BxW_LOAD_ur(SZ, RES, SHIFT, IDX) \ + __asm__( \ + "%0 = mem" #SZ "(%1<<#" #SHIFT " + ##buf)\n\t" \ + : "=r"(RES) \ + : "r"(IDX)) +#define BxW_LOAD_ur_Z(RES, SHIFT, IDX) \ + BxW_LOAD_ur(ubh, RES, SHIFT, IDX) +#define BxW_LOAD_ur_S(RES, SHIFT, IDX) \ + BxW_LOAD_ur(bh, RES, SHIFT, IDX) + +#define TEST_ur(NAME, TYPE, SIGN, SHIFT, EXT, RES1, RES2, RES3, RES4) \ +void test_##NAME(void) \ +{ \ + TYPE result; \ + init_buf(); \ + BxW_LOAD_ur_##SIGN(result, (SHIFT), 0); \ + check(result, (RES1) | (EXT)); \ + BxW_LOAD_ur_##SIGN(result, (SHIFT), 1); \ + check(result, (RES2) | (EXT)); \ + BxW_LOAD_ur_##SIGN(result, (SHIFT), 2); \ + check(result, (RES3) | (EXT)); \ + BxW_LOAD_ur_##SIGN(result, (SHIFT), 3); \ + check(result, (RES4) | (EXT)); \ +} \ + +TEST_ur(loadbzw2_ur, int, Z, 1, 0x00000000, + 0x00020081, 0x00040083, 0x00060085, 0x00080087) +TEST_ur(loadbsw2_ur, int, S, 1, 0x0000ff00, + 0x00020081, 0x00040083, 0x00060085, 0x00080087) +TEST_ur(loadbzw4_ur, long long, Z, 2, 0x0000000000000000LL, + 0x0004008300020081LL, 0x0008008700060085LL, + 0x000c008b000a0089LL, 0x0010008f000e008dLL) +TEST_ur(loadbsw4_ur, long long, S, 2, 0x0000ff000000ff00LL, + 0x0004008300020081LL, 0x0008008700060085LL, + 0x000c008b000a0089LL, 0x0010008f000e008dLL) + +/* + **************************************************************************** + * _ap addressing mode (addr = base) + */ +#define BxW_LOAD_ap(SZ, RES, PTR, ADDR) \ + __asm__( \ + "%0 = mem" #SZ "(%1 = ##" #ADDR ")\n\t" \ + : "=r"(RES), "=r"(PTR)) +#define BxW_LOAD_ap_Z(RES, PTR, ADDR) \ + BxW_LOAD_ap(ubh, RES, PTR, ADDR) +#define BxW_LOAD_ap_S(RES, PTR, ADDR) \ + BxW_LOAD_ap(bh, RES, PTR, ADDR) + +#define TEST_ap(NAME, TYPE, SIGN, SIZE, EXT, RES1, RES2, RES3, RES4) \ +void test_##NAME(void) \ +{ \ + TYPE result; \ + void *ptr; \ + init_buf(); \ + BxW_LOAD_ap_##SIGN(result, ptr, (buf + 0 * (SIZE))); \ + check(result, (RES1) | (EXT)); \ + checkp(ptr, &buf[0 * (SIZE)]); \ + BxW_LOAD_ap_##SIGN(result, ptr, (buf + 1 * (SIZE))); \ + check(result, (RES2) | (EXT)); \ + checkp(ptr, &buf[1 * (SIZE)]); \ + BxW_LOAD_ap_##SIGN(result, ptr, (buf + 2 * (SIZE))); \ + check(result, (RES3) | (EXT)); \ + checkp(ptr, &buf[2 * (SIZE)]); \ + BxW_LOAD_ap_##SIGN(result, ptr, (buf + 3 * (SIZE))); \ + check(result, (RES4) | (EXT)); \ + checkp(ptr, &buf[3 * (SIZE)]); \ +} + +TEST_ap(loadbzw2_ap, int, Z, 2, 0x00000000, + 0x00020081, 0x00040083, 0x00060085, 0x00080087) +TEST_ap(loadbsw2_ap, int, S, 2, 0x0000ff00, + 0x00020081, 0x00040083, 0x00060085, 0x00080087) +TEST_ap(loadbzw4_ap, long long, Z, 4, 0x0000000000000000LL, + 0x0004008300020081LL, 0x0008008700060085LL, + 0x000c008b000a0089LL, 0x0010008f000e008dLL) +TEST_ap(loadbsw4_ap, long long, S, 4, 0x0000ff000000ff00LL, + 0x0004008300020081LL, 0x0008008700060085LL, + 0x000c008b000a0089LL, 0x0010008f000e008dLL) + +/* + **************************************************************************** + * _rp addressing mode (addr ++ modifer-reg) + */ +#define BxW_LOAD_pr(SZ, RES, PTR, INC) \ + __asm__( \ + "m0 = %2\n\t" \ + "%0 = mem" #SZ "(%1++m0)\n\t" \ + : "=r"(RES), "+r"(PTR) \ + : "r"(INC) \ + : "m0") +#define BxW_LOAD_pr_Z(RES, PTR, INC) \ + BxW_LOAD_pr(ubh, RES, PTR, INC) +#define BxW_LOAD_pr_S(RES, PTR, INC) \ + BxW_LOAD_pr(bh, RES, PTR, INC) + +#define TEST_pr(NAME, TYPE, SIGN, SIZE, EXT, RES1, RES2, RES3, RES4) \ +void test_##NAME(void) \ +{ \ + TYPE result; \ + void *ptr = buf; \ + init_buf(); \ + BxW_LOAD_pr_##SIGN(result, ptr, (SIZE)); \ + check(result, (RES1) | (EXT)); \ + checkp(ptr, &buf[1 * (SIZE)]); \ + BxW_LOAD_pr_##SIGN(result, ptr, (SIZE)); \ + check(result, (RES2) | (EXT)); \ + checkp(ptr, &buf[2 * (SIZE)]); \ + BxW_LOAD_pr_##SIGN(result, ptr, (SIZE)); \ + check(result, (RES3) | (EXT)); \ + checkp(ptr, &buf[3 * (SIZE)]); \ + BxW_LOAD_pr_##SIGN(result, ptr, (SIZE)); \ + check(result, (RES4) | (EXT)); \ + checkp(ptr, &buf[4 * (SIZE)]); \ +} + +TEST_pr(loadbzw2_pr, int, Z, 2, 0x00000000, + 0x00020081, 0x0040083, 0x00060085, 0x00080087) +TEST_pr(loadbsw2_pr, int, S, 2, 0x0000ff00, + 0x00020081, 0x0040083, 0x00060085, 0x00080087) +TEST_pr(loadbzw4_pr, long long, Z, 4, 0x0000000000000000LL, + 0x0004008300020081LL, 0x0008008700060085LL, + 0x000c008b000a0089LL, 0x0010008f000e008dLL) +TEST_pr(loadbsw4_pr, long long, S, 4, 0x0000ff000000ff00LL, + 0x0004008300020081LL, 0x0008008700060085LL, + 0x000c008b000a0089LL, 0x0010008f000e008dLL) + +/* + **************************************************************************** + * _pbr addressing mode (addr ++ modifer-reg:brev) + */ +#define BxW_LOAD_pbr(SZ, RES, PTR) \ + __asm__( \ + "r4 = #(1 << (16 - 3))\n\t" \ + "m0 = r4\n\t" \ + "%0 = mem" #SZ "(%1++m0:brev)\n\t" \ + : "=r"(RES), "+r"(PTR) \ + : \ + : "r4", "m0") +#define BxW_LOAD_pbr_Z(RES, PTR) \ + BxW_LOAD_pbr(ubh, RES, PTR) +#define BxW_LOAD_pbr_S(RES, PTR) \ + BxW_LOAD_pbr(bh, RES, PTR) + +#define TEST_pbr(NAME, TYPE, SIGN, EXT, RES1, RES2, RES3, RES4) \ +void test_##NAME(void) \ +{ \ + TYPE result; \ + void *ptr = buf; \ + init_buf(); \ + BxW_LOAD_pbr_##SIGN(result, ptr); \ + check(result, (RES1) | (EXT)); \ + BxW_LOAD_pbr_##SIGN(result, ptr); \ + check(result, (RES2) | (EXT)); \ + BxW_LOAD_pbr_##SIGN(result, ptr); \ + check(result, (RES3) | (EXT)); \ + BxW_LOAD_pbr_##SIGN(result, ptr); \ + check(result, (RES4) | (EXT)); \ +} + +TEST_pbr(loadbzw2_pbr, int, Z, 0x00000000, + 0x00020081, 0x00060085, 0x00040083, 0x00080087) +TEST_pbr(loadbsw2_pbr, int, S, 0x0000ff00, + 0x00020081, 0x00060085, 0x00040083, 0x00080087) +TEST_pbr(loadbzw4_pbr, long long, Z, 0x0000000000000000LL, + 0x0004008300020081LL, 0x0008008700060085LL, + 0x0006008500040083LL, 0x000a008900080087LL) +TEST_pbr(loadbsw4_pbr, long long, S, 0x0000ff000000ff00LL, + 0x0004008300020081LL, 0x0008008700060085LL, + 0x0006008500040083LL, 0x000a008900080087LL) + +/* + **************************************************************************** + * _pi addressing mode (addr ++ inc) + */ +#define BxW_LOAD_pi(SZ, RES, PTR, INC) \ + __asm__( \ + "%0 = mem" #SZ "(%1++#" #INC ")\n\t" \ + : "=r"(RES), "+r"(PTR)) +#define BxW_LOAD_pi_Z(RES, PTR, INC) \ + BxW_LOAD_pi(ubh, RES, PTR, INC) +#define BxW_LOAD_pi_S(RES, PTR, INC) \ + BxW_LOAD_pi(bh, RES, PTR, INC) + +#define TEST_pi(NAME, TYPE, SIGN, INC, EXT, RES1, RES2, RES3, RES4) \ +void test_##NAME(void) \ +{ \ + TYPE result; \ + void *ptr = buf; \ + init_buf(); \ + BxW_LOAD_pi_##SIGN(result, ptr, (INC)); \ + check(result, (RES1) | (EXT)); \ + checkp(ptr, &buf[1 * (INC)]); \ + BxW_LOAD_pi_##SIGN(result, ptr, (INC)); \ + check(result, (RES2) | (EXT)); \ + checkp(ptr, &buf[2 * (INC)]); \ + BxW_LOAD_pi_##SIGN(result, ptr, (INC)); \ + check(result, (RES3) | (EXT)); \ + checkp(ptr, &buf[3 * (INC)]); \ + BxW_LOAD_pi_##SIGN(result, ptr, (INC)); \ + check(result, (RES4) | (EXT)); \ + checkp(ptr, &buf[4 * (INC)]); \ +} + +TEST_pi(loadbzw2_pi, int, Z, 2, 0x00000000, + 0x00020081, 0x00040083, 0x00060085, 0x00080087) +TEST_pi(loadbsw2_pi, int, S, 2, 0x0000ff00, + 0x00020081, 0x00040083, 0x00060085, 0x00080087) +TEST_pi(loadbzw4_pi, long long, Z, 4, 0x0000000000000000LL, + 0x0004008300020081LL, 0x0008008700060085LL, + 0x000c008b000a0089LL, 0x0010008f000e008dLL) +TEST_pi(loadbsw4_pi, long long, S, 4, 0x0000ff000000ff00LL, + 0x0004008300020081LL, 0x0008008700060085LL, + 0x000c008b000a0089LL, 0x0010008f000e008dLL) + +/* + **************************************************************************** + * _pci addressing mode (addr ++ inc:circ) + */ +#define BxW_LOAD_pci(SZ, RES, PTR, START, LEN, INC) \ + __asm__( \ + "r4 = %3\n\t" \ + "m0 = r4\n\t" \ + "cs0 = %2\n\t" \ + "%0 = mem" #SZ "(%1++#" #INC ":circ(m0))\n\t" \ + : "=r"(RES), "+r"(PTR) \ + : "r"(START), "r"(LEN) \ + : "r4", "m0", "cs0") +#define BxW_LOAD_pci_Z(RES, PTR, START, LEN, INC) \ + BxW_LOAD_pci(ubh, RES, PTR, START, LEN, INC) +#define BxW_LOAD_pci_S(RES, PTR, START, LEN, INC) \ + BxW_LOAD_pci(bh, RES, PTR, START, LEN, INC) + +#define TEST_pci(NAME, TYPE, SIGN, LEN, INC, EXT, RES1, RES2, RES3, RES4) \ +void test_##NAME(void) \ +{ \ + TYPE result; \ + void *ptr = buf; \ + init_buf(); \ + BxW_LOAD_pci_##SIGN(result, ptr, buf, (LEN), (INC)); \ + check(result, (RES1) | (EXT)); \ + checkp(ptr, &buf[(1 * (INC)) % (LEN)]); \ + BxW_LOAD_pci_##SIGN(result, ptr, buf, (LEN), (INC)); \ + check(result, (RES2) | (EXT)); \ + checkp(ptr, &buf[(2 * (INC)) % (LEN)]); \ + BxW_LOAD_pci_##SIGN(result, ptr, buf, (LEN), (INC)); \ + check(result, (RES3) | (EXT)); \ + checkp(ptr, &buf[(3 * (INC)) % (LEN)]); \ + BxW_LOAD_pci_##SIGN(result, ptr, buf, (LEN), (INC)); \ + check(result, (RES4) | (EXT)); \ + checkp(ptr, &buf[(4 * (INC)) % (LEN)]); \ +} + +TEST_pci(loadbzw2_pci, int, Z, 6, 2, 0x00000000, + 0x00020081, 0x00040083, 0x00060085, 0x00020081) +TEST_pci(loadbsw2_pci, int, S, 6, 2, 0x0000ff00, + 0x00020081, 0x00040083, 0x00060085, 0x00020081) +TEST_pci(loadbzw4_pci, long long, Z, 8, 4, 0x0000000000000000LL, + 0x0004008300020081LL, 0x0008008700060085LL, + 0x0004008300020081LL, 0x0008008700060085LL) +TEST_pci(loadbsw4_pci, long long, S, 8, 4, 0x0000ff000000ff00LL, + 0x0004008300020081LL, 0x0008008700060085LL, + 0x0004008300020081LL, 0x0008008700060085LL) + +/* + **************************************************************************** + * _pcr addressing mode (addr ++ I:circ(modifier-reg)) + */ +#define BxW_LOAD_pcr(SZ, RES, PTR, START, LEN, INC) \ + __asm__( \ + "r4 = %2\n\t" \ + "m1 = r4\n\t" \ + "cs1 = %3\n\t" \ + "%0 = mem" #SZ "(%1++I:circ(m1))\n\t" \ + : "=r"(RES), "+r"(PTR) \ + : "r"((((INC) & 0x7f) << 17) | ((LEN) & 0x1ffff)), \ + "r"(START) \ + : "r4", "m1", "cs1") +#define BxW_LOAD_pcr_Z(RES, PTR, START, LEN, INC) \ + BxW_LOAD_pcr(ubh, RES, PTR, START, LEN, INC) +#define BxW_LOAD_pcr_S(RES, PTR, START, LEN, INC) \ + BxW_LOAD_pcr(bh, RES, PTR, START, LEN, INC) + +#define TEST_pcr(NAME, TYPE, SIGN, SIZE, LEN, INC, \ + EXT, RES1, RES2, RES3, RES4) \ +void test_##NAME(void) \ +{ \ + TYPE result; \ + void *ptr = buf; \ + init_buf(); \ + BxW_LOAD_pcr_##SIGN(result, ptr, buf, (LEN), (INC)); \ + check(result, (RES1) | (EXT)); \ + checkp(ptr, &buf[(1 * (INC) * (SIZE)) % (LEN)]); \ + BxW_LOAD_pcr_##SIGN(result, ptr, buf, (LEN), (INC)); \ + check(result, (RES2) | (EXT)); \ + checkp(ptr, &buf[(2 * (INC) * (SIZE)) % (LEN)]); \ + BxW_LOAD_pcr_##SIGN(result, ptr, buf, (LEN), (INC)); \ + check(result, (RES3) | (EXT)); \ + checkp(ptr, &buf[(3 * (INC) * (SIZE)) % (LEN)]); \ + BxW_LOAD_pcr_##SIGN(result, ptr, buf, (LEN), (INC)); \ + check(result, (RES4) | (EXT)); \ + checkp(ptr, &buf[(4 * (INC) * (SIZE)) % (LEN)]); \ +} + +TEST_pcr(loadbzw2_pcr, int, Z, 2, 8, 2, 0x00000000, + 0x00020081, 0x00060085, 0x00020081, 0x00060085) +TEST_pcr(loadbsw2_pcr, int, S, 2, 8, 2, 0x0000ff00, + 0x00020081, 0x00060085, 0x00020081, 0x00060085) +TEST_pcr(loadbzw4_pcr, long long, Z, 4, 8, 1, 0x0000000000000000LL, + 0x0004008300020081LL, 0x0008008700060085LL, + 0x0004008300020081LL, 0x0008008700060085LL) +TEST_pcr(loadbsw4_pcr, long long, S, 4, 8, 1, 0x0000ff000000ff00LL, + 0x0004008300020081LL, 0x0008008700060085LL, + 0x0004008300020081LL, 0x0008008700060085LL) + +int main() +{ + test_loadbzw2_io(); + test_loadbsw2_io(); + test_loadbzw4_io(); + test_loadbsw4_io(); + + test_loadbzw2_ur(); + test_loadbsw2_ur(); + test_loadbzw4_ur(); + test_loadbsw4_ur(); + + test_loadbzw2_ap(); + test_loadbsw2_ap(); + test_loadbzw4_ap(); + test_loadbsw4_ap(); + + test_loadbzw2_pr(); + test_loadbsw2_pr(); + test_loadbzw4_pr(); + test_loadbsw4_pr(); + + test_loadbzw2_pbr(); + test_loadbsw2_pbr(); + test_loadbzw4_pbr(); + test_loadbsw4_pbr(); + + test_loadbzw2_pi(); + test_loadbsw2_pi(); + test_loadbzw4_pi(); + test_loadbsw4_pi(); + + test_loadbzw2_pci(); + test_loadbsw2_pci(); + test_loadbzw4_pci(); + test_loadbsw4_pci(); + + test_loadbzw2_pcr(); + test_loadbsw2_pcr(); + test_loadbzw4_pcr(); + test_loadbsw4_pcr(); + + puts(err ? "FAIL" : "PASS"); + return err ? 1 : 0; +} diff --git a/tests/tcg/hexagon/misc.c b/tests/tcg/hexagon/misc.c index 458759f7b1..17c39198fc 100644 --- a/tests/tcg/hexagon/misc.c +++ b/tests/tcg/hexagon/misc.c @@ -231,6 +231,14 @@ static void check(int val, int expect) } } +static void check64(long long val, long long expect) +{ + if (val != expect) { + printf("ERROR: 0x%016llx != 0x%016llx\n", val, expect); + err++; + } +} + uint32_t init[10] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }; uint32_t array[10]; @@ -264,8 +272,36 @@ static long long creg_pair(int x, int y) return retval; } +static long long decbin(long long x, long long y, int *pred) +{ + long long retval; + asm ("%0 = decbin(%2, %3)\n\t" + "%1 = p0\n\t" + : "=r"(retval), "=r"(*pred) + : "r"(x), "r"(y)); + return retval; +} + +/* Check that predicates are auto-and'ed in a packet */ +static int auto_and(void) +{ + int retval; + asm ("r5 = #1\n\t" + "{\n\t" + " p0 = cmp.eq(r1, #1)\n\t" + " p0 = cmp.eq(r1, #2)\n\t" + "}\n\t" + "%0 = p0\n\t" + : "=r"(retval) + : + : "r5", "p0"); + return retval; +} + int main() { + long long res64; + int pred; memcpy(array, init, sizeof(array)); S4_storerhnew_rr(array, 4, 0xffff); @@ -375,6 +411,17 @@ int main() res = test_clrtnew(2, 7); check(res, 7); + res64 = decbin(0xf0f1f2f3f4f5f6f7LL, 0x7f6f5f4f3f2f1f0fLL, &pred); + check64(res64, 0x357980003700010cLL); + check(pred, 0); + + res64 = decbin(0xfLL, 0x1bLL, &pred); + check64(res64, 0x78000100LL); + check(pred, 1); + + res = auto_and(); + check(res, 0); + puts(err ? "FAIL" : "PASS"); return err; } diff --git a/tests/tcg/hexagon/multi_result.c b/tests/tcg/hexagon/multi_result.c new file mode 100644 index 0000000000..52997b3128 --- /dev/null +++ b/tests/tcg/hexagon/multi_result.c @@ -0,0 +1,282 @@ +/* + * Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see <http://www.gnu.org/licenses/>. + */ + +#include <stdio.h> + +static int sfrecipa(int Rs, int Rt, int *pred_result) +{ + int result; + int predval; + + asm volatile("%0,p0 = sfrecipa(%2, %3)\n\t" + "%1 = p0\n\t" + : "+r"(result), "=r"(predval) + : "r"(Rs), "r"(Rt) + : "p0"); + *pred_result = predval; + return result; +} + +static int sfinvsqrta(int Rs, int *pred_result) +{ + int result; + int predval; + + asm volatile("%0,p0 = sfinvsqrta(%2)\n\t" + "%1 = p0\n\t" + : "+r"(result), "=r"(predval) + : "r"(Rs) + : "p0"); + *pred_result = predval; + return result; +} + +static long long vacsh(long long Rxx, long long Rss, long long Rtt, + int *pred_result, int *ovf_result) +{ + long long result = Rxx; + int predval; + int usr; + + /* + * This instruction can set bit 0 (OVF/overflow) in usr + * Clear the bit first, then return that bit to the caller + */ + asm volatile("r2 = usr\n\t" + "r2 = clrbit(r2, #0)\n\t" /* clear overflow bit */ + "usr = r2\n\t" + "%0,p0 = vacsh(%3, %4)\n\t" + "%1 = p0\n\t" + "%2 = usr\n\t" + : "+r"(result), "=r"(predval), "=r"(usr) + : "r"(Rss), "r"(Rtt) + : "r2", "p0", "usr"); + *pred_result = predval; + *ovf_result = (usr & 1); + return result; +} + +static long long vminub(long long Rtt, long long Rss, + int *pred_result) +{ + long long result; + int predval; + + asm volatile("%0,p0 = vminub(%2, %3)\n\t" + "%1 = p0\n\t" + : "=r"(result), "=r"(predval) + : "r"(Rtt), "r"(Rss) + : "p0"); + *pred_result = predval; + return result; +} + +static long long add_carry(long long Rss, long long Rtt, + int pred_in, int *pred_result) +{ + long long result; + int predval = pred_in; + + asm volatile("p0 = %1\n\t" + "%0 = add(%2, %3, p0):carry\n\t" + "%1 = p0\n\t" + : "=r"(result), "+r"(predval) + : "r"(Rss), "r"(Rtt) + : "p0"); + *pred_result = predval; + return result; +} + +static long long sub_carry(long long Rss, long long Rtt, + int pred_in, int *pred_result) +{ + long long result; + int predval = pred_in; + + asm volatile("p0 = !cmp.eq(%1, #0)\n\t" + "%0 = sub(%2, %3, p0):carry\n\t" + "%1 = p0\n\t" + : "=r"(result), "+r"(predval) + : "r"(Rss), "r"(Rtt) + : "p0"); + *pred_result = predval; + return result; +} + +int err; + +static void check_ll(long long val, long long expect) +{ + if (val != expect) { + printf("ERROR: 0x%016llx != 0x%016llx\n", val, expect); + err++; + } +} + +static void check(int val, int expect) +{ + if (val != expect) { + printf("ERROR: 0x%08x != 0x%08x\n", val, expect); + err++; + } +} + +static void check_p(int val, int expect) +{ + if (val != expect) { + printf("ERROR: 0x%02x != 0x%02x\n", val, expect); + err++; + } +} + +static void test_sfrecipa() +{ + int res; + int pred_result; + + res = sfrecipa(0x04030201, 0x05060708, &pred_result); + check(res, 0x59f38001); + check_p(pred_result, 0x00); +} + +static void test_sfinvsqrta() +{ + int res; + int pred_result; + + res = sfinvsqrta(0x04030201, &pred_result); + check(res, 0x4d330000); + check_p(pred_result, 0xe0); + + res = sfinvsqrta(0x0, &pred_result); + check(res, 0x3f800000); + check_p(pred_result, 0x0); +} + +static void test_vacsh() +{ + long long res64; + int pred_result; + int ovf_result; + + res64 = vacsh(0x0004000300020001LL, + 0x0001000200030004LL, + 0x0000000000000000LL, &pred_result, &ovf_result); + check_ll(res64, 0x0004000300030004LL); + check_p(pred_result, 0xf0); + check(ovf_result, 0); + + res64 = vacsh(0x0004000300020001LL, + 0x0001000200030004LL, + 0x000affff000d0000LL, &pred_result, &ovf_result); + check_ll(res64, 0x000e0003000f0004LL); + check_p(pred_result, 0xcc); + check(ovf_result, 0); + + res64 = vacsh(0x00047fff00020001LL, + 0x00017fff00030004LL, + 0x000a0fff000d0000LL, &pred_result, &ovf_result); + check_ll(res64, 0x000e7fff000f0004LL); + check_p(pred_result, 0xfc); + check(ovf_result, 1); + + res64 = vacsh(0x0004000300020001LL, + 0x0001000200030009LL, + 0x000affff000d0001LL, &pred_result, &ovf_result); + check_ll(res64, 0x000e0003000f0008LL); + check_p(pred_result, 0xcc); + check(ovf_result, 0); +} + +static void test_vminub() +{ + long long res64; + int pred_result; + + res64 = vminub(0x0807060504030201LL, + 0x0102030405060708LL, + &pred_result); + check_ll(res64, 0x0102030404030201LL); + check_p(pred_result, 0xf0); + + res64 = vminub(0x0802060405030701LL, + 0x0107030504060208LL, + &pred_result); + check_ll(res64, 0x0102030404030201LL); + check_p(pred_result, 0xaa); +} + +static void test_add_carry() +{ + long long res64; + int pred_result; + + res64 = add_carry(0x0000000000000000LL, + 0xffffffffffffffffLL, + 1, &pred_result); + check_ll(res64, 0x0000000000000000LL); + check_p(pred_result, 0xff); + + res64 = add_carry(0x0000000100000000LL, + 0xffffffffffffffffLL, + 0, &pred_result); + check_ll(res64, 0x00000000ffffffffLL); + check_p(pred_result, 0xff); + + res64 = add_carry(0x0000000100000000LL, + 0xffffffffffffffffLL, + 0, &pred_result); + check_ll(res64, 0x00000000ffffffffLL); + check_p(pred_result, 0xff); +} + +static void test_sub_carry() +{ + long long res64; + int pred_result; + + res64 = sub_carry(0x0000000000000000LL, + 0x0000000000000000LL, + 1, &pred_result); + check_ll(res64, 0x0000000000000000LL); + check_p(pred_result, 0xff); + + res64 = sub_carry(0x0000000100000000LL, + 0x0000000000000000LL, + 0, &pred_result); + check_ll(res64, 0x00000000ffffffffLL); + check_p(pred_result, 0xff); + + res64 = sub_carry(0x0000000100000000LL, + 0x0000000000000000LL, + 0, &pred_result); + check_ll(res64, 0x00000000ffffffffLL); + check_p(pred_result, 0xff); +} + +int main() +{ + test_sfrecipa(); + test_sfinvsqrta(); + test_vacsh(); + test_vminub(); + test_add_carry(); + test_sub_carry(); + + puts(err ? "FAIL" : "PASS"); + return err; +} diff --git a/tests/tcg/lm32/Makefile b/tests/tcg/lm32/Makefile deleted file mode 100644 index 57e7363b2c..0000000000 --- a/tests/tcg/lm32/Makefile +++ /dev/null @@ -1,106 +0,0 @@ --include ../../../config-host.mak - -CROSS=lm32-elf- - -SIM = qemu-system-lm32 -SIMFLAGS = -M lm32-evr -nographic -semihosting -net none -kernel - -CC = $(CROSS)gcc -AS = $(CROSS)as -AS = $(CC) -x assembler -SIZE = $(CROSS)size -LD = $(CC) -OBJCOPY = $(CROSS)objcopy - -TSRC_PATH = $(SRC_PATH)/tests/tcg/lm32 - -LDFLAGS = -T$(TSRC_PATH)/linker.ld -ASFLAGS += -Wa,-I,$(TSRC_PATH)/ - -CRT = crt.o -HELPER = helper.o -TESTCASES += test_add.tst -TESTCASES += test_addi.tst -TESTCASES += test_and.tst -TESTCASES += test_andhi.tst -TESTCASES += test_andi.tst -TESTCASES += test_b.tst -TESTCASES += test_be.tst -TESTCASES += test_bg.tst -TESTCASES += test_bge.tst -TESTCASES += test_bgeu.tst -TESTCASES += test_bgu.tst -TESTCASES += test_bi.tst -TESTCASES += test_bne.tst -TESTCASES += test_break.tst -TESTCASES += test_bret.tst -TESTCASES += test_call.tst -TESTCASES += test_calli.tst -TESTCASES += test_cmpe.tst -TESTCASES += test_cmpei.tst -TESTCASES += test_cmpg.tst -TESTCASES += test_cmpgi.tst -TESTCASES += test_cmpge.tst -TESTCASES += test_cmpgei.tst -TESTCASES += test_cmpgeu.tst -TESTCASES += test_cmpgeui.tst -TESTCASES += test_cmpgu.tst -TESTCASES += test_cmpgui.tst -TESTCASES += test_cmpne.tst -TESTCASES += test_cmpnei.tst -TESTCASES += test_divu.tst -TESTCASES += test_eret.tst -TESTCASES += test_lb.tst -TESTCASES += test_lbu.tst -TESTCASES += test_lh.tst -TESTCASES += test_lhu.tst -TESTCASES += test_lw.tst -TESTCASES += test_modu.tst -TESTCASES += test_mul.tst -TESTCASES += test_muli.tst -TESTCASES += test_nor.tst -TESTCASES += test_nori.tst -TESTCASES += test_or.tst -TESTCASES += test_ori.tst -TESTCASES += test_orhi.tst -#TESTCASES += test_rcsr.tst -TESTCASES += test_ret.tst -TESTCASES += test_sb.tst -TESTCASES += test_scall.tst -TESTCASES += test_sextb.tst -TESTCASES += test_sexth.tst -TESTCASES += test_sh.tst -TESTCASES += test_sl.tst -TESTCASES += test_sli.tst -TESTCASES += test_sr.tst -TESTCASES += test_sri.tst -TESTCASES += test_sru.tst -TESTCASES += test_srui.tst -TESTCASES += test_sub.tst -TESTCASES += test_sw.tst -#TESTCASES += test_wcsr.tst -TESTCASES += test_xnor.tst -TESTCASES += test_xnori.tst -TESTCASES += test_xor.tst -TESTCASES += test_xori.tst - -all: build - -%.o: $(TSRC_PATH)/%.c - $(CC) $(CFLAGS) -c $< -o $@ - -%.o: $(TSRC_PATH)/%.S - $(AS) $(ASFLAGS) -c $< -o $@ - -%.tst: %.o $(TSRC_PATH)/macros.inc $(CRT) $(HELPER) - $(LD) $(LDFLAGS) $(NOSTDFLAGS) $(CRT) $(HELPER) $< -o $@ - -build: $(TESTCASES) - -check: $(TESTCASES:test_%.tst=check_%) - -check_%: test_%.tst - @$(SIM) $(SIMFLAGS) $< - -clean: - $(RM) -fr $(TESTCASES) $(CRT) $(HELPER) diff --git a/tests/tcg/lm32/crt.S b/tests/tcg/lm32/crt.S deleted file mode 100644 index fc437a3de1..0000000000 --- a/tests/tcg/lm32/crt.S +++ /dev/null @@ -1,84 +0,0 @@ -.text -.global _start - -_start: -_reset_handler: - xor r0, r0, r0 - mvhi r1, hi(_start) - ori r1, r1, lo(_start) - wcsr eba, r1 - wcsr deba, r1 - mvhi sp, hi(_fstack) - ori sp, sp, lo(_fstack) - bi _main - -_breakpoint_handler: - ori r25, r25, 1 - addi ra, ba, 4 - ret - nop - nop - nop - nop - nop - -_instruction_bus_error_handler: - ori r25, r25, 2 - addi ra, ea, 4 - ret - nop - nop - nop - nop - nop - -_watchpoint_handler: - ori r25, r25, 4 - addi ra, ba, 4 - ret - nop - nop - nop - nop - nop - -_data_bus_error_handler: - ori r25, r25, 8 - addi ra, ea, 4 - ret - nop - nop - nop - nop - nop - -_divide_by_zero_handler: - ori r25, r25, 16 - addi ra, ea, 4 - ret - nop - nop - nop - nop - nop - -_interrupt_handler: - ori r25, r25, 32 - addi ra, ea, 4 - ret - nop - nop - nop - nop - nop - -_system_call_handler: - ori r25, r25, 64 - addi ra, ea, 4 - ret - nop - nop - nop - nop - nop - diff --git a/tests/tcg/lm32/helper.S b/tests/tcg/lm32/helper.S deleted file mode 100644 index 3351d41e84..0000000000 --- a/tests/tcg/lm32/helper.S +++ /dev/null @@ -1,65 +0,0 @@ -.text -.global _start, _write, _exit -.global _tc_fail, _tc_pass - -_write: - addi sp, sp, -4 - sw (sp+4), r8 - mvi r8, 5 - scall - lw r8, (sp+4) - addi sp, sp, 4 - ret - -_exit: - mvi r8, 1 - scall -1: - bi 1b - -_tc_pass: -.data -1: - .ascii "OK\n" -2: -.text - addi sp, sp, -16 - sw (sp+4), ra - sw (sp+8), r1 - sw (sp+12), r2 - sw (sp+16), r3 - mvi r1, 1 - mvhi r2, hi(1b) - ori r2, r2, lo(1b) - mvi r3, (2b - 1b) - calli _write - lw r3, (sp+16) - lw r2, (sp+12) - lw r1, (sp+8) - lw ra, (sp+4) - addi sp, sp, 16 - ret - -_tc_fail: -.data -1: - .ascii "FAILED\n" -2: -.text - addi sp, sp, -16 - sw (sp+4), ra - sw (sp+8), r1 - sw (sp+12), r2 - sw (sp+16), r3 - sw (sp+4), ra - mvi r1, 1 - mvhi r2, hi(1b) - ori r2, r2, lo(1b) - mvi r3, (2b - 1b) - calli _write - lw r3, (sp+16) - lw r2, (sp+12) - lw r1, (sp+8) - lw ra, (sp+4) - addi sp, sp, 16 - ret diff --git a/tests/tcg/lm32/linker.ld b/tests/tcg/lm32/linker.ld deleted file mode 100644 index 52d43a4c74..0000000000 --- a/tests/tcg/lm32/linker.ld +++ /dev/null @@ -1,55 +0,0 @@ -OUTPUT_FORMAT("elf32-lm32") -ENTRY(_start) - -__DYNAMIC = 0; - -MEMORY { - ram : ORIGIN = 0x08000000, LENGTH = 0x04000000 /* 64M */ -} - -SECTIONS -{ - .text : - { - _ftext = .; - *(.text .stub .text.* .gnu.linkonce.t.*) - _etext = .; - } > ram - - .rodata : - { - . = ALIGN(4); - _frodata = .; - *(.rodata .rodata.* .gnu.linkonce.r.*) - *(.rodata1) - _erodata = .; - } > ram - - .data : - { - . = ALIGN(4); - _fdata = .; - *(.data .data.* .gnu.linkonce.d.*) - *(.data1) - _gp = ALIGN(16); - *(.sdata .sdata.* .gnu.linkonce.s.*) - _edata = .; - } > ram - - .bss : - { - . = ALIGN(4); - _fbss = .; - *(.dynsbss) - *(.sbss .sbss.* .gnu.linkonce.sb.*) - *(.scommon) - *(.dynbss) - *(.bss .bss.* .gnu.linkonce.b.*) - *(COMMON) - _ebss = .; - _end = .; - } > ram -} - -PROVIDE(_fstack = ORIGIN(ram) + LENGTH(ram) - 4); - diff --git a/tests/tcg/lm32/macros.inc b/tests/tcg/lm32/macros.inc deleted file mode 100644 index 360ad53c9f..0000000000 --- a/tests/tcg/lm32/macros.inc +++ /dev/null @@ -1,90 +0,0 @@ - -.equ MAX_TESTNAME_LEN, 32 -.macro test_name name - .data -tn_\name: - .ascii "\name" - .space MAX_TESTNAME_LEN - (. - tn_\name), ' ' - .text - .global \name -\name: - addi sp, sp, -12 - sw (sp+4), r1 - sw (sp+8), r2 - sw (sp+12), r3 - mvi r1, 1 - mvhi r2, hi(tn_\name) - ori r2, r2, lo(tn_\name) - mvi r3, MAX_TESTNAME_LEN - calli _write - lw r3, (sp+12) - lw r2, (sp+8) - lw r1, (sp+4) - addi sp, sp, 12 -.endm - -.macro load reg val - mvhi \reg, hi(\val) - ori \reg, \reg, lo(\val) -.endm - -.macro tc_pass - calli _tc_pass -.endm - -.macro tc_fail - addi r12, r12, 1 - calli _tc_fail -.endm - -.macro check_r3 val - mvhi r13, hi(\val) - ori r13, r13, lo(\val) - be r3, r13, 1f - tc_fail - bi 2f -1: - tc_pass -2: -.endm - -.macro check_mem adr val - mvhi r13, hi(\adr) - ori r13, r13, lo(\adr) - mvhi r14, hi(\val) - ori r14, r14, lo(\val) - lw r13, (r13+0) - be r13, r14, 1f - tc_fail - bi 2f -1: - tc_pass -2: -.endm - -.macro check_excp excp - andi r13, r25, \excp - bne r13, r0, 1f - tc_fail - bi 2f -1: - tc_pass -2: -.endm - -.macro start - .global _main - .text -_main: - mvi r12, 0 -.endm - -.macro end - mv r1, r12 - calli _exit -.endm - -# base + -# 0 ctrl -# 4 pass/fail -# 8 ptr to test name diff --git a/tests/tcg/lm32/test_add.S b/tests/tcg/lm32/test_add.S deleted file mode 100644 index 030ad197bb..0000000000 --- a/tests/tcg/lm32/test_add.S +++ /dev/null @@ -1,75 +0,0 @@ -.include "macros.inc" - -start - -test_name ADD_1 -mvi r1, 0 -mvi r2, 0 -add r3, r1, r2 -check_r3 0 - -test_name ADD_2 -mvi r1, 0 -mvi r2, 1 -add r3, r1, r2 -check_r3 1 - -test_name ADD_3 -mvi r1, 1 -mvi r2, 0 -add r3, r1, r2 -check_r3 1 - -test_name ADD_4 -mvi r1, 1 -mvi r2, -1 -add r3, r1, r2 -check_r3 0 - -test_name ADD_5 -mvi r1, -1 -mvi r2, 1 -add r3, r1, r2 -check_r3 0 - -test_name ADD_6 -mvi r1, -1 -mvi r2, 0 -add r3, r1, r2 -check_r3 -1 - -test_name ADD_7 -mvi r1, 0 -mvi r2, -1 -add r3, r1, r2 -check_r3 -1 - -test_name ADD_8 -mvi r3, 2 -add r3, r3, r3 -check_r3 4 - -test_name ADD_9 -mvi r1, 4 -mvi r3, 2 -add r3, r1, r3 -check_r3 6 - -test_name ADD_10 -mvi r1, 4 -mvi r3, 2 -add r3, r3, r1 -check_r3 6 - -test_name ADD_11 -mvi r1, 4 -add r3, r1, r1 -check_r3 8 - -test_name ADD_12 -load r1 0x12345678 -load r2 0xabcdef97 -add r3, r1, r2 -check_r3 0xbe02460f - -end diff --git a/tests/tcg/lm32/test_addi.S b/tests/tcg/lm32/test_addi.S deleted file mode 100644 index 68e766d1e5..0000000000 --- a/tests/tcg/lm32/test_addi.S +++ /dev/null @@ -1,56 +0,0 @@ -.include "macros.inc" - -start - -test_name ADDI_1 -mvi r1, 0 -addi r3, r1, 0 -check_r3 0 - -test_name ADDI_2 -mvi r1, 0 -addi r3, r1, 1 -check_r3 1 - -test_name ADDI_3 -mvi r1, 1 -addi r3, r1, 0 -check_r3 1 - -test_name ADDI_4 -mvi r1, 1 -addi r3, r1, -1 -check_r3 0 - -test_name ADDI_5 -mvi r1, -1 -addi r3, r1, 1 -check_r3 0 - -test_name ADDI_6 -mvi r1, -1 -addi r3, r1, 0 -check_r3 -1 - -test_name ADDI_7 -mvi r1, 0 -addi r3, r1, -1 -check_r3 -1 - -test_name ADDI_8 -mvi r3, 4 -addi r3, r3, 4 -check_r3 8 - -test_name ADDI_9 -mvi r3, 4 -addi r3, r3, -4 -check_r3 0 - -test_name ADDI_10 -mvi r3, 4 -addi r3, r3, -5 -check_r3 -1 - -end - diff --git a/tests/tcg/lm32/test_and.S b/tests/tcg/lm32/test_and.S deleted file mode 100644 index 80962ce7a2..0000000000 --- a/tests/tcg/lm32/test_and.S +++ /dev/null @@ -1,45 +0,0 @@ -.include "macros.inc" - -start - -test_name AND_1 -mvi r1, 0 -mvi r2, 0 -and r3, r1, r2 -check_r3 0 - -test_name AND_2 -mvi r1, 0 -mvi r2, 1 -and r3, r1, r2 -check_r3 0 - -test_name AND_3 -mvi r1, 1 -mvi r2, 1 -and r3, r1, r2 -check_r3 1 - -test_name AND_4 -mvi r3, 7 -and r3, r3, r3 -check_r3 7 - -test_name AND_5 -mvi r1, 7 -and r3, r1, r1 -check_r3 7 - -test_name AND_6 -mvi r1, 7 -mvi r3, 0 -and r3, r1, r3 -check_r3 0 - -test_name AND_7 -load r1 0xaa55aa55 -load r2 0x55aa55aa -and r3, r1, r2 -check_r3 0 - -end diff --git a/tests/tcg/lm32/test_andhi.S b/tests/tcg/lm32/test_andhi.S deleted file mode 100644 index 4f73af550b..0000000000 --- a/tests/tcg/lm32/test_andhi.S +++ /dev/null @@ -1,35 +0,0 @@ -.include "macros.inc" - -start - -test_name ANDHI_1 -mvi r1, 0 -andhi r3, r1, 0 -check_r3 0 - -test_name ANDHI_2 -mvi r1, 1 -andhi r3, r1, 1 -check_r3 0 - -test_name ANDHI_3 -load r1 0x000f0000 -andhi r3, r1, 1 -check_r3 0x00010000 - -test_name ANDHI_4 -load r1 0xffffffff -andhi r3, r1, 0xffff -check_r3 0xffff0000 - -test_name ANDHI_5 -load r1 0xffffffff -andhi r3, r1, 0 -check_r3 0 - -test_name ANDHI_6 -load r3 0x55aaffff -andhi r3, r3, 0xaaaa -check_r3 0x00aa0000 - -end diff --git a/tests/tcg/lm32/test_andi.S b/tests/tcg/lm32/test_andi.S deleted file mode 100644 index da1b0a32f7..0000000000 --- a/tests/tcg/lm32/test_andi.S +++ /dev/null @@ -1,35 +0,0 @@ -.include "macros.inc" - -start - -test_name ANDI_1 -mvi r1, 0 -andi r3, r1, 0 -check_r3 0 - -test_name ANDI_2 -mvi r1, 1 -andi r3, r1, 1 -check_r3 1 - -test_name ANDI_3 -load r1 0x000f0000 -andi r3, r1, 1 -check_r3 0 - -test_name ANDI_4 -load r1 0xffffffff -andi r3, r1, 0xffff -check_r3 0xffff - -test_name ANDI_5 -load r1 0xffffffff -andi r3, r1, 0 -check_r3 0 - -test_name ANDI_6 -load r3 0xffff55aa -andi r3, r3, 0xaaaa -check_r3 0x000000aa - -end diff --git a/tests/tcg/lm32/test_b.S b/tests/tcg/lm32/test_b.S deleted file mode 100644 index 98172d8a95..0000000000 --- a/tests/tcg/lm32/test_b.S +++ /dev/null @@ -1,13 +0,0 @@ -.include "macros.inc" - -start - -test_name B_1 -load r1 jump -b r1 -tc_fail -end - -jump: -tc_pass -end diff --git a/tests/tcg/lm32/test_be.S b/tests/tcg/lm32/test_be.S deleted file mode 100644 index 635cabacad..0000000000 --- a/tests/tcg/lm32/test_be.S +++ /dev/null @@ -1,48 +0,0 @@ -.include "macros.inc" - -start - -test_name BE_1 -mvi r1, 0 -mvi r2, 0 -be r1, r2, 1f -tc_fail -bi 2f -1: -tc_pass -2: - -test_name BE_2 -mvi r1, 1 -mvi r2, 0 -be r1, r2, 1f -tc_pass -bi 2f -1: -tc_fail -2: - -test_name BE_3 -mvi r1, 0 -mvi r2, 1 -be r1, r2, 1f -tc_pass -bi 2f -1: -tc_fail -2: - -bi 2f -1: -tc_pass -bi 3f -2: -test_name BE_4 -mvi r1, 1 -mvi r2, 1 -be r1, r2, 1b -tc_fail -3: - -end - diff --git a/tests/tcg/lm32/test_bg.S b/tests/tcg/lm32/test_bg.S deleted file mode 100644 index 81823c2304..0000000000 --- a/tests/tcg/lm32/test_bg.S +++ /dev/null @@ -1,78 +0,0 @@ -.include "macros.inc" - -start - -test_name BG_1 -mvi r1, 0 -mvi r2, 0 -bg r1, r2, 1f -tc_pass -bi 2f -1: -tc_fail -2: - -test_name BG_2 -mvi r1, 1 -mvi r2, 0 -bg r1, r2, 1f -tc_fail -bi 2f -1: -tc_pass -2: - -test_name BG_3 -mvi r1, 0 -mvi r2, 1 -bg r1, r2, 1f -tc_pass -bi 2f -1: -tc_fail -2: - -test_name BG_4 -mvi r1, 0 -mvi r2, -1 -bg r1, r2, 1f -tc_fail -bi 2f -1: -tc_pass -2: - -test_name BG_5 -mvi r1, -1 -mvi r2, 0 -bg r1, r2, 1f -tc_pass -bi 2f -1: -tc_fail -2: - -test_name BG_6 -mvi r1, -1 -mvi r2, -1 -bg r1, r2, 1f -tc_pass -bi 2f -1: -tc_fail -2: - -bi 2f -1: -tc_pass -bi 3f -2: -test_name BG_7 -mvi r1, 1 -mvi r2, 0 -bg r1, r2, 1b -tc_fail -3: - -end - diff --git a/tests/tcg/lm32/test_bge.S b/tests/tcg/lm32/test_bge.S deleted file mode 100644 index 6684d15a55..0000000000 --- a/tests/tcg/lm32/test_bge.S +++ /dev/null @@ -1,78 +0,0 @@ -.include "macros.inc" - -start - -test_name BGE_1 -mvi r1, 0 -mvi r2, 0 -bge r1, r2, 1f -tc_fail -bi 2f -1: -tc_pass -2: - -test_name BGE_2 -mvi r1, 1 -mvi r2, 0 -bge r1, r2, 1f -tc_fail -bi 2f -1: -tc_pass -2: - -test_name BGE_3 -mvi r1, 0 -mvi r2, 1 -bge r1, r2, 1f -tc_pass -bi 2f -1: -tc_fail -2: - -test_name BGE_4 -mvi r1, 0 -mvi r2, -1 -bge r1, r2, 1f -tc_fail -bi 2f -1: -tc_pass -2: - -test_name BGE_5 -mvi r1, -1 -mvi r2, 0 -bge r1, r2, 1f -tc_pass -bi 2f -1: -tc_fail -2: - -test_name BGE_6 -mvi r1, -1 -mvi r2, -1 -bge r1, r2, 1f -tc_fail -bi 2f -1: -tc_pass -2: - -bi 2f -1: -tc_pass -bi 3f -2: -test_name BGE_7 -mvi r1, 1 -mvi r2, 0 -bge r1, r2, 1b -tc_fail -3: - -end - diff --git a/tests/tcg/lm32/test_bgeu.S b/tests/tcg/lm32/test_bgeu.S deleted file mode 100644 index be440308fd..0000000000 --- a/tests/tcg/lm32/test_bgeu.S +++ /dev/null @@ -1,78 +0,0 @@ -.include "macros.inc" - -start - -test_name BGEU_1 -mvi r1, 0 -mvi r2, 0 -bgeu r1, r2, 1f -tc_fail -bi 2f -1: -tc_pass -2: - -test_name BGEU_2 -mvi r1, 1 -mvi r2, 0 -bgeu r1, r2, 1f -tc_fail -bi 2f -1: -tc_pass -2: - -test_name BGEU_3 -mvi r1, 0 -mvi r2, 1 -bgeu r1, r2, 1f -tc_pass -bi 2f -1: -tc_fail -2: - -test_name BGEU_4 -mvi r1, 0 -mvi r2, -1 -bgeu r1, r2, 1f -tc_pass -bi 2f -1: -tc_fail -2: - -test_name BGEU_5 -mvi r1, -1 -mvi r2, 0 -bgeu r1, r2, 1f -tc_fail -bi 2f -1: -tc_pass -2: - -test_name BGEU_6 -mvi r1, -1 -mvi r2, -1 -bgeu r1, r2, 1f -tc_fail -bi 2f -1: -tc_pass -2: - -bi 2f -1: -tc_pass -bi 3f -2: -test_name BGEU_7 -mvi r1, 1 -mvi r2, 0 -bgeu r1, r2, 1b -tc_fail -3: - -end - diff --git a/tests/tcg/lm32/test_bgu.S b/tests/tcg/lm32/test_bgu.S deleted file mode 100644 index 8cc695b310..0000000000 --- a/tests/tcg/lm32/test_bgu.S +++ /dev/null @@ -1,78 +0,0 @@ -.include "macros.inc" - -start - -test_name BGU_1 -mvi r1, 0 -mvi r2, 0 -bgu r1, r2, 1f -tc_pass -bi 2f -1: -tc_fail -2: - -test_name BGU_2 -mvi r1, 1 -mvi r2, 0 -bgu r1, r2, 1f -tc_fail -bi 2f -1: -tc_pass -2: - -test_name BGU_3 -mvi r1, 0 -mvi r2, 1 -bgu r1, r2, 1f -tc_pass -bi 2f -1: -tc_fail -2: - -test_name BGU_4 -mvi r1, 0 -mvi r2, -1 -bgu r1, r2, 1f -tc_pass -bi 2f -1: -tc_fail -2: - -test_name BGU_5 -mvi r1, -1 -mvi r2, 0 -bgu r1, r2, 1f -tc_fail -bi 2f -1: -tc_pass -2: - -test_name BGU_6 -mvi r1, -1 -mvi r2, -1 -bgu r1, r2, 1f -tc_pass -bi 2f -1: -tc_fail -2: - -bi 2f -1: -tc_pass -bi 3f -2: -test_name BGU_7 -mvi r1, 1 -mvi r2, 0 -bgu r1, r2, 1b -tc_fail -3: - -end - diff --git a/tests/tcg/lm32/test_bi.S b/tests/tcg/lm32/test_bi.S deleted file mode 100644 index a1fbd6fc07..0000000000 --- a/tests/tcg/lm32/test_bi.S +++ /dev/null @@ -1,23 +0,0 @@ -.include "macros.inc" - -start - -test_name BI_1 -bi jump -tc_fail -end - -jump_back: -tc_pass -end - -jump: -tc_pass - -test_name BI_2 -bi jump_back -tc_fail - -end - - diff --git a/tests/tcg/lm32/test_bne.S b/tests/tcg/lm32/test_bne.S deleted file mode 100644 index 871a006755..0000000000 --- a/tests/tcg/lm32/test_bne.S +++ /dev/null @@ -1,48 +0,0 @@ -.include "macros.inc" - -start - -test_name BNE_1 -mvi r1, 0 -mvi r2, 0 -bne r1, r2, 1f -tc_pass -bi 2f -1: -tc_fail -2: - -test_name BNE_2 -mvi r1, 1 -mvi r2, 0 -bne r1, r2, 1f -tc_fail -bi 2f -1: -tc_pass -2: - -test_name BNE_3 -mvi r1, 0 -mvi r2, 1 -bne r1, r2, 1f -tc_fail -bi 2f -1: -tc_pass -2: - -bi 2f -1: -tc_fail -bi 3f -2: -test_name BNE_4 -mvi r1, 1 -mvi r2, 1 -bne r1, r2, 1b -tc_pass -3: - -end - diff --git a/tests/tcg/lm32/test_break.S b/tests/tcg/lm32/test_break.S deleted file mode 100644 index 0384fc6128..0000000000 --- a/tests/tcg/lm32/test_break.S +++ /dev/null @@ -1,20 +0,0 @@ -.include "macros.inc" - -start - -test_name BREAK_1 -mvi r1, 1 -wcsr IE, r1 -insn: -break -check_excp 1 - -test_name BREAK_2 -mv r3, ba -check_r3 insn - -test_name BREAK_3 -rcsr r3, IE -check_r3 4 - -end diff --git a/tests/tcg/lm32/test_bret.S b/tests/tcg/lm32/test_bret.S deleted file mode 100644 index 645210e434..0000000000 --- a/tests/tcg/lm32/test_bret.S +++ /dev/null @@ -1,38 +0,0 @@ -.include "macros.inc" - -start - -test_name BRET_1 -mvi r1, 4 -wcsr IE, r1 -load ba mark -bret -tc_fail -bi 1f - -mark: -tc_pass - -1: -test_name BRET_2 -rcsr r3, IE -check_r3 5 - -test_name BRET_3 -mvi r1, 0 -wcsr IE, r1 -load ba mark2 -bret -tc_fail -bi 1f - -mark2: -tc_pass - -1: -test_name BRET_4 -rcsr r3, IE -check_r3 0 - -end - diff --git a/tests/tcg/lm32/test_call.S b/tests/tcg/lm32/test_call.S deleted file mode 100644 index 1b91a5f2be..0000000000 --- a/tests/tcg/lm32/test_call.S +++ /dev/null @@ -1,16 +0,0 @@ -.include "macros.inc" - -start - -test_name CALL_1 -load r1 mark -call r1 -return: - -tc_fail -end - -mark: -mv r3, ra -check_r3 return -end diff --git a/tests/tcg/lm32/test_calli.S b/tests/tcg/lm32/test_calli.S deleted file mode 100644 index 1d87ae6e21..0000000000 --- a/tests/tcg/lm32/test_calli.S +++ /dev/null @@ -1,15 +0,0 @@ -.include "macros.inc" - -start - -test_name CALLI_1 -calli mark -return: - -tc_fail -end - -mark: -mv r3, ra -check_r3 return -end diff --git a/tests/tcg/lm32/test_cmpe.S b/tests/tcg/lm32/test_cmpe.S deleted file mode 100644 index 60a885500b..0000000000 --- a/tests/tcg/lm32/test_cmpe.S +++ /dev/null @@ -1,40 +0,0 @@ -.include "macros.inc" - -start - -test_name CMPE_1 -mvi r1, 0 -mvi r2, 0 -cmpe r3, r1, r2 -check_r3 1 - -test_name CMPE_2 -mvi r1, 0 -mvi r2, 1 -cmpe r3, r1, r2 -check_r3 0 - -test_name CMPE_3 -mvi r1, 1 -mvi r2, 0 -cmpe r3, r1, r2 -check_r3 0 - -test_name CMPE_4 -mvi r3, 0 -mvi r2, 1 -cmpe r3, r3, r2 -check_r3 0 - -test_name CMPE_5 -mvi r3, 0 -mvi r2, 0 -cmpe r3, r3, r2 -check_r3 1 - -test_name CMPE_6 -mvi r3, 0 -cmpe r3, r3, r3 -check_r3 1 - -end diff --git a/tests/tcg/lm32/test_cmpei.S b/tests/tcg/lm32/test_cmpei.S deleted file mode 100644 index c3d3566ad3..0000000000 --- a/tests/tcg/lm32/test_cmpei.S +++ /dev/null @@ -1,35 +0,0 @@ -.include "macros.inc" - -start - -test_name CMPEI_1 -mvi r1, 0 -cmpei r3, r1, 0 -check_r3 1 - -test_name CMPEI_2 -mvi r1, 0 -cmpei r3, r1, 1 -check_r3 0 - -test_name CMPEI_3 -mvi r1, 1 -cmpei r3, r1, 0 -check_r3 0 - -test_name CMPEI_4 -load r1 0xffffffff -cmpei r3, r1, -1 -check_r3 1 - -test_name CMPEI_5 -mvi r3, 0 -cmpei r3, r3, 0 -check_r3 1 - -test_name CMPEI_6 -mvi r3, 0 -cmpei r3, r3, 1 -check_r3 0 - -end diff --git a/tests/tcg/lm32/test_cmpg.S b/tests/tcg/lm32/test_cmpg.S deleted file mode 100644 index 012407874c..0000000000 --- a/tests/tcg/lm32/test_cmpg.S +++ /dev/null @@ -1,64 +0,0 @@ -.include "macros.inc" - -start - -test_name CMPG_1 -mvi r1, 0 -mvi r2, 0 -cmpg r3, r1, r2 -check_r3 0 - -test_name CMPG_2 -mvi r1, 0 -mvi r2, 1 -cmpg r3, r1, r2 -check_r3 0 - -test_name CMPG_3 -mvi r1, 1 -mvi r2, 0 -cmpg r3, r1, r2 -check_r3 1 - -test_name CMPG_4 -mvi r1, 1 -mvi r2, 1 -cmpg r3, r1, r2 -check_r3 0 - -test_name CMPG_5 -mvi r1, 0 -mvi r2, -1 -cmpg r3, r1, r2 -check_r3 1 - -test_name CMPG_6 -mvi r1, -1 -mvi r2, 0 -cmpg r3, r1, r2 -check_r3 0 - -test_name CMPG_7 -mvi r1, -1 -mvi r2, -1 -cmpg r3, r1, r2 -check_r3 0 - -test_name CMPG_8 -mvi r3, 0 -mvi r2, 1 -cmpg r3, r3, r2 -check_r3 0 - -test_name CMPG_9 -mvi r3, 1 -mvi r2, 0 -cmpg r3, r3, r2 -check_r3 1 - -test_name CMPG_10 -mvi r3, 0 -cmpg r3, r3, r3 -check_r3 0 - -end diff --git a/tests/tcg/lm32/test_cmpge.S b/tests/tcg/lm32/test_cmpge.S deleted file mode 100644 index 84620a00e3..0000000000 --- a/tests/tcg/lm32/test_cmpge.S +++ /dev/null @@ -1,64 +0,0 @@ -.include "macros.inc" - -start - -test_name CMPGE_1 -mvi r1, 0 -mvi r2, 0 -cmpge r3, r1, r2 -check_r3 1 - -test_name CMPGE_2 -mvi r1, 0 -mvi r2, 1 -cmpge r3, r1, r2 -check_r3 0 - -test_name CMPGE_3 -mvi r1, 1 -mvi r2, 0 -cmpge r3, r1, r2 -check_r3 1 - -test_name CMPGE_4 -mvi r1, 1 -mvi r2, 1 -cmpge r3, r1, r2 -check_r3 1 - -test_name CMPGE_5 -mvi r1, 0 -mvi r2, -1 -cmpge r3, r1, r2 -check_r3 1 - -test_name CMPGE_6 -mvi r1, -1 -mvi r2, 0 -cmpge r3, r1, r2 -check_r3 0 - -test_name CMPGE_7 -mvi r1, -1 -mvi r2, -1 -cmpge r3, r1, r2 -check_r3 1 - -test_name CMPGE_8 -mvi r3, 0 -mvi r2, 1 -cmpge r3, r3, r2 -check_r3 0 - -test_name CMPGE_9 -mvi r3, 1 -mvi r2, 0 -cmpge r3, r3, r2 -check_r3 1 - -test_name CMPGE_10 -mvi r3, 0 -cmpge r3, r3, r3 -check_r3 1 - -end diff --git a/tests/tcg/lm32/test_cmpgei.S b/tests/tcg/lm32/test_cmpgei.S deleted file mode 100644 index 6e388a2a35..0000000000 --- a/tests/tcg/lm32/test_cmpgei.S +++ /dev/null @@ -1,70 +0,0 @@ -.include "macros.inc" - -start - -test_name CMPGEI_1 -mvi r1, 0 -cmpgei r3, r1, 0 -check_r3 1 - -test_name CMPGEI_2 -mvi r1, 0 -cmpgei r3, r1, 1 -check_r3 0 - -test_name CMPGEI_3 -mvi r1, 1 -cmpgei r3, r1, 0 -check_r3 1 - -test_name CMPGEI_4 -mvi r1, 1 -cmpgei r3, r1, 1 -check_r3 1 - -test_name CMPGEI_5 -mvi r1, 0 -cmpgei r3, r1, -1 -check_r3 1 - -test_name CMPGEI_6 -mvi r1, -1 -cmpgei r3, r1, 0 -check_r3 0 - -test_name CMPGEI_7 -mvi r1, -1 -cmpgei r3, r1, -1 -check_r3 1 - -test_name CMPGEI_8 -mvi r3, 0 -cmpgei r3, r3, 1 -check_r3 0 - -test_name CMPGEI_9 -mvi r3, 1 -cmpgei r3, r3, 0 -check_r3 1 - -test_name CMPGEI_10 -mvi r3, 0 -cmpgei r3, r3, 0 -check_r3 1 - -test_name CMPGEI_11 -mvi r1, 0 -cmpgei r3, r1, -32768 -check_r3 1 - -test_name CMPGEI_12 -mvi r1, -1 -cmpgei r3, r1, -32768 -check_r3 1 - -test_name CMPGEI_13 -mvi r1, -32768 -cmpgei r3, r1, -32768 -check_r3 1 - -end diff --git a/tests/tcg/lm32/test_cmpgeu.S b/tests/tcg/lm32/test_cmpgeu.S deleted file mode 100644 index 2110ccb6b7..0000000000 --- a/tests/tcg/lm32/test_cmpgeu.S +++ /dev/null @@ -1,64 +0,0 @@ -.include "macros.inc" - -start - -test_name CMPGEU_1 -mvi r1, 0 -mvi r2, 0 -cmpgeu r3, r1, r2 -check_r3 1 - -test_name CMPGEU_2 -mvi r1, 0 -mvi r2, 1 -cmpgeu r3, r1, r2 -check_r3 0 - -test_name CMPGEU_3 -mvi r1, 1 -mvi r2, 0 -cmpgeu r3, r1, r2 -check_r3 1 - -test_name CMPGEU_4 -mvi r1, 1 -mvi r2, 1 -cmpgeu r3, r1, r2 -check_r3 1 - -test_name CMPGEU_5 -mvi r1, 0 -mvi r2, -1 -cmpgeu r3, r1, r2 -check_r3 0 - -test_name CMPGEU_6 -mvi r1, -1 -mvi r2, 0 -cmpgeu r3, r1, r2 -check_r3 1 - -test_name CMPGEU_7 -mvi r1, -1 -mvi r2, -1 -cmpgeu r3, r1, r2 -check_r3 1 - -test_name CMPGEU_8 -mvi r3, 0 -mvi r2, 1 -cmpgeu r3, r3, r2 -check_r3 0 - -test_name CMPGEU_9 -mvi r3, 1 -mvi r2, 0 -cmpgeu r3, r3, r2 -check_r3 1 - -test_name CMPGEU_10 -mvi r3, 0 -cmpgeu r3, r3, r3 -check_r3 1 - -end diff --git a/tests/tcg/lm32/test_cmpgeui.S b/tests/tcg/lm32/test_cmpgeui.S deleted file mode 100644 index 3866d96cb7..0000000000 --- a/tests/tcg/lm32/test_cmpgeui.S +++ /dev/null @@ -1,70 +0,0 @@ -.include "macros.inc" - -start - -test_name CMPGEUI_1 -mvi r1, 0 -cmpgeui r3, r1, 0 -check_r3 1 - -test_name CMPGEUI_2 -mvi r1, 0 -cmpgeui r3, r1, 1 -check_r3 0 - -test_name CMPGEUI_3 -mvi r1, 1 -cmpgeui r3, r1, 0 -check_r3 1 - -test_name CMPGEUI_4 -mvi r1, 1 -cmpgeui r3, r1, 1 -check_r3 1 - -test_name CMPGEUI_5 -mvi r1, 0 -cmpgeui r3, r1, 0xffff -check_r3 0 - -test_name CMPGEUI_6 -mvi r1, -1 -cmpgeui r3, r1, 0 -check_r3 1 - -test_name CMPGEUI_7 -mvi r1, -1 -cmpgeui r3, r1, 0xffff -check_r3 1 - -test_name CMPGEUI_8 -mvi r3, 0 -cmpgeui r3, r3, 1 -check_r3 0 - -test_name CMPGEUI_9 -mvi r3, 1 -cmpgeui r3, r3, 0 -check_r3 1 - -test_name CMPGEUI_10 -mvi r3, 0 -cmpgeui r3, r3, 0 -check_r3 1 - -test_name CMPGEUI_11 -mvi r1, 0 -cmpgeui r3, r1, 0x8000 -check_r3 0 - -test_name CMPGEUI_12 -mvi r1, -1 -cmpgeui r3, r1, 0x8000 -check_r3 1 - -test_name CMPGEUI_13 -ori r1, r0, 0x8000 -cmpgeui r3, r1, 0x8000 -check_r3 1 - -end diff --git a/tests/tcg/lm32/test_cmpgi.S b/tests/tcg/lm32/test_cmpgi.S deleted file mode 100644 index 21695f97ab..0000000000 --- a/tests/tcg/lm32/test_cmpgi.S +++ /dev/null @@ -1,70 +0,0 @@ -.include "macros.inc" - -start - -test_name CMPGI_1 -mvi r1, 0 -cmpgi r3, r1, 0 -check_r3 0 - -test_name CMPGI_2 -mvi r1, 0 -cmpgi r3, r1, 1 -check_r3 0 - -test_name CMPGI_3 -mvi r1, 1 -cmpgi r3, r1, 0 -check_r3 1 - -test_name CMPGI_4 -mvi r1, 1 -cmpgi r3, r1, 1 -check_r3 0 - -test_name CMPGI_5 -mvi r1, 0 -cmpgi r3, r1, -1 -check_r3 1 - -test_name CMPGI_6 -mvi r1, -1 -cmpgi r3, r1, 0 -check_r3 0 - -test_name CMPGI_7 -mvi r1, -1 -cmpgi r3, r1, -1 -check_r3 0 - -test_name CMPGI_8 -mvi r3, 0 -cmpgi r3, r3, 1 -check_r3 0 - -test_name CMPGI_9 -mvi r3, 1 -cmpgi r3, r3, 0 -check_r3 1 - -test_name CMPGI_10 -mvi r3, 0 -cmpgi r3, r3, 0 -check_r3 0 - -test_name CMPGI_11 -mvi r1, 0 -cmpgi r3, r1, -32768 -check_r3 1 - -test_name CMPGI_12 -mvi r1, -1 -cmpgi r3, r1, -32768 -check_r3 1 - -test_name CMPGI_13 -mvi r1, -32768 -cmpgi r3, r1, -32768 -check_r3 0 - -end diff --git a/tests/tcg/lm32/test_cmpgu.S b/tests/tcg/lm32/test_cmpgu.S deleted file mode 100644 index dd465471ea..0000000000 --- a/tests/tcg/lm32/test_cmpgu.S +++ /dev/null @@ -1,64 +0,0 @@ -.include "macros.inc" - -start - -test_name CMPGU_1 -mvi r1, 0 -mvi r2, 0 -cmpgu r3, r1, r2 -check_r3 0 - -test_name CMPGU_2 -mvi r1, 0 -mvi r2, 1 -cmpgu r3, r1, r2 -check_r3 0 - -test_name CMPGU_3 -mvi r1, 1 -mvi r2, 0 -cmpgu r3, r1, r2 -check_r3 1 - -test_name CMPGU_4 -mvi r1, 1 -mvi r2, 1 -cmpgu r3, r1, r2 -check_r3 0 - -test_name CMPGU_5 -mvi r1, 0 -mvi r2, -1 -cmpgu r3, r1, r2 -check_r3 0 - -test_name CMPGU_6 -mvi r1, -1 -mvi r2, 0 -cmpgu r3, r1, r2 -check_r3 1 - -test_name CMPGU_7 -mvi r1, -1 -mvi r2, -1 -cmpgu r3, r1, r2 -check_r3 0 - -test_name CMPGU_8 -mvi r3, 0 -mvi r2, 1 -cmpgu r3, r3, r2 -check_r3 0 - -test_name CMPGU_9 -mvi r3, 1 -mvi r2, 0 -cmpgu r3, r3, r2 -check_r3 1 - -test_name CMPGU_10 -mvi r3, 0 -cmpgu r3, r3, r3 -check_r3 0 - -end diff --git a/tests/tcg/lm32/test_cmpgui.S b/tests/tcg/lm32/test_cmpgui.S deleted file mode 100644 index dd94001492..0000000000 --- a/tests/tcg/lm32/test_cmpgui.S +++ /dev/null @@ -1,70 +0,0 @@ -.include "macros.inc" - -start - -test_name CMPGUI_1 -mvi r1, 0 -cmpgui r3, r1, 0 -check_r3 0 - -test_name CMPGUI_2 -mvi r1, 0 -cmpgui r3, r1, 1 -check_r3 0 - -test_name CMPGUI_3 -mvi r1, 1 -cmpgui r3, r1, 0 -check_r3 1 - -test_name CMPGUI_4 -mvi r1, 1 -cmpgui r3, r1, 1 -check_r3 0 - -test_name CMPGUI_5 -mvi r1, 0 -cmpgui r3, r1, 0xffff -check_r3 0 - -test_name CMPGUI_6 -mvi r1, -1 -cmpgui r3, r1, 0 -check_r3 1 - -test_name CMPGUI_7 -mvi r1, -1 -cmpgui r3, r1, 0xffff -check_r3 1 - -test_name CMPGUI_8 -mvi r3, 0 -cmpgui r3, r3, 1 -check_r3 0 - -test_name CMPGUI_9 -mvi r3, 1 -cmpgui r3, r3, 0 -check_r3 1 - -test_name CMPGUI_10 -mvi r3, 0 -cmpgui r3, r3, 0 -check_r3 0 - -test_name CMPGUI_11 -mvi r1, 0 -cmpgui r3, r1, 0x8000 -check_r3 0 - -test_name CMPGUI_12 -mvi r1, -1 -cmpgui r3, r1, 0x8000 -check_r3 1 - -test_name CMPGUI_13 -ori r1, r0, 0x8000 -cmpgui r3, r1, 0x8000 -check_r3 0 - -end diff --git a/tests/tcg/lm32/test_cmpne.S b/tests/tcg/lm32/test_cmpne.S deleted file mode 100644 index 0f1078114c..0000000000 --- a/tests/tcg/lm32/test_cmpne.S +++ /dev/null @@ -1,40 +0,0 @@ -.include "macros.inc" - -start - -test_name CMPNE_1 -mvi r1, 0 -mvi r2, 0 -cmpne r3, r1, r2 -check_r3 0 - -test_name CMPNE_2 -mvi r1, 0 -mvi r2, 1 -cmpne r3, r1, r2 -check_r3 1 - -test_name CMPNE_3 -mvi r1, 1 -mvi r2, 0 -cmpne r3, r1, r2 -check_r3 1 - -test_name CMPNE_4 -mvi r3, 0 -mvi r2, 1 -cmpne r3, r3, r2 -check_r3 1 - -test_name CMPNE_5 -mvi r3, 0 -mvi r2, 0 -cmpne r3, r3, r2 -check_r3 0 - -test_name CMPNE_6 -mvi r3, 0 -cmpne r3, r3, r3 -check_r3 0 - -end diff --git a/tests/tcg/lm32/test_cmpnei.S b/tests/tcg/lm32/test_cmpnei.S deleted file mode 100644 index 060dd9d394..0000000000 --- a/tests/tcg/lm32/test_cmpnei.S +++ /dev/null @@ -1,35 +0,0 @@ -.include "macros.inc" - -start - -test_name CMPNEI_1 -mvi r1, 0 -cmpnei r3, r1, 0 -check_r3 0 - -test_name CMPNEI_2 -mvi r1, 0 -cmpnei r3, r1, 1 -check_r3 1 - -test_name CMPNEI_3 -mvi r1, 1 -cmpnei r3, r1, 0 -check_r3 1 - -test_name CMPNEI_4 -load r1 0xffffffff -cmpnei r3, r1, -1 -check_r3 0 - -test_name CMPNEI_5 -mvi r3, 0 -cmpnei r3, r3, 0 -check_r3 0 - -test_name CMPNEI_6 -mvi r3, 0 -cmpnei r3, r3, 1 -check_r3 1 - -end diff --git a/tests/tcg/lm32/test_divu.S b/tests/tcg/lm32/test_divu.S deleted file mode 100644 index f381d095c5..0000000000 --- a/tests/tcg/lm32/test_divu.S +++ /dev/null @@ -1,29 +0,0 @@ -.include "macros.inc" - -start - -test_name DIVU_1 -mvi r1, 0 -mvi r2, 1 -divu r3, r1, r2 -check_r3 0 - -test_name DIVU_2 -mvi r1, 1 -mvi r2, 1 -divu r3, r1, r2 -check_r3 1 - -test_name DIVU_3 -mvi r1, 0 -mvi r2, 0 -divu r3, r1, r2 -check_excp 16 - -test_name DIVU_4 -load r1 0xabcdef12 -load r2 0x12345 -divu r3, r1, r2 -check_r3 0x9700 - -end diff --git a/tests/tcg/lm32/test_eret.S b/tests/tcg/lm32/test_eret.S deleted file mode 100644 index 6830bd1abf..0000000000 --- a/tests/tcg/lm32/test_eret.S +++ /dev/null @@ -1,38 +0,0 @@ -.include "macros.inc" - -start - -test_name ERET_1 -mvi r1, 2 -wcsr IE, r1 -load ea mark -eret -tc_fail -bi 1f - -mark: -tc_pass - -1: -test_name ERET_2 -rcsr r3, IE -check_r3 3 - -test_name ERET_3 -mvi r1, 0 -wcsr IE, r1 -load ea mark2 -eret -tc_fail -bi 1f - -mark2: -tc_pass - -1: -test_name ERET_4 -rcsr r3, IE -check_r3 0 - -end - diff --git a/tests/tcg/lm32/test_lb.S b/tests/tcg/lm32/test_lb.S deleted file mode 100644 index d677eea4c4..0000000000 --- a/tests/tcg/lm32/test_lb.S +++ /dev/null @@ -1,49 +0,0 @@ -.include "macros.inc" - -start - -test_name LB_1 -load r1 data -lb r3, (r1+0) -check_r3 0x7e - -test_name LB_2 -load r1 data -lb r3, (r1+1) -check_r3 0x7f - -test_name LB_3 -load r1 data -lb r3, (r1+-1) -check_r3 0x7d - -test_name LB_4 -load r1 data_msb -lb r3, (r1+0) -check_r3 0xfffffffe - -test_name LB_5 -load r1 data_msb -lb r3, (r1+1) -check_r3 0xffffffff - -test_name LB_6 -load r1 data_msb -lb r3, (r1+-1) -check_r3 0xfffffffd - -test_name LB_7 -load r3 data -lb r3, (r3+0) -check_r3 0x7e - -end - -.data - .align 4 - .byte 0x7a, 0x7b, 0x7c, 0x7d -data: - .byte 0x7e, 0x7f, 0x70, 0x71 - .byte 0xfa, 0xfb, 0xfc, 0xfd -data_msb: - .byte 0xfe, 0xff, 0xf0, 0xf1 diff --git a/tests/tcg/lm32/test_lbu.S b/tests/tcg/lm32/test_lbu.S deleted file mode 100644 index dc5d5f67d3..0000000000 --- a/tests/tcg/lm32/test_lbu.S +++ /dev/null @@ -1,49 +0,0 @@ -.include "macros.inc" - -start - -test_name LBU_1 -load r1 data -lbu r3, (r1+0) -check_r3 0x7e - -test_name LBU_2 -load r1 data -lbu r3, (r1+1) -check_r3 0x7f - -test_name LBU_3 -load r1 data -lbu r3, (r1+-1) -check_r3 0x7d - -test_name LBU_4 -load r1 data_msb -lbu r3, (r1+0) -check_r3 0xfe - -test_name LBU_5 -load r1 data_msb -lbu r3, (r1+1) -check_r3 0xff - -test_name LBU_6 -load r1 data_msb -lbu r3, (r1+-1) -check_r3 0xfd - -test_name LBU_7 -load r3 data -lbu r3, (r3+0) -check_r3 0x7e - -end - -.data - .align 4 - .byte 0x7a, 0x7b, 0x7c, 0x7d -data: - .byte 0x7e, 0x7f, 0x70, 0x71 - .byte 0xfa, 0xfb, 0xfc, 0xfd -data_msb: - .byte 0xfe, 0xff, 0xf0, 0xf1 diff --git a/tests/tcg/lm32/test_lh.S b/tests/tcg/lm32/test_lh.S deleted file mode 100644 index 397996bddd..0000000000 --- a/tests/tcg/lm32/test_lh.S +++ /dev/null @@ -1,49 +0,0 @@ -.include "macros.inc" - -start - -test_name LH_1 -load r1 data -lh r3, (r1+0) -check_r3 0x7e7f - -test_name LH_2 -load r1 data -lh r3, (r1+2) -check_r3 0x7071 - -test_name LH_3 -load r1 data -lh r3, (r1+-2) -check_r3 0x7c7d - -test_name LH_4 -load r1 data_msb -lh r3, (r1+0) -check_r3 0xfffffeff - -test_name LH_5 -load r1 data_msb -lh r3, (r1+2) -check_r3 0xfffff0f1 - -test_name LH_6 -load r1 data_msb -lh r3, (r1+-2) -check_r3 0xfffffcfd - -test_name LH_7 -load r3 data -lh r3, (r3+0) -check_r3 0x7e7f - -end - -.data - .align 4 - .byte 0x7a, 0x7b, 0x7c, 0x7d -data: - .byte 0x7e, 0x7f, 0x70, 0x71 - .byte 0xfa, 0xfb, 0xfc, 0xfd -data_msb: - .byte 0xfe, 0xff, 0xf0, 0xf1 diff --git a/tests/tcg/lm32/test_lhu.S b/tests/tcg/lm32/test_lhu.S deleted file mode 100644 index 8de7c52560..0000000000 --- a/tests/tcg/lm32/test_lhu.S +++ /dev/null @@ -1,49 +0,0 @@ -.include "macros.inc" - -start - -test_name LHU_1 -load r1 data -lhu r3, (r1+0) -check_r3 0x7e7f - -test_name LHU_2 -load r1 data -lhu r3, (r1+2) -check_r3 0x7071 - -test_name LHU_3 -load r1 data -lhu r3, (r1+-2) -check_r3 0x7c7d - -test_name LHU_4 -load r1 data_msb -lhu r3, (r1+0) -check_r3 0xfeff - -test_name LHU_5 -load r1 data_msb -lhu r3, (r1+2) -check_r3 0xf0f1 - -test_name LHU_6 -load r1 data_msb -lhu r3, (r1+-2) -check_r3 0xfcfd - -test_name LHU_7 -load r3 data -lhu r3, (r3+0) -check_r3 0x7e7f - -end - -.data - .align 4 - .byte 0x7a, 0x7b, 0x7c, 0x7d -data: - .byte 0x7e, 0x7f, 0x70, 0x71 - .byte 0xfa, 0xfb, 0xfc, 0xfd -data_msb: - .byte 0xfe, 0xff, 0xf0, 0xf1 diff --git a/tests/tcg/lm32/test_lw.S b/tests/tcg/lm32/test_lw.S deleted file mode 100644 index 996e5f8c88..0000000000 --- a/tests/tcg/lm32/test_lw.S +++ /dev/null @@ -1,32 +0,0 @@ -.include "macros.inc" - -start - -test_name LW_1 -load r1 data -lw r3, (r1+0) -check_r3 0x7e7f7071 - -test_name LW_2 -load r1 data -lw r3, (r1+4) -check_r3 0x72737475 - -test_name LW_3 -load r1 data -lw r3, (r1+-4) -check_r3 0x7a7b7c7d - -test_name LW_4 -load r3 data -lw r3, (r3+0) -check_r3 0x7e7f7071 - -end - -.data - .align 4 - .byte 0x7a, 0x7b, 0x7c, 0x7d -data: - .byte 0x7e, 0x7f, 0x70, 0x71 - .byte 0x72, 0x73, 0x74, 0x75 diff --git a/tests/tcg/lm32/test_modu.S b/tests/tcg/lm32/test_modu.S deleted file mode 100644 index 42486900b4..0000000000 --- a/tests/tcg/lm32/test_modu.S +++ /dev/null @@ -1,35 +0,0 @@ -.include "macros.inc" - -start - -test_name MODU_1 -mvi r1, 0 -mvi r2, 1 -modu r3, r1, r2 -check_r3 0 - -test_name MODU_2 -mvi r1, 1 -mvi r2, 1 -modu r3, r1, r2 -check_r3 0 - -test_name MODU_3 -mvi r1, 3 -mvi r2, 2 -modu r3, r1, r2 -check_r3 1 - -test_name MODU_4 -mvi r1, 0 -mvi r2, 0 -modu r3, r1, r2 -check_excp 16 - -test_name MODU_5 -load r1 0xabcdef12 -load r2 0x12345 -modu r3, r1, r2 -check_r3 0x3c12 - -end diff --git a/tests/tcg/lm32/test_mul.S b/tests/tcg/lm32/test_mul.S deleted file mode 100644 index e9b937e648..0000000000 --- a/tests/tcg/lm32/test_mul.S +++ /dev/null @@ -1,70 +0,0 @@ -.include "macros.inc" - -start - -test_name MUL_1 -mvi r1, 0 -mvi r2, 0 -mul r3, r1, r2 -check_r3 0 - -test_name MUL_2 -mvi r1, 1 -mvi r2, 0 -mul r3, r1, r2 -check_r3 0 - -test_name MUL_3 -mvi r1, 0 -mvi r2, 1 -mul r3, r1, r2 -check_r3 0 - -test_name MUL_4 -mvi r1, 1 -mvi r2, 1 -mul r3, r1, r2 -check_r3 1 - -test_name MUL_5 -mvi r1, 2 -mvi r2, -1 -mul r3, r1, r2 -check_r3 -2 - -test_name MUL_6 -mvi r1, -2 -mvi r2, -1 -mul r3, r1, r2 -check_r3 2 - -test_name MUL_7 -mvi r1, 0x1234 -mvi r2, 0x789 -mul r3, r1, r2 -check_r3 0x8929d4 - -test_name MUL_8 -mvi r3, 4 -mul r3, r3, r3 -check_r3 16 - -test_name MUL_9 -mvi r2, 2 -mvi r3, 4 -mul r3, r3, r2 -check_r3 8 - -test_name MUL_10 -load r1 0x12345678 -load r2 0x7bcdef12 -mul r3, r1, r2 -check_r3 0xa801c70 - -test_name MUL_11 -load r1 0x12345678 -load r2 0xabcdef12 -mul r3, r1, r2 -check_r3 0x8a801c70 - -end diff --git a/tests/tcg/lm32/test_muli.S b/tests/tcg/lm32/test_muli.S deleted file mode 100644 index d6dd4a0f7e..0000000000 --- a/tests/tcg/lm32/test_muli.S +++ /dev/null @@ -1,45 +0,0 @@ -.include "macros.inc" - -start - -test_name MULI_1 -mvi r1, 0 -muli r3, r1, 0 -check_r3 0 - -test_name MULI_2 -mvi r1, 1 -muli r3, r1, 0 -check_r3 0 - -test_name MULI_3 -mvi r1, 0 -muli r3, r1, 1 -check_r3 0 - -test_name MULI_4 -mvi r1, 1 -muli r3, r1, 1 -check_r3 1 - -test_name MULI_5 -mvi r1, 2 -muli r3, r1, -1 -check_r3 -2 - -test_name MULI_6 -mvi r1, -2 -muli r3, r1, -1 -check_r3 2 - -test_name MULI_7 -mvi r1, 0x1234 -muli r3, r1, 0x789 -check_r3 0x8929d4 - -test_name MULI_8 -mvi r3, 4 -muli r3, r3, 4 -check_r3 16 - -end diff --git a/tests/tcg/lm32/test_nor.S b/tests/tcg/lm32/test_nor.S deleted file mode 100644 index 74d7592565..0000000000 --- a/tests/tcg/lm32/test_nor.S +++ /dev/null @@ -1,51 +0,0 @@ -.include "macros.inc" - -start - -test_name NOR_1 -mvi r1, 0 -mvi r2, 0 -nor r3, r1, r2 -check_r3 0xffffffff - -test_name NOR_2 -mvi r1, 0 -mvi r2, 1 -nor r3, r1, r2 -check_r3 0xfffffffe - -test_name NOR_3 -mvi r1, 1 -mvi r2, 1 -nor r3, r1, r2 -check_r3 0xfffffffe - -test_name NOR_4 -mvi r1, 1 -mvi r2, 0 -nor r3, r1, r2 -check_r3 0xfffffffe - -test_name NOR_5 -load r1 0xaa55aa55 -load r2 0x55aa55aa -nor r3, r1, r2 -check_r3 0 - -test_name NOR_6 -load r1 0xaa550000 -load r2 0x0000aa55 -nor r3, r1, r2 -check_r3 0x55aa55aa - -test_name NOR_7 -load r1 0xaa55aa55 -nor r3, r1, r1 -check_r3 0x55aa55aa - -test_name NOR_8 -load r3 0xaa55aa55 -nor r3, r3, r3 -check_r3 0x55aa55aa - -end diff --git a/tests/tcg/lm32/test_nori.S b/tests/tcg/lm32/test_nori.S deleted file mode 100644 index d00309c73e..0000000000 --- a/tests/tcg/lm32/test_nori.S +++ /dev/null @@ -1,35 +0,0 @@ -.include "macros.inc" - -start - -test_name NORI_1 -mvi r1, 0 -nori r3, r1, 0 -check_r3 0xffffffff - -test_name NORI_2 -mvi r1, 0 -nori r3, r1, 1 -check_r3 0xfffffffe - -test_name NORI_3 -mvi r1, 1 -nori r3, r1, 1 -check_r3 0xfffffffe - -test_name NORI_4 -mvi r1, 1 -nori r3, r1, 0 -check_r3 0xfffffffe - -test_name NORI_5 -load r1 0xaa55aa55 -nori r3, r1, 0x55aa -check_r3 0x55aa0000 - -test_name NORI_6 -load r3 0xaa55aa55 -nori r3, r3, 0x55aa -check_r3 0x55aa0000 - -end diff --git a/tests/tcg/lm32/test_or.S b/tests/tcg/lm32/test_or.S deleted file mode 100644 index 4ed292330e..0000000000 --- a/tests/tcg/lm32/test_or.S +++ /dev/null @@ -1,51 +0,0 @@ -.include "macros.inc" - -start - -test_name OR_1 -mvi r1, 0 -mvi r2, 0 -or r3, r1, r2 -check_r3 0 - -test_name OR_2 -mvi r1, 0 -mvi r2, 1 -or r3, r1, r2 -check_r3 1 - -test_name OR_3 -mvi r1, 1 -mvi r2, 1 -or r3, r1, r2 -check_r3 1 - -test_name OR_4 -mvi r1, 1 -mvi r2, 0 -or r3, r1, r2 -check_r3 1 - -test_name OR_5 -load r1 0xaa55aa55 -load r2 0x55aa55aa -or r3, r1, r2 -check_r3 0xffffffff - -test_name OR_6 -load r1 0xaa550000 -load r2 0x0000aa55 -or r3, r1, r2 -check_r3 0xaa55aa55 - -test_name OR_7 -load r1 0xaa55aa55 -or r3, r1, r1 -check_r3 0xaa55aa55 - -test_name OR_8 -load r3 0xaa55aa55 -or r3, r3, r3 -check_r3 0xaa55aa55 - -end diff --git a/tests/tcg/lm32/test_orhi.S b/tests/tcg/lm32/test_orhi.S deleted file mode 100644 index 78b7600e03..0000000000 --- a/tests/tcg/lm32/test_orhi.S +++ /dev/null @@ -1,35 +0,0 @@ -.include "macros.inc" - -start - -test_name ORHI_1 -mvi r1, 0 -orhi r3, r1, 0 -check_r3 0 - -test_name ORHI_2 -mvi r1, 0 -orhi r3, r1, 1 -check_r3 0x00010000 - -test_name ORHI_3 -load r1 0x00010000 -orhi r3, r1, 1 -check_r3 0x00010000 - -test_name ORHI_4 -mvi r1, 1 -orhi r3, r1, 0 -check_r3 1 - -test_name ORHI_5 -load r1 0xaa55aa55 -orhi r3, r1, 0x55aa -check_r3 0xffffaa55 - -test_name ORHI_6 -load r3 0xaa55aa55 -orhi r3, r3, 0x55aa -check_r3 0xffffaa55 - -end diff --git a/tests/tcg/lm32/test_ori.S b/tests/tcg/lm32/test_ori.S deleted file mode 100644 index 3d576cdb8b..0000000000 --- a/tests/tcg/lm32/test_ori.S +++ /dev/null @@ -1,35 +0,0 @@ -.include "macros.inc" - -start - -test_name ORI_1 -mvi r1, 0 -ori r3, r1, 0 -check_r3 0 - -test_name ORI_2 -mvi r1, 0 -ori r3, r1, 1 -check_r3 1 - -test_name ORI_3 -mvi r1, 1 -ori r3, r1, 1 -check_r3 1 - -test_name ORI_4 -mvi r1, 1 -ori r3, r1, 0 -check_r3 1 - -test_name ORI_5 -load r1 0xaa55aa55 -ori r3, r1, 0x55aa -check_r3 0xaa55ffff - -test_name ORI_6 -load r3 0xaa55aa55 -ori r3, r3, 0x55aa -check_r3 0xaa55ffff - -end diff --git a/tests/tcg/lm32/test_ret.S b/tests/tcg/lm32/test_ret.S deleted file mode 100644 index 320264f148..0000000000 --- a/tests/tcg/lm32/test_ret.S +++ /dev/null @@ -1,14 +0,0 @@ -.include "macros.inc" - -start - -test_name RET_1 -load ra mark -ret - -tc_fail -end - -mark: -tc_pass -end diff --git a/tests/tcg/lm32/test_sb.S b/tests/tcg/lm32/test_sb.S deleted file mode 100644 index b15a89d342..0000000000 --- a/tests/tcg/lm32/test_sb.S +++ /dev/null @@ -1,32 +0,0 @@ -.include "macros.inc" - -start - -test_name SB_1 -load r1 data -load r2 0xf0f1f2aa -sb (r1+0), r2 -check_mem data 0xaa000000 - -test_name SB_2 -load r1 data -load r2 0xf0f1f2bb -sb (r1+1), r2 -check_mem data 0xaabb0000 - -test_name SB_3 -load r1 data -load r2 0xf0f1f2cc -sb (r1+-1), r2 -check_mem data0 0x000000cc - -end - -.data - .align 4 -data0: - .byte 0, 0, 0, 0 -data: - .byte 0, 0, 0, 0 -data1: - .byte 0, 0, 0, 0 diff --git a/tests/tcg/lm32/test_scall.S b/tests/tcg/lm32/test_scall.S deleted file mode 100644 index 46032f841d..0000000000 --- a/tests/tcg/lm32/test_scall.S +++ /dev/null @@ -1,24 +0,0 @@ -.include "macros.inc" - -start - -test_name SCALL_1 -mvi r1, 1 -wcsr IE, r1 -# we are running in a semi hosted environment -# therefore we have to set r8 to some unused system -# call -mvi r8, 0 -insn: -scall -check_excp 64 - -test_name SCALL_2 -mv r3, ea -check_r3 insn - -test_name SCALL_3 -rcsr r3, IE -check_r3 2 - -end diff --git a/tests/tcg/lm32/test_sextb.S b/tests/tcg/lm32/test_sextb.S deleted file mode 100644 index 58db8ee8b9..0000000000 --- a/tests/tcg/lm32/test_sextb.S +++ /dev/null @@ -1,20 +0,0 @@ -.include "macros.inc" - -start - -test_name SEXTB_1 -mvi r1, 0 -sextb r3, r1 -check_r3 0 - -test_name SEXTB_2 -mvi r1, 0x7f -sextb r3, r1 -check_r3 0x0000007f - -test_name SEXTB_3 -mvi r1, 0x80 -sextb r3, r1 -check_r3 0xffffff80 - -end diff --git a/tests/tcg/lm32/test_sexth.S b/tests/tcg/lm32/test_sexth.S deleted file mode 100644 index a059ec3ee6..0000000000 --- a/tests/tcg/lm32/test_sexth.S +++ /dev/null @@ -1,20 +0,0 @@ -.include "macros.inc" - -start - -test_name SEXTH_1 -mvi r1, 0 -sexth r3, r1 -check_r3 0 - -test_name SEXTH_2 -load r1 0x7fff -sexth r3, r1 -check_r3 0x00007fff - -test_name SEXTH_3 -load r1 0x8000 -sexth r3, r1 -check_r3 0xffff8000 - -end diff --git a/tests/tcg/lm32/test_sh.S b/tests/tcg/lm32/test_sh.S deleted file mode 100644 index bba10224f6..0000000000 --- a/tests/tcg/lm32/test_sh.S +++ /dev/null @@ -1,32 +0,0 @@ -.include "macros.inc" - -start - -test_name SH_1 -load r1 data -load r2 0xf0f1aaaa -sh (r1+0), r2 -check_mem data 0xaaaa0000 - -test_name SH_2 -load r1 data -load r2 0xf0f1bbbb -sh (r1+2), r2 -check_mem data 0xaaaabbbb - -test_name SH_3 -load r1 data -load r2 0xf0f1cccc -sh (r1+-2), r2 -check_mem data0 0x0000cccc - -end - -.data - .align 4 -data0: - .byte 0, 0, 0, 0 -data: - .byte 0, 0, 0, 0 -data1: - .byte 0, 0, 0, 0 diff --git a/tests/tcg/lm32/test_sl.S b/tests/tcg/lm32/test_sl.S deleted file mode 100644 index 0aee17fdb8..0000000000 --- a/tests/tcg/lm32/test_sl.S +++ /dev/null @@ -1,45 +0,0 @@ -.include "macros.inc" - -start - -test_name SL_1 -mvi r1, 1 -mvi r2, 0 -sl r3, r1, r2 -check_r3 1 - -test_name SL_2 -mvi r1, 0 -mvi r2, 1 -sl r3, r1, r2 -check_r3 0 - -test_name SL_3 -mvi r1, 1 -mvi r2, 31 -sl r3, r1, r2 -check_r3 0x80000000 - -test_name SL_4 -mvi r1, 16 -mvi r2, 31 -sl r3, r1, r2 -check_r3 0 - -test_name SL_5 -mvi r1, 1 -mvi r2, 34 -sl r3, r1, r2 -check_r3 4 - -test_name SL_6 -mvi r1, 2 -sl r3, r1, r1 -check_r3 8 - -test_name SL_7 -mvi r3, 2 -sl r3, r3, r3 -check_r3 8 - -end diff --git a/tests/tcg/lm32/test_sli.S b/tests/tcg/lm32/test_sli.S deleted file mode 100644 index a421de9014..0000000000 --- a/tests/tcg/lm32/test_sli.S +++ /dev/null @@ -1,30 +0,0 @@ -.include "macros.inc" - -start - -test_name SLI_1 -mvi r1, 1 -sli r3, r1, 0 -check_r3 1 - -test_name SLI_2 -mvi r1, 0 -sli r3, r1, 1 -check_r3 0 - -test_name SLI_3 -mvi r1, 1 -sli r3, r1, 31 -check_r3 0x80000000 - -test_name SLI_4 -mvi r1, 16 -sli r3, r1, 31 -check_r3 0 - -test_name SLI_7 -mvi r3, 2 -sli r3, r3, 2 -check_r3 8 - -end diff --git a/tests/tcg/lm32/test_sr.S b/tests/tcg/lm32/test_sr.S deleted file mode 100644 index 62431a9864..0000000000 --- a/tests/tcg/lm32/test_sr.S +++ /dev/null @@ -1,57 +0,0 @@ -.include "macros.inc" - -start - -test_name SR_1 -mvi r1, 1 -mvi r2, 0 -sr r3, r1, r2 -check_r3 1 - -test_name SR_2 -mvi r1, 0 -mvi r2, 1 -sr r3, r1, r2 -check_r3 0 - -test_name SR_3 -load r1 0x40000000 -mvi r2, 30 -sr r3, r1, r2 -check_r3 1 - -test_name SR_4 -load r1 0x40000000 -mvi r2, 31 -sr r3, r1, r2 -check_r3 0 - -test_name SR_5 -mvi r1, 16 -mvi r2, 34 -sr r3, r1, r2 -check_r3 4 - -test_name SR_6 -mvi r1, 2 -sr r3, r1, r1 -check_r3 0 - -test_name SR_7 -mvi r3, 2 -sr r3, r3, r3 -check_r3 0 - -test_name SR_8 -mvi r1, 0xfffffff0 -mvi r2, 2 -sr r3, r1, r2 -check_r3 0xfffffffc - -test_name SR_9 -mvi r1, 0xfffffff0 -mvi r2, 4 -sr r3, r1, r2 -check_r3 0xffffffff - -end diff --git a/tests/tcg/lm32/test_sri.S b/tests/tcg/lm32/test_sri.S deleted file mode 100644 index c1be907b5b..0000000000 --- a/tests/tcg/lm32/test_sri.S +++ /dev/null @@ -1,40 +0,0 @@ -.include "macros.inc" - -start - -test_name SRI_1 -mvi r1, 1 -sri r3, r1, 0 -check_r3 1 - -test_name SRI_2 -mvi r1, 0 -sri r3, r1, 1 -check_r3 0 - -test_name SRI_3 -load r1 0x40000000 -sri r3, r1, 30 -check_r3 1 - -test_name SRI_4 -load r1 0x40000000 -sri r3, r1, 31 -check_r3 0 - -test_name SRI_5 -mvi r3, 2 -sri r3, r3, 2 -check_r3 0 - -test_name SRI_6 -mvi r1, 0xfffffff0 -sri r3, r1, 2 -check_r3 0xfffffffc - -test_name SRI_7 -mvi r1, 0xfffffff0 -sri r3, r1, 4 -check_r3 0xffffffff - -end diff --git a/tests/tcg/lm32/test_sru.S b/tests/tcg/lm32/test_sru.S deleted file mode 100644 index 2ab0b54c77..0000000000 --- a/tests/tcg/lm32/test_sru.S +++ /dev/null @@ -1,57 +0,0 @@ -.include "macros.inc" - -start - -test_name SRU_1 -mvi r1, 1 -mvi r2, 0 -sru r3, r1, r2 -check_r3 1 - -test_name SRU_2 -mvi r1, 0 -mvi r2, 1 -sru r3, r1, r2 -check_r3 0 - -test_name SRU_3 -load r1 0x40000000 -mvi r2, 30 -sru r3, r1, r2 -check_r3 1 - -test_name SRU_4 -load r1 0x40000000 -mvi r2, 31 -sru r3, r1, r2 -check_r3 0 - -test_name SRU_5 -mvi r1, 16 -mvi r2, 34 -sru r3, r1, r2 -check_r3 4 - -test_name SRU_6 -mvi r1, 2 -sru r3, r1, r1 -check_r3 0 - -test_name SRU_7 -mvi r3, 2 -sru r3, r3, r3 -check_r3 0 - -test_name SRU_8 -mvi r1, 0xfffffff0 -mvi r2, 2 -sru r3, r1, r2 -check_r3 0x3ffffffc - -test_name SRU_9 -mvi r1, 0xfffffff0 -mvi r2, 4 -sru r3, r1, r2 -check_r3 0x0fffffff - -end diff --git a/tests/tcg/lm32/test_srui.S b/tests/tcg/lm32/test_srui.S deleted file mode 100644 index 872c374121..0000000000 --- a/tests/tcg/lm32/test_srui.S +++ /dev/null @@ -1,40 +0,0 @@ -.include "macros.inc" - -start - -test_name SRUI_1 -mvi r1, 1 -srui r3, r1, 0 -check_r3 1 - -test_name SRUI_2 -mvi r1, 0 -srui r3, r1, 1 -check_r3 0 - -test_name SRUI_3 -load r1 0x40000000 -srui r3, r1, 30 -check_r3 1 - -test_name SRUI_4 -load r1 0x40000000 -srui r3, r1, 31 -check_r3 0 - -test_name SRUI_5 -mvi r3, 2 -srui r3, r3, 2 -check_r3 0 - -test_name SRUI_6 -mvi r1, 0xfffffff0 -srui r3, r1, 2 -check_r3 0x3ffffffc - -test_name SRUI_7 -mvi r1, 0xfffffff0 -srui r3, r1, 4 -check_r3 0x0fffffff - -end diff --git a/tests/tcg/lm32/test_sub.S b/tests/tcg/lm32/test_sub.S deleted file mode 100644 index 44b74a9e10..0000000000 --- a/tests/tcg/lm32/test_sub.S +++ /dev/null @@ -1,75 +0,0 @@ -.include "macros.inc" - -start - -test_name SUB_1 -mvi r1, 0 -mvi r2, 0 -sub r3, r1, r2 -check_r3 0 - -test_name SUB_2 -mvi r1, 0 -mvi r2, 1 -sub r3, r1, r2 -check_r3 -1 - -test_name SUB_3 -mvi r1, 1 -mvi r2, 0 -sub r3, r1, r2 -check_r3 1 - -test_name SUB_4 -mvi r1, 1 -mvi r2, -1 -sub r3, r1, r2 -check_r3 2 - -test_name SUB_5 -mvi r1, -1 -mvi r2, 1 -sub r3, r1, r2 -check_r3 -2 - -test_name SUB_6 -mvi r1, -1 -mvi r2, 0 -sub r3, r1, r2 -check_r3 -1 - -test_name SUB_7 -mvi r1, 0 -mvi r2, -1 -sub r3, r1, r2 -check_r3 1 - -test_name SUB_8 -mvi r3, 2 -sub r3, r3, r3 -check_r3 0 - -test_name SUB_9 -mvi r1, 4 -mvi r3, 2 -sub r3, r1, r3 -check_r3 2 - -test_name SUB_10 -mvi r1, 4 -mvi r3, 2 -sub r3, r3, r1 -check_r3 -2 - -test_name SUB_11 -mvi r1, 4 -sub r3, r1, r1 -check_r3 0 - -test_name SUB_12 -load r1 0x12345678 -load r2 0xabcdef97 -sub r3, r1, r2 -check_r3 0x666666e1 - -end diff --git a/tests/tcg/lm32/test_sw.S b/tests/tcg/lm32/test_sw.S deleted file mode 100644 index 2b1c017e7b..0000000000 --- a/tests/tcg/lm32/test_sw.S +++ /dev/null @@ -1,38 +0,0 @@ -.include "macros.inc" - -start - -test_name SW_1 -load r1 data -load r2 0xaabbccdd -sw (r1+0), r2 -check_mem data 0xaabbccdd - -test_name SW_2 -load r1 data -load r2 0x00112233 -sw (r1+4), r2 -check_mem data1 0x00112233 - -test_name SW_3 -load r1 data -load r2 0x44556677 -sw (r1+-4), r2 -check_mem data0 0x44556677 - -test_name SW_4 -load r1 data -sw (r1+0), r1 -lw r3, (r1+0) -check_r3 data - -end - -.data - .align 4 -data0: - .byte 0, 0, 0, 0 -data: - .byte 0, 0, 0, 0 -data1: - .byte 0, 0, 0, 0 diff --git a/tests/tcg/lm32/test_xnor.S b/tests/tcg/lm32/test_xnor.S deleted file mode 100644 index 14a62075f6..0000000000 --- a/tests/tcg/lm32/test_xnor.S +++ /dev/null @@ -1,51 +0,0 @@ -.include "macros.inc" - -start - -test_name XNOR_1 -mvi r1, 0 -mvi r2, 0 -xnor r3, r1, r2 -check_r3 0xffffffff - -test_name XNOR_2 -mvi r1, 0 -mvi r2, 1 -xnor r3, r1, r2 -check_r3 0xfffffffe - -test_name XNOR_3 -mvi r1, 1 -mvi r2, 1 -xnor r3, r1, r2 -check_r3 0xffffffff - -test_name XNOR_4 -mvi r1, 1 -mvi r2, 0 -xnor r3, r1, r2 -check_r3 0xfffffffe - -test_name XNOR_5 -load r1 0xaa55aa55 -load r2 0x55aa55aa -xnor r3, r1, r2 -check_r3 0 - -test_name XNOR_6 -load r1 0xaa550000 -load r2 0x0000aa55 -xnor r3, r1, r2 -check_r3 0x55aa55aa - -test_name XNOR_7 -load r1 0xaa55aa55 -xnor r3, r1, r1 -check_r3 0xffffffff - -test_name XNOR_8 -load r3 0xaa55aa55 -xnor r3, r3, r3 -check_r3 0xffffffff - -end diff --git a/tests/tcg/lm32/test_xnori.S b/tests/tcg/lm32/test_xnori.S deleted file mode 100644 index 9d9c3c6780..0000000000 --- a/tests/tcg/lm32/test_xnori.S +++ /dev/null @@ -1,35 +0,0 @@ -.include "macros.inc" - -start - -test_name XNORI_1 -mvi r1, 0 -xnori r3, r1, 0 -check_r3 0xffffffff - -test_name XNORI_2 -mvi r1, 0 -xnori r3, r1, 1 -check_r3 0xfffffffe - -test_name XNORI_3 -mvi r1, 1 -xnori r3, r1, 1 -check_r3 0xffffffff - -test_name XNORI_4 -mvi r1, 1 -xnori r3, r1, 0 -check_r3 0xfffffffe - -test_name XNORI_5 -load r1 0xaa55aa55 -xnori r3, r1, 0x5555 -check_r3 0x55aa00ff - -test_name XNORI_6 -load r3 0xaa55aa55 -xnori r3, r3, 0x5555 -check_r3 0x55aa00ff - -end diff --git a/tests/tcg/lm32/test_xor.S b/tests/tcg/lm32/test_xor.S deleted file mode 100644 index 6c6e712bae..0000000000 --- a/tests/tcg/lm32/test_xor.S +++ /dev/null @@ -1,51 +0,0 @@ -.include "macros.inc" - -start - -test_name XOR_1 -mvi r1, 0 -mvi r2, 0 -xor r3, r1, r2 -check_r3 0 - -test_name XOR_2 -mvi r1, 0 -mvi r2, 1 -xor r3, r1, r2 -check_r3 1 - -test_name XOR_3 -mvi r1, 1 -mvi r2, 1 -xor r3, r1, r2 -check_r3 0 - -test_name XOR_4 -mvi r1, 1 -mvi r2, 0 -xor r3, r1, r2 -check_r3 1 - -test_name XOR_5 -load r1 0xaa55aa55 -load r2 0x55aa55aa -xor r3, r1, r2 -check_r3 0xffffffff - -test_name XOR_6 -load r1 0xaa550000 -load r2 0x0000aa55 -xor r3, r1, r2 -check_r3 0xaa55aa55 - -test_name XOR_7 -load r1 0xaa55aa55 -xor r3, r1, r1 -check_r3 0 - -test_name XOR_8 -load r3 0xaa55aa55 -xor r3, r3, r3 -check_r3 0 - -end diff --git a/tests/tcg/lm32/test_xori.S b/tests/tcg/lm32/test_xori.S deleted file mode 100644 index 2051699f12..0000000000 --- a/tests/tcg/lm32/test_xori.S +++ /dev/null @@ -1,35 +0,0 @@ -.include "macros.inc" - -start - -test_name XORI_1 -mvi r1, 0 -xori r3, r1, 0 -check_r3 0 - -test_name XORI_2 -mvi r1, 0 -xori r3, r1, 1 -check_r3 1 - -test_name XORI_3 -mvi r1, 1 -xori r3, r1, 1 -check_r3 0 - -test_name XORI_4 -mvi r1, 1 -xori r3, r1, 0 -check_r3 1 - -test_name XORI_5 -load r1 0xaa55aa55 -xori r3, r1, 0x5555 -check_r3 0xaa55ff00 - -test_name XORI_6 -load r3 0xaa55aa55 -xori r3, r3, 0x5555 -check_r3 0xaa55ff00 - -end diff --git a/tests/unit/test-bdrv-drain.c b/tests/unit/test-bdrv-drain.c index 8a29e33e00..892f7f47d8 100644 --- a/tests/unit/test-bdrv-drain.c +++ b/tests/unit/test-bdrv-drain.c @@ -1478,7 +1478,6 @@ static void test_append_to_drained(void) g_assert_cmpint(base_s->drain_count, ==, 1); g_assert_cmpint(base->in_flight, ==, 0); - /* Takes ownership of overlay, so we don't have to unref it later */ bdrv_append(overlay, base, &error_abort); g_assert_cmpint(base->in_flight, ==, 0); g_assert_cmpint(overlay->in_flight, ==, 0); @@ -1495,6 +1494,7 @@ static void test_append_to_drained(void) g_assert_cmpint(overlay->quiesce_counter, ==, 0); g_assert_cmpint(overlay_s->drain_count, ==, 0); + bdrv_unref(overlay); bdrv_unref(base); blk_unref(blk); } diff --git a/tests/unit/test-bdrv-graph-mod.c b/tests/unit/test-bdrv-graph-mod.c index c4f7d16039..88f25c0cdb 100644 --- a/tests/unit/test-bdrv-graph-mod.c +++ b/tests/unit/test-bdrv-graph-mod.c @@ -1,7 +1,7 @@ /* * Block node graph modifications tests * - * Copyright (c) 2019 Virtuozzo International GmbH. All rights reserved. + * Copyright (c) 2019-2021 Virtuozzo International GmbH. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -44,6 +44,21 @@ static BlockDriver bdrv_no_perm = { .bdrv_child_perm = no_perm_default_perms, }; +static void exclusive_write_perms(BlockDriverState *bs, BdrvChild *c, + BdrvChildRole role, + BlockReopenQueue *reopen_queue, + uint64_t perm, uint64_t shared, + uint64_t *nperm, uint64_t *nshared) +{ + *nperm = BLK_PERM_WRITE; + *nshared = BLK_PERM_ALL & ~BLK_PERM_WRITE; +} + +static BlockDriver bdrv_exclusive_writer = { + .format_name = "exclusive-writer", + .bdrv_child_perm = exclusive_write_perms, +}; + static BlockDriverState *no_perm_node(const char *name) { return bdrv_new_open_driver(&bdrv_no_perm, name, BDRV_O_RDWR, &error_abort); @@ -55,6 +70,12 @@ static BlockDriverState *pass_through_node(const char *name) BDRV_O_RDWR, &error_abort); } +static BlockDriverState *exclusive_writer_node(const char *name) +{ + return bdrv_new_open_driver(&bdrv_exclusive_writer, name, + BDRV_O_RDWR, &error_abort); +} + /* * test_update_perm_tree * @@ -117,6 +138,7 @@ static void test_update_perm_tree(void) ret = bdrv_append(filter, bs, NULL); g_assert_cmpint(ret, <, 0); + bdrv_unref(filter); blk_unref(root); } @@ -181,10 +203,189 @@ static void test_should_update_child(void) bdrv_append(filter, bs, &error_abort); g_assert(target->backing->bs == bs); + bdrv_unref(filter); bdrv_unref(bs); blk_unref(root); } +/* + * test_parallel_exclusive_write + * + * Check that when we replace node, old permissions of the node being removed + * doesn't break the replacement. + */ +static void test_parallel_exclusive_write(void) +{ + BlockDriverState *top = exclusive_writer_node("top"); + BlockDriverState *base = no_perm_node("base"); + BlockDriverState *fl1 = pass_through_node("fl1"); + BlockDriverState *fl2 = pass_through_node("fl2"); + + /* + * bdrv_attach_child() eats child bs reference, so we need two @base + * references for two filters: + */ + bdrv_ref(base); + + bdrv_attach_child(top, fl1, "backing", &child_of_bds, BDRV_CHILD_DATA, + &error_abort); + bdrv_attach_child(fl1, base, "backing", &child_of_bds, BDRV_CHILD_FILTERED, + &error_abort); + bdrv_attach_child(fl2, base, "backing", &child_of_bds, BDRV_CHILD_FILTERED, + &error_abort); + + bdrv_replace_node(fl1, fl2, &error_abort); + + bdrv_unref(fl2); + bdrv_unref(top); +} + +static void write_to_file_perms(BlockDriverState *bs, BdrvChild *c, + BdrvChildRole role, + BlockReopenQueue *reopen_queue, + uint64_t perm, uint64_t shared, + uint64_t *nperm, uint64_t *nshared) +{ + if (bs->file && c == bs->file) { + *nperm = BLK_PERM_WRITE; + *nshared = BLK_PERM_ALL & ~BLK_PERM_WRITE; + } else { + *nperm = 0; + *nshared = BLK_PERM_ALL; + } +} + +static BlockDriver bdrv_write_to_file = { + .format_name = "tricky-perm", + .bdrv_child_perm = write_to_file_perms, +}; + + +/* + * The following test shows that topological-sort order is required for + * permission update, simple DFS is not enough. + * + * Consider the block driver which has two filter children: one active + * with exclusive write access and one inactive with no specific + * permissions. + * + * And, these two children has a common base child, like this: + * + * ┌─────┐ ┌──────┐ + * │ fl2 │ ◀── │ top │ + * └─────┘ └──────┘ + * │ │ + * │ │ w + * │ ▼ + * │ ┌──────┐ + * │ │ fl1 │ + * │ └──────┘ + * │ │ + * │ │ w + * │ ▼ + * │ ┌──────┐ + * └───────▶ │ base │ + * └──────┘ + * + * So, exclusive write is propagated. + * + * Assume, we want to make fl2 active instead of fl1. + * So, we set some option for top driver and do permission update. + * + * With simple DFS, if permission update goes first through + * top->fl1->base branch it will succeed: it firstly drop exclusive write + * permissions and than apply them for another BdrvChildren. + * But if permission update goes first through top->fl2->base branch it + * will fail, as when we try to update fl2->base child, old not yet + * updated fl1->base child will be in conflict. + * + * With topological-sort order we always update parents before children, so fl1 + * and fl2 are both updated when we update base and there is no conflict. + */ +static void test_parallel_perm_update(void) +{ + BlockDriverState *top = no_perm_node("top"); + BlockDriverState *tricky = + bdrv_new_open_driver(&bdrv_write_to_file, "tricky", BDRV_O_RDWR, + &error_abort); + BlockDriverState *base = no_perm_node("base"); + BlockDriverState *fl1 = pass_through_node("fl1"); + BlockDriverState *fl2 = pass_through_node("fl2"); + BdrvChild *c_fl1, *c_fl2; + + /* + * bdrv_attach_child() eats child bs reference, so we need two @base + * references for two filters: + */ + bdrv_ref(base); + + bdrv_attach_child(top, tricky, "file", &child_of_bds, BDRV_CHILD_DATA, + &error_abort); + c_fl1 = bdrv_attach_child(tricky, fl1, "first", &child_of_bds, + BDRV_CHILD_FILTERED, &error_abort); + c_fl2 = bdrv_attach_child(tricky, fl2, "second", &child_of_bds, + BDRV_CHILD_FILTERED, &error_abort); + bdrv_attach_child(fl1, base, "backing", &child_of_bds, BDRV_CHILD_FILTERED, + &error_abort); + bdrv_attach_child(fl2, base, "backing", &child_of_bds, BDRV_CHILD_FILTERED, + &error_abort); + + /* Select fl1 as first child to be active */ + tricky->file = c_fl1; + bdrv_child_refresh_perms(top, top->children.lh_first, &error_abort); + + assert(c_fl1->perm & BLK_PERM_WRITE); + assert(!(c_fl2->perm & BLK_PERM_WRITE)); + + /* Now, try to switch active child and update permissions */ + tricky->file = c_fl2; + bdrv_child_refresh_perms(top, top->children.lh_first, &error_abort); + + assert(c_fl2->perm & BLK_PERM_WRITE); + assert(!(c_fl1->perm & BLK_PERM_WRITE)); + + /* Switch once more, to not care about real child order in the list */ + tricky->file = c_fl1; + bdrv_child_refresh_perms(top, top->children.lh_first, &error_abort); + + assert(c_fl1->perm & BLK_PERM_WRITE); + assert(!(c_fl2->perm & BLK_PERM_WRITE)); + + bdrv_unref(top); +} + +/* + * It's possible that filter required permissions allows to insert it to backing + * chain, like: + * + * 1. [top] -> [filter] -> [base] + * + * but doesn't allow to add it as a branch: + * + * 2. [filter] --\ + * v + * [top] -> [base] + * + * So, inserting such filter should do all graph modifications and only then + * update permissions. If we try to go through intermediate state [2] and update + * permissions on it we'll fail. + * + * Let's check that bdrv_append() can append such a filter. + */ +static void test_append_greedy_filter(void) +{ + BlockDriverState *top = exclusive_writer_node("top"); + BlockDriverState *base = no_perm_node("base"); + BlockDriverState *fl = exclusive_writer_node("fl1"); + + bdrv_attach_child(top, base, "backing", &child_of_bds, BDRV_CHILD_COW, + &error_abort); + + bdrv_append(fl, base, &error_abort); + bdrv_unref(fl); + bdrv_unref(top); +} + int main(int argc, char *argv[]) { bdrv_init(); @@ -195,6 +396,12 @@ int main(int argc, char *argv[]) g_test_add_func("/bdrv-graph-mod/update-perm-tree", test_update_perm_tree); g_test_add_func("/bdrv-graph-mod/should-update-child", test_should_update_child); + g_test_add_func("/bdrv-graph-mod/parallel-perm-update", + test_parallel_perm_update); + g_test_add_func("/bdrv-graph-mod/parallel-exclusive-write", + test_parallel_exclusive_write); + g_test_add_func("/bdrv-graph-mod/append-greedy-filter", + test_append_greedy_filter); return g_test_run(); } |