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* ppc/pnv: Connect PNV I2C controller to powernv10Glenn Miles2023-11-073-0/+36
| | | | | | | | | | | | | | Wires up four I2C controller instances to the powernv10 chip XSCOM address space. Each controller instance is wired up to two I2C buses of its own. No other I2C devices are connected to the buses at this time. Signed-off-by: Glenn Miles <milesg@linux.vnet.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-ID: <20231017221434.810363-1-milesg@linux.vnet.ibm.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
* ppc/pnv: Connect I2C controller model to powernv9 chipCédric Le Goater2023-11-072-0/+36
| | | | | | | | | | | | | | | | | | | Wires up three I2C controller instances to the powernv9 chip XSCOM address space. Each controller instance is wired up to a single I2C bus of its own. No other I2C devices are connected to the buses at this time. Signed-off-by: Cédric Le Goater <clg@kaod.org> [milesg: Split wiring from addition of model itself] [milesg: Added new commit message] [milesg: Moved hardcoded attributes into PnvChipClass] [milesg: Removed TODO comment for I2C] Signed-off-by: Glenn Miles <milesg@linux.vnet.ibm.com> Acked-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-ID: <20231016222013.3739530-3-milesg@linux.vnet.ibm.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
* ppc/pnv: Add an I2C controller modelCédric Le Goater2023-11-074-0/+739
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The more recent IBM power processors have an embedded I2C controller that is accessible by software via the XSCOM address space. Each instance of the I2C controller is capable of controlling multiple I2C buses (one at a time). Prior to beginning a transaction on an I2C bus, the bus must be selected by writing the port number associated with the bus into the PORT_NUM field of the MODE register. Once an I2C bus is selected, the status of the bus can be determined by reading the Status and Extended Status registers. I2C bus transactions can be started by writing a command to the Command register and reading/writing data from/to the FIFO register. Not supported : . 10 bit I2C addresses . Multimaster . Slave Signed-off-by: Cédric Le Goater <clg@kaod.org> [milesg: Split wiring to powernv9 into its own commit] [milesg: Added more detail to commit message] [milesg: Added SPDX Licensed Identifier to new files] [milesg: updated copyright dates] [milesg: Added use of g_autofree] [milesg: Added NULL check after pnv_i2c_get_bus] Signed-off-by: Glenn Miles <milesg@linux.vnet.ibm.com> Acked-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-ID: <20231016222013.3739530-2-milesg@linux.vnet.ibm.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
* tests/avocado: Add test for amigaone boardBALATON Zoltan2023-11-071-0/+38
| | | | | | | | | | Add an avocado test for the amigaone board that tests it with the firmware. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-ID: <b1a0246840fcff1fe6bbd8685e2474a9231b34c5.1698406922.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
* hw/ppc: Add emulation of AmigaOne XE boardBALATON Zoltan2023-11-075-0/+184
| | | | | | | | | | | | | | | | | | | | | | The AmigaOne is a rebranded MAI Teron board that uses U-Boot firmware with patches to support AmigaOS and is very similar to pegasos2 so can be easily emulated sharing most code with pegasos2. The reason to emulate it is that AmigaOS comes in different versions for AmigaOne and PegasosII which only have drivers for one machine and firmware so these only run on the specific machine. Adding this board allows another AmigaOS version to be used reusing already existing peagasos2 emulation. (The AmigaOne was the first of these boards so likely most widespread which then inspired Pegasos that was later replaced with PegasosII due to problems with Articia S, so these have a lot of similarity. Pegasos mainly ran MorphOS while the PegasosII version of AmigaOS was added later and therefore less common than the AmigaOne version.) Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Tested-by: Rene Engel <ReneEngel80@emailn.de> Acked-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-ID: <804935e7a5921548d630576159ae2c758fe6e275.1699382232.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
* hw/pci-host: Add emulation of Mai Logic Articia SBALATON Zoltan2023-11-074-0/+317
| | | | | | | | | | | | The Articia S is a generic chipset supporting several different CPUs that were among others used on some PPC boards. This is a minimal emulation of the parts needed for emulating the AmigaOne board. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Tested-by: Rene Engel <ReneEngel80@emailn.de> Acked-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-ID: <83822787431701cf4d460298d3e3845f362e5da1.1698406922.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
* Merge tag 'pixman-pull-request' of https://gitlab.com/marcandre.lureau/qemu ↵Stefan Hajnoczi2023-11-0729-139/+560
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into staging Make Pixman an optional dependency # -----BEGIN PGP SIGNATURE----- # # iQJQBAABCAA6FiEEh6m9kz+HxgbSdvYt2ujhCXWWnOUFAmVKDhkcHG1hcmNhbmRy # ZS5sdXJlYXVAcmVkaGF0LmNvbQAKCRDa6OEJdZac5f8CD/0YX5sXR3IwUfTp8B51 # iIwgOlVunzcT9oDYegIekaHdvggv3B39+gjC/khcehQ30qV6MDowj3ZagIeLavU2 # ZpHJMUkg1YRDHMiJ8aJmDhOyZHINCETWV2YoJX1ACllKOOMSXHC3mWKZd/eIqAPJ # EBMlSWBP1rRtwfaX+p1Y65XappJewzzb9SqFn8s5deowEAM3aK7xafHQOBWSVx9z # 5adhIWn3HMVnbYolVXlcHsPurfI86sqCl7QAqkFdwAvGIKghhqMT6pFfvu3BalHN # nz8GqpSvjlj/WNFABi00piXKx4kkqBJSsYMP8owZQZIeepT5RXuKAB15BA1Cc5N7 # wTkuLe7zXLUST32yAHLa2UZY8Gv/a6C+dH1EFRd7vMMczBPrzwuqzWChRTZPQaX6 # e4uhXnhuu8Io11TnkmwWeWtrLOf+6EmVOjxNwhUUXOqPXPxd7LGMh/ZIc1SuXh0a # k7khpXez4MoBWGftjCEUNlLZ13rcrqnkUWAZeOwjjaqxnYK+Lz32OGS3BtjRYvov # WgogC2c2vVHrSHxRxuytCHiM+7NY0Tf2B6PxZJKOQUtfFxvHjWkHghnJWwHH2OP/ # lMnJUU+XAaAxsiEiDN4BSd0DSA6jn6/vg8SgXXEDyIDExq5jELVMgw2q1cbQJK1s # mOgr8FZZfnxvwYIFvH7PFiDm3A== # =bLPz # -----END PGP SIGNATURE----- # gpg: Signature made Tue 07 Nov 2023 18:14:49 HKT # gpg: using RSA key 87A9BD933F87C606D276F62DDAE8E10975969CE5 # gpg: issuer "marcandre.lureau@redhat.com" # gpg: Good signature from "Marc-André Lureau <marcandre.lureau@redhat.com>" [full] # gpg: aka "Marc-André Lureau <marcandre.lureau@gmail.com>" [full] # Primary key fingerprint: 87A9 BD93 3F87 C606 D276 F62D DAE8 E109 7596 9CE5 * tag 'pixman-pull-request' of https://gitlab.com/marcandre.lureau/qemu: (25 commits) build-sys: make pixman actually optional hw/display/ati: allow compiling without PIXMAN hw/mips: FULOONG depends on VT82C686 hw/sm501: allow compiling without PIXMAN hw/arm: XLNX_VERSAL depends on XLNX_CSU_DMA arm/kconfig: XLNX_ZYNQMP_ARM depends on PIXMAN ui/dbus: do not require PIXMAN ui/gtk: -display gtk requires PIXMAN ui/spice: SPICE/QXL requires PIXMAN ui/vnc: VNC requires PIXMAN ui/gl: opengl doesn't require PIXMAN vhost-user-gpu: skip VHOST_USER_GPU_UPDATE when !PIXMAN ui/console: when PIXMAN is unavailable, don't draw placeholder msg virtio-gpu: replace PIXMAN for region/rect test qmp/hmp: disable screendump if PIXMAN is missing ui/vc: console-vc requires PIXMAN ui/console: allow to override the default VC vl: move display early init before default devices vl: simplify display_remote logic qemu-options: define -vnc only #ifdef CONFIG_VNC ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
| * build-sys: make pixman actually optionalMarc-André Lureau2023-11-071-3/+0
| | | | | | | | | | Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com>
| * hw/display/ati: allow compiling without PIXMANMarc-André Lureau2023-11-073-4/+23
| | | | | | | | | | | | | | | | Change the "x-pixman" property default value and use the fallback path when PIXMAN support is disabled. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Acked-by: BALATON Zoltan <balaton@eik.bme.hu>
| * hw/mips: FULOONG depends on VT82C686Marc-André Lureau2023-11-071-0/+1
| | | | | | | | | | Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
| * hw/sm501: allow compiling without PIXMANMarc-André Lureau2023-11-071-13/+32
| | | | | | | | | | | | | | | | Change the "x-pixman" property default value and use the fallback path when PIXMAN support is disabled. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu>
| * hw/arm: XLNX_VERSAL depends on XLNX_CSU_DMAMarc-André Lureau2023-11-071-0/+1
| | | | | | | | | | | | Fixes: 868d968004 ("hw/arm/xlnx-versal: Connect OSPI flash controller") Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
| * arm/kconfig: XLNX_ZYNQMP_ARM depends on PIXMANMarc-André Lureau2023-11-073-2/+8
| | | | | | | | | | | | | | | | The Display Port has some strong PIXMAN dependency. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
| * ui/dbus: do not require PIXMANMarc-André Lureau2023-11-072-29/+65
| | | | | | | | | | | | Implement a fallback path for region 2D update. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
| * ui/gtk: -display gtk requires PIXMANMarc-André Lureau2023-11-071-1/+5
| | | | | | | | | | Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com>
| * ui/spice: SPICE/QXL requires PIXMANMarc-André Lureau2023-11-073-7/+11
| | | | | | | | | | Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com>
| * ui/vnc: VNC requires PIXMANMarc-André Lureau2023-11-072-2/+6
| | | | | | | | | | Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com>
| * ui/gl: opengl doesn't require PIXMANMarc-André Lureau2023-11-071-2/+2
| | | | | | | | | | | | | | The QEMU fallback covers the requirements. We still need the flags of header inclusion with CONFIG_PIXMAN. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
| * vhost-user-gpu: skip VHOST_USER_GPU_UPDATE when !PIXMANMarc-André Lureau2023-11-071-0/+2
| | | | | | | | | | | | | | | | This simply means that 2d drawing updates won't be handled, but 3d should work. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com>
| * ui/console: when PIXMAN is unavailable, don't draw placeholder msgMarc-André Lureau2023-11-071-0/+2
| | | | | | | | | | | | | | When we can't draw text, simply show a blank display. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com>
| * virtio-gpu: replace PIXMAN for region/rect testMarc-André Lureau2023-11-072-19/+70
| | | | | | | | | | | | | | | | Use a simpler implementation for rectangle geometry & intersect, drop the need for (more complex) PIXMAN functions. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com>
| * qmp/hmp: disable screendump if PIXMAN is missingMarc-André Lureau2023-11-074-1/+8
| | | | | | | | | | | | | | | | | | The command requires color conversion and line-by-line feeding. We could have a simple fallback for simple formats though. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com>
| * ui/vc: console-vc requires PIXMANMarc-André Lureau2023-11-073-1/+37
| | | | | | | | | | | | | | | | | | Add stubs for the fallback paths. get_vc() now returns NULL by default if !PIXMAN. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com>
| * ui/console: allow to override the default VCMarc-André Lureau2023-11-073-10/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | If a display is backed by a specialized VC, allow to override the default "vc:80Cx24C". As suggested by Paolo, if the display doesn't implement a VC (get_vc() returns NULL), use a fallback that will use a muxed console on stdio. This changes the behaviour of "qemu -display none", to create a muxed serial/monitor by default (on TTY & not daemonized). Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com>
| * vl: move display early init before default devicesMarc-André Lureau2023-11-071-13/+18
| | | | | | | | | | | | | | | | The next commit needs to have the display registered itself before creating the default VCs. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com>
| * vl: simplify display_remote logicMarc-André Lureau2023-11-071-5/+1
| | | | | | | | | | | | | | | | Bump the display_remote variable when the -vnc option is parsed, just like -spice. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com>
| * qemu-options: define -vnc only #ifdef CONFIG_VNCMarc-André Lureau2023-11-073-16/+11
| | | | | | | | | | Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com>
| * vl: drop needless -spice checksMarc-André Lureau2023-11-071-6/+1
| | | | | | | | | | | | | | | | | | Since commit 5324e3e958e ("qemu-options: define -spice only #ifdef CONFIG_SPICE"), it is unnecessary to check at runtime for "-spice" option. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com>
| * ui: add pixman-minimal.hMarc-André Lureau2023-11-072-0/+197
| | | | | | | | | | | | | | | | | | | | This is a tiny subset of PIXMAN API that is used pervasively in QEMU codebase to manage images and identify the underlying format. It doesn't seems worth to wrap this in a QEMU-specific API. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Acked-by: Thomas Huth <thuth@redhat.com>
| * ui: compile out some qemu-pixman functions when !PIXMANMarc-André Lureau2023-11-072-2/+11
| | | | | | | | | | | | | | | | | | Those functions require the PIXMAN library. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
| * build-sys: drop needless warning pragmas for old pixmanMarc-André Lureau2023-11-071-4/+0
| | | | | | | | | | | | | | | | | | | | | | Since commit 236f282c1c7 ("configure: check for pixman-1 version"), QEMU requires >= 0.21.8. Suggested-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
| * build-sys: add a "pixman" featureMarc-André Lureau2023-11-075-2/+18
| | | | | | | | | | | | | | | | For now, pixman is mandatory, but we set config_host.h and Kconfig. Once compilation is fixed, "pixman" will become actually optional. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com>
* | Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu ↵Stefan Hajnoczi2023-11-0753-322/+4475
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into staging virtio,pc,pci: features, fixes virtio sound card support vhost-user: back-end state migration cxl: line length reduction enabling fabric management vhost-vdpa: shadow virtqueue hash calculation Support shadow virtqueue RSS Support tests: CPU topology related smbios test cases Fixes, cleanups all over the place Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # -----BEGIN PGP SIGNATURE----- # # iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAmVKDDoPHG1zdEByZWRo # YXQuY29tAAoJECgfDbjSjVRpF08H/0Zts8uvkHbgiOEJw4JMHU6/VaCipfIYsp01 # GSfwYOyEsXJ7GIxKWaCiMnWXEm7tebNCPKf3DoUtcAojQj3vuF9XbWBKw/bfRn83 # nGO/iiwbYViSKxkwqUI+Up5YiN9o0M8gBFrY0kScPezbnYmo5u2bcADdEEq6gH68 # D0Ea8i+WmszL891ypvgCDBL2ObDk3qX3vA5Q6J2I+HKX2ofJM59BwaKwS5ghw+IG # BmbKXUZJNjUQfN9dQ7vJuiuqdknJ2xUzwW2Vn612ffarbOZB1DZ6ruWlrHty5TjX # 0w4IXEJPBgZYbX9oc6zvTQnbLDBJbDU89mnme0TcmNMKWmQKTtc= # =vEv+ # -----END PGP SIGNATURE----- # gpg: Signature made Tue 07 Nov 2023 18:06:50 HKT # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu: (63 commits) acpi/tests/avocado/bits: enable console logging from bits VM acpi/tests/avocado/bits: enforce 32-bit SMBIOS entry point hw/cxl: Add tunneled command support to mailbox for switch cci. hw/cxl: Add dummy security state get hw/cxl/type3: Cleanup multiple CXL_TYPE3() calls in read/write functions hw/cxl/mbox: Add Get Background Operation Status Command hw/cxl: Add support for device sanitation hw/cxl/mbox: Wire up interrupts for background completion hw/cxl/mbox: Add support for background operations hw/cxl: Implement Physical Ports status retrieval hw/pci-bridge/cxl_downstream: Set default link width and link speed hw/cxl/mbox: Add Physical Switch Identify command. hw/cxl/mbox: Add Information and Status / Identify command hw/cxl: Add a switch mailbox CCI function hw/pci-bridge/cxl_upstream: Move defintion of device to header. hw/cxl/mbox: Generalize the CCI command processing hw/cxl/mbox: Pull the CCI definition out of the CXLDeviceState hw/cxl/mbox: Split mailbox command payload into separate input and output hw/cxl/mbox: Pull the payload out of struct cxl_cmd and make instances constant hw/cxl: Fix a QEMU_BUILD_BUG_ON() in switch statement scope issue. ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
| * | acpi/tests/avocado/bits: enable console logging from bits VMAni Sinha2023-11-071-10/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Console logs from the VM can be useful for debugging when things go wrong. Other avocado tests enables them. This change enables console logging with the following changes: - point to the newer bios bits image that actually enabled VM console. - change the bits test to drain the console logs from the VM and write the logs. - wait for SHUTDOWN event from QEMU so that console logs can be drained out of the socket before it is closed as a part of vm.wait(). Additionally, following two cosmetic changes have been made: - Removed VM QEMU command line logging as avocado framework already logs it. This is a minor cleanup along the way. - Update my email to my work email in the avocado acpi bios bits test. CC: jsnow@redhat.com Signed-off-by: Ani Sinha <anisinha@redhat.com> Message-Id: <20231027032120.6012-3-anisinha@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * | acpi/tests/avocado/bits: enforce 32-bit SMBIOS entry pointAni Sinha2023-11-071-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | QEMU defaults to 64-bit entry point since the following commit bf376f3020 ("hw/i386/pc: Default to use SMBIOS 3.0 for newer machine models") The above change is applicable for all newer machine versions from version 8.1 and newer. i440fx and q35 machine versions 8.0 and older still use 32-bit entry points. Unfortunately, bits currently does not recognize 64-bit entry points and hence is not able to parse SMBIOS tables. Therefore, we need to enforce 32-bit SMBIOS entry point in QEMU command line so that bits is able to parse the SMBIOS tables. Once we implement the support in bits to parse 64-bit entry points, we can remove the extra command line that is passed to enforce a 32-bit entry point. The support can be added to the following smbios test script: tests/avocado/acpi-bits/bits-tests/smbios.py2 in QEMU repository. CC: jusual@redhat.com CC: imammedo@redhat.com Signed-off-by: Ani Sinha <anisinha@redhat.com> Message-Id: <20231027032120.6012-2-anisinha@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * | hw/cxl: Add tunneled command support to mailbox for switch cci.Jonathan Cameron2023-11-073-0/+182
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This implementation of tunneling makes the choice that our Type 3 device is a Logical Device (LD) of a Multi-Logical Device (MLD) that just happens to only have one LD for now. Tunneling is supported from a Switch Mailbox CCI (and shortly via MCTP over I2C connected to the switch MCTP CCI) via an outer level to the FM owned LD in the MLD Type 3 device. From there an inner tunnel may be used to access particular LDs. Protocol wise, the following is what happens in a real system but we don't emulate the transports - just the destinations and the payloads. ( Host -> Switch Mailbox CCI - in band FM-API mailbox command or Host -> Switch MCTP CCI - MCTP over I2C using the CXL FM-API MCTP Binding. ) then (if a tunnel command) Switch -> Type 3 FM Owned LD - MCTP over PCI VDM using the CXL FM-API binding (addressed by switch port) then (if unwrapped command also a tunnel command) Type 3 FM Owned LD to LD0 via internal transport (addressed by LD number) or (added shortly) Host to Type 3 FM Owned MCTP CCI - MCTP over I2C using the CXL FM-API MCTP Binding. then (if unwrapped comand is a tunnel comamnd) Type 3 FM Owned LD to LD0 via internal transport. (addressed by LD number) It is worth noting that the tunneling commands over PCI VDM presumably use the appropriate MCTP binding depending on opcode. This may be the CXL FMAPI binding or the CXL Memory Device Binding. Additional commands will need to be added to make this useful beyond testing the tunneling works. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20231023160806.13206-18-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * | hw/cxl: Add dummy security state getJonathan Cameron2023-11-071-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Needed to allow the santize comamnds to be tested with proposed Linux Kernel support. Default value + no control of the security state will work for now. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20231023160806.13206-17-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * | hw/cxl/type3: Cleanup multiple CXL_TYPE3() calls in read/write functionsGregory Price2023-11-071-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Call CXL_TYPE3 once at top of function to avoid multiple invocations. Signed-off-by: Gregory Price <gregory.price@memverge.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20231023160806.13206-16-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * | hw/cxl/mbox: Add Get Background Operation Status CommandJonathan Cameron2023-11-071-0/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | For now, provide this command on type 3 main mailbox only. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20231023160806.13206-15-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * | hw/cxl: Add support for device sanitationDavidlohr Bueso2023-11-073-0/+167
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make use of the background operations through the sanitize command, per CXL 3.0 specs. Traditionally run times can be rather long, depending on the size of the media. Estimate times based on: https://pmem.io/documents/NVDIMM_DSM_Interface-V1.8.pdf Signed-off-by: Davidlohr Bueso <dave@stgolabs.net> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20231023160806.13206-14-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * | hw/cxl/mbox: Wire up interrupts for background completionDavidlohr Bueso2023-11-073-18/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Notify when the background operation is done. Note that for now background commands are only supported on the main Type 3 mailbox. Signed-off-by: Davidlohr Bueso <dave@stgolabs.net> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20231023160806.13206-13-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * | hw/cxl/mbox: Add support for background operationsDavidlohr Bueso2023-11-073-4/+122
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support background commands in the mailbox, and update cmd_infostat_bg_op_sts() accordingly. This patch does not implement mbox interrupts upon completion, so the kernel driver must rely on polling to know when the operation is done. Signed-off-by: Davidlohr Bueso <dave@stgolabs.net> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20231023160806.13206-12-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * | hw/cxl: Implement Physical Ports status retrievalJonathan Cameron2023-11-071-0/+128
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add this command for both the Switch CCI in switch upstream ports. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20231023160806.13206-11-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * | hw/pci-bridge/cxl_downstream: Set default link width and link speedJonathan Cameron2023-11-071-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Without these being set the PCIE Link Capabilities register has invalid values in these two fields. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20231023160806.13206-10-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * | hw/cxl/mbox: Add Physical Switch Identify command.Jonathan Cameron2023-11-073-3/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | Enable it for the switch CCI. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20231023160806.13206-9-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * | hw/cxl/mbox: Add Information and Status / Identify commandJonathan Cameron2023-11-071-0/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add this command that is only available via out of band CCIs. It replicates information that can be discovered inband via PCI config space. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20231023160806.13206-8-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * | hw/cxl: Add a switch mailbox CCI functionJonathan Cameron2023-11-077-1/+175
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CXL switch CCIs were added in CXL r3.0. They are a PCI function, identified by class code that provides a CXL mailbox (identical to that previously defined for CXL type 3 memory devices) over which various FM-API commands may be used. Whilst the intent of this feature is enable switch control from a BMC attached to a switch upstream port, it is also useful to allow emulation of this feature on the upstream port connected to a host using the CXL devices as this greatly simplifies testing. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20231023160806.13206-7-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * | hw/pci-bridge/cxl_upstream: Move defintion of device to header.Jonathan Cameron2023-11-072-10/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To avoid repetition of switch upstream port specific data in the CXLDeviceState structure it will be necessary to access the switch USP specific data from mailbox callbacks. Hence move it to cxl_device.h so it is no longer an opaque structure. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Fan Ni <fan.ni@samsung.com> Message-Id: <20231023160806.13206-6-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * | hw/cxl/mbox: Generalize the CCI command processingJonathan Cameron2023-11-073-43/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By moving the parts of the mailbox command handling that are CCI type specific out to the caller, make the main handling code generic. Rename it to cxl_process_cci_message() to reflect this new generality. Change the type3 mailbox handling (reused shortly for the switch mailbox CCI) to take a snapshot of the mailbox input data rather than operating on it in place. This reduces the chance of bugs due to aliasing going forwars. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20231023160806.13206-5-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * | hw/cxl/mbox: Pull the CCI definition out of the CXLDeviceStateJonathan Cameron2023-11-074-56/+109
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enables having multiple CCIs per devices. Each CCI (mailbox) has it's own state and command list, so they can't share a single structure. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20231023160806.13206-4-Jonathan.Cameron@huawei.com> Reviewed-by: Fan Ni <fan.ni@samsung.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>