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* cirrus.yml: Fix the MSYS2 taskThomas Huth2021-05-141-2/+2
| | | | | | | | | | | | | | | | | | The MSYS2 task in the Cirrus-CI is currently failing with error messages like this: warning: database file for 'ucrt64' does not exist (use '-Sy' to download) :: Starting core system upgrade... there is nothing to do :: Starting full system upgrade... error: failed to prepare transaction (could not find database) Seems like it can be fixed by switching to a newer release and by refreshing the database one more time after changing the /etc/pacman.conf file. Message-Id: <20210504100223.25427-30-alex.bennee@linaro.org> Reviewed-by: Yonggang Luo <luoyonggang@gmail.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
* pc-bios/s390-ccw: Fix inline assembly for older versions of ClangThomas Huth2021-05-144-8/+8
| | | | | | | | | | Clang versions before v11.0 insist on having the %rX or %cX register names instead of just a number. Since our Travis-CI is currently still using Clang v6.0, we have to fix this to avoid failing jobs. Message-Id: <20210512171550.476130-2-thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
* tests/qtest/migration-test: Use g_autofree to avoid leaks on error pathsPeter Maydell2021-05-141-41/+20
| | | | | | | | | | | | | | | | | | | Coverity notices that several places in the migration-test code fail to free memory in error-exit paths. This is pretty unimportant in test case code, but we can avoid having to manually free the memory entirely by using g_autofree. The places where Coverity spotted a leak were relating to early exits not freeing 'uri' in test_precopy_unix(), do_test_validate_uuid(), migrate_postcopy_prepare() and test_migrate_auto_converge(). This patch converts all the string-allocation in the test code to g_autofree for consistency. Fixes: Coverity CID 1432313, 1432315, 1432352, 1432364 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Message-Id: <20210506185819.9010-1-peter.maydell@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
* configure: Poison all current target-specific #definesThomas Huth2021-05-143-1/+10
| | | | | | | | | | | | | | | | | | We are generating a lot of target-specific defines in the *-config-devices.h and *-config-target.h files. Using them in common code is wrong and leads to very subtle bugs since a "#ifdef CONFIG_SOMETHING" is not working there as expected. To avoid these issues, we are already poisoning many of the macros in include/exec/poison.h - but it's cumbersome to maintain this list manually. Thus let's generate an additional list of poisoned macros automatically from the current config switches - this should give us a much better test coverage via the different CI configurations. Note that CONFIG_TCG (which is also defined in config-host.h) and CONFIG_USER_ONLY are special, so we have to filter these out. Message-Id: <20210414112004.943383-5-thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
* migration: Move populate_vfio_info() into a separate fileThomas Huth2021-05-144-16/+29
| | | | | | | | | | | | | The CONFIG_VFIO switch only works in target specific code. Since migration/migration.c is common code, the #ifdef does not have the intended behavior here. Move the related code to a separate file now which gets compiled via specific_ss instead. Fixes: 3710586caa ("qapi: Add VFIO devices migration stats in Migration stats") Message-Id: <20210414112004.943383-3-thuth@redhat.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
* include/sysemu: Poison all accelerator CONFIG switches in common codeThomas Huth2021-05-144-0/+16
| | | | | | | | | | | We are already poisoning CONFIG_KVM since this switch is not working in common code. Do the same with the other accelerator switches, too (except for CONFIG_TCG, which is special, since it is also defined in config-host.h). Message-Id: <20210414112004.943383-2-thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
* tests: Avoid side effects inside g_assert() argumentsPeter Maydell2021-05-142-3/+6
| | | | | | | | | | | | | | For us, assertions are always enabled, but side-effect expressions inside the argument to g_assert() are bad style anyway. Fix three occurrences in IPMI related tests, which will silence some Coverity nits. Fixes: CID 1432322, CID 1432287, CID 1432291 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20210503165525.26221-4-peter.maydell@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
* tests/qtest/rtc-test: Remove pointless NULL checkPeter Maydell2021-05-141-4/+2
| | | | | | | | | | | | | | | In rtc-test.c we know that s is non-NULL because qtest_start() will return a non-NULL value, and we assume this when we pass s to qtest_irq_intercept_in(). So we can drop the initial assignment of NULL and the "if (s)" condition at the end of the function. Fixes: Coverity CID 1432353 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20210503165525.26221-3-peter.maydell@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
* tests/qtest/tpm-util.c: Free memory with correct free functionPeter Maydell2021-05-141-2/+2
| | | | | | | | | | | | | tpm_util_migration_start_qemu() allocates memory with g_strdup_printf() but frees it with free() rather than g_free(), which provokes Coverity complaints (CID 1432379, 1432350). Use the correct free function. Fixes: Coverity CID 1432379, CID 1432350 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Stefan Berger <stefanb@linux.ibm.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20210503165525.26221-2-peter.maydell@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
* tests/migration-test: Fix "true" vs trueDr. David Alan Gilbert2021-05-141-7/+7
| | | | | | | | | | | | | | | Accidental use of "true" as a boolean; spotted by coverity and Peter. Fixes: b99784ef6c3 Fixes: d795f47466e Reported-by: Peter Maydell <peter.maydell@linaro.org> Reported-by: Coverity (CID 1432373, 1432292, 1432288) Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210504100545.112213-1-dgilbert@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
* tests/qtest/npcm7xx_pwm-test.c: Avoid g_assert_true() for non-test assertionsPeter Maydell2021-05-141-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | In the glib API, the distinction between g_assert() and g_assert_true() is that the former is for "bug, terminate the application" and the latter is for "test check, on failure either terminate or just mark the testcase as failed". For QEMU, g_assert() is always fatal, so code can assume that if the assertion fails execution does not proceed, but this is not true of g_assert_true(). In npcm7xx_pwm-test, the pwm_index() and pwm_module_index() functions include some assertions that are just guarding against possible bugs in the test code that might lead us to out-of-bounds array accesses. These should use g_assert() because they aren't part of what the test is testing and the code does not correctly handle the case where the condition was false. This fixes some Coverity issues where Coverity knows that g_assert_true() can continue when the condition is false and complains about the possible array overrun at various callsites. Fixes: Coverity CID 1442340, 1442341, 1442343, 1442344, 1442345, 1442346 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Havard Skinnemoen <hskinnemoen@google.com> Message-Id: <20210505135516.21097-1-peter.maydell@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
* tests/qtest/ahci-test.c: Calculate iso_size with 64-bit arithmeticPeter Maydell2021-05-141-2/+2
| | | | | | | | | | | | | | Coverity notes that when calculating the 64-bit iso_size value in ahci_test_cdrom() we actually only do it with 32-bit arithmetic. This doesn't matter for the current test code because nsectors is always small; but adding the cast avoids the coverity complaints. Fixes: Coverity CID 1432343 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com> Message-Id: <20210506194358.3925-1-peter.maydell@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
* util/compatfd.c: Replaced a malloc call with g_malloc.Mahmoud Mandour2021-05-141-6/+2
| | | | | | | | | | | | | | | | | Replaced a call to malloc() and its respective call to free() with g_malloc() and g_free(). g_malloc() is preferred more than g_try_* functions, which return NULL on error, when the size of the requested allocation is small. This is because allocating few bytes should not be a problem in a healthy system. Otherwise, the system is already in a critical state. Subsequently, removed NULL-checking after g_malloc(). Signed-off-by: Mahmoud Mandour <ma.mandourr@gmail.com> Message-Id: <20210315105814.5188-3-ma.mandourr@gmail.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
* libqtest: refuse QTEST_QEMU_BINARY=qemu-kvmStefan Hajnoczi2021-05-141-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | Some downstreams rename the QEMU binary to "qemu-kvm". This breaks qtest_get_arch(), which attempts to parse the target architecture from the QTEST_QEMU_BINARY environment variable. Print an error instead of returning the architecture "kvm". Things fail in weird ways when the architecture string is bogus. Arguably qtests should always be run in a build directory instead of against an installed QEMU. In any case, printing a clear error when this happens is helpful. Since this is an error that is triggered by the user and not a test failure, use exit(1) instead of abort(). Change the existing abort() call in qtest_get_arch() to exit(1) too for the same reason and to be consistent. Reported-by: Qin Wang <qinwang@rehdat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Emanuele Giuseppe Esposito <eesposit@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Cc: Emanuele Giuseppe Esposito <eesposit@redhat.com> Message-Id: <20210412143050.725918-1-stefanha@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
* docs/devel/qgraph: add troubleshooting informationStefan Hajnoczi2021-05-141-0/+58
| | | | | | | | | | | It can be tricky to troubleshoot qos-test when a test won't execute. Add an explanation of how to trace qgraph node connectivity and find which node has the problem. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Message-Id: <20210412143437.727560-3-stefanha@redhat.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
* libqos/qgraph: fix "UNAVAILBLE" typoStefan Hajnoczi2021-05-141-1/+1
| | | | | | | | Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Message-Id: <20210412143437.727560-2-stefanha@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
* gitlab-ci: Replace YAML anchors by extends (native_test_job)Philippe Mathieu-Daudé2021-05-141-20/+20
| | | | | | | | | | | 'extends' is an alternative to using YAML anchors and is a little more flexible and readable. See: https://docs.gitlab.com/ee/ci/yaml/#extends Reviewed-by: Wainer dos Santos Moschetta <wainersm@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210418233448.1267991-4-f4bug@amsat.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
* gitlab-ci: Replace YAML anchors by extends (native_build_job)Philippe Mathieu-Daudé2021-05-141-32/+32
| | | | | | | | | | | 'extends' is an alternative to using YAML anchors and is a little more flexible and readable. See: https://docs.gitlab.com/ee/ci/yaml/#extends Reviewed-by: Wainer dos Santos Moschetta <wainersm@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210418233448.1267991-3-f4bug@amsat.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
* gitlab-ci: Replace YAML anchors by extends (container_job)Philippe Mathieu-Daudé2021-05-141-38/+38
| | | | | | | | | | | | 'extends' is an alternative to using YAML anchors and is a little more flexible and readable. See: https://docs.gitlab.com/ee/ci/yaml/#extends Reviewed-by: Wainer dos Santos Moschetta <wainersm@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210418233448.1267991-2-f4bug@amsat.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
* tests/docker/dockerfiles: Add ccache to containers where it was missingThomas Huth2021-05-145-0/+5
| | | | | | | Make sure that ccache is available in all containers. Message-Id: <20210414081907.871437-2-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
* Merge remote-tracking branch 'remotes/armbru/tags/pull-misc-2021-05-12' into ↵Peter Maydell2021-05-13208-22410/+78
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | staging Miscellaneous patches for 2021-05-12 # gpg: Signature made Wed 12 May 2021 17:22:15 BST # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * remotes/armbru/tags/pull-misc-2021-05-12: Drop the deprecated unicore32 target Drop the deprecated lm32 target block: Drop the sheepdog block driver Remove the deprecated moxie target monitor/qmp: fix race on CHR_EVENT_CLOSED without OOB Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * Drop the deprecated unicore32 targetMarkus Armbruster2021-05-1242-4582/+16
| | | | | | | | | | | | | | | | | | | | Target unicore32 was deprecated in commit 8e4ff4a8d2b, v5.2.0. See there for rationale. Cc: Guan Xuetao <gxt@mprc.pku.edu.cn> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20210503084034.3804963-3-armbru@redhat.com> Acked-by: Thomas Huth <thuth@redhat.com>
| * Drop the deprecated lm32 targetMarkus Armbruster2021-05-12150-12234/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Target lm32 was deprecated in commit d8498005122, v5.2.0. See there for rationale. Some of its code lives on in device models derived from milkymist ones: hw/char/digic-uart.c and hw/display/bcm2835_fb.c. Cc: Michael Walle <michael@walle.cc> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20210503084034.3804963-2-armbru@redhat.com> Acked-by: Michael Walle <michael@walle.cc> [Trivial conflicts resolved, reST markup fixed]
| * block: Drop the sheepdog block driverMarkus Armbruster2021-05-1217-3593/+14
| | | | | | | | | | | | | | | | | | It was deprecated in commit e1c4269763, v5.2.0. See that commit message for rationale. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20210501075747.3293186-1-armbru@redhat.com> ACKed-by: Peter Krempa <pkrempa@redhat.com>
| * Remove the deprecated moxie targetThomas Huth2021-05-1238-1987/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are no known users of this CPU anymore, and there are no binaries available online which could be used for regression tests, so the code has likely completely bit-rotten already. It's been marked as deprecated since two releases now and nobody spoke up that there is still a need to keep it, thus let's remove it now. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210430160355.698194-1-thuth@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> [Commit message typos fixed, trivial conflicts resolved] Signed-off-by: Markus Armbruster <armbru@redhat.com>
| * monitor/qmp: fix race on CHR_EVENT_CLOSED without OOBStefan Reiter2021-05-121-18/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The QMP dispatcher coroutine holds the qmp_queue_lock over a yield point, where it expects to be rescheduled from the main context. If a CHR_EVENT_CLOSED event is received just then, it can race and block the main thread on the mutex in monitor_qmp_cleanup_queue_and_resume. monitor_resume does not need to be called from main context, so we can call it immediately after popping a request from the queue, which allows us to drop the qmp_queue_lock mutex before yielding. Suggested-by: Wolfgang Bumiller <w.bumiller@proxmox.com> Signed-off-by: Stefan Reiter <s.reiter@proxmox.com> Message-Id: <20210322154024.15011-1-s.reiter@proxmox.com> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Cc: qemu-stable@nongnu.org Signed-off-by: Markus Armbruster <armbru@redhat.com>
* | Merge remote-tracking branch 'remotes/philmd/tags/pflash-20210511' into stagingPeter Maydell2021-05-131-3/+7
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Parallel NOR Flash patches queue - Simplify memory layout when no pflash_cfi02 mapping requested # gpg: Signature made Tue 11 May 2021 17:12:58 BST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * remotes/philmd/tags/pflash-20210511: hw/block/pflash_cfi02: Do not create aliases when not necessary hw/block/pflash_cfi02: Set romd mode in pflash_cfi02_realize() Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | hw/block/pflash_cfi02: Do not create aliases when not necessaryPhilippe Mathieu-Daudé2021-05-111-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When no mapping is requested, it is pointless to create alias regions. Only create them when multiple mappings are requested to simplify the memory layout. The flatview is not changed. For example using 'qemu-system-sh4 -M r2d -S -monitor stdio', * before: (qemu) info mtree address-space: memory 0000000000000000-ffffffffffffffff (prio 0, i/o): system 0000000000000000-0000000000ffffff (prio 0, i/o): pflash 0000000000000000-0000000000ffffff (prio 0, romd): alias pflash-alias @r2d.flash 0000000000000000-0000000000ffffff 0000000004000000-000000000400003f (prio 0, i/o): r2d-fpga 000000000c000000-000000000fffffff (prio 0, ram): r2d.sdram (qemu) info mtree -f FlatView #0 AS "memory", root: system AS "cpu-memory-0", root: system Root memory region: system 0000000000000000-0000000000ffffff (prio 0, romd): r2d.flash 0000000004000000-000000000400003f (prio 0, i/o): r2d-fpga 000000000c000000-000000000fffffff (prio 0, ram): r2d.sdram * after: (qemu) info mtree address-space: memory 0000000000000000-ffffffffffffffff (prio 0, i/o): system 0000000000000000-0000000000ffffff (prio 0, romd): r2d.flash 0000000004000000-000000000400003f (prio 0, i/o): r2d-fpga 000000000c000000-000000000fffffff (prio 0, ram): r2d.sdram (qemu) info mtree -f FlatView #0 AS "memory", root: system AS "cpu-memory-0", root: system Root memory region: system 0000000000000000-0000000000ffffff (prio 0, romd): r2d.flash 0000000004000000-000000000400003f (prio 0, i/o): r2d-fpga 000000000c000000-000000000fffffff (prio 0, ram): r2d.sdram Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210325120921.858993-3-f4bug@amsat.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
| * | hw/block/pflash_cfi02: Set romd mode in pflash_cfi02_realize()Philippe Mathieu-Daudé2021-05-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ROMD mode isn't related to mapping setup. Ideally we'd set this mode when the state machine resets, but for now simply move it to pflash_cfi02_realize() to not introduce logical change. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210325120921.858993-2-f4bug@amsat.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
* | | Merge remote-tracking branch ↵Peter Maydell2021-05-1247-789/+1759
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'remotes/alistair/tags/pull-riscv-to-apply-20210511' into staging A large collection of RISC-V fixes, improvements and features - Clenaup some left over v1.9 code - Documentation improvements - Support for the shakti_c machine - Internal cleanup of the CSR accesses - Updates to the OpenTitan platform - Support for the virtio-vga - Fix for the saturate subtract in vector extensions - Experimental support for the ePMP spec - A range of other internal code cleanups and bug fixes # gpg: Signature made Tue 11 May 2021 11:17:10 BST # gpg: using RSA key F6C4AC46D4934868D3B8CE8F21E10D29DF977054 # gpg: Good signature from "Alistair Francis <alistair@alistair23.me>" [full] # Primary key fingerprint: F6C4 AC46 D493 4868 D3B8 CE8F 21E1 0D29 DF97 7054 * remotes/alistair/tags/pull-riscv-to-apply-20210511: (42 commits) target/riscv: Fix the RV64H decode comment target/riscv: Consolidate RV32/64 16-bit instructions target/riscv: Consolidate RV32/64 32-bit instructions target/riscv: Remove an unused CASE_OP_32_64 macro target/riscv: Remove the unused HSTATUS_WPRI macro target/riscv: Remove the hardcoded SATP_MODE macro target/riscv: Remove the hardcoded MSTATUS_SD macro target/riscv: Remove the hardcoded HGATP_MODE macro target/riscv: Remove the hardcoded SSTATUS_SD macro target/riscv: Remove the hardcoded RVXLEN macro target/riscv: fix a typo with interrupt names fpu/softfloat: set invalid excp flag for RISC-V muladd instructions hw/riscv: Fix OT IBEX reset vector target/riscv: fix exception index on instruction access fault target/riscv: fix vrgather macro index variable type bug target/riscv: Add ePMP support for the Ibex CPU target/riscv/pmp: Remove outdated comment target/riscv: Add a config option for ePMP target/riscv: Implementation of enhanced PMP (ePMP) target/riscv: Add ePMP CSR access functions ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | | target/riscv: Fix the RV64H decode commentAlistair Francis2021-05-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | BugLink: https://gitlab.com/qemu-project/qemu/-/issues/47 Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 024ce841221c1d15c74b253512428c4baca7e4ba.1619234854.git.alistair.francis@wdc.com
| * | | target/riscv: Consolidate RV32/64 16-bit instructionsAlistair Francis2021-05-115-72/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes the insn16-32.decode and insn16-64.decode decode files and consolidates the instructions into the general RISC-V insn16.decode decode tree. This means that all of the instructions are avaliable in both the 32-bit and 64-bit builds. This also means that we run a check to ensure we are running a 64-bit softmmu before we execute the 64-bit only instructions. This allows us to include the 32-bit instructions in the 64-bit build, while also ensuring that 32-bit only software can not execute the instructions. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 01e2b0efeae311adc7ebf133c2cde6a7a37224d7.1619234854.git.alistair.francis@wdc.com
| * | | target/riscv: Consolidate RV32/64 32-bit instructionsAlistair Francis2021-05-1114-150/+166
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes the insn32-64.decode decode file and consolidates the instructions into the general RISC-V insn32.decode decode tree. This means that all of the instructions are avaliable in both the 32-bit and 64-bit builds. This also means that we run a check to ensure we are running a 64-bit softmmu before we execute the 64-bit only instructions. This allows us to include the 32-bit instructions in the 64-bit build, while also ensuring that 32-bit only software can not execute the instructions. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: db709360e2be47d2f9c6483ab973fe4791aefa77.1619234854.git.alistair.francis@wdc.com
| * | | target/riscv: Remove an unused CASE_OP_32_64 macroAlistair Francis2021-05-111-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Message-id: 4853459564af35a6690120c74ad892f60cec35ff.1619234854.git.alistair.francis@wdc.com
| * | | target/riscv: Remove the unused HSTATUS_WPRI macroAlistair Francis2021-05-111-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Message-id: e095b57af0d419c8ed822958f04dfc732d7beb7e.1619234854.git.alistair.francis@wdc.com
| * | | target/riscv: Remove the hardcoded SATP_MODE macroAlistair Francis2021-05-114-28/+56
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 6b701769d6621f45ba1739334198e36a64fe04df.1619234854.git.alistair.francis@wdc.com
| * | | target/riscv: Remove the hardcoded MSTATUS_SD macroAlistair Francis2021-05-113-14/+27
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: fcc125d96da941b56c817c9dd6068dc36478fc53.1619234854.git.alistair.francis@wdc.com
| * | | target/riscv: Remove the hardcoded HGATP_MODE macroAlistair Francis2021-05-112-20/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Message-id: 665f624bfdc2e3ca64265004b07de7489c77a766.1619234854.git.alistair.francis@wdc.com
| * | | target/riscv: Remove the hardcoded SSTATUS_SD macroAlistair Francis2021-05-112-7/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This also ensures that the SD bit is not writable. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Message-id: 9ea842309f0fd7adff172790f5b5fc058b40f2f1.1619234854.git.alistair.francis@wdc.com
| * | | target/riscv: Remove the hardcoded RVXLEN macroAlistair Francis2021-05-112-7/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Message-id: a07bc0c6dc4958681b4f93cbc5d0acc31ed3344a.1619234854.git.alistair.francis@wdc.com
| * | | target/riscv: fix a typo with interrupt namesEmmanuel Blot2021-05-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Interrupt names have been swapped in 205377f8 and do not follow IRQ_*_EXT definition order. Signed-off-by: Emmanuel Blot <emmanuel.blot@sifive.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210421133236.11323-1-emmanuel.blot@sifive.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
| * | | fpu/softfloat: set invalid excp flag for RISC-V muladd instructionsFrank Chang2021-05-111-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In IEEE 754-2008 spec: Invalid operation exception is signaled when doing: fusedMultiplyAdd(0, Inf, c) or fusedMultiplyAdd(Inf, 0, c) unless c is a quiet NaN; if c is a quiet NaN then it is implementation defined whether the invalid operation exception is signaled. In RISC-V Unprivileged ISA spec: The fused multiply-add instructions must set the invalid operation exception flag when the multiplicands are Inf and zero, even when the addend is a quiet NaN. This commit set invalid operation execption flag for RISC-V when multiplicands of muladd instructions are Inf and zero. Signed-off-by: Frank Chang <frank.chang@sifive.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210420013150.21992-1-frank.chang@sifive.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
| * | | hw/riscv: Fix OT IBEX reset vectorAlexander Wagner2021-05-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The IBEX documentation [1] specifies the reset vector to be "the most significant 3 bytes of the boot address and the reset value (0x80) as the least significant byte". [1] https://github.com/lowRISC/ibex/blob/master/doc/03_reference/exception_interrupts.rst Signed-off-by: Alexander Wagner <alexander.wagner@ulal.de> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210420080008.119798-1-alexander.wagner@ulal.de Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
| * | | target/riscv: fix exception index on instruction access faultEmmanuel Blot2021-05-111-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When no MMU is used and the guest code attempts to fetch an instruction from an invalid memory location, the exception index defaults to a data load access fault, rather an instruction access fault. Signed-off-by: Emmanuel Blot <emmanuel.blot@sifive.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: FB9EA197-B018-4879-AB0F-922C2047A08B@sifive.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
| * | | target/riscv: fix vrgather macro index variable type bugFrank Chang2021-05-111-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ETYPE may be type of uint64_t, thus index variable has to be declared as type of uint64_t, too. Otherwise the value read from vs1 register may be truncated to type of uint32_t. Signed-off-by: Frank Chang <frank.chang@sifive.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210419060302.14075-1-frank.chang@sifive.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
| * | | target/riscv: Add ePMP support for the Ibex CPUAlistair Francis2021-05-111-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The physical Ibex CPU has ePMP support and it's enabled for the OpenTitan machine so let's enable ePMP support for the Ibex CPU in QEMU. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Message-id: d426baabab0c9361ed2e989dbe416e417a551fd1.1618812899.git.alistair.francis@wdc.com
| * | | target/riscv/pmp: Remove outdated commentAlistair Francis2021-05-111-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Message-id: 10387eec21d2f17c499a78fdba85280cab4dd27f.1618812899.git.alistair.francis@wdc.com
| * | | target/riscv: Add a config option for ePMPHou Weiying2021-05-112-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a config option to enable experimental support for ePMP. This is disabled by default and can be enabled with 'x-epmp=true'. Signed-off-by: Hongzheng-Li <Ethan.Lee.QNL@gmail.com> Signed-off-by: Hou Weiying <weiying_hou@outlook.com> Signed-off-by: Myriad-Dreamin <camiyoru@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Message-id: a22ccdaf9314078bc735d3b323f966623f8af020.1618812899.git.alistair.francis@wdc.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | | target/riscv: Implementation of enhanced PMP (ePMP)Hou Weiying2021-05-111-8/+146
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds support for ePMP v0.9.1. The ePMP spec can be found in: https://docs.google.com/document/d/1Mh_aiHYxemL0umN3GTTw8vsbmzHZ_nxZXgjgOUzbvc8 Signed-off-by: Hongzheng-Li <Ethan.Lee.QNL@gmail.com> Signed-off-by: Hou Weiying <weiying_hou@outlook.com> Signed-off-by: Myriad-Dreamin <camiyoru@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Message-id: fef23b885f9649a4d54e7c98b168bdec5d297bb1.1618812899.git.alistair.francis@wdc.com [ Changes by AF: - Rebase on master - Update to latest spec - Use a switch case to handle ePMP MML permissions - Fix a few bugs ] Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
| * | | target/riscv: Add ePMP CSR access functionsHou Weiying2021-05-115-0/+76
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Hongzheng-Li <Ethan.Lee.QNL@gmail.com> Signed-off-by: Hou Weiying <weiying_hou@outlook.com> Signed-off-by: Myriad-Dreamin <camiyoru@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Message-id: 270762cb2507fba6a9eeb99a774cf49f7da9cc32.1618812899.git.alistair.francis@wdc.com [ Changes by AF: - Rebase on master - Fix build errors - Fix some style issues ] Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>