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* hw/pci-bridge/cxl_upstream: Provide x-speed and x-width properties.Jonathan Cameron2024-11-041-13/+10
* hw/pci-bridge/cxl_root_port: Provide x-speed and x-width properties.Jonathan Cameron2024-11-041-0/+5
* hw/acpi: Generic Initiator - add missing object class property descriptions.Jonathan Cameron2024-11-041-0/+4
* hw/acpi: Make storage of node id uint32_t to reduce fragilityJonathan Cameron2024-11-043-3/+3
* hw/acpi: Generic Port Affinity Structure supportJonathan Cameron2024-11-049-5/+202
* hw/pci-host/gpex-acpi: Use acpi_uid property.Jonathan Cameron2024-11-041-1/+4
* hw/i386/acpi: Use TYPE_PXB_BUS property acpi_uid for DSDTJonathan Cameron2024-11-041-1/+4
* hw/pci-bridge: Add acpi_uid property to TYPE_PXB_BUSJonathan Cameron2024-11-041-0/+13
* acpi/pci: Move Generic Initiator object handling into acpi/pci.*Jonathan Cameron2024-11-047-147/+127
* hw/pci: Add a busnr property to pci_props and use for acpi/giJonathan Cameron2024-11-042-5/+23
* hw/acpi: Rename build_all_acpi_generic_initiators() to build_acpi_generic_ini...Jonathan Cameron2024-11-041-2/+2
* hw/acpi: Move AML building code for Generic Initiators to aml_build.cJonathan Cameron2024-11-044-59/+51
* hw/acpi/GI: Fix trivial parameter alignment issue.Jonathan Cameron2024-11-041-1/+1
* hw/acpi: Fix ordering of BDF in Generic Initiator PCI Device Handle.Jonathan Cameron2024-11-041-1/+2
* docs: fix vhost-user protocol docluzhixing123452024-11-041-11/+13
* softmmu: Expand comments describing max_bounce_buffer_sizeMattias Nissler2024-11-042-2/+13
* Merge tag 'pull-riscv-to-apply-20241031-1' of https://github.com/alistair23/q...Peter Maydell2024-10-3165-139/+4790
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| * target/riscv: Fix vcompress with rvv_ta_all_1sAnton Blanchard2024-10-311-1/+1
| * target/riscv/kvm: clarify how 'riscv-aia' default worksDaniel Henrique Barboza2024-10-311-10/+4
| * target/riscv/kvm: set 'aia_mode' to default in error pathDaniel Henrique Barboza2024-10-311-7/+15
| * docs/specs: add riscv-iommuDaniel Henrique Barboza2024-10-313-0/+104
| * qtest/riscv-iommu-test: add init queues testDaniel Henrique Barboza2024-10-312-0/+155
| * hw/riscv/riscv-iommu: add DBG supportTomasz Jeznach2024-10-312-0/+76
| * hw/riscv/riscv-iommu: add ATS supportTomasz Jeznach2024-10-314-3/+171
| * hw/riscv/riscv-iommu: add Address Translation Cache (IOATC)Tomasz Jeznach2024-10-312-4/+203
| * test/qtest: add riscv-iommu-pci testsDaniel Henrique Barboza2024-10-315-0/+237
| * hw/riscv/virt.c: support for RISC-V IOMMU PCIDevice hotplugTomasz Jeznach2024-10-311-1/+32
| * hw/riscv: add riscv-iommu-pci reference deviceTomasz Jeznach2024-10-312-1/+203
| * pci-ids.rst: add Red Hat pci-id for RISC-V IOMMU deviceDaniel Henrique Barboza2024-10-312-0/+3
| * hw/riscv: add RISC-V IOMMU base emulationTomasz Jeznach2024-10-319-0/+2222
| * hw/riscv: add riscv-iommu-bits.hTomasz Jeznach2024-10-311-0/+345
| * exec/memtxattr: add process identifier to the transaction attributesTomasz Jeznach2024-10-311-0/+5
| * target/riscv: Expose zicfiss extension as a cpu propertyDeepak Gupta2024-10-311-0/+1
| * disas/riscv: enable disassembly for compressed sspush/sspopchkDeepak Gupta2024-10-312-1/+19
| * disas/riscv: enable disassembly for zicfiss instructionsDeepak Gupta2024-10-312-1/+40
| * target/riscv: compressed encodings for sspush and sspopchkDeepak Gupta2024-10-301-0/+4
| * target/riscv: implement zicfiss instructionsDeepak Gupta2024-10-304-2/+140
| * target/riscv: update `decode_save_opc` to store extra word2Deepak Gupta2024-10-3011-34/+35
| * target/riscv: AMO operations always raise store/AMO faultDeepak Gupta2024-10-304-2/+30
| * target/riscv: mmu changes for zicfiss shadow stack protectionDeepak Gupta2024-10-302-14/+53
| * target/riscv: tb flag for shadow stack instructionsDeepak Gupta2024-10-303-0/+9
| * target/riscv: introduce ssp and enabling controls for zicfissDeepak Gupta2024-10-306-0/+111
| * target/riscv: Add zicfiss extensionDeepak Gupta2024-10-303-0/+25
| * target/riscv: Expose zicfilp extension as a cpu propertyDeepak Gupta2024-10-301-0/+1
| * disas/riscv: enable `lpad` disassemblyDeepak Gupta2024-10-302-1/+19
| * target/riscv: zicfilp `lpad` impl and branch trackingDeepak Gupta2024-10-303-1/+60
| * target/riscv: tracking indirect branches (fcfi) for zicfilpDeepak Gupta2024-10-304-0/+39
| * target/riscv: additional code information for sw checkDeepak Gupta2024-10-303-0/+6
| * target/riscv: save and restore elp state on priv transitionsDeepak Gupta2024-10-303-0/+72
| * target/riscv: Introduce elp state and enabling controls for zicfilpDeepak Gupta2024-10-307-1/+68