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| * hw/net: Add NPCMXXX GMAC deviceHao Wu2024-02-024-1/+823
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch implements the basic registers of GMAC device and sets registers for networking functionalities. Squashed IRQ Implementation patch into this one for compliation. Tested: The following message shows up with the change: Broadcom BCM54612E stmmac-0:00: attached PHY driver [Broadcom BCM54612E] (mii_bus:phy_addr=stmmac-0:00, irq=POLL) stmmaceth f0802000.eth eth0: Link is Up - 1Gbps/Full - flow control rx/tx Change-Id: If71c6d486b95edcccba109ba454870714d7e0940 Signed-off-by: Hao Wu <wuhaotsh@google.com> Signed-off-by: Nabih Estefan Diaz <nabihestefan@google.com> Reviewed-by: Tyrone Ting <kfting@nuvoton.com> Message-id: 20240131002800.989285-2-nabihestefan@google.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/xen: convert stderr prints to error/warn reportsManos Pitsidianakis2024-02-022-9/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to the QEMU Coding Style document: > Do not use printf(), fprintf() or monitor_printf(). Instead, use > error_report() or error_vreport() from error-report.h. This ensures the > error is reported in the right place (current monitor or stderr), and in > a uniform format. > Use error_printf() & friends to print additional information. This commit changes fprintfs that report warnings and errors to the appropriate report functions. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 42a8953553cf68e8bacada966f93af4fbce45919.1706544115.git.manos.pitsidianakis@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/xen/xen-hvm-common.c: convert DPRINTF to tracepointsManos Pitsidianakis2024-02-022-18/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Tracing DPRINTFs to stderr might not be desired. A developer that relies on tracepoints should be able to opt-in to each tracepoint and rely on QEMU's log redirection, instead of stderr by default. This commit converts DPRINTFs in this file that are used for tracing into tracepoints. Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: b000ab73022dfeb7a7ab0ee8fd0f41fb208adaf0.1706544115.git.manos.pitsidianakis@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/xen/xen-mapcache.c: convert DPRINTF to tracepointsManos Pitsidianakis2024-02-022-30/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Tracing DPRINTFs to stderr might not be desired. A developer that relies on tracepoints should be able to opt-in to each tracepoint and rely on QEMU's log redirection, instead of stderr by default. This commit converts DPRINTFs in this file that are used for tracing into tracepoints. Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 2fbe1fbc59078e384761c932e97cfa4276a53d75.1706544115.git.manos.pitsidianakis@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/arm/xen_arm.c: convert DPRINTF to trace events and error/warn reportsManos Pitsidianakis2024-02-022-12/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tracing DPRINTFs to stderr might not be desired. A developer that relies on trace events should be able to opt-in to each trace event and rely on QEMU's log redirection, instead of stderr by default. This commit converts DPRINTFs in this file that are used for tracing into trace events. Errors or warnings are converted to error_report and warn_report calls. Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: fe5e3bd54231abe933f95a24e0e88208cd8cfd8f.1706544115.git.manos.pitsidianakis@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/arm/z2: convert DPRINTF to trace events and guest errorsManos Pitsidianakis2024-02-022-19/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tracing DPRINTFs to stderr might not be desired. A developer that relies on trace events should be able to opt-in to each trace event and rely on QEMU's log redirection, instead of stderr by default. This commit converts DPRINTFs in this file that are used for tracing into trace events. DPRINTFs that report guest errors are logged with LOG_GUEST_ERROR. Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 799c5141c5751cf2341e1d095349612e046424a8.1706544115.git.manos.pitsidianakis@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/arm/strongarm.c: convert DPRINTF to trace events and guest errorsManos Pitsidianakis2024-02-022-30/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tracing DPRINTFs to stderr might not be desired. A developer that relies on trace events should be able to opt-in to each trace event and rely on QEMU's log redirection, instead of stderr by default. This commit converts DPRINTFs in this file that are used for tracing into trace events. DPRINTFs that report guest errors are logged with LOG_GUEST_ERROR.# Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 39db71dd87bf2007cf7812f3d91dde53887f1f2f.1706544115.git.manos.pitsidianakis@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * pci-host: designware: Limit value range of iATU viewport registerGuenter Roeck2024-02-021-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The latest version of qemu (v8.2.0-869-g7a1dc45af5) crashes when booting the mcimx7d-sabre emulation with Linux v5.11 and later. qemu-system-arm: ../system/memory.c:2750: memory_region_set_alias_offset: Assertion `mr->alias' failed. Problem is that the Designware PCIe emulation accepts the full value range for the iATU Viewport Register. However, both hardware and emulation only support four inbound and four outbound viewports. The Linux kernel determines the number of supported viewports by writing 0xff into the viewport register and reading the value back. The expected value when reading the register is the highest supported viewport index. Match that code by masking the supported viewport value range when the register is written. With this change, the Linux kernel reports imx6q-pcie 33800000.pcie: iATU: unroll F, 4 ob, 4 ib, align 0K, limit 4G as expected and supported. Fixes: d64e5eabc4c7 ("pci: Add support for Designware IP block") Cc: Andrey Smirnov <andrew.smirnov@gmail.com> Cc: Nikita Ostrenkov <n.ostrenkov@gmail.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Message-id: 20240129060055.2616989-1-linux@roeck-us.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/arm/zynq: Check for CPU types in machine_run_board_init()Philippe Mathieu-Daudé2024-02-021-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | Leverage the common code introduced in commit c9cf636d48 ("machine: Add a valid_cpu_types property") to check for the single valid CPU type. Remove the now unused MachineClass::default_cpu_type field. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240129151828.59544-10-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/arm/vexpress: Check for CPU types in machine_run_board_init()Philippe Mathieu-Daudé2024-02-021-2/+10
| | | | | | | | | | | | | | | | | | | | | | | | Leverage the common code introduced in commit c9cf636d48 ("machine: Add a valid_cpu_types property") to check for the single valid CPU type. Remove the now unused MachineClass::default_cpu_type field. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240129151828.59544-9-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/arm/npcm7xx_boards: Simplify setting MachineClass::valid_cpu_types[]Philippe Mathieu-Daudé2024-02-021-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The npcm7xx Soc is created with a Cortex-A9 core, see in hw/arm/npcm7xx.c: static void npcm7xx_init(Object *obj) { NPCM7xxState *s = NPCM7XX(obj); for (int i = 0; i < NPCM7XX_MAX_NUM_CPUS; i++) { object_initialize_child(obj, "cpu[*]", &s->cpu[i], ARM_CPU_TYPE_NAME("cortex-a9")); } The MachineClass::default_cpu_type field is ignored: delete it. Use the common code introduced in commit c9cf636d48 ("machine: Add a valid_cpu_types property") to check for valid CPU type at the board level. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240129151828.59544-8-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/arm/musca: Simplify setting MachineClass::valid_cpu_types[]Philippe Mathieu-Daudé2024-02-021-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Musca boards use the embedded subsystems (SSE) tied to a specific Cortex core. Our models only use the Cortex-M33. Use the common code introduced in commit c9cf636d48 ("machine: Add a valid_cpu_types property") to check for valid CPU type at the board level. Remove the now unused MachineClass::default_cpu_type field. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240129151828.59544-7-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/arm/msf2: Simplify setting MachineClass::valid_cpu_types[]Philippe Mathieu-Daudé2024-02-023-9/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The M2Sxxx SoC family can only be used with Cortex-M3. Propagating the CPU type from the board level is pointless. Hard-code the CPU type at the SoC level. Remove the now ignored MachineClass::default_cpu_type field. Use the common code introduced in commit c9cf636d48 ("machine: Add a valid_cpu_types property") to check for valid CPU type at the board level. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240129151828.59544-6-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/arm/highbank: Check for CPU types in machine_run_board_init()Philippe Mathieu-Daudé2024-02-021-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Restrict MachineClass::valid_cpu_types[] to the single valid CPU types. Instead of ignoring invalid CPU type requested by the user: $ qemu-system-arm -M midway -cpu cortex-a7 -S -monitor stdio QEMU 8.2.50 monitor - type 'help' for more information (qemu) info qom-tree /machine (midway-machine) /cpu[0] (cortex-a15-arm-cpu) ... we now display an error: $ qemu-system-arm -M midway -cpu cortex-a7 qemu-system-arm: Invalid CPU model: cortex-a7 The only valid type is: cortex-a15 Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Message-id: 20240129151828.59544-5-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/arm/highbank: Add missing QOM parent for CPU coresPhilippe Mathieu-Daudé2024-02-021-0/+1
| | | | | | | | | | | | | | | | | | | | | | QDev objects created with qdev_new() need to manually add their parent relationship with object_property_add_child(). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Message-id: 20240129151828.59544-4-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/arm/exynos: Check for CPU types in machine_run_board_init()Philippe Mathieu-Daudé2024-02-021-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Restrict MachineClass::valid_cpu_types[] to the single valid CPU type. Instead of ignoring invalid CPU type requested by the user: $ qemu-system-arm -M nuri -cpu cortex-a7 -S -monitor stdio QEMU 8.2.50 monitor - type 'help' for more information (qemu) info qom-tree /machine (nuri-machine) /soc (exynos4210) /cpu[0] (cortex-a9-arm-cpu) ... We now display an error: $ qemu-system-arm -M nuri -cpu cortex-a7 qemu-system-arm: Invalid CPU model: cortex-a7 The only valid type is: cortex-a9 Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Message-id: 20240129151828.59544-3-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/arm/exynos: Add missing QOM parent for CPU coresPhilippe Mathieu-Daudé2024-02-021-0/+1
| | | | | | | | | | | | | | | | | | | | | | QDev objects created with qdev_new() need to manually add their parent relationship with object_property_add_child(). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Message-id: 20240129151828.59544-2-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * doc/sphinx/hxtool.py: add optional label argument to SRST directiveDavid Woodhouse2024-02-024-4/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We can't just embed labels directly into files like qemu-options.hx which are included from multiple top-level rST files, because Sphinx sees the labels as duplicate: https://github.com/sphinx-doc/sphinx/issues/9707 So add an optional argument to the SRST directive which causes a label of the form '.. _DOCNAME-HXFILE-LABEL:' to be emitted, where 'DOCNAME' is the name of the top level rST file, 'HXFILE' is the filename of the .hx file, and 'LABEL' is the text provided within the 'SRST()' directive. Using the DOCNAME of the top-level rST document means that it is unique even when the .hx file is included from two different documents, as is the case for qemu-options.hx Now where the Xen PV documentation refers to the documentation for the -initrd command line option, it can emit a link directly to it as '<system/invocation-qemu-options-initrd>'. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Paul Durrant <paul@xen.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20240130190348.682912-1-dwmw2@infradead.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * target/arm: Reinstate "vfp" property on AArch32 CPUsPeter Maydell2024-02-021-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In commit 4315f7c614743 we restructured the logic for creating the VFP related properties to avoid testing the aa32_simd_r32 feature on AArch64 CPUs. However in the process we accidentally stopped exposing the "vfp" QOM property on AArch32 TCG CPUs. This mostly hasn't had any ill effects because not many people want to disable VFP, but it wasn't intentional. Reinstate the property. Cc: qemu-stable@nongnu.org Fixes: 4315f7c614743 ("target/arm: Restructure has_vfp_d32 test") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2098 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20240126193432.2210558-1-peter.maydell@linaro.org
| * tests/qtest/xlnx-versal-trng-test.c: Drop use of variable length arrayPeter Maydell2024-02-021-8/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This test program is the last use of any variable length array in the codebase. If we can get rid of all uses of VLAs we can make the compiler error on new additions. This is a defensive measure against security bugs where an on-stack dynamic allocation isn't correctly size-checked (e.g. CVE-2021-3527). In this case the test code didn't even want a variable-sized array, it was just accidentally using syntax that gave it one. (The array size for C has to be an actual constant expression, not just something that happens to be known to be constant...) Remove the VLA usage. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-id: 20240125173211.1786196-2-peter.maydell@linaro.org
| * target/arm: Add ID_AA64ZFR0_EL1.B16B16 to the exposed-to-userspace setPeter Maydell2024-02-022-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | In kernel commit 5d5b4e8c2d9ec ("arm64/sve: Report FEAT_SVE_B16B16 to userspace") Linux added ID_AA64ZFR0_el1.B16B16 to the set of ID register fields which it exposes to userspace. Update our exported_bits mask to include this. (This doesn't yet change any behaviour for us, because we don't yet have any CPUs that implement this feature, which is part of SVE2.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20240125134304.1470404-1-peter.maydell@linaro.org
| * qemu-options.hx: Improve -serial option documentationPeter Maydell2024-02-021-3/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The -serial option documentation is a bit brief about '-serial none' and '-serial null'. In particular it's not very clear about the difference between them, and it doesn't mention that it's up to the machine model whether '-serial none' means "don't create the serial port" or "don't wire the serial port up to anything". Expand on these points. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240122163607.459769-3-peter.maydell@linaro.org
| * system/vl.c: Fix handling of '-serial none -serial something'Peter Maydell2024-02-021-9/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently if the user passes multiple -serial options on the command line, we mostly treat those as applying to the different serial devices in order, so that for example -serial stdio -serial file:filename will connect the first serial port to stdio and the second to the named file. The exception to this is the '-serial none' serial device type. This means "don't allocate this serial device", but a bug means that following -serial options are not correctly handled, so that -serial none -serial stdio has the unexpected effect that stdio is connected to the first serial port, not the second. This is a very long-standing bug that dates back at least as far as commit 998bbd74b9d81 from 2009. Make the 'none' serial type move forward in the indexing of serial devices like all the other serial types, so that any subsequent -serial options are correctly handled. Note that if your commandline mistakenly had a '-serial none' that was being overridden by a following '-serial something' option, you should delete the unnecessary '-serial none'. This will give you the same behaviour as before, on QEMU versions both with and without this bug fix. Cc: qemu-stable@nongnu.org Reported-by: Bohdan Kostiv <bohdan.kostiv@tii.ae> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20240122163607.459769-2-peter.maydell@linaro.org Fixes: 998bbd74b9d81 ("default devices: core code & serial lines") Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/core: Remove transitional infrastructure from BusClassPeter Maydell2024-02-022-69/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BusClass currently has transitional infrastructure to support subclasses which implement the legacy BusClass::reset method rather than the Resettable interface. We have now removed all the users of BusClass::reset in the tree, so we can remove the transitional infrastructure. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Cédric Le Goater <clg@redhat.com> Acked-by: Maciej S. Szmigiero <maciej.szmigiero@oracle.com> Tested-by: Cédric Le Goater <clg@redhat.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-id: 20240119163512.3810301-6-peter.maydell@linaro.org
| * hw/s390x/css-bridge: switch virtual-css bus to 3-phase-resetPeter Maydell2024-02-021-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Switch the s390x virtual-css bus from using BusClass::reset to the Resettable interface. This has no behavioural change, because the BusClass code to support subclasses that use the legacy BusClass::reset will call that method in the hold phase of 3-phase reset. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Cédric Le Goater <clg@redhat.com> Acked-by: Maciej S. Szmigiero <maciej.szmigiero@oracle.com> Tested-by: Cédric Le Goater <clg@redhat.com> Reviewed-by: Halil Pasic <pasic@linux.ibm.com> Reviewed-by: Eric Farman <farman@linux.ibm.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-id: 20240119163512.3810301-5-peter.maydell@linaro.org
| * adb: Switch bus reset to 3-phase-resetPeter Maydell2024-02-021-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Switch the ADB bus from using BusClass::reset to the Resettable interface. This has no behavioural change, because the BusClass code to support subclasses that use the legacy BusClass::reset will call that method in the hold phase of 3-phase reset. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Cédric Le Goater <clg@redhat.com> Acked-by: Maciej S. Szmigiero <maciej.szmigiero@oracle.com> Tested-by: Cédric Le Goater <clg@redhat.com> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-id: 20240119163512.3810301-4-peter.maydell@linaro.org
| * vmbus: Switch bus reset to 3-phase-resetPeter Maydell2024-02-021-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Switch vmbus from using BusClass::reset to the Resettable interface. This has no behavioural change, because the BusClass code to support subclasses that use the legacy BusClass::reset will call that method in the hold phase of 3-phase reset. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Cédric Le Goater <clg@redhat.com> Acked-by: Maciej S. Szmigiero <maciej.szmigiero@oracle.com> Tested-by: Cédric Le Goater <clg@redhat.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-id: 20240119163512.3810301-3-peter.maydell@linaro.org
| * pci: Switch bus reset to 3-phase-resetPeter Maydell2024-02-021-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Switch the PCI bus from using BusClass::reset to the Resettable interface. This has no behavioural change, because the BusClass code to support subclasses that use the legacy BusClass::reset will call that method in the hold phase of 3-phase reset. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Cédric Le Goater <clg@redhat.com> Tested-by: Cédric Le Goater <clg@redhat.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-id: 20240119163512.3810301-2-peter.maydell@linaro.org
| * target/arm: fix exception syndrome for AArch32 bkpt insnJan Klötzke2024-02-022-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | Debug exceptions that target AArch32 Hyp mode are reported differently than on AAarch64. Internally, Qemu uses the AArch64 syndromes. Therefore such exceptions need to be either converted to a prefetch abort (breakpoints, vector catch) or a data abort (watchpoints). Cc: qemu-stable@nongnu.org Signed-off-by: Jan Klötzke <jan.kloetzke@kernkonzept.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20240127202758.3326381-1-jan.kloetzke@kernkonzept.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* | Merge tag 'pull-nic-config-2-20240202' of ↵Peter Maydell2024-02-0281-560/+547
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.infradead.org/users/dwmw2/qemu into staging Rework matching of network devices to -nic options (v2) # -----BEGIN PGP SIGNATURE----- # # iQJGBAABCAAwFiEEMUsIrNDeSBEzpfKGm+mA/QrAFUQFAmW9F9oSHGR3bXdAYW1h # em9uLmNvLnVrAAoJEJvpgP0KwBVEVwsQAIIDTYb3R/vxpf6w9n+n6FWCbFt/ihPC # RbQ/Zrnoj6K3dCj6U3zJDpa5qpJ27/AiFfVv/gU13d+ELf72uHKE50GkQa2r/Fl8 # cPoW1LRinGFGxQS+WY5OnRYJ2mBaVx6THUd5DCgb5wpkBgVe21XsZLr6pfAapNCG # c22HBaIb8sHPeIV2wf1xZKEswNGlkXuylBnS4wayncRKa2vOYPAAO7P4PvwNuMnb # j0pLyLfD6Zx+6D53ema4zpcDh7d1Qn5eDGHQmy55Ml5AleC05gsDzrCEeiT4vU9T # 9fj6w8NlyLkPYLqTodAEeaUpUCFhMO312VPSM163iYOUDtjqz10bBZncgbRrsR5I # 30bKqQvEQ8PAQZWILNhfyHrYw4/O2Y88sUf/lE8lGmHvVYda+yqq5lgEyPFHbJwh # ZCEJQalc6tRATIWUqI/Lw+X7hqnJ29c14hkEVG8L0KW0fIB/cqXUStzcUt87VkA2 # wwQI4aAGWZE1pvFvhmeM2rTDXfg1uD8SoFDTj4ORJl/7PEemf1yraKUYb8YdRE0z # dQWfLmSnl1JkTa0yVF5MtnoTJUP8PX+hhJROfdwvfd1sU5s98O5pivYf7arUybVl # j4g4qwm8IUBiAznZzbhdp38Q91RFvBKjjLsx/+Ts9avZTL0xCUcCvt21wzqWhbkc # X7KdrU/XxVry # =4PuR # -----END PGP SIGNATURE----- # gpg: Signature made Fri 02 Feb 2024 16:27:06 GMT # gpg: using RSA key 314B08ACD0DE481133A5F2869BE980FD0AC01544 # gpg: issuer "dwmw@amazon.co.uk" # gpg: Good signature from "David Woodhouse <dwmw@amazon.co.uk>" [unknown] # gpg: aka "David Woodhouse <dwmw@amazon.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 314B 08AC D0DE 4811 33A5 F286 9BE9 80FD 0AC0 1544 * tag 'pull-nic-config-2-20240202' of git://git.infradead.org/users/dwmw2/qemu: (47 commits) net: make nb_nics and nd_table[] static in net/net.c net: remove qemu_show_nic_models(), qemu_find_nic_model() hw/pci: remove pci_nic_init_nofail() net: remove qemu_check_nic_model() hw/xtensa/xtfpga: use qemu_create_nic_device() hw/sparc/sun4m: use qemu_find_nic_info() hw/s390x/s390-virtio-ccw: use qemu_create_nic_device() hw/riscv: use qemu_configure_nic_device() hw/openrisc/openrisc_sim: use qemu_create_nic_device() hw/net/lasi_i82596: use qemu_create_nic_device() hw/net/lasi_i82596: Re-enable build hw/mips/jazz: use qemu_find_nic_info() hw/mips/mipssim: use qemu_create_nic_device() hw/microblaze: use qemu_configure_nic_device() hw/m68k/q800: use qemu_find_nic_info() hw/m68k/mcf5208: use qemu_create_nic_device() hw/net/etraxfs-eth: use qemu_configure_nic_device() hw/arm: use qemu_configure_nic_device() hw/arm/stellaris: use qemu_find_nic_info() hw/arm/npcm7xx: use qemu_configure_nic_device, allow emc0/emc1 as aliases ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * net: make nb_nics and nd_table[] static in net/net.cDavid Woodhouse2024-02-023-6/+3
| | | | | | | | | | | | | | | | | | Also remove the stale declaration of host_net_devices; the actual definition was removed long ago in commit 7cc28cb06104 ("net: Remove the deprecated 'host_net_add' and 'host_net_remove' HMP commands") Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
| * net: remove qemu_show_nic_models(), qemu_find_nic_model()David Woodhouse2024-02-022-36/+6
| | | | | | | | | | | | | | | | | | | | These old functions can be removed now too. Let net_param_nic() print the full set of network devices directly, and also make it note that a list more specific to this platform/config will be available by using '-nic model=help' instead. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
| * hw/pci: remove pci_nic_init_nofail()David Woodhouse2024-02-022-75/+0
| | | | | | | | | | | | | | | | This function is no longer used, as all its callers have been converted to use pci_init_nic_devices() instead. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
| * net: remove qemu_check_nic_model()David Woodhouse2024-02-022-14/+0
| | | | | | | | | | | | | | | | There are no callers of this function any more, as they have all been converted to qemu_{create,configure}_nic_device(). Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
| * hw/xtensa/xtfpga: use qemu_create_nic_device()David Woodhouse2024-02-021-7/+6
| | | | | | | | | | Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
| * hw/sparc/sun4m: use qemu_find_nic_info()David Woodhouse2024-02-021-6/+14
| | | | | | | | | | | | | | | | Obtain the MAC address from the NIC configuration if there is one, or generate one explicitly so that it can be placed in the PROM. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
| * hw/s390x/s390-virtio-ccw: use qemu_create_nic_device()David Woodhouse2024-02-021-9/+2
| | | | | | | | | | Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Acked-by: Thomas Huth <thuth@redhat.com>
| * hw/riscv: use qemu_configure_nic_device()David Woodhouse2024-02-022-18/+3
| | | | | | | | | | Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
| * hw/openrisc/openrisc_sim: use qemu_create_nic_device()David Woodhouse2024-02-021-9/+9
| | | | | | | | | | Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
| * hw/net/lasi_i82596: use qemu_create_nic_device()David Woodhouse2024-02-023-12/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Create the device only if there is a corresponding NIC config for it. Remove the explicit check on nd_table[0].used from hw/hppa/machine.c which (since commit d8a3220005d7) tries to do the same thing. The lasi_82596 support has been disabled since it was first introduced, since enable_lasi_lan() has always been zero. This allows the user to enable it by explicitly requesting a NIC model 'lasi_82596' or just using the alias 'lasi'. Otherwise, it defaults to a PCI NIC as before. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
| * hw/net/lasi_i82596: Re-enable buildDavid Woodhouse2024-02-022-1/+2
| | | | | | | | | | | | | | | | | | | | | | When converting to the shiny build-system-du-jour, a typo prevented the last_i82596 driver from being built. Correct the config option name to re-enable the build. And include "sysemu/sysemu.h" so it actually builds. Fixes: b1419fa66558 ("meson: convert hw/net") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2144 Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
| * hw/mips/jazz: use qemu_find_nic_info()David Woodhouse2024-02-021-8/+7
| | | | | | | | | | Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
| * hw/mips/mipssim: use qemu_create_nic_device()David Woodhouse2024-02-021-6/+7
| | | | | | | | | | | | | | | | | | The MIPS SIM platform instantiates its NIC only if a corresponding configuration exists for it. Use qemu_create_nic_device() function for that. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
| * hw/microblaze: use qemu_configure_nic_device()David Woodhouse2024-02-022-4/+2
| | | | | | | | | | Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
| * hw/m68k/q800: use qemu_find_nic_info()David Woodhouse2024-02-021-13/+16
| | | | | | | | | | | | | | | | | | | | | | | | If a corresponding NIC configuration was found, it will have a MAC address already assigned, so use that. Else, generate and assign a default one. Using qemu_find_nic_info() is simpler than the alternative of using qemu_configure_nic_device() and then having to fetch the "mac" property as a string and convert it. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
| * hw/m68k/mcf5208: use qemu_create_nic_device()David Woodhouse2024-02-021-13/+6
| | | | | | | | | | Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
| * hw/net/etraxfs-eth: use qemu_configure_nic_device()David Woodhouse2024-02-023-9/+7
| | | | | | | | | | Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
| * hw/arm: use qemu_configure_nic_device()David Woodhouse2024-02-026-33/+10
| | | | | | | | | | Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
| * hw/arm/stellaris: use qemu_find_nic_info()David Woodhouse2024-02-021-8/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | Rather than just using qemu_configure_nic_device(), populate the MAC address in the system-registers device by peeking at the NICInfo before it's assigned to the device. Generate the MAC address early, if there is no matching -nic option. Otherwise the MAC address wouldn't be generated until net_client_init1() runs. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
| * hw/arm/npcm7xx: use qemu_configure_nic_device, allow emc0/emc1 as aliasesDavid Woodhouse2024-02-022-21/+13
| | | | | | | | | | | | | | | | Also update the test to specify which device to attach the test socket to, and remove the comment lamenting the fact that we can't do so. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>