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* hw/hppa: Wire up Diva GSP cardHelge Deller2025-02-042-20/+12
| | | | | | | | | | | Until now we used a standard serial-pci device to emulate a HP serial console. This worked nicely with 32-bit Linux and 32-bit HP-UX, but 64-bit HP-UX crashes with it and expects either a Diva GSP card, or a real 64-bit capable PCI graphic card (which we don't have yet). In order to continue with 64-bit HP-UX, switch over to the recently added Diva GSP card emulation. Signed-off-by: Helge Deller <deller@gmx.de>
* hw/char: Add emulation of Diva GSP PCI management boardsHelge Deller2025-02-044-0/+302
| | | | | | | | | | | | The Diva GSP ("Guardian Service Processor") PCI boards are Remote Management cards for PA-RISC machines. They come with built-in 16550A UARTs for serial consoles and modem functionalities, as well as a mailbox-like memory area for hardware auto-reboot functionality. Latest generation HP PA-RISC server machines use those Diva cards for console output. Signed-off-by: Helge Deller <deller@gmx.de>
* Merge tag 'block-pull-request' of https://gitlab.com/stefanha/qemu into stagingStefan Hajnoczi2025-02-021-0/+4
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull request # -----BEGIN PGP SIGNATURE----- # # iQEzBAABCAAdFiEEhpWov9P5fNqsNXdanKSrs4Grc8gFAmeb4h0ACgkQnKSrs4Gr # c8jqngf/WC+QeP9FPTp0yYF7+W25OrOejMpvCggfZAXCoTs1ruApab0OrYYQFFyb # iJUece0p4hvcrbxScyCWyHn9g2BDnQGGXAjTIzGzZ56sNdySMYB4XdZ1UeikQwh8 # gHwWAb5G0x5Q2P8LMp3xVkbceeiw+WfiE/KiKsjio3OfBGoOC32LEdC6+QvOw2hs # Q5mnHUZG4I1YXMkJQh7M/BF4oE+weKMhD2IHrZtRPygjsK6Zv99J8W7yLa2HeSVz # So5vzYV+2A4FOdomSn9iExNb16jImV2Zl5tIAe60hVQ6fvMT0OCCWmQtgUi78MDK # bnp+VWj8a0Rm2vJeWX54pu0b6vo1Vg== # =NOSK # -----END PGP SIGNATURE----- # gpg: Signature made Thu 30 Jan 2025 15:33:33 EST # gpg: using RSA key 8695A8BFD3F97CDAAC35775A9CA4ABB381AB73C8 # gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>" [ultimate] # gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>" [ultimate] # Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8 * tag 'block-pull-request' of https://gitlab.com/stefanha/qemu: parallels: fix ext_off assertion failure due to overflow Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
| * parallels: fix ext_off assertion failure due to overflowDenis Rastyogin2025-01-301-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This error was discovered by fuzzing qemu-img. When ph.ext_off has a sufficiently large value, the operation le64_to_cpu(ph.ext_off) << BDRV_SECTOR_BITS in parallels_read_format_extension() can cause an overflow in int64_t. This overflow triggers the assert(ext_off > 0) check in block/parallels-ext.c: parallels_read_format_extension(), leading to a crash. This commit adds a check to prevent overflow when shifting ph.ext_off by BDRV_SECTOR_BITS, ensuring that the value remains within a valid range. Reported-by: Leonid Reviakin <L.reviakin@fobos-nt.ru> Signed-off-by: Denis Rastyogin <gerben@altlinux.org> Reviewed-by: Denis V. Lunev <den@openvz.org> Message-ID: <20241212104212.513947-2-gerben@altlinux.org> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
* | Merge tag 'hw-misc-20250131' of https://github.com/philmd/qemu into stagingStefan Hajnoczi2025-02-0268-453/+406
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Misc HW patches - Remove uses of &first_cpu in rx-gdbsim and loongson3_virt machines (Philippe) - Convert few legacy qemu_allocate_irqs to qemu_init_irqs (Philippe) - Add tracing events in i2c-echo device (Titus) - Fix debug format string in USB EHCI (Zoltan) - Rework loader API to remove its target_words_bigendian() call (Philippe) - QOMify OMAP MMC device (Peter) - Remove legacy SD Card APIs (Peter) # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmedOmkACgkQ4+MsLN6t # wN4qHhAAtL3vmk6hQgKD76bSaB3CDEdHsnS7qqeRVVmbr7pQL9D6yyXzkjJBzZtk # nG7ubhoS5WFeKswzD8tY/mgP25hntnq38TNrRxDrpRNdFYF+a2cncpRGfgzk0z/9 # nme/BuUx6fNowV8MVGLNOLvaDCeDHl9biTLJmcQyqwlHy9l9Wi6DSa6Xi9ZQWlHi # fxYVeuQ7HYlKwhiu3mqpfNeauIgMSWz8V48ETCrFnjMWmiF1k1L0GccWDS8zpPDk # QkdOxHC4eVMxk0d2458eUXeqo/izfzoc7Z9hW6W8cyI69y4m011xqANd/udTS03E # HMcG9Ks0E+Yw8NGoErOP7zu8yFVEzCn2BKhH/wrUHBC2UfP99vNR/b8LNkg25y19 # IItOkMban0Oyr9KaNb1Ga+3pZIsyyil+shSYNHpWkfqk+TUpZkMUSaVHA9r1oB3V # u/dOO/lPLaWMvftKVXRl3K/Lfz4WF5cWjza5RratnzbBqqwr03CwjjBEuZIX/5ww # ATj/fV10OSHScxCqauYp8uuNSgEOKaJCJe2uEMaLvxn/O9ka0FQZ5CLUJ0yIKs/t # Tg4sS0QLgmpaXwSnscKoVE7aHWNFT1WomHI4SjWbwUQhmm0DmPizBZ2yX8dnSR24 # ubtzmxNYFWScrUTGQvbMhkU6I+Sc0Ca8APmPxErNV2mzF4p3CPE= # =Jvwi # -----END PGP SIGNATURE----- # gpg: Signature made Fri 31 Jan 2025 16:02:33 EST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'hw-misc-20250131' of https://github.com/philmd/qemu: (36 commits) hw/sd: Remove unused SDState::enable hw/sd: Remove unused legacy functions, stop killing mammoths hw/sd: Remove unused 'enable' method from SDCardClass hw/sd/omap_mmc: Untabify hw/sd/omap_mmc: Remove unused coverswitch qemu_irq hw/arm/omap1: Inline creation of MMC hw/sd/omap_mmc: Use similar API for "wire up omap_clk" to other OMAP devices hw/sd/omap_mmc: Convert to SDBus API hw/sd/omap_mmc: Convert output qemu_irqs to gpio and sysbus IRQ APIs hw/sd/omap_mmc: Convert remaining 'struct omap_mmc_s' uses to OMAPMMCState hw/sd/omap_mmc: Do a minimal conversion to QDev hw/loader: Pass ELFDATA endian order argument to load_elf() hw/loader: Pass ELFDATA endian order argument to load_elf_as() hw/loader: Pass ELFDATA endian order argument to load_elf_ram_sym() hw/loader: Clarify local variable name in load_elf_ram_sym() hw/loader: Remove unused load_elf_ram() hw/avr/boot: Replace load_elf_ram_sym() -> load_elf_as() hw/usb/hcd-ehci: Fix debug printf format string hw/misc/i2c-echo: add tracing hw/char/pci-multi: Convert legacy qemu_allocate_irqs to qemu_init_irq ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
| * | hw/sd: Remove unused SDState::enablePeter Maydell2025-01-311-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that sd_enable() has been removed, SD::enable is set to true in sd_instance_init() and then never changed. So we can remove it. Note that the VMSTATE_UNUSED() size argument should be '1', not 'sizeof(bool)', as noted in the CAUTION comment in vmstate.h. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250128104519.3981448-12-peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
| * | hw/sd: Remove unused legacy functions, stop killing mammothsPeter Maydell2025-01-312-119/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The sdcard_legacy.h header defines function prototypes for the "legacy" SD card API, which was used by non-qdevified SD controller models. We've now converted the only remaining non-qdev SD controller, so we can drop the legacy API. Entirely unused functions: sd_init(), sd_set_cb(), sd_enable() Functions which now become static inside sd.c (they are the underlying implementations of methods on SDCardClass): sd_do_command(), sd_write_byte(), sd_read_byte() Removal of sd_init() means that we can also remove the me_no_qdev_me_kill_mammoth_with_rocks flag, the codepaths that were only reachable when it was set, and the inserted_cb and readonly_cb qemu_irq lines that went with that. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20250128104519.3981448-11-peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
| * | hw/sd: Remove unused 'enable' method from SDCardClassPeter Maydell2025-01-312-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SDCardClass has an 'enable' method, but nothing actually invokes it. The underlying implementation is sd_enable(), which is documented in sdcard_legacy.h as something that should not be used and was only present for the benefit of the now-removed nseries boards. Unlike all the other method pointers in SDCardClass, this one doesn't have an sdbus_foo() function wrapper in hw/sd/core.c. Remove the unused method. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250128104519.3981448-10-peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
| * | hw/sd/omap_mmc: UntabifyPeter Maydell2025-01-311-62/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a very old source file, and still has some lingering hard-coded tabs; untabify it. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250128104519.3981448-9-peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
| * | hw/sd/omap_mmc: Remove unused coverswitch qemu_irqPeter Maydell2025-01-311-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The coverswitch qemu_irq is never connected to anything, and the only thing we do with it is set it in omap_mmc_reset(). Remove it. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250128104519.3981448-8-peter.maydell@linaro.org> [PMD: Remove unused 'coverswitch' field] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
| * | hw/arm/omap1: Inline creation of MMCPeter Maydell2025-01-312-26/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Our style for other conversions of OMAP devices to qdev has been to inline the creation and wiring into omap310_mpu_init() -- see for instance the handling of omap-intc, omap-gpio and omap_i2c. Do the same for omap-mmc. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250128104519.3981448-7-peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
| * | hw/sd/omap_mmc: Use similar API for "wire up omap_clk" to other OMAP devicesPeter Maydell2025-01-312-1/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The approach we've settled on for handling the omap_clk wiring for OMAP devices converted to QDev is to have a function omap_foo_set_clk() whose implementation just sets the field directly in the device's state struct. (See the "TODO" comment near the top of omap.h.) Make omap_mmc do the same. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250128104519.3981448-6-peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
| * | hw/sd/omap_mmc: Convert to SDBus APIPeter Maydell2025-01-313-23/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the OMAP MMC controller to the new SDBus API: * the controller creates an SDBus bus * instead of sd_foo functions on the SDState object, call sdbus_foo functions on the SDBus * the board code creates a proper TYPE_SD_CARD object and attaches it to the controller's SDBus, instead of the controller creating a card directly via sd_init() that never gets attached to any bus * because the SD card object is on a bus, it gets reset automatically by the "traverse the qbus tree resetting things" code, and we don't need to manually reset the card from the controller reset function Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250128104519.3981448-5-peter.maydell@linaro.org> [PMD: Include "hw/sd/sd.h" instead of "hw/sd/sdcard_legacy.h", create bus in omap_mmc_initfn() instead of omap_mmc_realize()] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
| * | hw/sd/omap_mmc: Convert output qemu_irqs to gpio and sysbus IRQ APIsPeter Maydell2025-01-311-7/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The omap_mmc device has three outbound qemu_irq lines: * one actual interrupt line * two which connect to the DMA controller and are signalled for TX and RX DMA Convert these to a sysbus IRQ and two named GPIO outputs. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250128104519.3981448-4-peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
| * | hw/sd/omap_mmc: Convert remaining 'struct omap_mmc_s' uses to OMAPMMCStatePeter Maydell2025-01-312-11/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Mechanically convert the remaining uses of 'struct omap_mmc_s' to 'OMAPMMCState'. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250128104519.3981448-3-peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
| * | hw/sd/omap_mmc: Do a minimal conversion to QDevPeter Maydell2025-01-313-22/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Do a minimal conversion of the omap_mmc device model to QDev. In this commit we do the bare minimum to produce a working device: * add the SysBusDevice parent_obj and the usual type boilerplate * omap_mmc_init() now returns a DeviceState* * reset is handled by sysbus reset, so the SoC reset function doesn't need to call omap_mmc_reset() any more * code that should obviously be in init/realize is moved there from omap_mmc_init() We leave various pieces of cleanup to later commits: * rationalizing 'struct omap_mmc_s *' to 'OMAPMMCState *' * using gpio lines rather than having omap_mmc_init() directly set s->irq, s->dma * switching away from the legacy SD API and instead having the SD card plugged into a bus Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250128104519.3981448-2-peter.maydell@linaro.org> [PMD: Do not add omap_mmc_realize()] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
| * | hw/loader: Pass ELFDATA endian order argument to load_elf()Philippe Mathieu-Daudé2025-01-3136-59/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than passing a boolean 'is_big_endian' argument, directly pass the ELFDATA, which can be unspecified using the ELFDATANONE value. Update the call sites: 0 -> ELFDATA2LSB 1 -> ELFDATA2MSB TARGET_BIG_ENDIAN -> TARGET_BIG_ENDIAN ? ELFDATA2MSB : ELFDATA2LSB Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250127113824.50177-7-philmd@linaro.org>
| * | hw/loader: Pass ELFDATA endian order argument to load_elf_as()Philippe Mathieu-Daudé2025-01-316-20/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than passing a boolean 'is_big_endian' argument, directly pass the ELFDATA, which can be unspecified using the ELFDATANONE value. Update the call sites: 0 -> ELFDATA2LSB 1 -> ELFDATA2MSB Note, this allow removing the target_words_bigendian() call in the GENERIC_LOADER device, where we pass ELFDATANONE. Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250127113824.50177-6-philmd@linaro.org>
| * | hw/loader: Pass ELFDATA endian order argument to load_elf_ram_sym()Philippe Mathieu-Daudé2025-01-313-13/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than passing a boolean 'is_big_endian' argument, directly pass the ELFDATA, which can be unspecified using the ELFDATANONE value. Update the call sites: 0 -> ELFDATA2LSB Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250127113824.50177-5-philmd@linaro.org>
| * | hw/loader: Clarify local variable name in load_elf_ram_sym()Philippe Mathieu-Daudé2025-01-311-7/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | load_elf_ram_sym() compares target_data_order versus host data_order. Rename 'data_order' -> 'host_data_order' to ease code review. Avoid the preprocessor by directly checking HOST_BIG_ENDIAN. Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20250127113824.50177-4-philmd@linaro.org>
| * | hw/loader: Remove unused load_elf_ram()Philippe Mathieu-Daudé2025-01-312-28/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Last use of load_elf_ram() was removed in commit 188e255bf8e ("hw/s390x: Remove the possibility to load the s390-netboot.img binary"), remove it. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20250127113824.50177-3-philmd@linaro.org>
| * | hw/avr/boot: Replace load_elf_ram_sym() -> load_elf_as()Philippe Mathieu-Daudé2025-01-311-5/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | load_elf_ram_sym() with load_rom=true, sym_cb=NULL is equivalent to load_elf_as(). Replace by the latter to simplify. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250127113824.50177-2-philmd@linaro.org>
| * | hw/usb/hcd-ehci: Fix debug printf format stringBALATON Zoltan2025-01-311-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The variable is uint64_t so needs %PRIu64 instead of %d. Fixes: 3ae7eb88c47 ("ehci: fix overflow in frame timer code") Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250124124713.64F8C4E6031@zero.eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
| * | hw/misc/i2c-echo: add tracingTitus Rwantare2025-01-312-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This has been useful when debugging and unsure if the guest is generating i2c traffic. Signed-off-by: Titus Rwantare <titusr@google.com> Reviewed-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250121105935.3069035-1-titusr@google.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
| * | hw/char/pci-multi: Convert legacy qemu_allocate_irqs to qemu_init_irqPhilippe Mathieu-Daudé2025-01-311-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are a fixed number of PCI IRQs, known beforehand. Allocate them within PCIMultiSerialState, and initialize using qemu_init_irq(), allowing to remove the legacy qemu_allocate_irqs() and qemu_free_irqs() calls. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250121182828.45088-1-philmd@linaro.org>
| * | hw/sh4/r2d: Convert legacy qemu_allocate_irqs() to qemu_init_irqs()Philippe Mathieu-Daudé2025-01-311-17/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The FPGA exposes a fixed set of IRQs. Hold them in the FPGA state and initialize them in place calling qemu_init_irqs(). Move r2d_fpga_irq enums earlier so we can use NR_IRQS within the r2d_fpga_t structure. r2d_fpga_init() returns r2d_fpga_t, and we dereference irq from it in r2d_init(). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250121182445.35309-1-philmd@linaro.org>
| * | hw/ipack: Remove legacy qemu_allocate_irqs() usePhilippe Mathieu-Daudé2025-01-314-14/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | No need to dynamically allocate IRQ when we know before hands how many we'll use. Declare the 2 of them in IPackDevice state and initialize them in the DeviceRealize handler. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250121155526.29982-4-philmd@linaro.org>
| * | hw/ipack: Clarify KConfig symbolsPhilippe Mathieu-Daudé2025-01-316-4/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Split IPACK Kconfig key as {IPACK, TPCI200, IP_OCTAL_232} - IPack is a bus - TPCI200 is a PCI device providing an IPack bus - IP-Octal232 is an IPack device plugged on an IPack bus Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Fabiano Rosas <farosas@suse.de> Message-Id: <20250121155526.29982-3-philmd@linaro.org>
| * | hw/irq: Introduce qemu_init_irqs() helperPhilippe Mathieu-Daudé2025-01-312-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While qemu_init_irq() initialize a single IRQ, qemu_init_irqs() initialize an array of them. Suggested-by: Bernhard Beschow <shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250121155526.29982-2-philmd@linaro.org>
| * | hw/mips/loongson3_bootp: Move to common_ss[]Philippe Mathieu-Daudé2025-01-311-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | loongson3_bootp.c doesn't contain any target-specific code and can be build generically, move it to common_ss[]. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250115232952.31166-12-philmd@linaro.org>
| * | hw/mips/loongson3_virt: Propagate %processor_id to init_boot_param()Philippe Mathieu-Daudé2025-01-311-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Propagate %processor_id from mips_loongson3_virt_init() where we have a reference to the first vCPU, so use it instead of the &first_cpu global. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250115232952.31166-11-philmd@linaro.org>
| * | hw/mips/loongson3_virt: Propagate processor_id to init_loongson_params()Philippe Mathieu-Daudé2025-01-313-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | Remove one &first_cpu use in hw/mips/loongson3_bootp.c. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250115232952.31166-10-philmd@linaro.org>
| * | hw/mips/loongson3_bootp: Propagate processor_id to init_cpu_info()Philippe Mathieu-Daudé2025-01-311-3/+3
| | | | | | | | | | | | | | | | | | Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250115232952.31166-9-philmd@linaro.org>
| * | hw/mips/loongson3_virt: Propagate cpu_count to init_boot_param()Philippe Mathieu-Daudé2025-01-311-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | Remove one use of the 'current_machine' global. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250115232952.31166-8-philmd@linaro.org>
| * | hw/mips/loongson3: Propagate cpu_count to init_loongson_params()Philippe Mathieu-Daudé2025-01-313-5/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Propagate the %cpu_count from the machine file, allowing to remove the "hw/boards.h" dependency (which is machine specific) from loongson3_bootp. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250115232952.31166-7-philmd@linaro.org>
| * | hw/mips/loongson3_bootp: Include missing headersPhilippe Mathieu-Daudé2025-01-311-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MemMapEntry is declared in "exec/hwaddr.h", cpu_to_le32() in "qemu/bswap.h". These headers are indirectly included via "cpu.h". Include them explicitly in order to avoid when removing "cpu.h": In file included from ../../hw/mips/loongson3_bootp.c:27: hw/mips/loongson3_bootp.h:234:14: error: unknown type name 'MemMapEntry' 234 | extern const MemMapEntry virt_memmap[]; | ^ hw/mips/loongson3_bootp.c:33:18: error: call to undeclared function 'cpu_to_le32'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration] 33 | c->cputype = cpu_to_le32(Loongson_3A); | ^ Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250115232952.31166-6-philmd@linaro.org>
| * | hw/mips/loongson3_virt: Pass CPU argument to get_cpu_freq_hz()Philippe Mathieu-Daudé2025-01-311-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | Pass the first vCPU as argument, allowing to remove another &first_cpu global use. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250115232952.31166-5-philmd@linaro.org>
| * | hw/mips/loongson3_virt: Have fw_conf_init() access local loaderparamsPhilippe Mathieu-Daudé2025-01-311-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | 'loaderparams' is declared statically. Let fw_conf_init() access its 'cpu_freq' and 'ram_size' fields. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250115232952.31166-4-philmd@linaro.org>
| * | hw/mips/loongson3_virt: Invert vCPU creation order to remove &first_cpuPhilippe Mathieu-Daudé2025-01-311-5/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Create vCPUs from the last one to the first one. No need to use the &first_cpu global since we already have it referenced. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20250115232952.31166-3-philmd@linaro.org>
| * | hw/mips/loongson3_virt: Factor generic_cpu_reset() outPhilippe Mathieu-Daudé2025-01-311-9/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | main_cpu_reset() is misleadingly named "main": it resets all vCPUs, with a special case for the first vCPU. Factor generic_cpu_reset() out of main_cpu_reset(), allowing to remove one &first_cpu use. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250115232952.31166-2-philmd@linaro.org>
| * | hw/rx/rx-gdbsim: Remove unnecessary uses of &first_cpuPhilippe Mathieu-Daudé2025-01-311-2/+2
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | rx_gdbsim_init() has access to the single CPU via: RxGdbSimMachineState { RX62NState { RXCPU cpu; ... } mcu; } s; Directly use that instead of the &first_cpu global. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250110180442.82687-1-philmd@linaro.org>
* | Merge tag 'hppa-system-mfdiag-for-v10-pull-request' of ↵Stefan Hajnoczi2025-02-0216-41/+148
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://github.com/hdeller/qemu-hppa into staging hppa 64-bit mfdiag improvements The 64-bit hppa qemu emulation still fails to boot 64-bit HP-UX. This patch series improves the emulation a lot, since it enables us to boot 64-bit HP-UX installer silently up until an endless loop where the machine reports that it's up an running (it crashed before). This still needs further analysis, but it's a big step forward. Main changes to archieve this includes: - Implementing diagnose registers (especially %dr2 for space-register hashing) - a new SeaBIOS-hppa version 18, which includes those fixes and enhancements: - Fix IRT table entries to use slot number - Increase PCI alignment for memory bars to 64k - Fix PDC_CACHE/PDC_CACHE_RET_SPID return value - Allow up to 256 GB RAM on 64-bit machines V2: - fix linux-user build by adding missing "#ifndef CONFIG_USER_ONLY ... #endif" # -----BEGIN PGP SIGNATURE----- # # iHUEABYKAB0WIQS86RI+GtKfB8BJu973ErUQojoPXwUCZ5yWTwAKCRD3ErUQojoP # X1p5AP4iSfKlBsUZrww2/M1ArqB9jZuJBO1kdZ7OcCN2Jn0yxgEAx0CPUof7NnZV # EY7u3Qq4E8ZnOk4XgHt06bsdNcJN+gc= # =RoAh # -----END PGP SIGNATURE----- # gpg: Signature made Fri 31 Jan 2025 04:22:23 EST # gpg: using EDDSA key BCE9123E1AD29F07C049BBDEF712B510A23A0F5F # gpg: Good signature from "Helge Deller <deller@gmx.de>" [unknown] # gpg: aka "Helge Deller <deller@kernel.org>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 4544 8228 2CD9 10DB EF3D 25F8 3E5F 3D04 A7A2 4603 # Subkey fingerprint: BCE9 123E 1AD2 9F07 C049 BBDE F712 B510 A23A 0F5F * tag 'hppa-system-mfdiag-for-v10-pull-request' of https://github.com/hdeller/qemu-hppa: target/hppa: Update SeaBIOS-hppa to version 18 target/hppa: Implement space register hashing for 64-bit HP-UX target/hppa: 64-bit CPUs start with space register hashing enabled target/hppa: Add instruction decoding for mfdiag and mtdiag target/hppa: Drop diag_getshadowregs_pa2 and diag_putshadowregs_pa2 target/hppa: Add CPU diagnose registers disas/hppa: implement mfdiag/mtdiag disassembly hppa: Sync contents of hppa_hardware.h header file with SeaBIOS-hppa MAINTAINERS: Add myself as HPPA maintainer Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
| * | target/hppa: Update SeaBIOS-hppa to version 18Helge Deller2025-01-313-0/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is SeaBIOS for the hppa architecture v18. It allows us to emulate up to 256 GB RAM on 64-bit guests and to boot HP-UX 64-bit one step further. Fixes: - Fix PDC_CACHE/PDC_CACHE_RET_SPID return value for space register hashing on 64-bit HP-UX - Fix IRT table entries to use slot number - Increase PCI alignment for memory bars to 64k New PDC functions & general enhancements: - Allow up to 256 GB RAM on 64-bit machines Signed-off-by: Helge Deller <deller@gmx.de>
| * | target/hppa: Implement space register hashing for 64-bit HP-UXHelge Deller2025-01-318-23/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Linux kernel turns space-register hashing off unconditionally at bootup. That code was provided by HP at the beginning of the PA-RISC Linux porting effort, and I don't know why it was decided then why Linux should not use space register hashing. 32-bit HP-UX versions seem to not use space register hashing either. But for 64-bit HP-UX versions, Sven Schnelle noticed that space register hashing needs to be enabled and is required, otherwise the HP-UX kernel will crash badly. On 64-bit CPUs space register hashing is controlled by a bit in diagnose register %dr2. Since we want to support Linux and 32- and 64-bit HP-UX, we need to fully emulate the diagnose registers and handle specifically the bit in %dr2. This patch adds the code to calculate the gva memory mask based on the space-register hashing bit in %dr2 and the PSW_W (64-bit) flag. The value is cached in the gva_offset_mask variable in CPUArchState and recalculated at every modification of the CPU PSW or %dr2. Signed-off-by: Helge Deller <deller@gmx.de> Suggested-by: Sven Schnelle <svens@stackframe.org> Suggested-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
| * | target/hppa: 64-bit CPUs start with space register hashing enabledHelge Deller2025-01-301-0/+5
| | | | | | | | | | | | | | | | | | | | | Turn on space register hashing for 64-bit CPUs when reset. Signed-off-by: Helge Deller <deller@gmx.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
| * | target/hppa: Add instruction decoding for mfdiag and mtdiagHelge Deller2025-01-302-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | Add 32- and 64-bit instruction decoding of the mfdiag and mtdiag instructions which modify the diagnose registers. Signed-off-by: Helge Deller <deller@gmx.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
| * | target/hppa: Drop diag_getshadowregs_pa2 and diag_putshadowregs_pa2Helge Deller2025-01-302-12/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | diag_getshadowregs_pa2() and diag_putshadowregs_pa2() were added in commit 3bdf20819e68 based on some analysis of ODE code, but now they conflict with the generic mfdiag/mtdiag instructions. I believe the former analysis was wrong, so remove them again. Note that all diag instructions are badly documented, so most things are based on reverse engineering and thus may be wrong. Signed-off-by: Helge Deller <deller@gmx.de> Fixes: 3bdf20819e68 ("target/hppa: Add diag instructions to set/restore shadow registers") Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
| * | target/hppa: Add CPU diagnose registersHelge Deller2025-01-302-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add the diagnose registers (%dr) to the CPUArchState. Those are mostly undocumented and control cache behaviour, memory behaviour, reset button management and many other related internal CPU things. Signed-off-by: Helge Deller <deller@gmx.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
| * | disas/hppa: implement mfdiag/mtdiag disassemblyHelge Deller2025-01-301-2/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The various PA-RISC CPUs implement different CPU-specific diag instructions (mfdiag, mtdiag, mfcpu, mtcpu, ...) to access CPU-internal diagnose/configuration registers, e.g. for cache control, managing space register hashing, control front panel LEDs and read status of the hardware reset button. Those instructions are mostly undocumented, but are used by ODE, HP-UX and Linux. This patch adds some neccessary instructions for PCXL and PCXU CPUs. Signed-off-by: Helge Deller <deller@gmx.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
| * | hppa: Sync contents of hppa_hardware.h header file with SeaBIOS-hppaHelge Deller2025-01-301-4/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The hppa_hardware.h header file holds many constants for addresses and offsets which are needed while building the firmware (SeaBIOS-hppa) and while setting up the virtual machine in QEMU. This patch brings it in sync between both source code repositories. Signed-off-by: Helge Deller <deller@gmx.de> Acked-by: Richard Henderson <richard.henderson@linaro.org>