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| * | target/mips: Replace type_register() with type_register_static()Zhao Liu2024-12-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Replace type_register() with type_register_static() because type_register() will be deprecated. Signed-off-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Link: https://lore.kernel.org/r/20241029085934.2799066-12-zhao1.liu@intel.com
| * | i386: Replace type_register() with type_register_static()Zhao Liu2024-12-102-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | Replace type_register() with type_register_static() because type_register() will be deprecated. Signed-off-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Link: https://lore.kernel.org/r/20241029085934.2799066-11-zhao1.liu@intel.com
| * | hw/virtio: Replace type_register() with type_register_static()Zhao Liu2024-12-101-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Replace type_register() with type_register_static() because type_register() will be deprecated. Signed-off-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Link: https://lore.kernel.org/r/20241029085934.2799066-10-zhao1.liu@intel.com
| * | hw/usb: Replace type_register() with type_register_static()Zhao Liu2024-12-102-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Replace type_register() with type_register_static() because type_register() will be deprecated. Signed-off-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Link: https://lore.kernel.org/r/20241029085934.2799066-9-zhao1.liu@intel.com
| * | hw/sensor: Replace type_register() with type_register_static()Zhao Liu2024-12-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Replace type_register() with type_register_static() because type_register() will be deprecated. Signed-off-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Link: https://lore.kernel.org/r/20241029085934.2799066-8-zhao1.liu@intel.com
| * | hw/scsi: Replace type_register() with type_register_static()Zhao Liu2024-12-102-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Replace type_register() with type_register_static() because\ type_register() will be deprecated. Signed-off-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Link: https://lore.kernel.org/r/20241029085934.2799066-7-zhao1.liu@intel.com
| * | hw/rtc: Replace type_register() with type_register_static()Zhao Liu2024-12-102-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Replace type_register() with type_register_static() because type_register() will be deprecated. Signed-off-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Link: https://lore.kernel.org/r/20241029085934.2799066-6-zhao1.liu@intel.com
| * | ppc: Replace type_register() with type_register_static()Zhao Liu2024-12-102-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Replace type_register() with type_register_static() because type_register() will be deprecated. Signed-off-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Link: https://lore.kernel.org/r/20241029085934.2799066-5-zhao1.liu@intel.com
| * | hw/net: Replace type_register() with type_register_static()Zhao Liu2024-12-102-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Replace type_register() with type_register_static() because type_register() will be deprecated. Signed-off-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Link: https://lore.kernel.org/r/20241029085934.2799066-4-zhao1.liu@intel.com
| * | hw/block: Replace type_register() with type_register_static()Zhao Liu2024-12-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Replace type_register() with type_register_static() because type_register() will be deprecated. Signed-off-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Link: https://lore.kernel.org/r/20241029085934.2799066-3-zhao1.liu@intel.com
| * | arm: Replace type_register() with type_register_static()Zhao Liu2024-12-104-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | Replace type_register() with type_register_static() because type_register() will be deprecated. Signed-off-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Link: https://lore.kernel.org/r/20241029085934.2799066-2-zhao1.liu@intel.com
| * | kvm: remove unnecessary #ifdefPaolo Bonzini2024-12-101-10/+1
| | | | | | | | | | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | clock: inline most of qdev_init_clocklistPaolo Bonzini2024-12-101-44/+27
| | | | | | | | | | | | | | | | | | | | | | | | Move object creation out of qdev_init_clocklist. The input/output cases are very simple, and the aliases are completely different. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | clock: treat outputs and inputs the same in NamedClockListPaolo Bonzini2024-12-101-9/+1
| | | | | | | | | | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | clock: clear callback on unparentPaolo Bonzini2024-12-103-17/+18
| | | | | | | | | | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | rust/qemu-api: Fix fragment-specifiers in define_property macroJunjie Mao2024-12-101-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For the matcher of macro, "expr" is used for expressions, while "ident" is used for variable/function names, and "ty" matches types. In define_property macro, $field is a member name of type $state, so it should be defined as "ident", though offset_of! doesn't complain about this. $type is the type of $field, since it is not used in the macro, so that no type mismatch error is triggered either. Fix fragment-specifiers of $field and $type. Signed-off-by: Junjie Mao <junjie.mao@hotmail.com> Co-developed-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Zhao Liu <zhao1.liu@intel.com> Link: https://lore.kernel.org/r/20241017143245.1248589-2-zhao1.liu@intel.com Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | rust: fix doc test syntaxPaolo Bonzini2024-12-101-3/+3
| | | | | | | | | | | | | | | | | | | | | Allow "cargo test --doc" to pass. Reviewed-by: Junjie Mao <junjie.mao@hotmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | rust: ci: add job that runs Rust toolsPaolo Bonzini2024-12-103-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | Code checks, as well as documentation generation, are not yet tied to "make check" because they need new version of the Rust toolchain (even nightly in the case of "rustfmt"). Run them in CI using the existing nightly-Rust container. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | rust: build: add "make clippy", "make rustfmt", "make rustdoc"Paolo Bonzini2024-12-103-6/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Abstract common invocations of "cargo", that do not require copying the generated bindgen file or setting up MESON_BUILD_ROOT. In the future these could also do completely without cargo and invoke the underlying programs directly. Reviewed-by: Junjie Mao <junjie.mao@hotmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | rust: build: establish a baseline of lints across all cratesPaolo Bonzini2024-12-103-19/+74
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Many lints that default to allow can be helpful in detecting bugs or keeping the code style homogeneous. Add them liberally, though perhaps not as liberally as in hw/char/pl011/src/lib.rs. In particular, enabling entire groups can be problematic because of bitrot when new links are added in the future. For Clippy, this is actually a feature that is only present in Cargo 1.74.0 but, since we are not using Cargo to *build* QEMU, only developers will need a new-enough cargo and only to run tools such as clippy. The requirement does not apply to distros that are building QEMU. Reviewed-by: Junjie Mao <junjie.mao@hotmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | rust: fix a couple style issues from clippyPaolo Bonzini2024-12-103-5/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These are reported as clippy::semicolon_inside_block and clippy::as_ptr_cast_mut. clippy::semicolon_inside_block can be configured not to lint single-line blocks; just go with the default. Reviewed-by: Junjie Mao <junjie.mao@hotmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | rust: build: move strict lints handling to rustc_args.pyPaolo Bonzini2024-12-103-11/+26
| | | | | | | | | | | | | | | | | | | | | | | | Make Cargo use unknown_lints = "allow" as well. This is more future proof as we might add new lints to rust/Cargo.toml that are not supported by older versions of rustc or clippy. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | rust: cargo: store desired warning levels in workspace Cargo.tomlPaolo Bonzini2024-12-107-13/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | An extra benefit of workspaces is that they allow to place lint level settings in a single Cargo.toml; the settings are then inherited by packages in the workspace. Correspondingly, teach rustc_args.py to get the unexpected_cfgs configuration from the workspace Cargo.toml. Note that it is still possible to allow or deny warnings per crate or module, via the #![] attribute syntax. The rust/qemu-api/src/bindings.rs file is an example. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | rust: build: generate lint flags from Cargo.tomlPaolo Bonzini2024-12-103-4/+86
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Cargo.toml makes it possible to describe the desired lint level settings in a nice format. We can extend this to Meson-built crates, by teaching rustc_args.py to fetch lint and --check-cfg arguments from Cargo.toml. --check-cfg arguments come from the unexpected_cfgs lint as well as crate features Start with qemu-api, since it already has a [lints.rust] table and an invocation of rustc_args.py. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | rust: build: restrict --cfg generation to only required symbolsPaolo Bonzini2024-12-102-17/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | Parse the Cargo.toml file, looking for the unexpected_cfgs configuration. When generating --cfg options from the config-host.h file, only use those that are included in the configuration. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | rust: build: move rustc_args.py invocation to qemu-api cratePaolo Bonzini2024-12-102-32/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Only qemu-api needs access to the symbols in config-host.h. Remove the temptation to use them elsewhere by limiting the --cfg arguments to the qemu-api crate. Per-crate invocation of the script will also be needed to add --check-cfg options for each crate's features (when more complex, build-time configurable devices are added in the future). Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | rust: allow using build-root bindings.rs from cargoPaolo Bonzini2024-12-108-35/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Right now, using cargo with QEMU requires copying by hand the bindings.rs to the source tree. Instead, we can use an include file to escape the cage of cargo's mandated source directory structure. By running cargo within meson's "devenv" and adding a MESON_BUILD_ROOT environment variable, it is easy for build.rs to find the file. However, the file must be symlinked into cargo's output directory for rust-analyzer to find it. Suggested-by: Junjie Mao <junjie.mao@hotmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | rust: apply --cfg MESON to all cratesPaolo Bonzini2024-12-102-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | We might have more uses for --cfg MESON, even though right now it's only qemu-api that has generated files. Since we're going to add more flags to the add_project_arguments calls for Rust, it makes sense to also add --cfg MESON everywhere. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | ci: enable rust in the Debian and Ubuntu system build jobPaolo Bonzini2024-12-101-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | We have fixed all incompatibilities with older versions of rustc and bindgen. Enable Rust on Debian to check that the minimum supported version of Rust is indeed 1.63.0, and 0.60.x for bindgen. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* | | Merge tag 'pull-target-arm-20241211' of ↵Stefan Hajnoczi2024-12-1247-729/+777
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.linaro.org/people/pmaydell/qemu-arm into staging target-arm queue: * hw/net/lan9118: Extract PHY model, reuse with imx_fec, fix bugs * fpu: Make muladd NaN handling runtime-selected, not compile-time * fpu: Make default NaN pattern runtime-selected, not compile-time * fpu: Minor NaN-related cleanups * MAINTAINERS: email address updates # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmdZu14ZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3mgiD/98Q+m7/t54FdCd2bx1cr2k # dw+7DYhp+60Vo3OjlGtKWwPD67oN8e0jhOoArmJNW0Fmkcsvfvd4wv6kCf8zftLm # 0/lPO687mvFNCAprTch+z2pGB7aS0HdIr126ytsyg5PlHtldd+OBA+yUUYafR3zo # BECRSWZmMFxfl9uckJzntdntghTX5pnJDSGBYE9NEyRfo0Ntj1HvhaHSQJkqpf5B # QwE8R965CXc4i34PqlOCju47AXwJc3x36ftdiNmpPvMS4odG9yb/OmhHSgVZlThb # 1x0HEX69KF5FQbtVNDMmFyYehDzqYFpqOSa1IKtaNLmDSZJ5P8fWw4eBdMdr/QyD # QKssgHAO6Z13MLppK4B1PFtSVlsLYUURYddYUFz4RUNOxrS/pzAIT0KhClYFytQo # x9xid4fng1PY9doYEM3v4vEQCU6S+2aj2gU4EOwdB8GmMhtjSl8YlcEs7cysqkoQ # gbGX97i6Eh616q9VsRzUwcY6u4XP/lssn6I98k4AEqgRpyFCMTLyFodV89d6J4EJ # IJKsJf10gctpe1JdMgtDxuleKOZc+O5nOMJLKYwc9siakCBZsH7zmgS6m8QVoUSD # 7R+4OtbaQwM0+GPbc0AhAlDtq3Q1QAtCYa94iICUixC4NjzfdC9B9yCz1XnA7sfS # jPHU8INw6rz3psEnlFQdhA== # =+ELh # -----END PGP SIGNATURE----- # gpg: Signature made Wed 11 Dec 2024 11:18:38 EST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20241211' of https://git.linaro.org/people/pmaydell/qemu-arm: (72 commits) MAINTAINERS: Add correct email address for Vikram Garhwal MAINTAINERS: update email address for Leif Lindholm softfloat: Replace WHICH with RET in parts_pick_nan softfloat: Sink frac_cmp in parts_pick_nan until needed softfloat: Share code between parts_pick_nan cases softfloat: Inline pickNaN softfloat: Use parts_pick_nan in propagateFloatx80NaN softfloat: Move propagateFloatx80NaN to softfloat.c softfloat: Pad array size in pick_nan_muladd softfloat: Remove which from parts_pick_nan_muladd softfloat: Use goto for default nan case in pick_nan_muladd softfloat: Inline pickNaNMulAdd fpu: Remove default handling for dnan_pattern target/tricore: Set default NaN pattern explicitly target/riscv: Set default NaN pattern explicitly target/hexagon: Set default NaN pattern explicitly target/xtensa: Set default NaN pattern explicitly target/sparc: Set default NaN pattern explicitly target/s390x: Set default NaN pattern explicitly target/rx: Set default NaN pattern explicitly ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
| * | | MAINTAINERS: Add correct email address for Vikram GarhwalVikram Garhwal2024-12-111-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously, maintainer role was paused due to inactive email id. Commit id: c009d715721861984c4987bcc78b7ee183e86d75. Signed-off-by: Vikram Garhwal <vikram.garhwal@bytedance.com> Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com> Message-id: 20241204184205.12952-1-vikram.garhwal@bytedance.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | | MAINTAINERS: update email address for Leif LindholmLeif Lindholm2024-12-112-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I'm migrating to Qualcomm's new open source email infrastructure, so update my email address, and update the mailmap to match. Signed-off-by: Leif Lindholm <leif.lindholm@oss.qualcomm.com> Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com> Reviewed-by: Brian Cain <brian.cain@oss.qualcomm.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20241205114047.1125842-1-leif.lindholm@oss.qualcomm.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | | softfloat: Replace WHICH with RET in parts_pick_nanRichard Henderson2024-12-111-15/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace the "index" selecting between A and B with a result variable of the proper type. This improves clarity within the function. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20241203203949.483774-12-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | | softfloat: Sink frac_cmp in parts_pick_nan until neededRichard Henderson2024-12-111-10/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the fractional comparison to the end of the float_2nan_prop_x87 case. This is not required for any other 2nan propagation rule. Reorganize the x87 case itself to break out of the switch when the fractional comparison is not required. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20241203203949.483774-11-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | | softfloat: Share code between parts_pick_nan casesRichard Henderson2024-12-111-20/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remember if there was an SNaN, and use that to simplify float_2nan_prop_s_{ab,ba} to only the snan component. Then, fall through to the corresponding float_2nan_prop_{ab,ba} case to handle any remaining nans, which must be quiet. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20241203203949.483774-10-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | | softfloat: Inline pickNaNRichard Henderson2024-12-112-104/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Inline pickNaN into its only caller. This makes one assert redundant with the immediately preceding IF. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20241203203949.483774-9-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | | softfloat: Use parts_pick_nan in propagateFloatx80NaNRichard Henderson2024-12-111-39/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Unpacking and repacking the parts may be slightly more work than we did before, but we get to reuse more code. For a code path handling exceptional values, this is an improvement. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241203203949.483774-8-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
| * | | softfloat: Move propagateFloatx80NaN to softfloat.cRichard Henderson2024-12-112-52/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function is part of the public interface and is not "specialized" to any target in any way. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20241203203949.483774-7-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | | softfloat: Pad array size in pick_nan_muladdRichard Henderson2024-12-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While all indices into val[] should be in [0-2], the mask applied is two bits. To help static analysis see there is no possibility of read beyond the end of the array, pad the array to 4 entries, with the final being (implicitly) NULL. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20241203203949.483774-6-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | | softfloat: Remove which from parts_pick_nan_muladdRichard Henderson2024-12-111-22/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Assign the pointer return value to 'a' directly, rather than going through an intermediary index. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20241203203949.483774-5-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | | softfloat: Use goto for default nan case in pick_nan_muladdRichard Henderson2024-12-111-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove "3" as a special case for which and simply branch to return the desired value. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20241203203949.483774-4-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | | softfloat: Inline pickNaNMulAddRichard Henderson2024-12-112-55/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Inline pickNaNMulAdd into its only caller. This makes one assert redundant with the immediately preceding IF. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20241203203949.483774-3-richard.henderson@linaro.org [PMM: keep comment from old code in new location] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | | fpu: Remove default handling for dnan_patternPeter Maydell2024-12-111-14/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that all our targets have bene converted to explicitly specify their pattern for the default NaN value we can remove the remaining fallback code in parts64_default_nan(). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241202131347.498124-55-peter.maydell@linaro.org
| * | | target/tricore: Set default NaN pattern explicitlyPeter Maydell2024-12-111-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set the default NaN pattern explicitly for tricore. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241202131347.498124-54-peter.maydell@linaro.org
| * | | target/riscv: Set default NaN pattern explicitlyPeter Maydell2024-12-111-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set the default NaN pattern explicitly for riscv. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241202131347.498124-53-peter.maydell@linaro.org
| * | | target/hexagon: Set default NaN pattern explicitlyPeter Maydell2024-12-112-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set the default NaN pattern explicitly for hexagon. Remove the ifdef from parts64_default_nan(); the only remaining unconverted targets all use the default case. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241202131347.498124-52-peter.maydell@linaro.org
| * | | target/xtensa: Set default NaN pattern explicitlyPeter Maydell2024-12-111-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set the default NaN pattern explicitly for xtensa. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241202131347.498124-51-peter.maydell@linaro.org
| * | | target/sparc: Set default NaN pattern explicitlyPeter Maydell2024-12-112-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set the default NaN pattern explicitly for SPARC, and remove the ifdef from parts64_default_nan. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241202131347.498124-50-peter.maydell@linaro.org
| * | | target/s390x: Set default NaN pattern explicitlyPeter Maydell2024-12-111-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set the default NaN pattern explicitly for s390x. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241202131347.498124-49-peter.maydell@linaro.org
| * | | target/rx: Set default NaN pattern explicitlyPeter Maydell2024-12-111-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set the default NaN pattern explicitly for rx. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241202131347.498124-48-peter.maydell@linaro.org