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| * hw/arm/raspi: Split out raspi machine common partSergey Kambalin2024-02-272-48/+85
| | | | | | | | | | | | | | | | | | Pre-setup for raspberry pi 4 introduction Signed-off-by: Sergey Kambalin <sergey.kambalin@auriga.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20240226000259.2752893-4-sergey.kambalin@auriga.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/arm/bcm2853_peripherals: Split out common part of peripheralsSergey Kambalin2024-02-274-100/+154
| | | | | | | | | | | | | | | | | | Pre-setup for BCM2838 introduction Signed-off-by: Sergey Kambalin <sergey.kambalin@auriga.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20240226000259.2752893-3-sergey.kambalin@auriga.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/arm/bcm2836: Split out common part of BCM283X classesSergey Kambalin2024-02-273-47/+84
| | | | | | | | | | | | | | | | | | Pre setup for BCM2838 introduction Signed-off-by: Sergey Kambalin <sergey.kambalin@auriga.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20240226000259.2752893-2-sergey.kambalin@auriga.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * docs/devel/reset: Update to discuss system resetPeter Maydell2024-02-271-2/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that system reset uses a three-phase-reset, update the reset documentation to include a section describing how this works. Include documentation of the current major beartrap in reset, which is that only devices on the qbus tree will get automatically reset. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-id: 20240220160622.114437-11-peter.maydell@linaro.org Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
| * hw/core/machine: Use qemu_register_resettable for sysbus resetPeter Maydell2024-02-271-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the reset of the sysbus (and thus all devices and buses anywhere on the qbus tree) from qemu_register_reset() to qemu_register_resettable(). This is a behaviour change: because qemu_register_resettable() is aware of three-phase reset, this now means that: * 'enter' phase reset methods of devices and buses are called before any legacy reset callbacks registered with qemu_register_reset() * 'exit' phase reset methods of devices and buses are called after any legacy qemu_register_reset() callbacks Put another way, a qemu_register_reset() callback is now correctly ordered in the 'hold' phase along with any other 'hold' phase methods. The motivation for doing this is that we will now be able to resolve some reset-ordering issues using the three-phase mechanism, because the 'exit' phase is always after the 'hold' phase, even when the 'hold' phase function was registered with qemu_register_reset(). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-id: 20240220160622.114437-10-peter.maydell@linaro.org Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
| * hw/core/reset: Implement qemu_register_reset via qemu_register_resettablePeter Maydell2024-02-272-35/+111
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reimplement qemu_register_reset() via qemu_register_resettable(). We define a new LegacyReset object which implements Resettable and defines its reset hold phase method to call a QEMUResetHandler function. When qemu_register_reset() is called, we create a new LegacyReset object and add it to the simulation_reset ResettableContainer. When qemu_unregister_reset() is called, we find the LegacyReset object in the container and remove it. This implementation of qemu_unregister_reset() means we'll end up scanning the ResetContainer's list of child objects twice, once to find the LegacyReset object, and once in g_ptr_array_remove(). In theory we could avoid this by having the ResettableContainer interface include a resettable_container_remove_with_equal_func() that took a callback method so that we could use g_ptr_array_find_with_equal_func() and g_ptr_array_remove_index(). But we don't expect qemu_unregister_reset() to be called frequently or in hot paths, and we expect the simulation_reset container to usually not have many children. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-id: 20240220160622.114437-9-peter.maydell@linaro.org Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
| * hw/core/reset: Add qemu_{register, unregister}_resettable()Peter Maydell2024-02-272-5/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement new functions qemu_register_resettable() and qemu_unregister_resettable(). These are intended to be three-phase-reset aware equivalents of the old qemu_register_reset() and qemu_unregister_reset(). Instead of passing in a function pointer and opaque, you register any QOM object that implements the Resettable interface. The implementation is simple: we have a single global instance of a ResettableContainer, which we reset in qemu_devices_reset(), and the Resettable objects passed to qemu_register_resettable() are added to it. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-id: 20240220160622.114437-8-peter.maydell@linaro.org Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
| * hw/core: Add ResetContainer which holds objects implementing ResettablePeter Maydell2024-02-274-0/+136
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement a ResetContainer. This is a subclass of Object, and it implements the Resettable interface. The container holds a list of arbitrary other objects which implement Resettable, and when the container is reset, all the objects it contains are also reset. This will allow us to have a 3-phase-reset equivalent of the old qemu_register_reset() API: we will have a single "simulation reset" top level ResetContainer, and objects in it are the equivalent of the old QEMUResetHandler functions. The qemu_register_reset() API manages its list of callbacks using a QTAILQ, but here we use a GPtrArray for our list of Resettable children: we expect the "remove" operation (which will need to do an iteration through the list) to be fairly uncommon, and we get simpler code with fewer memory allocations. Since there is currently no listed owner in MAINTAINERS for the existing reset-related source files, create a new section for them, and add these new files there also. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-id: 20240220160622.114437-7-peter.maydell@linaro.org Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
| * hw/core: Add documentation and license comments to reset.hPeter Maydell2024-02-271-0/+79
| | | | | | | | | | | | | | | | | | | | | | | | Add the usual boilerplate license/copyright comment to reset.h (using the text from reset.c), and document the existing functions. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-id: 20240220160622.114437-6-peter.maydell@linaro.org
| * include/qom/object.h: New OBJECT_DEFINE_SIMPLE_TYPE{, _WITH_INTERFACES} macrosPeter Maydell2024-02-272-22/+108
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We have an OBJECT_DEFINE_TYPE_EXTENDED macro, plus several variations on it, which emits the boilerplate for the TypeInfo and ensures it is registered with the type system. However, all the existing macros insist that the type being defined has its own FooClass struct, so they aren't useful for the common case of a simple leaf class which doesn't have any new methods or any other need for its own class struct (that is, for the kind of type that OBJECT_DECLARE_SIMPLE_TYPE declares). Pull the actual implementation of OBJECT_DEFINE_TYPE_EXTENDED out into a new DO_OBJECT_DEFINE_TYPE_EXTENDED which parameterizes the value we use for the class_size field. This lets us add a new OBJECT_DEFINE_SIMPLE_TYPE which does the same job as the various existing OBJECT_DEFINE_*_TYPE_* family macros for this kind of simple type, and the variant OBJECT_DEFINE_SIMPLE_TYPE_WITH_INTERFACES for when the type will implement some interfaces. Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240220160622.114437-5-peter.maydell@linaro.org Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
| * system/bootdevice: Don't unregister reset handler in restore_boot_order()Peter Maydell2024-02-271-11/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the qemu_register_reset() API permits the reset handler functions registered with it to remove themselves from within the callback function. This is fine with our current implementation, but is a bit odd, because generally reset is supposed to be idempotent, and doesn't fit well in a three-phase-reset world where a resettable object will get multiple callbacks as the system is reset. We now have only one user of qemu_register_reset() which makes use of the ability to unregister itself within the callback: restore_boot_order(). We want to change our implementation of qemu_register_reset() to something where it would be awkward to maintain the "can self-unregister" feature. Rather than making that reimplementation complicated, change restore_boot_order() so that it doesn't unregister itself but instead returns doing nothing for any calls after it has done the "restore the boot order" work. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20240220160622.114437-4-peter.maydell@linaro.org Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
| * arm/ptw: Handle atomic updates of page tables entries in MMIO during PTW.Jonathan Cameron2024-02-271-2/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I'm far from confident this handling here is correct. Hence RFC. In particular not sure on what locks I should hold for this to be even moderately safe. The function already appears to be inconsistent in what it returns as the CONFIG_ATOMIC64 block returns the endian converted 'eventual' value of the cmpxchg whereas the TCG_OVERSIZED_GUEST case returns the previous value. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-id: 20240219161229.11776-1-Jonathan.Cameron@huawei.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * arm: xlnx-versal-virt: Add machine property ospi-flashSai Pavan Boddu2024-02-271-1/+43
| | | | | | | | | | | | | | | | | | | | | | | | This property allows users to change flash model on command line as below. ex: "-M xlnx-versal-virt,ospi-flash=mt35xu02gbba" Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@amd.com> Message-id: 20240220091721.82954-3-sai.pavan.boddu@amd.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * block: m25p80: Add support of mt35xu02gbbaSai Pavan Boddu2024-02-273-0/+40
| | | | | | | | | | | | | | | | | | Add Micro 2Gb OSPI flash part with sfdp data. Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@amd.com> Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com> Message-id: 20240220091721.82954-2-sai.pavan.boddu@amd.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * pl031: Update last RTCLR value on write in case it's read backJessica Clarke2024-02-271-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The PL031 allows you to read RTCLR, which is meant to give you the last value written. PL031State has an lr field which is used when reading from RTCLR, and is present in the VM migration state, but we never actually update it, so it always reads as its initial 0 value. Cc: qemu-stable@nongnu.org Signed-off-by: Jessica Clarke <jrtc27@jrtc27.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20240222000341.1562443-1-jrtc27@jrtc27.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * tests/qtest: Check that EXTI fan-in irqs are correctly connectedInès Varhol2024-02-271-0/+37
| | | | | | | | | | | | | | | | | | | | This commit adds a QTest that verifies each input line of a specific EXTI OR gate can influence the output line. Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20240220184145.106107-3-ines.varhol@telecom-paris.fr Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/arm: Use TYPE_OR_IRQ when connecting STM32L4x5 EXTI fan-in IRQsInès Varhol2024-02-272-10/+74
| | | | | | | | | | | | | | | | | | Fixes: 52671f69f7a4 ("[PATCH v8 0/3] Add device STM32L4x5 EXTI") Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr> Message-id: 20240220184145.106107-2-ines.varhol@telecom-paris.fr Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * xlnx-versal-ospi: disable reentrancy detection for iomem_dacSai Pavan Boddu2024-02-271-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | The OSPI DMA reads flash data through the OSPI linear address space (the iomem_dac region), because of this the reentrancy guard introduced in commit a2e1753b ("memory: prevent dma-reentracy issues") is disabled for the memory region. Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@amd.com> Message-id: 20240219105637.65052-1-sai.pavan.boddu@amd.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * misc: pxa2xx_timer: replace qemu_system_reset_request() call with ↵Abhiram Tilak2024-02-271-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | watchdog_perform_action() A few watchdog devices use qemu_system_reset_request(). This is not ideal since behaviour of watchdog-expiry can't be changed by QMP using `watchdog_action`. As stated in BiteSizedTasks wiki page, instead of using qemu_system_reset_request() to reset when a watchdog timer expires, let watchdog_perform_action() decide what to do. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2124 Signed-off-by: Abhiram Tilak <atp.exp@gmail.com> Message-id: 20240216192612.30838-5-atp.exp@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * misc: m48t59: replace qemu_system_reset_request() call with ↵Abhiram Tilak2024-02-271-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | watchdog_perform_action() A few watchdog devices use qemu_system_reset_request(). This is not ideal since behaviour of watchdog-expiry can't be changed by QMP using `watchdog_action`. As stated in BiteSizedTasks wiki page, instead of using qemu_system_reset_request() to reset when a watchdog timer expires, let watchdog_perform_action() decide what to do. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2124 Signed-off-by: Abhiram Tilak <atp.exp@gmail.com> Message-id: 20240216192612.30838-4-atp.exp@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * MAINTAINERS: Cover hw/ide/ahci-allwinner.c with AllWinner A10 machinePhilippe Mathieu-Daudé2024-02-271-0/+1
| | | | | | | | | | | | | | | | | | | | | | This code -- which was moved many times around -- was added in commit 377e214539 ("ahci: Add allwinner AHCI") and belong to the AllWinner machines. See also commit dca625768a ("arm: allwinner-a10: Add SATA"). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240215160713.80409-1-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * target/arm: Advertise Cortex-A53 erratum #843419 fix via REVIDRArd Biesheuvel2024-02-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Cortex-A53 r0p4 revision that QEMU emulates is affected by a CatA erratum #843419 (i.e., the most severe), which requires workarounds in the toolchain as well as the OS. Since the emulation is obviously not affected in the same way, we can indicate this via REVIDR bit #8, which on r0p4 has the meaning that no workarounds for erratum #843419 are needed. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20240215160202.2803452-1-ardb+git@google.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/arm/sbsa-ref: Simplify init since PCIe is always enabledMarcin Juszkiewicz2024-02-271-3/+2
| | | | | | | | | | | | | | | | | | | | There is no point in checking do we have PCIe if first thing after check is adding PCIe card without checking. Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240215153311.186772-1-marcin.juszkiewicz@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* | Merge tag 'pull-aspeed-20240227' of https://github.com/legoater/qemu into ↵Peter Maydell2024-02-276-13/+39
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | staging aspeed queue: * Add support for UART0, in preparation of AST2700 models # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEEoPZlSPBIlev+awtgUaNDx8/77KEFAmXd2nMACgkQUaNDx8/7 # 7KErPBAAjKRmJQF9aMEgf7uqsPnJojAVumFe63NE9Gqnvy4MzgoZWfdSnLl2Ddba # im5IfR7MYv0tzJtqCVtz7o4JwXhhDwesWALQZBM/ms48aacPSNP+7Gn141yLuCCS # Vr8NBSIz156lSsnFGnRUArcQTDKjDp/1TLRiGcS8SDm/S4Nn++nur+T054EZgbKR # CMWDeavgzZRb9HPepvWDwqb9qs11hq5/onCqC886dVNznxEKAVYcd0FVbSn3OfDF # 2EPvKh+fxHlW37wcctlGPnbJK5rRvFi78yZf5utSt+mlVhyiEXjQJ6p8zBIh2w5A # NlsmUo/UYv1F41yC/vCFRR8KJ2wO5VW7zL6UCGMV6I9hxhu/Qw+FYqWdBbAZWsOO # GFOkFbe8zbJFXTr/W7P5upBlA7U1/B9VbRj71eu01dqT+n8OGsk8yfnWVs1SjpoD # 89ZIhpb7lSolQmjPPxrVyfUe3/8ncTx64+CZuAZjxPh/9HA8wDXwVRPtAbIvvGaZ # YPQ4Qmd4m6nAANAvTg2ufj19WT64XKwrQ6O3IkmGcn0BzHl08GFjru8IUp6rbduG # m6WqulL1Ej1PrYaiw5ktpJ4Fkoy6iEFXJOWfl3oTLp2KWE5VAohyRKI00AFnHiAC # frK+cxT4bqDtJR8QbNyJy5d3ZGZV1R6ZA0XjQ1jtb8ty2qISysw= # =gFeX # -----END PGP SIGNATURE----- # gpg: Signature made Tue 27 Feb 2024 12:49:55 GMT # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1 * tag 'pull-aspeed-20240227' of https://github.com/legoater/qemu: aspeed: fix hardcode boot address 0 aspeed: introduce a new UART0 device name Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * aspeed: fix hardcode boot address 0Jamin Lin2024-02-274-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the previous design of ASPEED SOCs QEMU model, it set the boot address at "0" which was the hardcode setting for ast10x0, ast2600, ast2500 and ast2400. According to the design of ast2700, it has a bootmcu(riscv-32) which is used for executing SPL and initialize DRAM and copy u-boot image from SPI/Flash to DRAM at address 0x400000000 at SPL boot stage. Then, CPUs(cortex-a35) execute u-boot, kernel and rofs. Currently, qemu not support emulate two CPU architectures at the same machine. Therefore, qemu will only support to emulate CPU(cortex-a35) side for ast2700 and the boot address is "0x4 00000000". Fixed hardcode boot address "0" for future models using a different mapping address. Signed-off-by: Troy Lee <troy_lee@aspeedtech.com> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Cédric Le Goater <clg@kaod.org>
| * aspeed: introduce a new UART0 device nameJamin Lin2024-02-276-7/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Aspeed datasheet refers to the UART controllers as UART1 - UART13 for the ast10x0, ast2600, ast2500 and ast2400 SoCs and the Aspeed ast2700 introduces an UART0 and the UART controllers as UART0 - UART12. To keep the naming in the QEMU models in sync with the datasheet, let's introduce a new UART0 device name and do the required adjustements. Signed-off-by: Troy Lee <troy_lee@aspeedtech.com> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> [ clg: - Kept original assert() in aspeed_soc_uart_set_chr() - Fixed 'i' range in connect_serial_hds_to_uarts() loop ] Signed-off-by: Cédric Le Goater <clg@kaod.org>
* | Merge tag 'hw-misc-20240227' of https://github.com/philmd/qemu into stagingPeter Maydell2024-02-2767-242/+473
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Misc HW patch queue hw: Remove sysbus_address_space() (Phil) hw/nubus: Add nubus-virtio-mmio device (Mark) hw/usb: Remove usb_bus_find() (Paolo) hw/usb: Extract sysbus-ohci from ohci (Paolo) hw/nvme: Fix invalid endian conversion hw/i386: More PC machine housekeeping (Bernhard, Phil) hw/ide: Restrict "ide-internal.h" (Zoltan, Phil) qom: Expose object_resolve_type_unambiguous() (Paolo) # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmXdn3MACgkQ4+MsLN6t # wN6JhxAAsiLQlbCH+qQw7DvbNBrbYbmDZxx4vlJ2VGFO9SrChFR/2Jnd4z93B1Ry # IfMyAUm1iu1tgGn9jotGFYsx6tEaL+E8xLdFGNFs85xXNv7q0q3EGlPA0QqNT3Lw # PJvFk4aBHEDoHzyZk1VwUD3ZyAFcTl6RwcUfCD3/VsqqBBlKJ6mf9tkaGrOqG/cy # Jjg0jIZOOrWQ77FAlIaPeqZMHfzU556SlKXRyU2TpvC/Q17YsRmwSpJyUr0dNy6A # VNnBchJpaHxxEFVXrGxu5dkZ6am+pnNWloCILFqqbshpwrpWVsnarB3sbo78L+tV # tEW3mKGanVpFAzeOT5CKIxHi5V+DSlriKD36XUeOr+A2CBjYkpVAWTluRaAX4BaK # 9qMkt8AhQdDZd5+Vqvp6UwYfZT1gnPhAbhFNapINGJhtTz5xY2qCLFBBsFYkcf4x # XvTJr/JgvxyTReH12Sl1HbOooC4Vuw/JpK/YPIA/UA2UfGGCOR+i5z6Lp6dNTswo # rYv/aUdw2g2zdOHHJqMC9diCu2movfe8+W8o8pK0Z40zbkuLk+zW+j0lcqbEe6w4 # qa32kD75OisvPhcphOEzXOpihdIugqyKkLOCB/+Rg5t+K5hAEBMcGv2ZXvUMq41W # mI5h9DEcmGxix4lCxmR4Cjxdet/Z3yp85GAoZC3piqURrNLCbM8= # =2MiE # -----END PGP SIGNATURE----- # gpg: Signature made Tue 27 Feb 2024 08:38:11 GMT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'hw-misc-20240227' of https://github.com/philmd/qemu: (30 commits) hw/ide: Include 'ide-internal.h' from current path hw/ide: Remove last two uses of ide/internal.h outside of hw/ide/ hw/arm/sbsa-ref: Do not open-code ahci_ide_create_devs() hw/i386/pc: Populate RTC attribute directly hw/i386/pc: Remove unneeded class attribute "kvmclock_enabled" hw/i386/pc_{piix, q35}: Eliminate local pci_bus/pci_host variables hw/i386/pc: Rename "bus" attribute to "pcibus" hw/i386/q35: Include missing 'hw/acpi/acpi.h' header hw/i386/sgx: Use QDev API hw/i386/x86: Let ioapic_init_gsi() take parent as pointer hw/nvme: fix invalid endian conversion hw/usb: remove duplicate file in system_ss hw/usb: extract sysbus-ohci to a separate file hw/usb: remove usb_bus_find hw/ppc/pseries: do not require CONFIG_USB hw/ppc/mac_newworld: do not require CONFIG_USB hw/hppa: do not require CONFIG_USB hw/mips/loongson3_virt: do not require CONFIG_USB hw/sh4/r2d: do not use usb_bus_find() hw/ppc/sam460ex: do not use usb_bus_find() ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/ide: Include 'ide-internal.h' from current pathPhilippe Mathieu-Daudé2024-02-2717-16/+16
| | | | | | | | | | | | | | | | | | Rename "internal.h" as "ide-internal.h", and include it via its relative local path, instead of absolute to the project root path. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20240226080632.9596-4-philmd@linaro.org>
| * hw/ide: Remove last two uses of ide/internal.h outside of hw/ide/BALATON Zoltan2024-02-273-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | Remove last two includes of hw/ide/intarnal.h outside of hw/ide and replace them with newly added public header to allow moving internal.h into hw/ide to really stop exposing it. Fixes: a11f439a0e (hw/ide: Stop exposing internal.h to non-IDE files) Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-ID: <20240223142633.933694E6004@zero.eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
| * hw/arm/sbsa-ref: Do not open-code ahci_ide_create_devs()Philippe Mathieu-Daudé2024-02-271-10/+1
| | | | | | | | | | | | | | | | | | | | | | Use ahci_ide_create_devs() instead of open-coding it. Not accessing AHCIDevice internals anymore allows to remove "hw/ide/ahci_internal.h" (which isn't really a public header). Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20240226080632.9596-2-philmd@linaro.org>
| * hw/i386/pc: Populate RTC attribute directlyBernhard Beschow2024-02-273-20/+10
| | | | | | | | | | | | | | | | | | | | | | | | Both the piix and the q35 machines introduce an rtc_state variable and defer the initialization of the X86MachineState::rtc attribute to pc_cmos_init(). Resolve this complication which makes pc_cmos_init() do what it says on the tin. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-ID: <20240224135851.100361-6-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
| * hw/i386/pc: Remove unneeded class attribute "kvmclock_enabled"Bernhard Beschow2024-02-273-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PCMachineClass introduces the attribute into the class hierarchy and sets it to true. There is no sub class overriding the attribute. Commit 30d2a17b46e9 "hw/i386: Remove the deprecated machines 0.12 up to 0.15" removed the last overrides of this attribute. The attribute is now unneeded and can be removed. Fixes: 30d2a17b46e9 "hw/i386: Remove the deprecated machines 0.12 up to 0.15" Cc: Thomas Huth <thuth@redhat.com> Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-ID: <20240224135851.100361-5-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
| * hw/i386/pc_{piix, q35}: Eliminate local pci_bus/pci_host variablesBernhard Beschow2024-02-272-17/+13
| | | | | | | | | | | | | | | | | | | | | | | | There is no advantage in having these local variables which 1/ needlessly have different identifiers in both machines and 2/ which are redundant to pcms->bus which is almost as short. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-ID: <20240224135851.100361-4-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
| * hw/i386/pc: Rename "bus" attribute to "pcibus"Bernhard Beschow2024-02-279-14/+14
| | | | | | | | | | | | | | | | | | | | | | | | The attribute is of type PCIBus; reflect that in the name. It will also make the next change more intuitive. Suggested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-ID: <20240224135851.100361-3-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
| * hw/i386/q35: Include missing 'hw/acpi/acpi.h' headerPhilippe Mathieu-Daudé2024-02-271-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | "hw/acpi/acpi.h" is implicitly included. Include it explicitly to avoid the following error when refactoring headers: hw/i386/pc_q35.c:209:43: error: use of undeclared identifier 'ACPI_PM_PROP_ACPI_PCIHP_BRIDGE' ACPI_PM_PROP_ACPI_PCIHP_BRIDGE, ^ Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-Id: <20240226090600.31952-3-philmd@linaro.org>
| * hw/i386/sgx: Use QDev APIPhilippe Mathieu-Daudé2024-02-271-8/+6
| | | | | | | | | | | | | | | | | | Prefer the QDev API over the low level QOM one. No logical change intended. Reviewed-by: Michael Tokarev <mjt@tls.msk.ru> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20240215142035.73331-4-philmd@linaro.org>
| * hw/i386/x86: Let ioapic_init_gsi() take parent as pointerBernhard Beschow2024-02-275-11/+9
| | | | | | | | | | | | | | | | | | | | | | | | Rather than taking a QOM name which has to be resolved, let's pass the parent directly as pointer. This simplifies the code. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-ID: <20240224135851.100361-2-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
| * hw/nvme: fix invalid endian conversionKlaus Jensen2024-02-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | numcntl is one byte and so is max_vfs. Using cpu_to_le16 on big endian hosts results in numcntl being set to 0. Fix by dropping the endian conversion. Fixes: 99f48ae7ae ("hw/nvme: Add support for Secondary Controller List") Reported-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Klaus Jensen <k.jensen@samsung.com> Reviewed-by: Minwoo Im <minwoo.im@samsung.com> Message-ID: <20240222-fix-sriov-numcntl-v1-1-d60bea5e72d0@samsung.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
| * hw/usb: remove duplicate file in system_ssPaolo Bonzini2024-02-271-1/+1
| | | | | | | | | | | | | | | | | | | | Because USB_EHCI_SYSBUS selects USB_EHCI, there is no need to include hcd-ehci.c explicitly. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240223124406.234509-11-pbonzini@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
| * hw/usb: extract sysbus-ohci to a separate filePaolo Bonzini2024-02-278-65/+102
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Split the sysbus version to a separate file so that it is not included in PCI-only machines, and adjust Kconfig for machines that do need sysbus-ohci. The copyrights are based on the time and employer of balrog and Paul Brook's contributions. While adjusting the SM501 dependency, move it to the right place instead of keeping it in the R4D machine. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240223124406.234509-10-pbonzini@redhat.com> [PMD: Rename some functions using 'ohci_sysbus_' prefix] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
| * hw/usb: remove usb_bus_findPaolo Bonzini2024-02-272-15/+1
| | | | | | | | | | | | | | | | | | Inline the sole remaining use, which is for the -usbdevice command line. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240223124406.234509-9-pbonzini@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
| * hw/ppc/pseries: do not require CONFIG_USBPaolo Bonzini2024-02-272-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With --without-default-devices it is possible to build a binary that does not include any USB host controller and therefore that does not include the code guarded by CONFIG_USB. While the simpler creation functions such as usb_create_simple can be inlined, this is not true of usb_bus_find(). Remove it, replacing it with a search of the single USB bus on the machine. Suggested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240223124406.234509-8-pbonzini@redhat.com> [PMD: Fixed style] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
| * hw/ppc/mac_newworld: do not require CONFIG_USBPaolo Bonzini2024-02-272-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With --without-default-devices it should not be required to have devices in the binary that are removed by -nodefaults. It should be therefore possible to build a binary that does not include any USB host controller or any of the code guarded by CONFIG_USB. While the simpler creation functions such as usb_create_simple can be inlined, this is not true of usb_bus_find(). Remove it, replacing it with a search of the single USB bus on the machine. With this change, it is possible to change "select USB_OHCI_PCI" into an "imply" directive. Suggested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240223124406.234509-7-pbonzini@redhat.com> [PMD: Fixed style] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
| * hw/hppa: do not require CONFIG_USBPaolo Bonzini2024-02-272-4/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With --without-default-devices it is possible to build a binary that does not include any USB host controller and therefore that does not include the code guarded by CONFIG_USB. While the simpler creation functions such as usb_create_simple can be inlined, this is not true of usb_bus_find(). Remove it, replacing it with a search of the single USB bus on the machine. Suggested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240223124406.234509-6-pbonzini@redhat.com> [PMD: Fixed style] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
| * hw/mips/loongson3_virt: do not require CONFIG_USBPaolo Bonzini2024-02-271-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Once the Kconfig for hw/mips is cleaned up, it will be possible to build a binary that does not include any USB host controller and therefore that does not include the code guarded by CONFIG_USB. While the simpler creation functions such as usb_create_simple can be inlined, this is not true of usb_bus_find(). Remove it, replacing it with a search of the single USB bus created by loongson3_virt_devices_init(). Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-ID: <20240223124406.234509-5-pbonzini@redhat.com> [PMD: Fixed style] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
| * hw/sh4/r2d: do not use usb_bus_find()Paolo Bonzini2024-02-271-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | usb_bus_find() is always used with argument -1; it can be replaced with a search of the single USB bus on the machine. Suggested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-ID: <20240223124406.234509-4-pbonzini@redhat.com> [PMD: Fixed style] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
| * hw/ppc/sam460ex: do not use usb_bus_find()Paolo Bonzini2024-02-271-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | usb_bus_find() is always used with argument -1; it can be replaced with a search of the single USB bus on the machine. Suggested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-ID: <20240223124406.234509-3-pbonzini@redhat.com> [PMD: Fixed style] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
| * hw/acpi: move object_resolve_type_unambiguous to core QOMPaolo Bonzini2024-02-273-15/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | object_resolve_type_unambiguous provides a useful functionality, that is currently emulated for example by usb_bus_find(). Move it to core code and add error reporting for increased generality. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240223124406.234509-2-pbonzini@redhat.com> [PMD: Fixed style] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
| * hw/nubus: add nubus-virtio-mmio deviceMark Cave-Ayland2024-02-273-0/+139
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The nubus-virtio-mmio device is a Nubus card that contains a set of 32 virtio-mmio devices and a goldfish PIC similar to the m68k virt machine that can be plugged into the m68k q800 machine. There are currently a number of drivers under development that can be used in conjunction with this device to provide accelerated and/or additional hypervisor services to 68k Classic MacOS. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-ID: <20240111102954.449462-4-mark.cave-ayland@ilande.co.uk> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
| * hw/nubus: increase maximum Declaration ROM size from 128k to 1MbMark Cave-Ayland2024-02-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Whilst 128k is more than enough for a typical Declaration ROM, a C compiler configured to produce an unstripped debug binary can generate a ROM image that exceeds this limit. Increase the maximum size to 1Mb to help make life easier for developers. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-ID: <20240111102954.449462-3-mark.cave-ayland@ilande.co.uk> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>