summary refs log tree commit diff stats
Commit message (Collapse)AuthorAgeFilesLines
* Merge remote-tracking branch ↵Peter Maydell2020-08-251-0/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'remotes/berrange/tags/socket-next-pull-request' into staging Add support for UNIX sockets in the abstract namespace # gpg: Signature made Tue 25 Aug 2020 11:52:22 BST # gpg: using RSA key DAF3A6FDB26B62912D0E8E3FBE86EBB415104FDF # gpg: Good signature from "Daniel P. Berrange <dan@berrange.com>" [full] # gpg: aka "Daniel P. Berrange <berrange@redhat.com>" [full] # Primary key fingerprint: DAF3 A6FD B26B 6291 2D0E 8E3F BE86 EBB4 1510 4FDF * remotes/berrange/tags/socket-next-pull-request: tests: fix a memory in test_socket_unix_abstract_good Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * tests: fix a memory in test_socket_unix_abstract_goodLi Qiang2020-08-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After build qemu with '-fsanitize=address' extra-cflags, 'make check' show following leak: ================================================================= ==44580==ERROR: LeakSanitizer: detected memory leaks Direct leak of 2500 byte(s) in 1 object(s) allocated from: #0 0x7f1b5a8b8d28 in __interceptor_calloc (/usr/lib/x86_64-linux-gnu/libasan.so.4+0xded28) #1 0x7f1b5a514b10 in g_malloc0 (/usr/lib/x86_64-linux-gnu/libglib-2.0.so.0+0x51b10) #2 0xd79ea4e4c0ad31c3 (<unknown module>) SUMMARY: AddressSanitizer: 2500 byte(s) leaked in 1 allocation(s). Call 'g_rand_free' in the end of function to avoid this. Fixes: 4d3a329af59("tests/util-sockets: add abstract unix socket cases") Signed-off-by: Li Qiang <liq3ea@163.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by:  xiaoqiang zhao <zxq_yx_007@163.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
* | Merge remote-tracking branch ↵Peter Maydell2020-08-254-32/+18
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'remotes/kraxel/tags/fixes-20200825-pull-request' into staging meson: keymap fixes # gpg: Signature made Tue 25 Aug 2020 07:19:15 BST # gpg: using RSA key 4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full] # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full] # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full] # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/fixes-20200825-pull-request: meson: avoid compiling qemu-keymap by default meson: move xkbcommon to meson meson: drop keymaps symlink Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * meson: avoid compiling qemu-keymap by defaultLaurent Vivier2020-08-251-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | qemu-keymap is not needed with linux-user, so disable it by default if tools and system are disabled (tools are disabled by default with linux-user). Avoid this error with statically linked binaries: Linking target qemu-keymap /usr/bin/ld: cannot find -lxkbcommon Signed-off-by: Laurent Vivier <laurent@vivier.eu> Message-id: 20200824152430.1844159-3-laurent@vivier.eu Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
| * meson: move xkbcommon to mesonLaurent Vivier2020-08-254-31/+12
| | | | | | | | | | | | Signed-off-by: Laurent Vivier <laurent@vivier.eu> Message-id: 20200824152430.1844159-2-laurent@vivier.eu Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
| * meson: drop keymaps symlinkGerd Hoffmann2020-08-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | We are building the keymaps by default now. Drop the keymaps symlink so the generated files are actually written to the build tree not the source tree. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Tested-by: Klaus Jensen <k.jensen@samsung.com> Tested-by: Bin Meng <bin.meng@windriver.com> Message-id: 20200824074057.3673-1-kraxel@redhat.com
* | Merge remote-tracking branch 'remotes/xtensa/tags/20200821-xtensa' into stagingPeter Maydell2020-08-2433-823/+198880
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | target/xtensa updates for 5.2: - add NMI support; - add DFPU option implementation; - update FPU tests to support both FPU2000 and DFPU; - add example cores with FPU2000 and DFPU. # gpg: Signature made Fri 21 Aug 2020 21:09:37 BST # gpg: using RSA key 2B67854B98E5327DCDEB17D851F9CC91F83FA044 # gpg: issuer "jcmvbkbc@gmail.com" # gpg: Good signature from "Max Filippov <filippov@cadence.com>" [unknown] # gpg: aka "Max Filippov <max.filippov@cogentembedded.com>" [full] # gpg: aka "Max Filippov <jcmvbkbc@gmail.com>" [full] # Primary key fingerprint: 2B67 854B 98E5 327D CDEB 17D8 51F9 CC91 F83F A044 * remotes/xtensa/tags/20200821-xtensa: (24 commits) target/xtensa: import DSP3400 core target/xtensa: import de233_fpu core tests/tcg/xtensa: add DFP0 arithmetic tests tests/tcg/xtensa: test double precision load/store tests/tcg/xtensa: add fp0 div and sqrt tests tests/tcg/xtensa: update test_lsc for DFPU tests/tcg/xtensa: update test_fp1 for DFPU tests/tcg/xtensa: update test_fp0_conv for DFPU tests/tcg/xtensa: expand madd tests tests/tcg/xtensa: update test_fp0_arith for DFPU tests/tcg/xtensa: fix test execution on ISS target/xtensa: implement FPU division and square root target/xtensa: add DFPU registers and opcodes target/xtensa: add DFPU option target/xtensa: don't access BR regfile directly target/xtensa: move FSR/FCR register accessors target/xtensa: rename FPU2000 translators and helpers target/xtensa: support copying registers up to 64 bits wide target/xtensa: add geometry to xtensa_get_regfile_by_name softfloat: add xtensa specialization for pickNaNMulAdd ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * target/xtensa: import DSP3400 coreMax Filippov2020-08-216-0/+173129
| | | | | | | | | | | | DSP3400 is a DSP core with FPU2000 option. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| * target/xtensa: import de233_fpu coreMax Filippov2020-08-216-0/+22538
| | | | | | | | | | | | de233_fpu is a variant of 233L core with double precision FPU. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| * tests/tcg/xtensa: add DFP0 arithmetic testsMax Filippov2020-08-211-0/+162
| | | | | | | | | | | | Add test for basic double precision opcode properties. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| * tests/tcg/xtensa: test double precision load/storeMax Filippov2020-08-211-0/+123
| | | | | | | | | | | | Add ldi[p]/sdi[p]/ldx[p]/sdx[p] opcode tests to test_lsc. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| * tests/tcg/xtensa: add fp0 div and sqrt testsMax Filippov2020-08-212-0/+158
| | | | | | | | | | | | Test exact division/sqrt DFPU sequences. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| * tests/tcg/xtensa: update test_lsc for DFPUMax Filippov2020-08-211-13/+34
| | | | | | | | | | | | | | | | DFPU doesn't have pre-increment FP load/store opcodes, it has post-increment opcodes instead. Test increment opcodes present in the current config. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| * tests/tcg/xtensa: update test_fp1 for DFPUMax Filippov2020-08-211-28/+34
| | | | | | | | | | | | | | | | DFPU sets Invalid flag in FSR when at least one argument of FP comparison opcodes is NaN, SNaN for most opcodes, any NaN for olt/ole. Add checks for FSR and expected FSR values. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| * tests/tcg/xtensa: update test_fp0_conv for DFPUMax Filippov2020-08-211-144/+155
| | | | | | | | | | | | | | DFPU conversion opcodes update FSR flags. Add FSR parameters and expected FSR register values for the conversion tests. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| * tests/tcg/xtensa: expand madd testsMax Filippov2020-08-211-0/+104
| | | | | | | | | | | | | | Test that madd doesn't do rounding after multiplication. Test NaN propagation rules for FPU2000 and DFPU madd opcode. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| * tests/tcg/xtensa: update test_fp0_arith for DFPUMax Filippov2020-08-212-97/+223
| | | | | | | | | | | | | | DFPU arithmetic opcodes update FSR flags. Add FSR parameters and expected FSR register values for the arithmetic tests. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| * tests/tcg/xtensa: fix test execution on ISSMax Filippov2020-08-211-5/+5
| | | | | | | | | | | | | | Space for test results may be allocated in IRAM which is only word-accessible. Use full 32-bit words to access test results. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| * target/xtensa: implement FPU division and square rootMax Filippov2020-08-213-0/+132
| | | | | | | | | | | | | | | | | | | | | | This does not implement all opcodes related to div/sqrt as specified in the xtensa ISA, partly because the official specification is not complete and partly because precise implementation is unnecessarily complex. Instead instructions specific to the div/sqrt sequences are implemented differently, most of them as nops, but the results of div/sqrt sequences is preserved. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| * target/xtensa: add DFPU registers and opcodesMax Filippov2020-08-216-34/+1413
| | | | | | | | | | | | | | | | | | | | | | | | DFPU may be configured with 32-bit or with 64-bit registers. Xtensa ISA does not specify how single-precision values are stored in 64-bit registers. Existing implementations store them in the low half of the registers. Add value extraction and write back to single-precision opcodes. Add new double precision opcodes. Add 64-bit register file. Add 64-bit values dumping to the xtensa_cpu_dump_state. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| * target/xtensa: add DFPU optionMax Filippov2020-08-212-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Double precision floating point unit is a FPU implementation different from the FPU2000 in the following ways: - it may be configured with only single or with both single and double precision operations support; - it may be configured with division and square root opcodes; - FSR register accumulates inValid, division by Zero, Overflow, Underflow and Inexact result flags of operations; - QNaNs and SNaNs are handled properly; - NaN propagation rules are different. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| * target/xtensa: don't access BR regfile directlyMax Filippov2020-08-213-34/+42
| | | | | | | | | | | | | | | | | | BR registers used in FPU comparison opcodes are available as opcode arguments for translators. Use them. This simplifies comparison helpers interface and makes them usable in FLIX bundles. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| * target/xtensa: move FSR/FCR register accessorsMax Filippov2020-08-211-32/+32
| | | | | | | | | | | | | | | | Move FSR/FCR register accessors from core opcodes to FPU2000 opcodes as they are FPU2000-specific. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| * target/xtensa: rename FPU2000 translators and helpersMax Filippov2020-08-213-55/+57
| | | | | | | | | | | | | | | | | | | | Add _s suffix to all FPU2000 opcode translators and helpers that also have double-precision variant to unify naming and allow adding DFPU implementations. Add _fpu2k_ to the names of helpers that will have different implementation for the DFPU . Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| * target/xtensa: support copying registers up to 64 bits wideMax Filippov2020-08-212-5/+22
| | | | | | | | | | | | | | | | | | | | FLIX dependency breaking code assumes that all registers are 32 bit wide. This may not always be correct. Extract actual register width from the associated register file and use it to create temporaries of correct width and generate correct data movement instructions. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| * target/xtensa: add geometry to xtensa_get_regfile_by_nameMax Filippov2020-08-213-10/+31
| | | | | | | | | | | | | | | | | | Register file name may not uniquely identify a register file in the set of configurations. E.g. floating point registers may have different size in different configurations. Use register file geometry as additional identifier. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| * softfloat: add xtensa specialization for pickNaNMulAddMax Filippov2020-08-211-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | pickNaNMulAdd logic on Xtensa is to apply pickNaN to the inputs of the expression (a * b) + c. However if default NaN is produces as a result of (a * b) calculation it is not considered when c is NaN. So with two pickNaN variants there must be two pickNaNMulAdd variants. In addition the invalid flag is always set when (a * b) produces NaN. Cc: Peter Maydell <peter.maydell@linaro.org> Cc: "Alex Bennée" <alex.bennee@linaro.org> Cc: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| * softfloat: pass float_status pointer to pickNaNMax Filippov2020-08-214-7/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | Pass float_status structure pointer to the pickNaN so that machine-specific settings are available to NaN selection code. Add use_first_nan property to float_status and use it in Xtensa-specific pickNaN. Cc: Peter Maydell <peter.maydell@linaro.org> Cc: "Alex Bennée" <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| * softfloat: make NO_SIGNALING_NANS runtime propertyMax Filippov2020-08-213-113/+129
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | target/xtensa, the only user of NO_SIGNALING_NANS macro has FPU implementations with and without the corresponding property. With NO_SIGNALING_NANS being a macro they cannot be a part of the same QEMU executable. Replace macro with new property in float_status to allow cores with different FPU implementations coexist. Cc: Peter Maydell <peter.maydell@linaro.org> Cc: "Alex Bennée" <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| * target/xtensa: implement NMI supportMax Filippov2020-08-214-10/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | When NMI is configured it is taken regardless of INTENABLE SR contents, PS.INTLEVEL or PS.EXCM. It is cleared automatically once it's taken. Add nmi_level to XtensaConfig, puth there NMI level from the overlay or XCHAL_NUM_INTLEVELS + 1 when NMI is not configured. Add NMI mask to INTENABLE SR and limit CINTLEVEL to nmi_level - 1 when determining pending IRQ level in check_interrupt(). Always take and clear pending interrupt at nmi_level in the handle_interrupt(). Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| * target/xtensa: make opcode properties more dynamicMax Filippov2020-08-212-265/+278
| | | | | | | | | | | | | | | | | | | | | | There's XtensaOpcodeOps::test_ill that is used to check whether opcode generates illegal opcode exception or not. The illegal opcode exception is not special and so this callback can be generalized to provide any XTENSA_OP_* flags that are not completely static. Introduce XtensaOpcodeOps::test_exceptions and convert all test_ill users to test_exceptions. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* | Merge remote-tracking branch 'remotes/cschoenebeck/tags/pull-9p-20200812' ↵Peter Maydell2020-08-245-94/+441
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into staging 9pfs: Fix severe performance issue of Treaddir requests. # gpg: Signature made Wed 12 Aug 2020 11:06:21 BST # gpg: using RSA key 96D8D110CF7AF8084F88590134C2B58765A47395 # gpg: issuer "qemu_oss@crudebyte.com" # gpg: Good signature from "Christian Schoenebeck <qemu_oss@crudebyte.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: ECAB 1A45 4014 1413 BA38 4926 30DB 47C3 A012 D5F4 # Subkey fingerprint: 96D8 D110 CF7A F808 4F88 5901 34C2 B587 65A4 7395 * remotes/cschoenebeck/tags/pull-9p-20200812: 9pfs: clarify latency of v9fs_co_run_in_worker() 9pfs: differentiate readdir lock between 9P2000.u vs. 9P2000.L 9pfs: T_readdir latency optimization 9pfs: add new function v9fs_co_readdir_many() 9pfs: split out fs driver core of v9fs_co_readdir() 9pfs: make v9fs_readdir_response_size() public tests/virtio-9p: added split readdir tests Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | 9pfs: clarify latency of v9fs_co_run_in_worker()Christian Schoenebeck2020-08-121-1/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As we just fixed a severe performance issue with Treaddir request handling, clarify this overall issue as a comment on v9fs_co_run_in_worker() with the intention to hopefully prevent such performance mistakes in future (and fixing other yet outstanding ones). Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Message-Id: <4d34d332e1aaa8a2cf8dc0b5da4fd7727f2a86e8.1596012787.git.qemu_oss@crudebyte.com> Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
| * | 9pfs: differentiate readdir lock between 9P2000.u vs. 9P2000.LChristian Schoenebeck2020-08-122-8/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previous patch suggests that it might make sense to use a different mutex type now while handling readdir requests, depending on the precise protocol variant, as v9fs_do_readdir_with_stat() (used by 9P2000.u) uses a CoMutex to avoid deadlocks that might happen with QemuMutex otherwise, whereas do_readdir_many() (used by 9P2000.L) should better use a QemuMutex, as the precise behaviour of a failed CoMutex lock on fs driver side would not be clear. And to avoid the wrong lock type being used, be now strict and error out if a 9P2000.L client sends a Tread on a directory, and likeweise error out if a 9P2000.u client sends a Treaddir request. This patch is just intended as transitional measure, as currently 9P2000.u vs. 9P2000.L implementations currently differ where the main logic of fetching directory entries is located at (9P2000.u still being more top half focused, while 9P2000.L already being bottom half focused in regards to fetching directory entries that is). Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Message-Id: <9a2ddc347e533b0d801866afd9dfac853d2d4106.1596012787.git.qemu_oss@crudebyte.com> Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
| * | 9pfs: T_readdir latency optimizationChristian Schoenebeck2020-08-121-74/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make top half really top half and bottom half really bottom half: Each T_readdir request handling is hopping between threads (main I/O thread and background I/O driver threads) several times for every individual directory entry, which sums up to huge latencies for handling just a single T_readdir request. Instead of doing that, collect now all required directory entries (including all potentially required stat buffers for each entry) in one rush on a background I/O thread from fs driver by calling the previously added function v9fs_co_readdir_many() instead of v9fs_co_readdir(), then assemble the entire resulting network response message for the readdir request on main I/O thread. The fs driver is still aborting the directory entry retrieval loop (on the background I/O thread inside of v9fs_co_readdir_many()) as soon as it would exceed the client's requested maximum R_readdir response size. So this will not introduce a performance penalty on another end. Also: No longer seek initial directory position in v9fs_readdir(), as this is now handled (more consistently) by v9fs_co_readdir_many() instead. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Message-Id: <c7c3d1cf4e86611538cef44897842819d9359d7a.1596012787.git.qemu_oss@crudebyte.com> Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
| * | 9pfs: add new function v9fs_co_readdir_many()Christian Schoenebeck2020-08-123-0/+196
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The newly added function v9fs_co_readdir_many() retrieves multiple directory entries with a single fs driver request. It is intended to replace uses of v9fs_co_readdir(), the latter only retrieves a single directory entry per fs driver request instead. The reason for this planned replacement is that for every fs driver request the coroutine is dispatched from main I/O thread to a background I/O thread and eventually dispatched back to main I/O thread. Hopping between threads adds latency. So if a 9pfs Treaddir request reads a large amount of directory entries, this currently sums up to huge latencies of several hundred ms or even more. So using v9fs_co_readdir_many() instead of v9fs_co_readdir() will provide significant performance improvements. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Message-Id: <73dc827a12ef577ae7e644dcf34a5c0e443ab42f.1596012787.git.qemu_oss@crudebyte.com> Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
| * | 9pfs: split out fs driver core of v9fs_co_readdir()Christian Schoenebeck2020-08-121-14/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The implementation of v9fs_co_readdir() has two parts: the outer part is executed by main I/O thread, whereas the inner part is executed by fs driver on a background I/O thread. Move the inner part to its own new, private function do_readdir(), so it can be shared by another upcoming new function. This is just a preparatory patch for the subsequent patch, with the purpose to avoid the next patch to clutter the overall diff. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Greg Kurz <groug@kaod.org> Message-Id: <a426ee06e77584fa2d8253ce5d8bea519eb3ffd4.1596012787.git.qemu_oss@crudebyte.com> Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
| * | 9pfs: make v9fs_readdir_response_size() publicChristian Schoenebeck2020-08-122-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename function v9fs_readdir_data_size() -> v9fs_readdir_response_size() and make it callable from other units. So far this function is only used by 9p.c, however subsequent patches require the function to be callable from another 9pfs unit. And as we're at it; also make it clear for what this function is used for. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Greg Kurz <groug@kaod.org> Message-Id: <3668ebc7d5b929a0e4f1357457060d96f50f76f4.1596012787.git.qemu_oss@crudebyte.com> Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
| * | tests/virtio-9p: added split readdir testsChristian Schoenebeck2020-08-121-0/+108
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The previous, already existing 'basic' readdir test simply used a 'count' parameter big enough to retrieve all directory entries with a single Treaddir request. In the 3 new 'split' readdir tests added by this patch, directory entries are retrieved, split over several Treaddir requests by picking small 'count' parameters which force the server to truncate the response. So the test client sends as many Treaddir requests as necessary to get all directory entries. The following 3 new tests are added (executed in this sequence): 1. Split readdir test with count=512 2. Split readdir test with count=256 3. Split readdir test with count=128 This test case sequence is chosen because the smaller the 'count' value, the higher the chance of errors in case of implementation bugs on server side. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Greg Kurz <groug@kaod.org> Message-Id: <569b2e05ab1d0223b14a12dfbdf3ad5e8b3ac131.1596012787.git.qemu_oss@crudebyte.com> Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
* | | Merge remote-tracking branch ↵Peter Maydell2020-08-246-10/+661
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'remotes/edgar/tags/edgar/xilinx-next-2020-08-24.for-upstream' into staging For upstream. # gpg: Signature made Mon 24 Aug 2020 10:53:42 BST # gpg: using RSA key AC44FEDC14F7F1EBEDBF415129C596780F6BCA83 # gpg: Good signature from "Edgar E. Iglesias (Xilinx key) <edgar.iglesias@xilinx.com>" [unknown] # gpg: aka "Edgar E. Iglesias <edgar.iglesias@gmail.com>" [full] # Primary key fingerprint: AC44 FEDC 14F7 F1EB EDBF 4151 29C5 9678 0F6B CA83 * remotes/edgar/tags/edgar/xilinx-next-2020-08-24.for-upstream: microblaze: petalogix-s3adsp1800: Add device-tree source microblaze: petalogix-ml605: Add device-tree source target/microblaze: mbar: Trap sleeps from user-space configure: microblaze: Enable mttcg target/microblaze: swx: Use atomic_cmpxchg target/microblaze: mbar: Add support for data-access barriers target/microblaze: mbar: Move LOG_DIS to before sleep target/microblaze: mbar: Transfer dc->rd to mbar_imm Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | | microblaze: petalogix-s3adsp1800: Add device-tree sourceEdgar E. Iglesias2020-08-242-0/+282
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a device-tree source for petalogix-s3adsp1800 and recompile the DTB. This also removes the unused mpmc node which causes compilation warnings. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
| * | | microblaze: petalogix-ml605: Add device-tree sourceEdgar E. Iglesias2020-08-242-0/+350
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a device-tree source for petalogix-ml605 and recompile the DTB. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
| * | | target/microblaze: mbar: Trap sleeps from user-spaceEdgar E. Iglesias2020-08-241-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Trap mbar-sleeps from user-space. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reported-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
| * | | configure: microblaze: Enable mttcgEdgar E. Iglesias2020-08-241-0/+1
| | | | | | | | | | | | | | | | | | | | Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
| * | | target/microblaze: swx: Use atomic_cmpxchgEdgar E. Iglesias2020-08-241-8/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use atomic_cmpxchg to implement the atomic cmpxchg sequence. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
| * | | target/microblaze: mbar: Add support for data-access barriersEdgar E. Iglesias2020-08-241-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for data-access barriers. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
| * | | target/microblaze: mbar: Move LOG_DIS to before sleepEdgar E. Iglesias2020-08-241-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move LOG_DIS log to before sleeping handling so that it logs for sleep instructions aswell. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
| * | | target/microblaze: mbar: Transfer dc->rd to mbar_immEdgar E. Iglesias2020-08-241-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Transfer dc->rd to mbar_imm to improve the readability when comparing to the specs. No functional change. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
* | | | Merge remote-tracking branch ↵Peter Maydell2020-08-2427-415/+885
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'remotes/pmaydell/tags/pull-target-arm-20200824' into staging target-arm queue: * hw/cpu/a9mpcore: Verify the machine use Cortex-A9 cores * hw/arm/smmuv3: Implement SMMUv3.2 range-invalidation * docs/system/arm: Document the Xilinx Versal Virt board * target/arm: Make M-profile NOCP take precedence over UNDEF * target/arm: Use correct FPST for VCMLA, VCADD on fp16 * target/arm: Various cleanups preparing for fp16 support # gpg: Signature made Mon 24 Aug 2020 10:47:14 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20200824: (27 commits) target/arm: Use correct FPST for VCMLA, VCADD on fp16 target/arm: Implement FPST_STD_F16 fpstatus target/arm: Make A32/T32 use new fpstatus_ptr() API target/arm: Replace A64 get_fpstatus_ptr() with generic fpstatus_ptr() target/arm: Delete unused ARM_FEATURE_CRC target/arm/translate.c: Delete/amend incorrect comments target/arm: Delete unused VFP_DREG macros target/arm: Remove ARCH macro target/arm: Convert T32 coprocessor insns to decodetree target/arm: Do M-profile NOCP checks early and via decodetree target/arm: Tidy up disas_arm_insn() target/arm: Convert A32 coprocessor insns to decodetree target/arm: Separate decode from handling of coproc insns target/arm: Pull handling of XScale insns out of disas_coproc_insn() docs/system/arm: Document the Xilinx Versal Virt board hw/arm/smmuv3: Advertise SMMUv3.2 range invalidation hw/arm/smmuv3: Support HAD and advertise SMMUv3.1 support hw/arm/smmuv3: Let AIDR advertise SMMUv3.0 support hw/arm/smmuv3: Fix IIDR offset hw/arm/smmuv3: Get prepared for range invalidation ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | | | target/arm: Use correct FPST for VCMLA, VCADD on fp16Peter Maydell2020-08-241-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When we implemented the VCMLA and VCADD insns we put in the code to handle fp16, but left it using the standard fp status flags. Correct them to use FPST_STD_F16 for fp16 operations. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200806104453.30393-5-peter.maydell@linaro.org