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* coreaudio: Lock only the bufferAkihiko Odaki2021-06-231-61/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | On macOS 11.3.1, Core Audio calls AudioDeviceIOProc after calling an internal function named HALB_Mutex::Lock(), which locks a mutex in HALB_IOThread::Entry(void*). HALB_Mutex::Lock() is also called in AudioObjectGetPropertyData, which is called by coreaudio driver. Therefore, a deadlock will occur if coreaudio driver calls AudioObjectGetPropertyData while holding a lock for a mutex and tries to lock the same mutex in AudioDeviceIOProc. audioDeviceIOProc, which implements AudioDeviceIOProc in coreaudio driver, requires an exclusive access for the device configuration and the buffer. Fortunately, a mutex is necessary only for the buffer in audioDeviceIOProc because a change for the device configuration occurs only before setting up AudioDeviceIOProc or after stopping the playback with AudioDeviceStop. With this change, the mutex owned by the driver will only be used for the buffer, and the device configuration change will be protected with the implicit iothread mutex. Signed-off-by: Akihiko Odaki <akihiko.odaki@gmail.com> Message-id: 20210622201740.38005-1-akihiko.odaki@gmail.com Message-Id: <20210622201740.38005-1-akihiko.odaki@gmail.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
* Merge remote-tracking branch ↵Peter Maydell2021-06-227-8/+89
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'remotes/vivier2/tags/linux-user-for-6.1-pull-request' into staging Linux-user pull request 20210621 # gpg: Signature made Mon 21 Jun 2021 12:03:53 BST # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/linux-user-for-6.1-pull-request: linux-user: Use public sigev_notify_thread_id member if available linux-user: Fix incorrect use of feature-test-macros linux-user: Check for ieee128 fpbits in PPC64 HWCAP2 feature list tests/tcg/linux-test: Check that sigaction can query SIGKILL/SIGSTOP linux-user: Let sigaction query SIGKILL/SIGSTOP linux-user: Implement pivot_root linux-user/trace-events: fix minor typo in format string linux-user: Disable static assert involving __SIGRTMAX if it is missing linux-user: Set CF_PARALLEL when mapping shared memory Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * linux-user: Use public sigev_notify_thread_id member if availableMichael Forney2021-06-202-1/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | _sigev_un._tid is an internal glibc field and is not available on musl libc. The sigevent(7) man page and Linux UAPI headers both use sigev_notify_thread_id as a public way to access this field. musl libc supports this field since 1.2.2[0], and glibc plans to add support as well[1][2]. If sigev_notify_thread_id is not available, fall back to _sigev_un._tid as before. [0] http://git.musl-libc.org/cgit/musl/commit/?id=7c71792e87691451f2a6b76348e83ad1889f1dcb [1] https://www.openwall.com/lists/musl/2019/08/01/5 [2] https://sourceware.org/bugzilla/show_bug.cgi?id=27417 Signed-off-by: Michael Forney <mforney@mforney.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20210526035556.7931-1-mforney@mforney.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
| * linux-user: Fix incorrect use of feature-test-macrosMichael Forney2021-06-201-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The _POSIX_C_SOURCE and _XOPEN_SOURCE macros are used by the application to indicate to libc which declarations it should expose. Since qemu does not define them anywhere, it does not make sense to check their value. Instead, since the intent is to determine whether the host struct stat supports the st_*tim fields, use the configure test result which does exactly that. Signed-off-by: Michael Forney <mforney@mforney.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20210526035531.7871-1-mforney@mforney.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
| * linux-user: Check for ieee128 fpbits in PPC64 HWCAP2 feature listKhem Raj2021-06-201-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | glibc 2.34 is now checking for this in hwcaps at runtime [1] and failing to run the binary if machine does not support 128bit IEEE fp Fixes Fatal glibc error: CPU lacks float128 support (POWER 9 or later required) [1] https://sourceware.org/git/?p=glibc.git;a=commitdiff;h=d337345ce145e23c5f3a956f349d924fdf54ce2d;hp=eb24865637a271ab7dad13190330105eab0d478d Signed-off-by: Khem Raj <raj.khem@gmail.com> Cc: Florian Weimer <fweimer@redhat.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20210614191729.2981488-1-raj.khem@gmail.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
| * tests/tcg/linux-test: Check that sigaction can query SIGKILL/SIGSTOPIlya Leoshkevich2021-06-201-0/+9
| | | | | | | | | | | | | | | | | | Verify that querying is allowed, but making changes isn't. Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20210601145600.3131040-3-iii@linux.ibm.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
| * linux-user: Let sigaction query SIGKILL/SIGSTOPIlya Leoshkevich2021-06-201-1/+5
| | | | | | | | | | | | | | | | | | | | The kernel allows doing this, so let's allow this in qemu as well. Valgrind relies on this. Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20210601145600.3131040-2-iii@linux.ibm.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
| * linux-user: Implement pivot_rootYAMAMOTO Takashi2021-06-201-0/+21
| | | | | | | | | | | | | | | | | | Used by runc. Signed-off-by: YAMAMOTO Takashi <yamamoto@midokura.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20210531055019.10149-6-yamamoto@midokura.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
| * linux-user/trace-events: fix minor typo in format stringAlex Bennée2021-06-171-1/+1
| | | | | | | | | | | | | | | | Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20210614144245.17660-1-alex.bennee@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
| * linux-user: Disable static assert involving __SIGRTMAX if it is missingMichael Forney2021-06-151-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This check is to ensure that the loop in signal_table_init() from SIGRTMIN to SIGRTMAX falls within the bounds of host_to_target_signal_table (_NSIG). However, it is not critical, since _NSIG is already defined to be the one larger than the largest signal supported by the system (as specified in the upcoming POSIX revision[0]). musl libc does not define __SIGRTMAX, so disabling this check when it is missing fixes one of the last remaining errors when building qemu. [0] https://www.austingroupbugs.net/view.php?id=741 Signed-off-by: Michael Forney <mforney@mforney.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20210526190203.4255-1-mforney@mforney.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
| * linux-user: Set CF_PARALLEL when mapping shared memoryRichard Henderson2021-06-152-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | Signal the translator to use host atomic instructions for guest operations, insofar as it is possible. This is the best we can do to allow the guest to interact atomically with other processes. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/121 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20210612060828.695332-1-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* | Merge remote-tracking branch 'remotes/cohuck-gitlab/tags/s390x-20210621' ↵Peter Maydell2021-06-2230-596/+1626
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into staging s390x update: - tcg: implement the vector enhancements facility and bump the 'qemu' cpu model to a stripped-down z14 GA2 - fix psw.mask handling in signals - fix vfio-ccw sense data handling # gpg: Signature made Mon 21 Jun 2021 10:53:00 BST # gpg: using RSA key C3D0D66DC3624FF6A8C018CEDECF6B93C6F02FAF # gpg: issuer "cohuck@redhat.com" # gpg: Good signature from "Cornelia Huck <conny@cornelia-huck.de>" [unknown] # gpg: aka "Cornelia Huck <huckc@linux.vnet.ibm.com>" [full] # gpg: aka "Cornelia Huck <cornelia.huck@de.ibm.com>" [full] # gpg: aka "Cornelia Huck <cohuck@kernel.org>" [unknown] # gpg: aka "Cornelia Huck <cohuck@redhat.com>" [unknown] # Primary key fingerprint: C3D0 D66D C362 4FF6 A8C0 18CE DECF 6B93 C6F0 2FAF * remotes/cohuck-gitlab/tags/s390x-20210621: (37 commits) s390x/css: Add passthrough IRB s390x/css: Refactor IRB construction s390x/css: Split out the IRB sense data s390x/css: Introduce an ESW struct linux-user/s390x: Save and restore psw.mask properly target/s390x: Use s390_cpu_{set_psw, get_psw_mask} in gdbstub target/s390x: Improve s390_cpu_dump_state vs cc_op target/s390x: Do not modify cpu state in s390_cpu_get_psw_mask target/s390x: Expose load_psw and get_psw_mask to cpu.h configure: Check whether we can compile the s390-ccw bios with -msoft-float s390x/cpumodel: Bump up QEMU model to a stripped-down IBM z14 GA2 s390x/tcg: We support Vector enhancements facility linux-user: elf: s390x: Prepare for Vector enhancements facility s390x/tcg: Implement VECTOR FP (MAXIMUM|MINIMUM) s390x/tcg: Implement VECTOR FP NEGATIVE MULTIPLY AND (ADD|SUBTRACT) s390x/tcg: Implement 32/128 bit for VECTOR FP MULTIPLY AND (ADD|SUBTRACT) s390x/tcg: Implement 32/128 bit for VECTOR FP TEST DATA CLASS IMMEDIATE s390x/tcg: Implement 32/128 bit for VECTOR FP PERFORM SIGN OPERATION s390x/tcg: Implement 128 bit for VECTOR FP LOAD ROUNDED s390x/tcg: Implement 64 bit for VECTOR FP LOAD LENGTHENED ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | s390x/css: Add passthrough IRBEric Farman2021-06-214-1/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Wire in the subchannel callback for building the IRB ESW and ECW space for passthrough devices, and copy the hardware's ESW into the IRB we are building. If the hardware presented concurrent sense, then copy that sense data into the IRB's ECW space. Signed-off-by: Eric Farman <farman@linux.ibm.com> Message-Id: <20210617232537.1337506-5-farman@linux.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
| * | s390x/css: Refactor IRB constructionEric Farman2021-06-214-16/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, all subchannel types have "sense data" copied into the IRB.ECW space, and a couple flags enabled in the IRB.SCSW and IRB.ESW. But for passthrough (vfio-ccw) subchannels, this data isn't populated in the first place, so enabling those flags leads to unexpected behavior if the guest tries to process the sense data (zeros) in the IRB.ECW. Let's add a subchannel callback that builds these portions of the IRB, and move the existing code into a routine for those virtual subchannels. The passthrough subchannels will be able to piggy-back onto this later. Signed-off-by: Eric Farman <farman@linux.ibm.com> Message-Id: <20210617232537.1337506-4-farman@linux.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
| * | s390x/css: Split out the IRB sense dataEric Farman2021-06-211-7/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let's move this logic into its own routine, so it can be reused later. Signed-off-by: Eric Farman <farman@linux.ibm.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210617232537.1337506-3-farman@linux.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
| * | s390x/css: Introduce an ESW structEric Farman2021-06-212-7/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Interrupt Response Block is comprised of several other structures concatenated together, but only the 12-byte Subchannel-Status Word (SCSW) is defined as a proper struct. Everything else is a simple array of 32-bit words. Let's define a proper struct for the 20-byte Extended-Status Word (ESW) so that we can make good decisions about the sense data that would go into the ECW area for virtual vs passthrough devices. [CH: adapted ESW definition to build with mingw, as discussed] Signed-off-by: Eric Farman <farman@linux.ibm.com> Message-Id: <20210617232537.1337506-2-farman@linux.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
| * | linux-user/s390x: Save and restore psw.mask properlyRichard Henderson2021-06-211-5/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present, we're referencing env->psw.mask directly, which fails to ensure that env->cc_op is incorporated or updated. Use s390_cpu_{set_psw,get_psw_mask} to fix this. Mirror the kernel's cleaning of the psw.mask in save_sigregs and restore_sigregs. Ignore PSW_MASK_RI for now, as qemu does not support that. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: David Hildenbrand <david@redhat.com> Tested-by: jonathan.albrecht <jonathan.albrecht@linux.vnet.ibm.com> Tested-by: <ruixin.bao@ibm.com> Message-Id: <20210615030744.1252385-6-richard.henderson@linaro.org> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
| * | target/s390x: Use s390_cpu_{set_psw, get_psw_mask} in gdbstubRichard Henderson2021-06-211-13/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | No change in behaviour, as gdbstub was correctly written to install and extract the cc value. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: David Hildenbrand <david@redhat.com> Tested-by: jonathan.albrecht <jonathan.albrecht@linux.vnet.ibm.com> Tested-by: <ruixin.bao@ibm.com> Message-Id: <20210615030744.1252385-5-richard.henderson@linaro.org> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
| * | target/s390x: Improve s390_cpu_dump_state vs cc_opRichard Henderson2021-06-211-5/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use s390_cpu_get_psw_mask so that we print the correct architectural value of psw.mask. Do not print cc_op unless tcg_enabled. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: David Hildenbrand <david@redhat.com> Tested-by: jonathan.albrecht <jonathan.albrecht@linux.vnet.ibm.com> Tested-by: <ruixin.bao@ibm.com> Message-Id: <20210615030744.1252385-4-richard.henderson@linaro.org> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
| * | target/s390x: Do not modify cpu state in s390_cpu_get_psw_maskRichard Henderson2021-06-211-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We want to use this function for debugging, and debug should not modify cpu state (even non-architectural cpu state) lest we introduce heisenbugs. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: David Hildenbrand <david@redhat.com> Tested-by: jonathan.albrecht <jonathan.albrecht@linux.vnet.ibm.com> Tested-by: <ruixin.bao@ibm.com> Message-Id: <20210615030744.1252385-3-richard.henderson@linaro.org> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
| * | target/s390x: Expose load_psw and get_psw_mask to cpu.hRichard Henderson2021-06-216-61/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename to s390_cpu_set_psw and s390_cpu_get_psw_mask at the same time. Adjust so that they compile for user-only. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: David Hildenbrand <david@redhat.com> Tested-by: jonathan.albrecht <jonathan.albrecht@linux.vnet.ibm.com> Tested-by: <ruixin.bao@ibm.com> Message-Id: <20210615030744.1252385-2-richard.henderson@linaro.org> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
| * | configure: Check whether we can compile the s390-ccw bios with -msoft-floatThomas Huth2021-06-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The -msoft-float switch is not available in older versions of Clang. Since we rely on the compiler to not generate floating point instructions unexpectedly, we block those old compilers now via a test in the configure script. Note that for some weird reasons, the Clang compiler only complains about the missing soft-float support if no other flags are passed via "-Wl,..." to the linker. So we have to use "compile_object" instead of "compile_prog" for this check. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210525142032.156989-1-thuth@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
| * | s390x/cpumodel: Bump up QEMU model to a stripped-down IBM z14 GA2David Hildenbrand2021-06-213-8/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | TCG implements everything we need to run basic z14 OS+software. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-27-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
| * | s390x/tcg: We support Vector enhancements facilityDavid Hildenbrand2021-06-211-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Everything is wired up and all new instructions are implemented. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-26-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
| * | linux-user: elf: s390x: Prepare for Vector enhancements facilityDavid Hildenbrand2021-06-212-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let's check for S390_FEAT_VECTOR_ENH and set HWCAP_S390_VXRS_EXT accordingly. Add all missing HWCAP defined in upstream Linux. Cc: Laurent Vivier <laurent@vivier.eu> Acked-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-25-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
| * | s390x/tcg: Implement VECTOR FP (MAXIMUM|MINIMUM)David Hildenbrand2021-06-215-0/+391
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For IEEE functions, we can reuse the softfloat implementations. For the other functions, implement it generically for 32bit/64bit/128bit - carefully taking care of all weird special cases according to the tables defined in the PoP. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-24-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
| * | s390x/tcg: Implement VECTOR FP NEGATIVE MULTIPLY AND (ADD|SUBTRACT)David Hildenbrand2021-06-214-2/+49
| | | | | | | | | | | | | | | | | | | | | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-23-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
| * | s390x/tcg: Implement 32/128 bit for VECTOR FP MULTIPLY AND (ADD|SUBTRACT)David Hildenbrand2021-06-213-8/+87
| | | | | | | | | | | | | | | | | | | | | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-22-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
| * | s390x/tcg: Implement 32/128 bit for VECTOR FP TEST DATA CLASS IMMEDIATEDavid Hildenbrand2021-06-213-2/+70
| | | | | | | | | | | | | | | | | | | | | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-21-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
| * | s390x/tcg: Implement 32/128 bit for VECTOR FP PERFORM SIGN OPERATIONDavid Hildenbrand2021-06-211-33/+73
| | | | | | | | | | | | | | | | | | | | | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-20-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
| * | s390x/tcg: Implement 128 bit for VECTOR FP LOAD ROUNDEDDavid Hildenbrand2021-06-213-1/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | 128 bit -> 64 bit, there is only a single element to process. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-19-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
| * | s390x/tcg: Implement 64 bit for VECTOR FP LOAD LENGTHENEDDavid Hildenbrand2021-06-213-3/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | 64 bit -> 128 bit, there is only a single final element. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-18-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
| * | s390x/tcg: Implement 32/128 bit for VECTOR FP COMPARE (AND SIGNAL) SCALARDavid Hildenbrand2021-06-213-9/+77
| | | | | | | | | | | | | | | | | | | | | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-17-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
| * | s390x/tcg: Implement 32/128 bit for VECTOR FP COMPARE *David Hildenbrand2021-06-213-12/+121
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In addition to 32/128bit variants, we also have to support the "Signal-on-QNaN (SQ)" bit. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-16-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
| * | s390x/tcg: Implement 32/128 bit for VECTOR (LOAD FP INTEGER|FP SQUARE ROOT)David Hildenbrand2021-06-213-15/+109
| | | | | | | | | | | | | | | | | | | | | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-15-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
| * | s390x/tcg: Implement 32/128 bit for VECTOR FP (ADD|DIVIDE|MULTIPLY|SUBTRACT)David Hildenbrand2021-06-213-14/+153
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In case of 128bit, we always have a single element. Add new helpers for reading/writing 32/128 bit floats. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-14-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
| * | s390x/tcg: Implement VECTOR MULTIPLY SUM LOGICALDavid Hildenbrand2021-06-212-0/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | Fortunately, we only need the Doubleword implementation. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-13-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
| * | s390x/tcg: Implement VECTOR BIT PERMUTEDavid Hildenbrand2021-06-214-0/+33
| | | | | | | | | | | | | | | | | | | | | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-12-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
| * | s390x/tcg: Simplify wfc64() handlingDavid Hildenbrand2021-06-211-11/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | ... and prepare for 32/128 bit support. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-11-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
| * | s390x/tcg: Simplify vflr64() handlingDavid Hildenbrand2021-06-213-25/+8
| | | | | | | | | | | | | | | | | | | | | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-10-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
| * | s390x/tcg: Simplify vfll32() handlingDavid Hildenbrand2021-06-213-22/+6
| | | | | | | | | | | | | | | | | | | | | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-9-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
| * | s390x/tcg: Simplify vfma64() handlingDavid Hildenbrand2021-06-213-32/+20
| | | | | | | | | | | | | | | | | | | | | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-8-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
| * | s390x/tcg: Simplify vftci64() handlingDavid Hildenbrand2021-06-213-24/+13
| | | | | | | | | | | | | | | | | | | | | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-7-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
| * | s390x/tcg: Simplify vfc64() handlingDavid Hildenbrand2021-06-213-107/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pass the m5 field via simd_data() and don't provide specialized handlers for single-element variants. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-6-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
| * | s390x/tcg: Simplify vop64_2() handlingDavid Hildenbrand2021-06-213-156/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let's rework our macros and simplify. We still need helper functions in most cases due to the different parameters types. Next, we'll only have 32/128bit variants for vfi and vfsq, so special case the others. Note that for vfsq, the XxC and erm passed in the simd_data() will never be set, resulting in the same behavior. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-5-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
| * | s390x/tcg: Simplify vop64_3() handlingDavid Hildenbrand2021-06-213-79/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let's simplify, reworking our handler generation, passing the whole "m5" register content and not providing specialized handlers for "se", and reading/writing proper float64 values using new helpers. Suggested-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-4-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
| * | s390x/tcg: Fix instruction name for VECTOR FP LOAD (LENGTHENED|ROUNDED)David Hildenbrand2021-06-211-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Let's use the correct name. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-3-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
| * | s390x/tcg: Fix FP CONVERT TO (LOGICAL) FIXED NaN handlingDavid Hildenbrand2021-06-212-6/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In case we encounter a NaN, we have to return the smallest possible number, corresponding to either 0 or the maximum negative number. This seems to differ from IEEE handling as implemented in softfloat, whereby we return the biggest possible number. While at it, use float32_to_uint64() in the CLGEB handler. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-2-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
| * | s390x/kvm: remove unused gs handlingCornelia Huck2021-06-213-15/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With commit 0280b3eb7c05 ("s390x/kvm: use cpu model for gscb on compat machines"), we removed any calls to kvm_s390_get_gs() in favour of a different mechanism. Let's remove the unused kvm_s390_get_gs(), and with it the now unneeded cap_gs as well. Signed-off-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210602125050.492500-1-cohuck@redhat.com>
* | | Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210619-2' ↵Peter Maydell2021-06-2239-1193/+1444
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into staging TCI cleanup and re-encoding Fixes for #367 and #390. Move TCGCond to tcg/tcg-cond.h. Fix for win32 qemu_try_memalign. # gpg: Signature made Sun 20 Jun 2021 05:23:53 BST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth-gitlab/tags/pull-tcg-20210619-2: (33 commits) util/oslib-win32: Fix fatal assertion in qemu_try_memalign tcg: expose TCGCond manipulation routines tcg: Restart when exhausting the stack frame tcg: Allocate sufficient storage in temp_allocate_frame tcg/sparc: Fix temp_allocate_frame vs sparc stack bias accel/tcg: Probe the proper permissions for atomic ops tests/tcg: Increase timeout for TCI tcg/tci: Use {set,clear}_helper_retaddr tcg/tci: Remove the qemu_ld/st_type macros Revert "tcg/tci: Use exec/cpu_ldst.h interfaces" tcg/tci: Split out tci_qemu_ld, tci_qemu_st tcg/tci: Implement add2, sub2 tcg/tci: Implement mulu2, muls2 tcg/tci: Implement clz, ctz, ctpop tcg/tci: Implement extract, sextract tcg/tci: Implement andc, orc, eqv, nand, nor tcg/tci: Implement movcond tcg/tci: Implement goto_ptr tcg/tci: Change encoding to uint32_t units tcg/tci: Remove tci_write_reg ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>