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2022-10-06pc-bios/s390-ccw: Adopt meson style Make outputPaolo Bonzini2-16/+16
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-31-alex.bennee@linaro.org>
2022-10-06pc-bios/optionrom: Adopt meson style Make outputPaolo Bonzini1-7/+7
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-30-alex.bennee@linaro.org>
2022-10-06configure: build ROMs with container-based cross compilersPaolo Bonzini1-12/+18
s390-ccw remains a bit more complex, because the -march=z900 test is done only for the native cross compiler. Otherwise, all that is needed is to pass the (now mandatory) target argument to write_target_makefile. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-29-alex.bennee@linaro.org>
2022-10-06configure: cleanup creation of tests/tcg target configPaolo Bonzini3-9/+7
Remove the symlink to tests/tcg/config-*.mak, which is possible now that unused target config files are not created either. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-28-alex.bennee@linaro.org>
2022-10-06configure: unify creation of cross-compilation MakefilesPaolo Bonzini1-51/+43
Let write_target_makefile handle both host and container cross compilers. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-27-alex.bennee@linaro.org>
2022-10-06configure: move tests/tcg/Makefile.prereqs to root build directoryPaolo Bonzini3-12/+11
It will not be specific to tests/tcg anymore, since it will be possible to build firmware using container-based cross compilers too. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-26-alex.bennee@linaro.org>
2022-10-06tests/tcg: move compiler tests to MakefilesPaolo Bonzini6-64/+38
Further decoupling of tests/tcg from the main QEMU Makefile, and making the build more similar between the cross compiler case and the vetted container images. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-25-alex.bennee@linaro.org>
2022-10-06tests/tcg: clean up calls to run-testPaolo Bonzini11-43/+34
Almost all invocations of run-test have either "$* on $(TARGET_NAME)" or "$< on $(TARGET_NAME)" as the last argument. So provide a default test name, while allowing an escape hatch for custom names. As an additional simplification, remove the need to do shell quoting. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-24-alex.bennee@linaro.org>
2022-10-06tests/tcg: unify ppc64 and ppc64le MakefilesPaolo Bonzini9-26/+1
Make tests/tcg/ppc64le include tests/tcg/ppc64 instead of duplicating the rules. Because the ppc64le vpath includes tests/tcg/ppc64 but not vice versa, the tests have to be moved from tests/tcg/ppc64le/ to tests/tcg/ppc64. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-23-alex.bennee@linaro.org>
2022-10-06tests/tcg: add distclean rulePaolo Bonzini2-0/+14
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-22-alex.bennee@linaro.org>
2022-10-06tests/tcg: remove -f from Makefile invocationPaolo Bonzini2-7/+7
Instead of linking tests/tcg/Makefile.target into the build tree, name the symbolic link "Makefile" and create it in every target subdirectory. This makes it possible to just invoke "make" in tests/tcg subdirectories. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-21-alex.bennee@linaro.org>
2022-10-06tests: simplify Makefile invocation for tests/tcgPaolo Bonzini3-16/+18
Remove the DOCKER_SCRIPT and TARGET variable from the Makefile invocation for tests/tcg. For DOCKER_SCRIPT, resolve the path to docker.py in configure; for TARGET, move it to config-$(TARGET).mak and use a symbolic link to break the cycle. The symbolic link is still needed because tests/tcg includes dummy config files for targets that are not buildable. Once that is cleaned up, the symbolic link will go away too. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-20-alex.bennee@linaro.org>
2022-10-06configure: store container engine in config-host.makPaolo Bonzini2-4/+9
In preparation for removing $(DOCKER_SCRIPT) from the tests/tcg configuration files, have Make use the same container engine that had been probed at configure time. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-19-alex.bennee@linaro.org>
2022-10-06configure: return status code from probe_target_compilerPaolo Bonzini1-8/+6
For now, return 1 for container-based compilers. This will change as soon as ROMs will be buildable with them. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-18-alex.bennee@linaro.org>
2022-10-06build: add recursive distclean rulesPaolo Bonzini1-2/+3
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-17-alex.bennee@linaro.org>
2022-10-06vof: add distclean targetPaolo Bonzini1-1/+3
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> [AJB: add clean dep to distclean] Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-16-alex.bennee@linaro.org>
2022-10-06pc-bios/s390-ccw: detect CC options just oncePaolo Bonzini2-13/+27
In preparation for adding Docker container support, detect compiler options just once rather than once per Make run; container startup overhead is substantial and doing the detection just once makes things faster. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-15-alex.bennee@linaro.org>
2022-10-06pc-bios/optionrom: detect CC options just oncePaolo Bonzini1-12/+25
In preparation for adding Docker container support, detect compiler options just once rather than once per Make run; container startup overhead is substantial and doing the detection just once makes things faster. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-14-alex.bennee@linaro.org>
2022-10-06tests/qtest: bump up QOS_PATH_MAX_ELEMENT_SIZEAlex Bennée1-1/+1
It seems the depth of stack we need to support can vary depending on the order of the init constructors getting called. It seems --enable-lto shuffles things around just enough to push you over the limit. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Fixes: https://gitlab.com/qemu-project/qemu/-/issues/1186 Acked-by: Thomas Huth <thuth@redhat.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20220929114231.583801-12-alex.bennee@linaro.org>
2022-10-06tests/docker: move alpine from edge to tagged releaseAlex Bennée2-3/+3
Tracking alpine-edge like debian-sid is a moving target. Usually such rolling releases are marked as "allow_failure: true" in our CI. However as alpine presents a musl based distro and provides useful extra coverage lets track a release branch instead to avoid random breakages. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20220929114231.583801-11-alex.bennee@linaro.org>
2022-10-06target/hexagon: manually add flex/bison/glib2 to remaining containersAnton Johansson5-2/+15
Adds our build-time dependencies to containers which build qemu-hexagon, but aren't covered by libvirt-ci. Signed-off-by: Anton Johansson <anjo@rev.ng> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220804115548.13024-11-anjo@rev.ng> Message-Id: <20220929114231.583801-9-alex.bennee@linaro.org>
2022-10-06target/hexagon: regenerate docker/cirrus filesAnton Johansson17-3/+39
This patch updates the docker and cirrus files with the new packages by running tests/lcitool/refresh Signed-off-by: Anton Johansson <anjo@rev.ng> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220804115548.13024-10-anjo@rev.ng> Message-Id: <20220929114231.583801-8-alex.bennee@linaro.org>
2022-10-06target/hexagon: add flex/bison/glib2 to qemu.ymlAnton Johansson1-0/+3
Note, the glib2-native mapping exists separately from the normal glib2 mapping. The latter uses a `foreign` cross-policy-default, and libvirt-ci is not able to support package mappings for multiple cross-compilation policies. This will probably change in the future. Signed-off-by: Alessandro Di Federico <ale@rev.ng> Signed-off-by: Paolo Montesel <babush@rev.ng> Signed-off-by: Anton Johansson <anjo@rev.ng> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220804115548.13024-9-anjo@rev.ng> Message-Id: <20220929114231.583801-7-alex.bennee@linaro.org>
2022-10-06configure: move detected gdb to TCG's config-host.makAlex Bennée1-0/+7
When tests/tcg gained it's own config-host.mak we forgot to move the GDB detection. Fixes: 544f4a2578 (tests/tcg: isolate from QEMU's config-host.mak) Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-6-alex.bennee@linaro.org>
2022-10-06tests/docker: run script use realpath instead of readlinkLucas Mateus Castro (alqotel)1-1/+1
The alpine docker image only comes with busybox, which doesn't have the '-e' option on its readlink, so change it to 'realpath' to avoid that problem. Suggested-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br> Message-Id: <20220922135516.33627-5-lucas.araujo@eldorado.org.br> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-5-alex.bennee@linaro.org>
2022-10-06scripts/ci/setup: spice-server only on x86 aarch64Lucas Mateus Castro (alqotel)1-1/+11
Changed build-environment.yml to only install spice-server on x86_64 and aarch64 as this package is only available on those architectures. Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220922135516.33627-4-lucas.araujo@eldorado.org.br> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-4-alex.bennee@linaro.org>
2022-10-06scripts/ci/setup: Fix libxen requirementsLucas Mateus Castro (alqotel)1-1/+1
XEN hypervisor is only available in ARM and x86, but the yaml only checked if the architecture is different from s390x, changed it to a more accurate test. Tested this change on a Ubuntu 20.04 ppc64le. Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220922135516.33627-3-lucas.araujo@eldorado.org.br> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-3-alex.bennee@linaro.org>
2022-10-06scripts/ci/setup: ninja missing from build-environmentLucas Mateus Castro (alqotel)1-0/+1
ninja-build is missing from the RHEL environment, so a system prepared with that script would still fail to compile QEMU. Tested on a Fedora 36 Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br> Message-Id: <20220922135516.33627-2-lucas.araujo@eldorado.org.br> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-2-alex.bennee@linaro.org>
2022-10-04target/sh4: Fix TB_FLAG_UNALIGNRichard Henderson5-77/+89
The value previously chosen overlaps GUSA_MASK. Rename all DELAY_SLOT_* and GUSA_* defines to emphasize that they are included in TB_FLAGs. Add aliases for the FPSCR and SR bits that are included in TB_FLAGS, so that we don't accidentally reassign those bits. Fixes: 4da06fb3062 ("target/sh4: Implement prctl_unalign_sigbus") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/856 Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-10-04tcg/ppc: Optimize 26-bit jumpsLeandro Lupori1-31/+88
PowerPC64 processors handle direct branches better than indirect ones, resulting in less stalled cycles and branch misses. However, PPC's tb_target_set_jmp_target() was only using direct branches for 16-bit jumps, while PowerPC64's unconditional branch instructions are able to handle displacements of up to 26 bits. To take advantage of this, now jumps whose displacements fit in between 17 and 26 bits are also converted to direct branches. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Leandro Lupori <leandro.lupori@eldorado.org.br> [rth: Expanded some commentary.] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-10-04accel/tcg: Introduce TARGET_TB_PCRELRichard Henderson6-29/+131
Prepare for targets to be able to produce TBs that can run in more than one virtual context. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-10-04accel/tcg: Introduce tb_pc and log_pcRichard Henderson21-61/+82
The availability of tb->pc will shortly be conditional. Introduce accessor functions to minimize ifdefs. Pass around a known pc to places like tcg_gen_code, where the caller must already have the value. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-10-04hw/core: Add CPUClass.get_pcRichard Henderson22-0/+186
Populate this new method for all targets. Always match the result that would be given by cpu_get_tb_cpu_state, as we will want these values to correspond in the logs. Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> (target/sparc) Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- Cc: Eduardo Habkost <eduardo@habkost.net> (supporter:Machine core) Cc: Marcel Apfelbaum <marcel.apfelbaum@gmail.com> (supporter:Machine core) Cc: "Philippe Mathieu-Daudé" <f4bug@amsat.org> (reviewer:Machine core) Cc: Yanan Wang <wangyanan55@huawei.com> (reviewer:Machine core) Cc: Michael Rolnik <mrolnik@gmail.com> (maintainer:AVR TCG CPUs) Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com> (maintainer:CRIS TCG CPUs) Cc: Taylor Simpson <tsimpson@quicinc.com> (supporter:Hexagon TCG CPUs) Cc: Song Gao <gaosong@loongson.cn> (maintainer:LoongArch TCG CPUs) Cc: Xiaojuan Yang <yangxiaojuan@loongson.cn> (maintainer:LoongArch TCG CPUs) Cc: Laurent Vivier <laurent@vivier.eu> (maintainer:M68K TCG CPUs) Cc: Jiaxun Yang <jiaxun.yang@flygoat.com> (reviewer:MIPS TCG CPUs) Cc: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> (reviewer:MIPS TCG CPUs) Cc: Chris Wulff <crwulff@gmail.com> (maintainer:NiosII TCG CPUs) Cc: Marek Vasut <marex@denx.de> (maintainer:NiosII TCG CPUs) Cc: Stafford Horne <shorne@gmail.com> (odd fixer:OpenRISC TCG CPUs) Cc: Yoshinori Sato <ysato@users.sourceforge.jp> (reviewer:RENESAS RX CPUs) Cc: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> (maintainer:SPARC TCG CPUs) Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> (maintainer:TriCore TCG CPUs) Cc: Max Filippov <jcmvbkbc@gmail.com> (maintainer:Xtensa TCG CPUs) Cc: qemu-arm@nongnu.org (open list:ARM TCG CPUs) Cc: qemu-ppc@nongnu.org (open list:PowerPC TCG CPUs) Cc: qemu-riscv@nongnu.org (open list:RISC-V TCG CPUs) Cc: qemu-s390x@nongnu.org (open list:S390 TCG CPUs)
2022-10-04include/hw/core: Create struct CPUJumpCacheRichard Henderson12-28/+72
Wrap the bare TranslationBlock pointer into a structure. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-10-04accel/tcg: Inline tb_flush_jmp_cacheRichard Henderson1-11/+14
This function has two users, who use it incompatibly. In tlb_flush_page_by_mmuidx_async_0, when flushing a single page, we need to flush exactly two pages. In tlb_flush_range_by_mmuidx_async_0, when flushing a range of pages, we need to flush N+1 pages. This avoids double-flushing of jmp cache pages in a range. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-10-04accel/tcg: Do not align tb->page_addr[0]Richard Henderson3-13/+15
Let tb->page_addr[0] contain the address of the first byte of the translated block, rather than the address of the page containing the start of the translated block. We need to recover this value anyway at various points, and it is easier to discard a page offset when it is not needed, which happens naturally via the existing find_page shift. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-10-03accel/tcg: Use DisasContextBase in plugin_gen_tb_startRichard Henderson3-15/+16
Use the pc coming from db->pc_first rather than the TB. Use the cached host_addr rather than re-computing for the first page. We still need a separate lookup for the second page because it won't be computed for DisasContextBase until the translator actually performs a read from the page. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-10-03accel/tcg: Use bool for page_find_allocRichard Henderson1-7/+7
Bool is more appropriate type for the alloc parameter. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-10-03accel/tcg: Remove PageDesc code_bitmapRichard Henderson1-74/+4
This bitmap is created and discarded immediately. We gain nothing by its existence. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220822232338.1727934-2-richard.henderson@linaro.org>
2022-10-03include/exec: Introduce TARGET_PAGE_ENTRY_EXTRARichard Henderson1-0/+9
Allow the target to cache items from the guest page tables. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-10-03accel/tcg: Introduce tlb_set_page_fullRichard Henderson3-18/+69
Now that we have collected all of the page data into CPUTLBEntryFull, provide an interface to record that all in one go, instead of using 4 arguments. This interface allows CPUTLBEntryFull to be extended without having to change the number of arguments. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-10-03accel/tcg: Introduce probe_access_fullRichard Henderson3-18/+45
Add an interface to return the CPUTLBEntryFull struct that goes with the lookup. The result is not intended to be valid across multiple lookups, so the user must use the results immediately. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-10-03accel/tcg: Suppress auto-invalidate in probe_access_internalRichard Henderson2-5/+9
When PAGE_WRITE_INV is set when calling tlb_set_page, we immediately set TLB_INVALID_MASK in order to force tlb_fill to be called on the next lookup. Here in probe_access_internal, we have just called tlb_fill and eliminated true misses, thus the lookup must be valid. This allows us to remove a warning comment from s390x. There doesn't seem to be a reason to change the code though. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-10-03accel/tcg: Drop addr member from SavedIOTLBRichard Henderson2-5/+3
This field is only written, not read; remove it. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-10-03accel/tcg: Rename CPUIOTLBEntry to CPUTLBEntryFullRichard Henderson5-71/+73
This structure will shortly contain more than just data for accessing MMIO. Rename the 'addr' member to 'xlat_section' to more clearly indicate its purpose. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-10-03cputlb: used cached CPUClass in our hot-pathsAlex Bennée1-9/+6
Before: 35.912 s ± 0.168 s After: 35.565 s ± 0.087 s Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220811151413.3350684-5-alex.bennee@linaro.org> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220923084803.498337-5-clg@kaod.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-10-03hw/core/cpu-sysemu: used cached class in cpu_asidx_from_attrsAlex Bennée1-3/+2
This is a heavily used function so lets avoid the cost of CPU_GET_CLASS. On the romulus-bmc run it has a modest effect: Before: 36.812 s ± 0.506 s After: 35.912 s ± 0.168 s Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220811151413.3350684-4-alex.bennee@linaro.org> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220923084803.498337-4-clg@kaod.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-10-03cpu: cache CPUClass in CPUState for hot code pathsAlex Bennée2-5/+13
The class cast checkers are quite expensive and always on (unlike the dynamic case who's checks are gated by CONFIG_QOM_CAST_DEBUG). To avoid the overhead of repeatedly checking something which should never change we cache the CPUClass reference for use in the hot code paths. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220811151413.3350684-3-alex.bennee@linaro.org> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220923084803.498337-3-clg@kaod.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-10-04docs: Update TPM documentation for usage of a TPM 2Stefan Berger1-20/+24
Update the TPM documentation for usage of a TPM 2 rather than a TPM 1.2. Adjust the command lines and expected outputs inside the VM accordingly. Update the command line to start a TPM 2 with swtpm. Signed-off-by: Stefan Berger <stefanb@linux.ibm.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20220927122146.2787854-1-stefanb@linux.ibm.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-10-04Use g_new() & friends where that makes obvious senseMarkus Armbruster4-6/+6
g_new(T, n) is neater than g_malloc(sizeof(T) * n). It's also safer, for two reasons. One, it catches multiplication overflowing size_t. Two, it returns T * rather than void *, which lets the compiler catch more type errors. This commit only touches allocations with size arguments of the form sizeof(T). Patch created mechanically with: $ spatch --in-place --sp-file scripts/coccinelle/use-g_new-etc.cocci \ --macro-file scripts/cocci-macro-file.h FILES... The previous iteration was commit a95942b50c. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20220923084254.4173111-1-armbru@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>