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* rust: use std::ffi instead of std::os::rawPaolo Bonzini2025-05-061-2/+0
| | | | | | | | This is allowed since Rust 1.64.0. Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into stagingStefan Hajnoczi2025-05-051-2/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * rust: support migration of HPET device * target/i386/hvf: fix compilation errors * target/i386/tcg: fix some interrupt shadow cases * hw/char/serial: remove unused prog_if compat property * rust: centralize config in workspace root * monitor: fix race on exiting QEMU # -----BEGIN PGP SIGNATURE----- # # iQFIBAABCgAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmgVQzkUHHBib256aW5p # QHJlZGhhdC5jb20ACgkQv/vSX3jHroOR8Af/Tke7kRZQyvoKURaKpVOBgP91fTQu # IKwmX1OYe9JMPBwZV5g/++2HSaAddDzkFq90gmgTY+hpvRE3kDWOA86QtDRP4LKa # Oq3yW48yrFiRZBAxERgRxRCsEvzlPC3cAEqCQd4fTL+cW6NVorbj4x/tQcALb47V # cgXXVp59TW4lJk7nJUjd0mCFK1qEoIbZuuBgMn32K+fpBV/UghcoImT2giMeM24Y # WW3olrLA9UN2fh5da7923WUvA9mSjnE0Yfdk6eKC3nCzlgMKktofwKHilm0tA6xA # 7sJbwYTDSB9QxgnNw3WvAFAOMapJmedaSNorZdmcxCss7ed0s8hV8am9vQ== # =LFS/ # -----END PGP SIGNATURE----- # gpg: Signature made Fri 02 May 2025 18:12:09 EDT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * tag 'for-upstream' of https://gitlab.com/bonzini/qemu: monitor: don't wake up qmp_dispatcher_co coroutine upon cleanup rust: centralize config in workspace root hw/char/serial: Remove unused prog_if compat property target/i386: do not block singlestep for STI target/i386: do not trigger IRQ shadow for LSS target/i386/hvf: fix a compilation error target/i386/emulate: remove rflags leftovers rust/hpet: Support migration rust/timer: Define NANOSECONDS_PER_SECOND binding as u64 rust/vmstate_test: Test varray with num field wrapped in BqlCell rust: assertions: Support index field wrapped in BqlCell vmstate: support varray for vmstate_clock! rust/vmstate: Add support for field_exists checks Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
| * rust/hpet: Support migrationZhao Liu2025-05-021-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on commit 1433e38cc8 ("hpet: do not overwrite properties on post_load"), add the basic migration support to Rust HPET. The current migration implementation introduces multiple unsafe callbacks. Before the vmstate builder, one possible cleanup approach is to wrap callbacks in the vmstate binding using a method similar to the vmstate_exist_fn macro. However, this approach would also create a lot of repetitive code (since vmstate has so many callbacks: pre_load, post_load, pre_save, post_save, needed and dev_unplug_pending). Although it would be cleaner, it would somewhat deviate from the path of the vmstate builder. Therefore, firstly focus on completing the functionality of HPET, and those current unsafe callbacks can at least clearly indicate the needed functionality of vmstate. The next step is to consider refactoring vmstate to move towards the vmstate builder direction. Additionally, update rust.rst about Rust HPET can support migration. Signed-off-by: Zhao Liu <zhao1.liu@intel.com> Link: https://lore.kernel.org/r/20250414144943.1112885-9-zhao1.liu@intel.com Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* | Merge tag 'pull-request-2025-04-30' of https://gitlab.com/thuth/qemu into ↵Stefan Hajnoczi2025-05-051-2/+2
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | staging * Extend s390x diagnose call 308 subcode 10 to return more information * Make valgrind support configurable * Drop support for Python 3.8 * Some other misc cosmetic changes # -----BEGIN PGP SIGNATURE----- # # iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAmgScIQRHHRodXRoQHJl # ZGhhdC5jb20ACgkQLtnXdP5wLbXf+hAAnt6RcceX8e9CSXaggozXMeI5c/7nMUJl # PTJrWV0HXhspKR2SEYADkKk5cVGWnSum7PDgrwHXMyykUSE2jOsUhIrWauyLaiuE # fKIOhTOX6DiYPINVJzsJ8JXrJ7jkYmnGMnrbZg1i1wnYwx9ZkAAZOagGu4pMguml # digEVMJp7KiGztCrQwA/Og1zrTTPP9a6071tCvungQJDMrLuJgYb+hafpoNBaAy3 # WoOqP/Fh5AXHkySZlKGhL/mqrj7FVSUMWsNoBncZXtTcnnSP4u6gVt0fd7W9LC6u # QGGGTEV8UkRhiW4s/Dxd6HOt0OS9m4sDWbubYv9nzIfRM1X8rfKqOCnjKxbeU/lI # kdoZpK1FSyzKcH+QvEVYaQv33BitVrx3h+WQKgSCZTmTit9TjshBAEDAvzfL6oML # xYM4oqf0kWqlJjIfatx11dfLJLpAwk8jtgKz9iSPH11lLqGQmsdPNMEdXvUiuiSZ # tddvuKn0AKwTNO+OWonztBO2aiADSO9hZhWAPVuZUTYCt9zWyQF4ddAgOm2+FZOg # B9u01aBNSodTaBFASDabWnoi/09lPuhcqINB18XJXG3EsdbrtTP9PjHkSL8Oj+eA # v2g+uuxIlD3OfvTdrRAVpRjrGBcz3yKkPOw4KA/pnCyP/w3SnoObu0GjFcD4Okuk # pfvd8eAw7dI= # =K0wD # -----END PGP SIGNATURE----- # gpg: Signature made Wed 30 Apr 2025 14:48:36 EDT # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * tag 'pull-request-2025-04-30' of https://gitlab.com/thuth/qemu: docs/devel/build-environment: enhance MSYS2 instructions hw/rtc/mc146818rtc: Drop pre-v3 migration stream support meson.build: Put the D-Bus summary into the UI section tests/functional/test_ppc64_pseries: Skip test_ppc64_linux_smt_boot if necessary Drop support for Python 3.8 meson/configure: add 'valgrind' option & --{en, dis}able-valgrind flag target/s390x: Return UVC cmd code, RC and RRC value when DIAG 308 Subcode 10 fails to enter secure mode target/s390x: Introduce function when exiting PV target/s390x: Introduce constant when checking if PV header couldn't be decrypted Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
| * docs/devel/build-environment: enhance MSYS2 instructionsPierrick Bouvier2025-04-301-2/+2
| | | | | | | | | | | | | | | | | | Add missing prerequisite packages, and use more explicit makepkg command. Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-ID: <20250430181047.2043492-1-pierrick.bouvier@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
* | tcg: Remove INDEX_op_qemu_st8_*Richard Henderson2025-04-281-6/+0
| | | | | | | | | | | | | | | | | | The i386 backend can now check TCGOP_FLAGS to select the correct set of constraints. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Remove add2/sub2 opcodesRichard Henderson2025-04-281-11/+3
| | | | | | | | | | | | | | | | All uses have been replaced by add/sub carry opcodes. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Add add/sub with carry opcodes and infrastructureRichard Henderson2025-04-281-0/+61
| | | | | | | | | | | | | | | | | | | | | | | | Liveness needs to track carry-live state in order to determine if the (hidden) output of the opcode is used. Code generation needs to track carry-live state in order to avoid clobbering cpu flags when loading constants. So far, output routines and backends are unchanged. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Merge INDEX_op_extract2_{i32,i64}Richard Henderson2025-04-281-2/+2
| | | | | | | | | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Merge INDEX_op_deposit_{i32,i64}Richard Henderson2025-04-281-2/+4
| | | | | | | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Merge INDEX_op_sextract_{i32,i64}Richard Henderson2025-04-281-1/+1
| | | | | | | | | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Merge INDEX_op_extract_{i32,i64}Richard Henderson2025-04-281-3/+3
| | | | | | | | | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Rename INDEX_op_bswap64_i64 to INDEX_op_bswap64Richard Henderson2025-04-281-2/+3
| | | | | | | | | | | | | | | | | | Even though bswap64 can only be used with TCG_TYPE_I64, rename the opcode to maintain uniformity. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Merge INDEX_op_bswap32_{i32,i64}Richard Henderson2025-04-281-7/+6
| | | | | | | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Merge INDEX_op_bswap16_{i32,i64}Richard Henderson2025-04-281-1/+1
| | | | | | | | | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Merge INDEX_op_movcond_{i32,i64}Richard Henderson2025-04-281-1/+1
| | | | | | | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Merge INDEX_op_brcond_{i32,i64}Richard Henderson2025-04-281-1/+1
| | | | | | | | | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Merge INDEX_op_{neg}setcond_{i32,i64}`Richard Henderson2025-04-281-2/+2
| | | | | | | | | | Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Merge INDEX_op_mulu2_{i32,i64}Richard Henderson2025-04-281-1/+1
| | | | | | | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Merge INDEX_op_muls2_{i32,i64}Richard Henderson2025-04-281-1/+1
| | | | | | | | | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Merge INDEX_op_ctpop_{i32,i64}Richard Henderson2025-04-281-3/+3
| | | | | | | | | | Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Merge INDEX_op_ctz_{i32,i64}Richard Henderson2025-04-281-1/+1
| | | | | | | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Merge INDEX_op_clz_{i32,i64}Richard Henderson2025-04-281-1/+1
| | | | | | | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Merge INDEX_op_rot{l,r}_{i32,i64}Richard Henderson2025-04-281-4/+4
| | | | | | | | | | Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Merge INDEX_op_sar_{i32,i64}Richard Henderson2025-04-281-2/+2
| | | | | | | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Merge INDEX_op_shr_{i32,i64}Richard Henderson2025-04-281-2/+2
| | | | | | | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Merge INDEX_op_shl_{i32,i64}Richard Henderson2025-04-281-2/+2
| | | | | | | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Merge INDEX_op_remu_{i32,i64}Richard Henderson2025-04-281-1/+1
| | | | | | | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Merge INDEX_op_rem_{i32,i64}Richard Henderson2025-04-281-1/+1
| | | | | | | | | | | | | | | | Rename to INDEX_op_rems to emphasize signed inputs, and mirroring INDEX_op_remu_*. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Merge INDEX_op_divu2_{i32,i64}Richard Henderson2025-04-281-0/+10
| | | | | | | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Merge INDEX_op_div2_{i32,i64}Richard Henderson2025-04-281-0/+9
| | | | | | | | | | | | | | | | Rename to INDEX_op_divs2 to emphasize signed inputs, and mirroring INDEX_op_divu2_*. Document the opcode. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Merge INDEX_op_divu_{i32,i64}Richard Henderson2025-04-281-1/+1
| | | | | | | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Merge INDEX_op_div_{i32,i64}Richard Henderson2025-04-281-1/+1
| | | | | | | | | | | | | | | | | | Rename to INDEX_op_divs to emphasize signed inputs, and mirroring INDEX_op_divu_*. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Merge INDEX_op_mulsh_{i32,i64}Richard Henderson2025-04-281-1/+1
| | | | | | | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Merge INDEX_op_muluh_{i32,i64}Richard Henderson2025-04-281-1/+1
| | | | | | | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Merge INDEX_op_mul_{i32,i64}Richard Henderson2025-04-281-1/+1
| | | | | | | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Merge INDEX_op_not_{i32,i64}Richard Henderson2025-04-281-1/+1
| | | | | | | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Merge INDEX_op_neg_{i32,i64}Richard Henderson2025-04-281-1/+1
| | | | | | | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Merge INDEX_op_sub_{i32,i64}Richard Henderson2025-04-281-1/+1
| | | | | | | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Merge INDEX_op_nor_{i32,i64}Richard Henderson2025-04-281-1/+1
| | | | | | | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Merge INDEX_op_nand_{i32,i64}Richard Henderson2025-04-281-1/+1
| | | | | | | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Merge INDEX_op_eqv_{i32,i64}Richard Henderson2025-04-281-1/+1
| | | | | | | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Merge INDEX_op_xor_{i32,i64}Richard Henderson2025-04-281-1/+1
| | | | | | | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Merge INDEX_op_orc_{i32,i64}Richard Henderson2025-04-281-1/+1
| | | | | | | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Merge INDEX_op_or_{i32,i64}Richard Henderson2025-04-281-1/+1
| | | | | | | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Merge INDEX_op_andc_{i32,i64}Richard Henderson2025-04-281-1/+1
| | | | | | | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Merge INDEX_op_and_{i32,i64}Richard Henderson2025-04-281-1/+1
| | | | | | | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Merge INDEX_op_add_{i32,i64}Richard Henderson2025-04-281-1/+1
| | | | | | | | | | | | | | Rely on TCGOP_TYPE instead of opcodes specific to each type. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Merge INDEX_op_mov_{i32,i64}Richard Henderson2025-04-281-2/+2
| | | | | | | | | | | | | | | | | | Begin to rely on TCGOp.type to discriminate operations, rather than two different opcodes. Convert mov first. Introduce TCG_OPF_INT in order to keep opcode dumps the same. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | tcg: Remove INDEX_op_ext{8,16,32}*Richard Henderson2025-04-281-14/+0
|/ | | | | | | Use the fully general extract opcodes instead. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>