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2025-10-07hw/arm/xlnx-versal: efuse: refactor creationLuc Michel3-72/+54
Refactore the eFuse devices creation using the VersalMap structure. Note that the corresponding FDT nodes are removed. They do not correspond to any real node in standard Versal DTBs. No matching drivers exist for them. Signed-off-by: Luc Michel <luc.michel@amd.com> Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20250926070806.292065-11-luc.michel@amd.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-07hw/arm/xlnx-versal: usb: refactor creationLuc Michel3-73/+62
Refactor the USB controller creation using the VersalMap structure. Note that the connection to the CRL is removed for now and will be re-added by next commits. Signed-off-by: Luc Michel <luc.michel@amd.com> Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20250926070806.292065-10-luc.michel@amd.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-07hw/arm/xlnx-versal: xram: refactor creationLuc Michel2-30/+35
Refactor the XRAM devices creation using the VersalMap structure. Signed-off-by: Luc Michel <luc.michel@amd.com> Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20250926070806.292065-9-luc.michel@amd.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-07hw/arm/xlnx-versal: adma: refactor creationLuc Michel3-55/+49
Refactor the ADMA creation using the VersalMap structure. Note that the connection to the CRL is removed for now and will be re-added by next commits. Signed-off-by: Luc Michel <luc.michel@amd.com> Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20250926070806.292065-8-luc.michel@amd.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-07hw/arm/xlnx-versal: gem: refactor creationLuc Michel3-97/+117
Refactor the GEM ethernet controllers creation using the VersalMap structure. Note that the connection to the CRL is removed for now and will be re-added by next commits. The FDT nodes are created in reverse order compared to the devices creation to keep backward compatibility with the previous generated FDTs. Signed-off-by: Luc Michel <luc.michel@amd.com> Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20250926070806.292065-7-luc.michel@amd.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-07hw/arm/xlnx-versal: sdhci: refactor creationLuc Michel3-61/+83
Refactor the SDHCI controllers creation using the VersalMap structure. Signed-off-by: Luc Michel <luc.michel@amd.com> Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20250926070806.292065-6-luc.michel@amd.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-07hw/arm/xlnx-versal: canfd: refactor creationLuc Michel3-79/+95
Refactor the CAN controllers creation using the VersalMap structure. Note that the connection to the CRL is removed for now and will be re-added by next commits. The xlnx-versal-virt machine now dynamically creates the correct amount of CAN bus link properties based on the number of CAN controller advertised by the SoC. Signed-off-by: Luc Michel <luc.michel@amd.com> Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20250926070806.292065-5-luc.michel@amd.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-07hw/arm/xlnx-versal: uart: refactor creationLuc Michel3-66/+122
Refactor the UARTs creations. The VersalMap struct is now used to describe the SoC and its peripherals. For now it contains the two UARTs mapping information. The creation function now embeds the FDT creation logic as well. The devices are now created dynamically using qdev_new and (qdev|sysbus)_realize_and_unref. This will allow to rely entirely on the VersalMap structure to create the SoC and allow easy addition of new SoCs of the same family (like versal2 coming with next commits). Note that the connection to the CRL is removed for now and will be re-added by next commits. Signed-off-by: Luc Michel <luc.michel@amd.com> Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20250926070806.292065-4-luc.michel@amd.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-07hw/arm/xlnx-versal: prepare for FDT creationLuc Michel3-3/+42
The following commits will move FDT creation logic from the xlnx-versal-virt machine to the xlnx-versal SoC itself. Prepare this by passing the FDT handle to the SoC before it is realized. For now the SoC only creates the two clock nodes. The ones from the xlnx-versal virt machine are renamed with a `old-' prefix and will be removed once they are not referenced anymore. Signed-off-by: Luc Michel <luc.michel@amd.com> Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20250926070806.292065-3-luc.michel@amd.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-07hw/arm/xlnx-versal: split the xlnx-versal typeLuc Michel3-8/+50
Split the xlnx-versal device into two classes, a base, abstract class and the existing concrete one. Introduce a VersalVersion type that will be used across several device models when versal2 implementation is added. This is in preparation for versal2 implementation. Signed-off-by: Luc Michel <luc.michel@amd.com> Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20250926070806.292065-2-luc.michel@amd.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-10-07target/arm: Don't set HCR.RW for AArch32 only CPUsPeter Maydell1-1/+2
In commit 39ec3fc0301 we fixed a bug where we were not implementing HCR_EL2.RW as RAO/WI for CPUs where EL1 doesn't support AArch32. However, we got the condition wrong, so we now set this bit even on CPUs which have no AArch64 support at all. This is wrong because the AArch32 HCR register defines this bit as RES0. Correct the condition we use for forcing HCR_RW to be set. Cc: qemu-stable@nongnu.org Resolves: https://gitlab.com/qemu-project/qemu/-/issues/3128 Fixes: 39ec3fc0301 ("target/arm: HCR_EL2.RW should be RAO/WI if EL1 doesn't support AArch32") Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20250925115723.1293233-1-peter.maydell@linaro.org
2025-10-07record/replay: fix race condition on test_aarch64_reverse_debugVladimir Lukianov2-1/+2
Ensures EVENT_INSTRUCTION written to replay.bin before EVENT_SHUTDOWN_HOST_QMP Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2921 Signed-off-by: Vladimir Lukianov <1844144@gmail.com> Message-ID: <20250603125459.17688-1-1844144@gmail.com> [AJB: fix re-base file mode] Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2025-10-07tests/functional: Adapt arches to reverse_debugging w/o AvocadoGustavo Romero3-25/+16
reverse_debugging no longer depends on Avocado, so remove the import checks for Avocado, the per-arch endianness tweaks, and the per-arch register settings. All of these are now handled in the ReverseDebugging class, automatically. Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org> Message-ID: <20251003141820.85278-10-gustavo.romero@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2025-10-07tests/functional: Adapt reverse_debugging to run w/o AvocadoGustavo Romero1-64/+75
This commit removes Avocado as a dependency for running the reverse_debugging test. The main benefit, beyond eliminating an extra dependency, is that there is no longer any need to handle GDB packets manually. This removes the need for ad-hoc functions dealing with endianness and arch-specific register numbers, making the test easier to read. The timeout variable is also removed, since Meson now manages timeouts automatically. reverse_debugging now uses the pygdbmi module to interact with GDB, if it is available in the test environment, otherwise the test is skipped. GDB is detect via the QEMU_TEST_GDB env. variable. This commit also significantly improves the output for the test and now prints all the GDB commands used in sequence. It also adds some clarifications to existing comments, for example, clarifying that once the replay-break is reached, a SIGINT is captured in GDB. reverse_debugging is kept "skipped" for aarch64, ppc64, and x86_64, so won't run unless QEMU_TEST_FLAKY_TESTS=1 is set in the test environment, before running 'make check-functional' or 'meson test [...]'. Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org> Message-ID: <20251003141820.85278-9-gustavo.romero@linaro.org> [AJB: it is and broke long line] Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Thomas Huth <thuth@redhat.com>
2025-10-07tests/functional: Add decorator to skip test on missing env varsGustavo Romero2-1/+20
Add a decorator to skip tests on missing env variable(s). Multiple variable names can be provided and if one or more of them are not set in the test environment the test is skipped and the missing vars are printed out. Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org> Message-ID: <20251003141820.85278-8-gustavo.romero@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2025-10-07tests/functional: drop datadrainer class in reverse debuggingDaniel P. Berrangé1-6/+0
The reverse debugging test uses the avocado datadrainer class to create a background thread that reads from the console socket and dumps it via python logger. Most tests log console output as a side effect of doing calls to match strings, but this test never tries to match anything. This isn't critical, so just drop the functionality. Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-ID: <20251003141820.85278-7-gustavo.romero@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2025-10-07tests/functional: replace avocado process with subprocessDaniel P. Berrangé1-3/+4
The standard python subprocess.check_call method is better than avocado.utils.process as it doesn't require stuffing all args into a single string. Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-ID: <20251003141820.85278-6-gustavo.romero@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2025-10-07tests/functional: Add GDB classGustavo Romero2-0/+87
Add GDB class, which provides methods to run GDB commands and capture their output. The GDB class is a wrapper around the pygdbmi module and interacts with GDB via GDB's machine interface (MI). Acked-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org> Message-ID: <20251003141820.85278-5-gustavo.romero@linaro.org> [AJB: trimmed excess license text] Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2025-10-07tests/functional: Provide GDB to the functional testsGustavo Romero4-0/+12
The probe of GDB is done in 'configure' and the full path is passed to meson.build via the -Dgdb=option. Meson then can pass the location of GDB to the functional tests via an environment variable: QEMU_TEST_GDB. Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org> Message-ID: <20251003141820.85278-4-gustavo.romero@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2025-10-07python: Install pygdbmi in meson's venvGustavo Romero1-0/+1
The upcoming changes in the reverse_debugging functional test to remove Avocado as a dependency will require pygdbmi for interacting with GDB, so install it in meson's venv (located in the build dir's pyvenv/). Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org> Message-ID: <20251003141820.85278-3-gustavo.romero@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2025-10-07tests/functional: Re-activate the check-venv targetGustavo Romero1-2/+2
Add check-venv target as a dependency for the functional tests. This causes Python modules listed in pythondeps.toml, under the testdeps group, to be installed when 'make check-functional{-<ARCH>}' is executed to prepare and run the functional tests. Suggested-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org> Message-ID: <20251003141820.85278-2-gustavo.romero@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2025-10-07scripts/ci: use recommended registration commandAlex Bennée2-12/+5
The registration-token method is being deprecated: https://docs.gitlab.com/ci/runners/new_creation_workflow/ As a result we can drop a bunch of the descriptive stuff as that is entered on the web UI. We don't need a secondary runner if we just create one with both aarch64 and aarch32 tags. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20251001170947.2769296-8-alex.bennee@linaro.org>
2025-10-07gitlab: move custom runners to Ubuntu 24.04Alex Bennée4-37/+37
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20251001170947.2769296-7-alex.bennee@linaro.org>
2025-10-07tests/lcitool: bump custom runner packages to Ubuntu 24.04Alex Bennée5-11/+15
In anticipation of new runners lets move to a newer Ubuntu LTS. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20251001170947.2769296-6-alex.bennee@linaro.org>
2025-10-07tests/lcitool: drop 64 bit guests from i686 cross buildAlex Bennée2-3/+1
With only TCG available we can't support 64 bit guests on a 32 bit host. Fixes: 5c27baf9519 (docs/about/deprecated: Deprecate 32-bit x86 hosts for system emulation) Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20251001170947.2769296-5-alex.bennee@linaro.org>
2025-10-07.gitmodules: restore qemu-project mirror of u-boot-sam460exAlex Bennée1-1/+2
With this change also reference the upstream repo. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20251001170947.2769296-4-alex.bennee@linaro.org>
2025-10-07.gitmodules: restore qemu-project mirror of u-bootAlex Bennée1-1/+2
With this change also reference the upstream repo. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20251001170947.2769296-3-alex.bennee@linaro.org>
2025-10-07.gitpublish: use origin/master as default baseAlex Bennée1-8/+8
This is very much the result of my recent fat finger but I think it's safer to assume that origin/master points to a recent commit (or at least a commit a given branch is based on) than master. Acked-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20251001170947.2769296-2-alex.bennee@linaro.org>
2025-10-07system/physmem: Extract API out of 'system/ram_addr.h' headerPhilippe Mathieu-Daudé12-44/+63
Very few files use the Physical Memory API. Declare its methods in their own header: "system/physmem.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Cédric Le Goater <clg@redhat.com> Message-Id: <20251001175448.18933-19-philmd@linaro.org>
2025-10-07system/physmem: Drop 'cpu_' prefix in Physical Memory APIPhilippe Mathieu-Daudé11-59/+59
The functions related to the Physical Memory API declared in "system/ram_addr.h" do not operate on vCPU. Remove the 'cpu_' prefix. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Cédric Le Goater <clg@redhat.com> Message-Id: <20251001175448.18933-18-philmd@linaro.org>
2025-10-07system/physmem: Reduce cpu_physical_memory_sync_dirty_bitmap() scopePhilippe Mathieu-Daudé2-80/+76
cpu_physical_memory_sync_dirty_bitmap() is now only called within system/physmem.c, by ramblock_sync_dirty_bitmap(). Reduce its scope by making it internal to this file. Since it doesn't involve any CPU, remove the 'cpu_' prefix. Remove the now unneeded "qemu/rcu.h" and "system/memory.h" headers. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20251001175448.18933-17-philmd@linaro.org>
2025-10-07system/physmem: Reduce cpu_physical_memory_clear_dirty_range() scopePhilippe Mathieu-Daudé2-10/+8
cpu_physical_memory_clear_dirty_range() is now only called within system/physmem.c, by qemu_ram_resize(). Reduce its scope by making it internal to this file. Since it doesn't involve any CPU, remove the 'cpu_' prefix. As it operates on a range, rename @start as @addr. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20251001175448.18933-16-philmd@linaro.org>
2025-10-07system/physmem: Un-inline cpu_physical_memory_dirty_bits_cleared()Philippe Mathieu-Daudé2-9/+8
Avoid maintaining large functions in header, rely on the linker to optimize at linking time. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20251001175448.18933-15-philmd@linaro.org>
2025-10-07system/physmem: Un-inline cpu_physical_memory_set_dirty_lebitmap()Philippe Mathieu-Daudé2-101/+104
Avoid maintaining large functions in header, rely on the linker to optimize at linking time. Remove the now unneeded "system/xen.h" header. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20251001175448.18933-14-philmd@linaro.org>
2025-10-07system/physmem: Remove _WIN32 #ifdef'ryPhilippe Mathieu-Daudé1-3/+0
Commit fb3ecb7ea40 ("exec: Exclude non portable function for MinGW") guarded cpu_physical_memory_set_dirty_lebitmap() within _WIN32 #ifdef'ry because of the non-portable ffsl() call, which was later replaced for the same reason by commit 7224f66ec3c ("exec: replace ffsl with ctzl"); we don't need that anymore. Reported-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20251001175448.18933-13-philmd@linaro.org>
2025-10-07system/physmem: Un-inline cpu_physical_memory_set_dirty_range()Philippe Mathieu-Daudé2-51/+53
Avoid maintaining large functions in header, rely on the linker to optimize at linking time. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20251001175448.18933-12-philmd@linaro.org>
2025-10-07system/physmem: Un-inline cpu_physical_memory_set_dirty_flag()Philippe Mathieu-Daudé2-18/+19
Avoid maintaining large functions in header, rely on the linker to optimize at linking time. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20251001175448.18933-11-philmd@linaro.org>
2025-10-07system/physmem: Un-inline cpu_physical_memory_range_includes_clean()Philippe Mathieu-Daudé2-59/+63
Avoid maintaining large functions in header, rely on the linker to optimize at linking time. cpu_physical_memory_all_dirty() doesn't involve any CPU, remove the 'cpu_' prefix. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20251001175448.18933-10-philmd@linaro.org>
2025-10-07system/physmem: Un-inline cpu_physical_memory_is_clean()Philippe Mathieu-Daudé2-8/+10
Avoid maintaining large functions in header, rely on the linker to optimize at linking time. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20251001175448.18933-9-philmd@linaro.org>
2025-10-07system/physmem: Un-inline cpu_physical_memory_get_dirty_flag()Philippe Mathieu-Daudé2-45/+45
Avoid maintaining large functions in header, rely on the linker to optimize at linking time. cpu_physical_memory_get_dirty() doesn't involve any CPU, remove the 'cpu_' prefix. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20251001175448.18933-8-philmd@linaro.org>
2025-10-07hw: Remove unnecessary 'system/ram_addr.h' headerPhilippe Mathieu-Daudé8-8/+0
None of these files require definition exposed by "system/ram_addr.h", remove its inclusion. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Jagannathan Raman <jag.raman@oracle.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Reviewed-by: Eric Farman <farman@linux.ibm.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20251001175448.18933-7-philmd@linaro.org>
2025-10-07target/arm/tcg/mte: Include missing 'exec/target_page.h' headerPhilippe Mathieu-Daudé1-0/+1
The "exec/target_page.h" header is indirectly pulled from "system/ram_addr.h". Include it explicitly, in order to avoid unrelated issues when refactoring "system/ram_addr.h": target/arm/tcg/mte_helper.c:815:23: error: use of undeclared identifier 'TARGET_PAGE_MASK' 815 | prev_page = ptr & TARGET_PAGE_MASK; | ^ target/arm/tcg/mte_helper.c:816:29: error: use of undeclared identifier 'TARGET_PAGE_SIZE' 816 | next_page = prev_page + TARGET_PAGE_SIZE; | ^ Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20251001175448.18933-6-philmd@linaro.org>
2025-10-07hw/vfio/listener: Include missing 'exec/target_page.h' headerPhilippe Mathieu-Daudé1-0/+1
The "exec/target_page.h" header is indirectly pulled from "system/ram_addr.h". Include it explicitly, in order to avoid unrelated issues when refactoring "system/ram_addr.h": hw/vfio/listener.c: In function ‘vfio_ram_discard_register_listener’: hw/vfio/listener.c:258:28: error: implicit declaration of function ‘qemu_target_page_size’; did you mean ‘qemu_ram_pagesize’? 258 | int target_page_size = qemu_target_page_size(); | ^~~~~~~~~~~~~~~~~~~~~ Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Cédric Le Goater <clg@redhat.com> Message-Id: <20251001175448.18933-5-philmd@linaro.org>
2025-10-07hw/s390x/s390-stattrib: Include missing 'exec/target_page.h' headerPhilippe Mathieu-Daudé2-2/+2
The "exec/target_page.h" header is indirectly pulled from "system/ram_addr.h". Include it explicitly, in order to avoid unrelated issues when refactoring "system/ram_addr.h": hw/s390x/s390-stattrib-kvm.c: In function ‘kvm_s390_stattrib_set_stattr’: hw/s390x/s390-stattrib-kvm.c:89:57: error: ‘TARGET_PAGE_SIZE’ undeclared (first use in this function); did you mean ‘TARGET_PAGE_BITS’? 89 | unsigned long max = s390_get_memory_limit(s390ms) / TARGET_PAGE_SIZE; | ^~~~~~~~~~~~~~~~ | TARGET_PAGE_BITS Since "system/ram_addr.h" is actually not needed, remove it. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Eric Farman <farman@linux.ibm.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20251001175448.18933-4-philmd@linaro.org>
2025-10-07accel/kvm: Include missing 'exec/target_page.h' headerPhilippe Mathieu-Daudé1-0/+1
The "exec/target_page.h" header is indirectly pulled from "system/ram_addr.h". Include it explicitly, in order to avoid unrelated issues when refactoring "system/ram_addr.h": accel/kvm/kvm-all.c: In function ‘kvm_init’: accel/kvm/kvm-all.c:2636:12: error: ‘TARGET_PAGE_SIZE’ undeclared (first use in this function); did you mean ‘TARGET_PAGE_BITS’? 2636 | assert(TARGET_PAGE_SIZE <= qemu_real_host_page_size()); | ^~~~~~~~~~~~~~~~ Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20251001175448.18933-3-philmd@linaro.org>
2025-10-07system/ram_addr: Remove unnecessary 'exec/cpu-common.h' headerPhilippe Mathieu-Daudé1-1/+0
Nothing in "system/ram_addr.h" requires definitions from "exec/cpu-common.h", remove it. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20251001175448.18933-2-philmd@linaro.org>
2025-10-07hw/virtio/virtio: Replace legacy cpu_physical_memory_map() callPhilippe Mathieu-Daudé1-4/+6
Propagate VirtIODevice::dma_as to virtqueue_undo_map_desc() in order to replace the legacy cpu_physical_memory_unmap() call by address_space_unmap(). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20251002084203.63899-18-philmd@linaro.org>
2025-10-07hw/virtio/vhost: Replace legacy cpu_physical_memory_*map() callsPhilippe Mathieu-Daudé1-2/+5
Use VirtIODevice::dma_as address space to convert the legacy cpu_physical_memory_[un]map() calls to address_space_[un]map(). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20251002084203.63899-17-philmd@linaro.org>
2025-10-07system/physmem: Remove legacy cpu_physical_memory_rw()Philippe Mathieu-Daudé4-22/+1
The legacy cpu_physical_memory_rw() method is no more used, remove it. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20251002084203.63899-16-philmd@linaro.org>
2025-10-07system/physmem: Avoid cpu_physical_memory_rw when is_write is constantPhilippe Mathieu-Daudé2-14/+4
Following the mechanical changes of commit adeefe01671 ("Avoid cpu_physical_memory_rw() with a constant is_write argument"), replace: - cpu_physical_memory_rw(, is_write=false) -> address_space_read() - cpu_physical_memory_rw(, is_write=true) -> address_space_write() Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20251002084203.63899-15-philmd@linaro.org>